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[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / usb / gadget / pxa25x_udc.c
blobbe5fb34d9602366d520cd0fbe905a1d75b0e1025
1 /*
2 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
4 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
5 * Copyright (C) 2003 Robert Schwebel, Pengutronix
6 * Copyright (C) 2003 Benedikt Spranger, Pengutronix
7 * Copyright (C) 2003 David Brownell
8 * Copyright (C) 2003 Joshua Wise
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 /* #define VERBOSE_DEBUG */
28 #include <linux/device.h>
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/ioport.h>
32 #include <linux/types.h>
33 #include <linux/errno.h>
34 #include <linux/delay.h>
35 #include <linux/slab.h>
36 #include <linux/init.h>
37 #include <linux/timer.h>
38 #include <linux/list.h>
39 #include <linux/interrupt.h>
40 #include <linux/mm.h>
41 #include <linux/platform_device.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/irq.h>
44 #include <linux/clk.h>
45 #include <linux/err.h>
46 #include <linux/seq_file.h>
47 #include <linux/debugfs.h>
48 #include <linux/io.h>
50 #include <asm/byteorder.h>
51 #include <asm/dma.h>
52 #include <asm/gpio.h>
53 #include <asm/system.h>
54 #include <asm/mach-types.h>
55 #include <asm/unaligned.h>
57 #include <linux/usb/ch9.h>
58 #include <linux/usb/gadget.h>
59 #include <linux/usb/otg.h>
62 * This driver is PXA25x only. Grab the right register definitions.
64 #ifdef CONFIG_ARCH_PXA
65 #include <mach/pxa25x-udc.h>
66 #endif
68 #ifdef CONFIG_ARCH_LUBBOCK
69 #include <mach/lubbock.h>
70 #endif
72 #include <asm/mach/udc_pxa2xx.h>
76 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
77 * series processors. The UDC for the IXP 4xx series is very similar.
78 * There are fifteen endpoints, in addition to ep0.
80 * Such controller drivers work with a gadget driver. The gadget driver
81 * returns descriptors, implements configuration and data protocols used
82 * by the host to interact with this device, and allocates endpoints to
83 * the different protocol interfaces. The controller driver virtualizes
84 * usb hardware so that the gadget drivers will be more portable.
86 * This UDC hardware wants to implement a bit too much USB protocol, so
87 * it constrains the sorts of USB configuration change events that work.
88 * The errata for these chips are misleading; some "fixed" bugs from
89 * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
91 * Note that the UDC hardware supports DMA (except on IXP) but that's
92 * not used here. IN-DMA (to host) is simple enough, when the data is
93 * suitably aligned (16 bytes) ... the network stack doesn't do that,
94 * other software can. OUT-DMA is buggy in most chip versions, as well
95 * as poorly designed (data toggle not automatic). So this driver won't
96 * bother using DMA. (Mostly-working IN-DMA support was available in
97 * kernels before 2.6.23, but was never enabled or well tested.)
100 #define DRIVER_VERSION "30-June-2007"
101 #define DRIVER_DESC "PXA 25x USB Device Controller driver"
104 static const char driver_name [] = "pxa25x_udc";
106 static const char ep0name [] = "ep0";
109 #ifdef CONFIG_ARCH_IXP4XX
111 /* cpu-specific register addresses are compiled in to this code */
112 #ifdef CONFIG_ARCH_PXA
113 #error "Can't configure both IXP and PXA"
114 #endif
116 /* IXP doesn't yet support <linux/clk.h> */
117 #define clk_get(dev,name) NULL
118 #define clk_enable(clk) do { } while (0)
119 #define clk_disable(clk) do { } while (0)
120 #define clk_put(clk) do { } while (0)
122 #endif
124 #include "pxa25x_udc.h"
127 #ifdef CONFIG_USB_PXA25X_SMALL
128 #define SIZE_STR " (small)"
129 #else
130 #define SIZE_STR ""
131 #endif
133 /* ---------------------------------------------------------------------------
134 * endpoint related parts of the api to the usb controller hardware,
135 * used by gadget driver; and the inner talker-to-hardware core.
136 * ---------------------------------------------------------------------------
139 static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
140 static void nuke (struct pxa25x_ep *, int status);
142 /* one GPIO should be used to detect VBUS from the host */
143 static int is_vbus_present(void)
145 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
147 if (gpio_is_valid(mach->gpio_vbus)) {
148 int value = gpio_get_value(mach->gpio_vbus);
150 if (mach->gpio_vbus_inverted)
151 return !value;
152 else
153 return !!value;
155 if (mach->udc_is_connected)
156 return mach->udc_is_connected();
157 return 1;
160 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
161 static void pullup_off(void)
163 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
164 int off_level = mach->gpio_pullup_inverted;
166 if (gpio_is_valid(mach->gpio_pullup))
167 gpio_set_value(mach->gpio_pullup, off_level);
168 else if (mach->udc_command)
169 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
172 static void pullup_on(void)
174 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
175 int on_level = !mach->gpio_pullup_inverted;
177 if (gpio_is_valid(mach->gpio_pullup))
178 gpio_set_value(mach->gpio_pullup, on_level);
179 else if (mach->udc_command)
180 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
183 static void pio_irq_enable(int bEndpointAddress)
185 bEndpointAddress &= 0xf;
186 if (bEndpointAddress < 8)
187 UICR0 &= ~(1 << bEndpointAddress);
188 else {
189 bEndpointAddress -= 8;
190 UICR1 &= ~(1 << bEndpointAddress);
194 static void pio_irq_disable(int bEndpointAddress)
196 bEndpointAddress &= 0xf;
197 if (bEndpointAddress < 8)
198 UICR0 |= 1 << bEndpointAddress;
199 else {
200 bEndpointAddress -= 8;
201 UICR1 |= 1 << bEndpointAddress;
205 /* The UDCCR reg contains mask and interrupt status bits,
206 * so using '|=' isn't safe as it may ack an interrupt.
208 #define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
210 static inline void udc_set_mask_UDCCR(int mask)
212 UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
215 static inline void udc_clear_mask_UDCCR(int mask)
217 UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
220 static inline void udc_ack_int_UDCCR(int mask)
222 /* udccr contains the bits we dont want to change */
223 __u32 udccr = UDCCR & UDCCR_MASK_BITS;
225 UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
229 * endpoint enable/disable
231 * we need to verify the descriptors used to enable endpoints. since pxa25x
232 * endpoint configurations are fixed, and are pretty much always enabled,
233 * there's not a lot to manage here.
235 * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
236 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
237 * for a single interface (with only the default altsetting) and for gadget
238 * drivers that don't halt endpoints (not reset by set_interface). that also
239 * means that if you use ISO, you must violate the USB spec rule that all
240 * iso endpoints must be in non-default altsettings.
242 static int pxa25x_ep_enable (struct usb_ep *_ep,
243 const struct usb_endpoint_descriptor *desc)
245 struct pxa25x_ep *ep;
246 struct pxa25x_udc *dev;
248 ep = container_of (_ep, struct pxa25x_ep, ep);
249 if (!_ep || !desc || ep->desc || _ep->name == ep0name
250 || desc->bDescriptorType != USB_DT_ENDPOINT
251 || ep->bEndpointAddress != desc->bEndpointAddress
252 || ep->fifo_size < le16_to_cpu
253 (desc->wMaxPacketSize)) {
254 DMSG("%s, bad ep or descriptor\n", __func__);
255 return -EINVAL;
258 /* xfer types must match, except that interrupt ~= bulk */
259 if (ep->bmAttributes != desc->bmAttributes
260 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
261 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
262 DMSG("%s, %s type mismatch\n", __func__, _ep->name);
263 return -EINVAL;
266 /* hardware _could_ do smaller, but driver doesn't */
267 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
268 && le16_to_cpu (desc->wMaxPacketSize)
269 != BULK_FIFO_SIZE)
270 || !desc->wMaxPacketSize) {
271 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);
272 return -ERANGE;
275 dev = ep->dev;
276 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
277 DMSG("%s, bogus device state\n", __func__);
278 return -ESHUTDOWN;
281 ep->desc = desc;
282 ep->stopped = 0;
283 ep->pio_irqs = 0;
284 ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize);
286 /* flush fifo (mostly for OUT buffers) */
287 pxa25x_ep_fifo_flush (_ep);
289 /* ... reset halt state too, if we could ... */
291 DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
292 return 0;
295 static int pxa25x_ep_disable (struct usb_ep *_ep)
297 struct pxa25x_ep *ep;
298 unsigned long flags;
300 ep = container_of (_ep, struct pxa25x_ep, ep);
301 if (!_ep || !ep->desc) {
302 DMSG("%s, %s not enabled\n", __func__,
303 _ep ? ep->ep.name : NULL);
304 return -EINVAL;
306 local_irq_save(flags);
308 nuke (ep, -ESHUTDOWN);
310 /* flush fifo (mostly for IN buffers) */
311 pxa25x_ep_fifo_flush (_ep);
313 ep->desc = NULL;
314 ep->stopped = 1;
316 local_irq_restore(flags);
317 DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
318 return 0;
321 /*-------------------------------------------------------------------------*/
323 /* for the pxa25x, these can just wrap kmalloc/kfree. gadget drivers
324 * must still pass correctly initialized endpoints, since other controller
325 * drivers may care about how it's currently set up (dma issues etc).
329 * pxa25x_ep_alloc_request - allocate a request data structure
331 static struct usb_request *
332 pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
334 struct pxa25x_request *req;
336 req = kzalloc(sizeof(*req), gfp_flags);
337 if (!req)
338 return NULL;
340 INIT_LIST_HEAD (&req->queue);
341 return &req->req;
346 * pxa25x_ep_free_request - deallocate a request data structure
348 static void
349 pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
351 struct pxa25x_request *req;
353 req = container_of (_req, struct pxa25x_request, req);
354 WARN_ON(!list_empty (&req->queue));
355 kfree(req);
358 /*-------------------------------------------------------------------------*/
361 * done - retire a request; caller blocked irqs
363 static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
365 unsigned stopped = ep->stopped;
367 list_del_init(&req->queue);
369 if (likely (req->req.status == -EINPROGRESS))
370 req->req.status = status;
371 else
372 status = req->req.status;
374 if (status && status != -ESHUTDOWN)
375 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
376 ep->ep.name, &req->req, status,
377 req->req.actual, req->req.length);
379 /* don't modify queue heads during completion callback */
380 ep->stopped = 1;
381 req->req.complete(&ep->ep, &req->req);
382 ep->stopped = stopped;
386 static inline void ep0_idle (struct pxa25x_udc *dev)
388 dev->ep0state = EP0_IDLE;
391 static int
392 write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
394 u8 *buf;
395 unsigned length, count;
397 buf = req->req.buf + req->req.actual;
398 prefetch(buf);
400 /* how big will this packet be? */
401 length = min(req->req.length - req->req.actual, max);
402 req->req.actual += length;
404 count = length;
405 while (likely(count--))
406 *uddr = *buf++;
408 return length;
412 * write to an IN endpoint fifo, as many packets as possible.
413 * irqs will use this to write the rest later.
414 * caller guarantees at least one packet buffer is ready (or a zlp).
416 static int
417 write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
419 unsigned max;
421 max = le16_to_cpu(ep->desc->wMaxPacketSize);
422 do {
423 unsigned count;
424 int is_last, is_short;
426 count = write_packet(ep->reg_uddr, req, max);
428 /* last packet is usually short (or a zlp) */
429 if (unlikely (count != max))
430 is_last = is_short = 1;
431 else {
432 if (likely(req->req.length != req->req.actual)
433 || req->req.zero)
434 is_last = 0;
435 else
436 is_last = 1;
437 /* interrupt/iso maxpacket may not fill the fifo */
438 is_short = unlikely (max < ep->fifo_size);
441 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
442 ep->ep.name, count,
443 is_last ? "/L" : "", is_short ? "/S" : "",
444 req->req.length - req->req.actual, req);
446 /* let loose that packet. maybe try writing another one,
447 * double buffering might work. TSP, TPC, and TFS
448 * bit values are the same for all normal IN endpoints.
450 *ep->reg_udccs = UDCCS_BI_TPC;
451 if (is_short)
452 *ep->reg_udccs = UDCCS_BI_TSP;
454 /* requests complete when all IN data is in the FIFO */
455 if (is_last) {
456 done (ep, req, 0);
457 if (list_empty(&ep->queue))
458 pio_irq_disable (ep->bEndpointAddress);
459 return 1;
462 // TODO experiment: how robust can fifo mode tweaking be?
463 // double buffering is off in the default fifo mode, which
464 // prevents TFS from being set here.
466 } while (*ep->reg_udccs & UDCCS_BI_TFS);
467 return 0;
470 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
471 * ep0 data stage. these chips want very simple state transitions.
473 static inline
474 void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
476 UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
477 USIR0 = USIR0_IR0;
478 dev->req_pending = 0;
479 DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
480 __func__, tag, UDCCS0, flags);
483 static int
484 write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
486 unsigned count;
487 int is_short;
489 count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
490 ep->dev->stats.write.bytes += count;
492 /* last packet "must be" short (or a zlp) */
493 is_short = (count != EP0_FIFO_SIZE);
495 DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
496 req->req.length - req->req.actual, req);
498 if (unlikely (is_short)) {
499 if (ep->dev->req_pending)
500 ep0start(ep->dev, UDCCS0_IPR, "short IN");
501 else
502 UDCCS0 = UDCCS0_IPR;
504 count = req->req.length;
505 done (ep, req, 0);
506 ep0_idle(ep->dev);
507 #ifndef CONFIG_ARCH_IXP4XX
508 #if 1
509 /* This seems to get rid of lost status irqs in some cases:
510 * host responds quickly, or next request involves config
511 * change automagic, or should have been hidden, or ...
513 * FIXME get rid of all udelays possible...
515 if (count >= EP0_FIFO_SIZE) {
516 count = 100;
517 do {
518 if ((UDCCS0 & UDCCS0_OPR) != 0) {
519 /* clear OPR, generate ack */
520 UDCCS0 = UDCCS0_OPR;
521 break;
523 count--;
524 udelay(1);
525 } while (count);
527 #endif
528 #endif
529 } else if (ep->dev->req_pending)
530 ep0start(ep->dev, 0, "IN");
531 return is_short;
536 * read_fifo - unload packet(s) from the fifo we use for usb OUT
537 * transfers and put them into the request. caller should have made
538 * sure there's at least one packet ready.
540 * returns true if the request completed because of short packet or the
541 * request buffer having filled (and maybe overran till end-of-packet).
543 static int
544 read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
546 for (;;) {
547 u32 udccs;
548 u8 *buf;
549 unsigned bufferspace, count, is_short;
551 /* make sure there's a packet in the FIFO.
552 * UDCCS_{BO,IO}_RPC are all the same bit value.
553 * UDCCS_{BO,IO}_RNE are all the same bit value.
555 udccs = *ep->reg_udccs;
556 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
557 break;
558 buf = req->req.buf + req->req.actual;
559 prefetchw(buf);
560 bufferspace = req->req.length - req->req.actual;
562 /* read all bytes from this packet */
563 if (likely (udccs & UDCCS_BO_RNE)) {
564 count = 1 + (0x0ff & *ep->reg_ubcr);
565 req->req.actual += min (count, bufferspace);
566 } else /* zlp */
567 count = 0;
568 is_short = (count < ep->ep.maxpacket);
569 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
570 ep->ep.name, udccs, count,
571 is_short ? "/S" : "",
572 req, req->req.actual, req->req.length);
573 while (likely (count-- != 0)) {
574 u8 byte = (u8) *ep->reg_uddr;
576 if (unlikely (bufferspace == 0)) {
577 /* this happens when the driver's buffer
578 * is smaller than what the host sent.
579 * discard the extra data.
581 if (req->req.status != -EOVERFLOW)
582 DMSG("%s overflow %d\n",
583 ep->ep.name, count);
584 req->req.status = -EOVERFLOW;
585 } else {
586 *buf++ = byte;
587 bufferspace--;
590 *ep->reg_udccs = UDCCS_BO_RPC;
591 /* RPC/RSP/RNE could now reflect the other packet buffer */
593 /* iso is one request per packet */
594 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
595 if (udccs & UDCCS_IO_ROF)
596 req->req.status = -EHOSTUNREACH;
597 /* more like "is_done" */
598 is_short = 1;
601 /* completion */
602 if (is_short || req->req.actual == req->req.length) {
603 done (ep, req, 0);
604 if (list_empty(&ep->queue))
605 pio_irq_disable (ep->bEndpointAddress);
606 return 1;
609 /* finished that packet. the next one may be waiting... */
611 return 0;
615 * special ep0 version of the above. no UBCR0 or double buffering; status
616 * handshaking is magic. most device protocols don't need control-OUT.
617 * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
618 * protocols do use them.
620 static int
621 read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
623 u8 *buf, byte;
624 unsigned bufferspace;
626 buf = req->req.buf + req->req.actual;
627 bufferspace = req->req.length - req->req.actual;
629 while (UDCCS0 & UDCCS0_RNE) {
630 byte = (u8) UDDR0;
632 if (unlikely (bufferspace == 0)) {
633 /* this happens when the driver's buffer
634 * is smaller than what the host sent.
635 * discard the extra data.
637 if (req->req.status != -EOVERFLOW)
638 DMSG("%s overflow\n", ep->ep.name);
639 req->req.status = -EOVERFLOW;
640 } else {
641 *buf++ = byte;
642 req->req.actual++;
643 bufferspace--;
647 UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
649 /* completion */
650 if (req->req.actual >= req->req.length)
651 return 1;
653 /* finished that packet. the next one may be waiting... */
654 return 0;
657 /*-------------------------------------------------------------------------*/
659 static int
660 pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
662 struct pxa25x_request *req;
663 struct pxa25x_ep *ep;
664 struct pxa25x_udc *dev;
665 unsigned long flags;
667 req = container_of(_req, struct pxa25x_request, req);
668 if (unlikely (!_req || !_req->complete || !_req->buf
669 || !list_empty(&req->queue))) {
670 DMSG("%s, bad params\n", __func__);
671 return -EINVAL;
674 ep = container_of(_ep, struct pxa25x_ep, ep);
675 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
676 DMSG("%s, bad ep\n", __func__);
677 return -EINVAL;
680 dev = ep->dev;
681 if (unlikely (!dev->driver
682 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
683 DMSG("%s, bogus device state\n", __func__);
684 return -ESHUTDOWN;
687 /* iso is always one packet per request, that's the only way
688 * we can report per-packet status. that also helps with dma.
690 if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
691 && req->req.length > le16_to_cpu
692 (ep->desc->wMaxPacketSize)))
693 return -EMSGSIZE;
695 DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
696 _ep->name, _req, _req->length, _req->buf);
698 local_irq_save(flags);
700 _req->status = -EINPROGRESS;
701 _req->actual = 0;
703 /* kickstart this i/o queue? */
704 if (list_empty(&ep->queue) && !ep->stopped) {
705 if (ep->desc == NULL/* ep0 */) {
706 unsigned length = _req->length;
708 switch (dev->ep0state) {
709 case EP0_IN_DATA_PHASE:
710 dev->stats.write.ops++;
711 if (write_ep0_fifo(ep, req))
712 req = NULL;
713 break;
715 case EP0_OUT_DATA_PHASE:
716 dev->stats.read.ops++;
717 /* messy ... */
718 if (dev->req_config) {
719 DBG(DBG_VERBOSE, "ep0 config ack%s\n",
720 dev->has_cfr ? "" : " raced");
721 if (dev->has_cfr)
722 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
723 |UDCCFR_MB1;
724 done(ep, req, 0);
725 dev->ep0state = EP0_END_XFER;
726 local_irq_restore (flags);
727 return 0;
729 if (dev->req_pending)
730 ep0start(dev, UDCCS0_IPR, "OUT");
731 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
732 && read_ep0_fifo(ep, req))) {
733 ep0_idle(dev);
734 done(ep, req, 0);
735 req = NULL;
737 break;
739 default:
740 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
741 local_irq_restore (flags);
742 return -EL2HLT;
744 /* can the FIFO can satisfy the request immediately? */
745 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
746 if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
747 && write_fifo(ep, req))
748 req = NULL;
749 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
750 && read_fifo(ep, req)) {
751 req = NULL;
754 if (likely (req && ep->desc))
755 pio_irq_enable(ep->bEndpointAddress);
758 /* pio or dma irq handler advances the queue. */
759 if (likely(req != NULL))
760 list_add_tail(&req->queue, &ep->queue);
761 local_irq_restore(flags);
763 return 0;
768 * nuke - dequeue ALL requests
770 static void nuke(struct pxa25x_ep *ep, int status)
772 struct pxa25x_request *req;
774 /* called with irqs blocked */
775 while (!list_empty(&ep->queue)) {
776 req = list_entry(ep->queue.next,
777 struct pxa25x_request,
778 queue);
779 done(ep, req, status);
781 if (ep->desc)
782 pio_irq_disable (ep->bEndpointAddress);
786 /* dequeue JUST ONE request */
787 static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
789 struct pxa25x_ep *ep;
790 struct pxa25x_request *req;
791 unsigned long flags;
793 ep = container_of(_ep, struct pxa25x_ep, ep);
794 if (!_ep || ep->ep.name == ep0name)
795 return -EINVAL;
797 local_irq_save(flags);
799 /* make sure it's actually queued on this endpoint */
800 list_for_each_entry (req, &ep->queue, queue) {
801 if (&req->req == _req)
802 break;
804 if (&req->req != _req) {
805 local_irq_restore(flags);
806 return -EINVAL;
809 done(ep, req, -ECONNRESET);
811 local_irq_restore(flags);
812 return 0;
815 /*-------------------------------------------------------------------------*/
817 static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
819 struct pxa25x_ep *ep;
820 unsigned long flags;
822 ep = container_of(_ep, struct pxa25x_ep, ep);
823 if (unlikely (!_ep
824 || (!ep->desc && ep->ep.name != ep0name))
825 || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
826 DMSG("%s, bad ep\n", __func__);
827 return -EINVAL;
829 if (value == 0) {
830 /* this path (reset toggle+halt) is needed to implement
831 * SET_INTERFACE on normal hardware. but it can't be
832 * done from software on the PXA UDC, and the hardware
833 * forgets to do it as part of SET_INTERFACE automagic.
835 DMSG("only host can clear %s halt\n", _ep->name);
836 return -EROFS;
839 local_irq_save(flags);
841 if ((ep->bEndpointAddress & USB_DIR_IN) != 0
842 && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
843 || !list_empty(&ep->queue))) {
844 local_irq_restore(flags);
845 return -EAGAIN;
848 /* FST bit is the same for control, bulk in, bulk out, interrupt in */
849 *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
851 /* ep0 needs special care */
852 if (!ep->desc) {
853 start_watchdog(ep->dev);
854 ep->dev->req_pending = 0;
855 ep->dev->ep0state = EP0_STALL;
857 /* and bulk/intr endpoints like dropping stalls too */
858 } else {
859 unsigned i;
860 for (i = 0; i < 1000; i += 20) {
861 if (*ep->reg_udccs & UDCCS_BI_SST)
862 break;
863 udelay(20);
866 local_irq_restore(flags);
868 DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
869 return 0;
872 static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
874 struct pxa25x_ep *ep;
876 ep = container_of(_ep, struct pxa25x_ep, ep);
877 if (!_ep) {
878 DMSG("%s, bad ep\n", __func__);
879 return -ENODEV;
881 /* pxa can't report unclaimed bytes from IN fifos */
882 if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
883 return -EOPNOTSUPP;
884 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
885 || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
886 return 0;
887 else
888 return (*ep->reg_ubcr & 0xfff) + 1;
891 static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
893 struct pxa25x_ep *ep;
895 ep = container_of(_ep, struct pxa25x_ep, ep);
896 if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
897 DMSG("%s, bad ep\n", __func__);
898 return;
901 /* toggle and halt bits stay unchanged */
903 /* for OUT, just read and discard the FIFO contents. */
904 if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
905 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
906 (void) *ep->reg_uddr;
907 return;
910 /* most IN status is the same, but ISO can't stall */
911 *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
912 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
913 ? 0 : UDCCS_BI_SST);
917 static struct usb_ep_ops pxa25x_ep_ops = {
918 .enable = pxa25x_ep_enable,
919 .disable = pxa25x_ep_disable,
921 .alloc_request = pxa25x_ep_alloc_request,
922 .free_request = pxa25x_ep_free_request,
924 .queue = pxa25x_ep_queue,
925 .dequeue = pxa25x_ep_dequeue,
927 .set_halt = pxa25x_ep_set_halt,
928 .fifo_status = pxa25x_ep_fifo_status,
929 .fifo_flush = pxa25x_ep_fifo_flush,
933 /* ---------------------------------------------------------------------------
934 * device-scoped parts of the api to the usb controller hardware
935 * ---------------------------------------------------------------------------
938 static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
940 return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
943 static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
945 /* host may not have enabled remote wakeup */
946 if ((UDCCS0 & UDCCS0_DRWF) == 0)
947 return -EHOSTUNREACH;
948 udc_set_mask_UDCCR(UDCCR_RSM);
949 return 0;
952 static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
953 static void udc_enable (struct pxa25x_udc *);
954 static void udc_disable(struct pxa25x_udc *);
956 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
957 * in active use.
959 static int pullup(struct pxa25x_udc *udc)
961 int is_active = udc->vbus && udc->pullup && !udc->suspended;
962 DMSG("%s\n", is_active ? "active" : "inactive");
963 if (is_active) {
964 if (!udc->active) {
965 udc->active = 1;
966 /* Enable clock for USB device */
967 clk_enable(udc->clk);
968 udc_enable(udc);
970 } else {
971 if (udc->active) {
972 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
973 DMSG("disconnect %s\n", udc->driver
974 ? udc->driver->driver.name
975 : "(no driver)");
976 stop_activity(udc, udc->driver);
978 udc_disable(udc);
979 /* Disable clock for USB device */
980 clk_disable(udc->clk);
981 udc->active = 0;
985 return 0;
988 /* VBUS reporting logically comes from a transceiver */
989 static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
991 struct pxa25x_udc *udc;
993 udc = container_of(_gadget, struct pxa25x_udc, gadget);
994 udc->vbus = is_active;
995 DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
996 pullup(udc);
997 return 0;
1000 /* drivers may have software control over D+ pullup */
1001 static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
1003 struct pxa25x_udc *udc;
1005 udc = container_of(_gadget, struct pxa25x_udc, gadget);
1007 /* not all boards support pullup control */
1008 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
1009 return -EOPNOTSUPP;
1011 udc->pullup = (is_active != 0);
1012 pullup(udc);
1013 return 0;
1016 /* boards may consume current from VBUS, up to 100-500mA based on config.
1017 * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs
1018 * violate USB specs.
1020 static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1022 struct pxa25x_udc *udc;
1024 udc = container_of(_gadget, struct pxa25x_udc, gadget);
1026 if (udc->transceiver)
1027 return otg_set_power(udc->transceiver, mA);
1028 return -EOPNOTSUPP;
1031 static const struct usb_gadget_ops pxa25x_udc_ops = {
1032 .get_frame = pxa25x_udc_get_frame,
1033 .wakeup = pxa25x_udc_wakeup,
1034 .vbus_session = pxa25x_udc_vbus_session,
1035 .pullup = pxa25x_udc_pullup,
1036 .vbus_draw = pxa25x_udc_vbus_draw,
1039 /*-------------------------------------------------------------------------*/
1041 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1043 static int
1044 udc_seq_show(struct seq_file *m, void *_d)
1046 struct pxa25x_udc *dev = m->private;
1047 unsigned long flags;
1048 int i;
1049 u32 tmp;
1051 local_irq_save(flags);
1053 /* basic device status */
1054 seq_printf(m, DRIVER_DESC "\n"
1055 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1056 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1057 dev->driver ? dev->driver->driver.name : "(none)",
1058 is_vbus_present() ? "full speed" : "disconnected");
1060 /* registers for device and ep0 */
1061 seq_printf(m,
1062 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1063 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1065 tmp = UDCCR;
1066 seq_printf(m,
1067 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1068 (tmp & UDCCR_REM) ? " rem" : "",
1069 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1070 (tmp & UDCCR_SRM) ? " srm" : "",
1071 (tmp & UDCCR_SUSIR) ? " susir" : "",
1072 (tmp & UDCCR_RESIR) ? " resir" : "",
1073 (tmp & UDCCR_RSM) ? " rsm" : "",
1074 (tmp & UDCCR_UDA) ? " uda" : "",
1075 (tmp & UDCCR_UDE) ? " ude" : "");
1077 tmp = UDCCS0;
1078 seq_printf(m,
1079 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1080 (tmp & UDCCS0_SA) ? " sa" : "",
1081 (tmp & UDCCS0_RNE) ? " rne" : "",
1082 (tmp & UDCCS0_FST) ? " fst" : "",
1083 (tmp & UDCCS0_SST) ? " sst" : "",
1084 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1085 (tmp & UDCCS0_FTF) ? " ftf" : "",
1086 (tmp & UDCCS0_IPR) ? " ipr" : "",
1087 (tmp & UDCCS0_OPR) ? " opr" : "");
1089 if (dev->has_cfr) {
1090 tmp = UDCCFR;
1091 seq_printf(m,
1092 "udccfr %02X =%s%s\n", tmp,
1093 (tmp & UDCCFR_AREN) ? " aren" : "",
1094 (tmp & UDCCFR_ACM) ? " acm" : "");
1097 if (!is_vbus_present() || !dev->driver)
1098 goto done;
1100 seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1101 dev->stats.write.bytes, dev->stats.write.ops,
1102 dev->stats.read.bytes, dev->stats.read.ops,
1103 dev->stats.irqs);
1105 /* dump endpoint queues */
1106 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1107 struct pxa25x_ep *ep = &dev->ep [i];
1108 struct pxa25x_request *req;
1110 if (i != 0) {
1111 const struct usb_endpoint_descriptor *desc;
1113 desc = ep->desc;
1114 if (!desc)
1115 continue;
1116 tmp = *dev->ep [i].reg_udccs;
1117 seq_printf(m,
1118 "%s max %d %s udccs %02x irqs %lu\n",
1119 ep->ep.name, le16_to_cpu(desc->wMaxPacketSize),
1120 "pio", tmp, ep->pio_irqs);
1121 /* TODO translate all five groups of udccs bits! */
1123 } else /* ep0 should only have one transfer queued */
1124 seq_printf(m, "ep0 max 16 pio irqs %lu\n",
1125 ep->pio_irqs);
1127 if (list_empty(&ep->queue)) {
1128 seq_printf(m, "\t(nothing queued)\n");
1129 continue;
1131 list_for_each_entry(req, &ep->queue, queue) {
1132 seq_printf(m,
1133 "\treq %p len %d/%d buf %p\n",
1134 &req->req, req->req.actual,
1135 req->req.length, req->req.buf);
1139 done:
1140 local_irq_restore(flags);
1141 return 0;
1144 static int
1145 udc_debugfs_open(struct inode *inode, struct file *file)
1147 return single_open(file, udc_seq_show, inode->i_private);
1150 static const struct file_operations debug_fops = {
1151 .open = udc_debugfs_open,
1152 .read = seq_read,
1153 .llseek = seq_lseek,
1154 .release = single_release,
1155 .owner = THIS_MODULE,
1158 #define create_debug_files(dev) \
1159 do { \
1160 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1161 S_IRUGO, NULL, dev, &debug_fops); \
1162 } while (0)
1163 #define remove_debug_files(dev) \
1164 do { \
1165 if (dev->debugfs_udc) \
1166 debugfs_remove(dev->debugfs_udc); \
1167 } while (0)
1169 #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
1171 #define create_debug_files(dev) do {} while (0)
1172 #define remove_debug_files(dev) do {} while (0)
1174 #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
1176 /*-------------------------------------------------------------------------*/
1179 * udc_disable - disable USB device controller
1181 static void udc_disable(struct pxa25x_udc *dev)
1183 /* block all irqs */
1184 udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1185 UICR0 = UICR1 = 0xff;
1186 UFNRH = UFNRH_SIM;
1188 /* if hardware supports it, disconnect from usb */
1189 pullup_off();
1191 udc_clear_mask_UDCCR(UDCCR_UDE);
1193 ep0_idle (dev);
1194 dev->gadget.speed = USB_SPEED_UNKNOWN;
1199 * udc_reinit - initialize software state
1201 static void udc_reinit(struct pxa25x_udc *dev)
1203 u32 i;
1205 /* device/ep0 records init */
1206 INIT_LIST_HEAD (&dev->gadget.ep_list);
1207 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1208 dev->ep0state = EP0_IDLE;
1210 /* basic endpoint records init */
1211 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1212 struct pxa25x_ep *ep = &dev->ep[i];
1214 if (i != 0)
1215 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1217 ep->desc = NULL;
1218 ep->stopped = 0;
1219 INIT_LIST_HEAD (&ep->queue);
1220 ep->pio_irqs = 0;
1223 /* the rest was statically initialized, and is read-only */
1226 /* until it's enabled, this UDC should be completely invisible
1227 * to any USB host.
1229 static void udc_enable (struct pxa25x_udc *dev)
1231 udc_clear_mask_UDCCR(UDCCR_UDE);
1233 /* try to clear these bits before we enable the udc */
1234 udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1236 ep0_idle(dev);
1237 dev->gadget.speed = USB_SPEED_UNKNOWN;
1238 dev->stats.irqs = 0;
1241 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1242 * - enable UDC
1243 * - if RESET is already in progress, ack interrupt
1244 * - unmask reset interrupt
1246 udc_set_mask_UDCCR(UDCCR_UDE);
1247 if (!(UDCCR & UDCCR_UDA))
1248 udc_ack_int_UDCCR(UDCCR_RSTIR);
1250 if (dev->has_cfr /* UDC_RES2 is defined */) {
1251 /* pxa255 (a0+) can avoid a set_config race that could
1252 * prevent gadget drivers from configuring correctly
1254 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1255 } else {
1256 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1257 * which could result in missing packets and interrupts.
1258 * supposedly one bit per endpoint, controlling whether it
1259 * double buffers or not; ACM/AREN bits fit into the holes.
1260 * zero bits (like USIR0_IRx) disable double buffering.
1262 UDC_RES1 = 0x00;
1263 UDC_RES2 = 0x00;
1266 /* enable suspend/resume and reset irqs */
1267 udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1269 /* enable ep0 irqs */
1270 UICR0 &= ~UICR0_IM0;
1272 /* if hardware supports it, pullup D+ and wait for reset */
1273 pullup_on();
1277 /* when a driver is successfully registered, it will receive
1278 * control requests including set_configuration(), which enables
1279 * non-control requests. then usb traffic follows until a
1280 * disconnect is reported. then a host may connect again, or
1281 * the driver might get unbound.
1283 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1285 struct pxa25x_udc *dev = the_controller;
1286 int retval;
1288 if (!driver
1289 || driver->speed < USB_SPEED_FULL
1290 || !driver->bind
1291 || !driver->disconnect
1292 || !driver->setup)
1293 return -EINVAL;
1294 if (!dev)
1295 return -ENODEV;
1296 if (dev->driver)
1297 return -EBUSY;
1299 /* first hook up the driver ... */
1300 dev->driver = driver;
1301 dev->gadget.dev.driver = &driver->driver;
1302 dev->pullup = 1;
1304 retval = device_add (&dev->gadget.dev);
1305 if (retval) {
1306 fail:
1307 dev->driver = NULL;
1308 dev->gadget.dev.driver = NULL;
1309 return retval;
1311 retval = driver->bind(&dev->gadget);
1312 if (retval) {
1313 DMSG("bind to driver %s --> error %d\n",
1314 driver->driver.name, retval);
1315 device_del (&dev->gadget.dev);
1316 goto fail;
1319 /* ... then enable host detection and ep0; and we're ready
1320 * for set_configuration as well as eventual disconnect.
1322 DMSG("registered gadget driver '%s'\n", driver->driver.name);
1324 /* connect to bus through transceiver */
1325 if (dev->transceiver) {
1326 retval = otg_set_peripheral(dev->transceiver, &dev->gadget);
1327 if (retval) {
1328 DMSG("can't bind to transceiver\n");
1329 if (driver->unbind)
1330 driver->unbind(&dev->gadget);
1331 goto bind_fail;
1335 pullup(dev);
1336 dump_state(dev);
1337 return 0;
1338 bind_fail:
1339 return retval;
1341 EXPORT_SYMBOL(usb_gadget_register_driver);
1343 static void
1344 stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1346 int i;
1348 /* don't disconnect drivers more than once */
1349 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1350 driver = NULL;
1351 dev->gadget.speed = USB_SPEED_UNKNOWN;
1353 /* prevent new request submissions, kill any outstanding requests */
1354 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1355 struct pxa25x_ep *ep = &dev->ep[i];
1357 ep->stopped = 1;
1358 nuke(ep, -ESHUTDOWN);
1360 del_timer_sync(&dev->timer);
1362 /* report disconnect; the driver is already quiesced */
1363 if (driver)
1364 driver->disconnect(&dev->gadget);
1366 /* re-init driver-visible data structures */
1367 udc_reinit(dev);
1370 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1372 struct pxa25x_udc *dev = the_controller;
1374 if (!dev)
1375 return -ENODEV;
1376 if (!driver || driver != dev->driver || !driver->unbind)
1377 return -EINVAL;
1379 local_irq_disable();
1380 dev->pullup = 0;
1381 pullup(dev);
1382 stop_activity(dev, driver);
1383 local_irq_enable();
1385 if (dev->transceiver)
1386 (void) otg_set_peripheral(dev->transceiver, NULL);
1388 driver->unbind(&dev->gadget);
1389 dev->gadget.dev.driver = NULL;
1390 dev->driver = NULL;
1392 device_del (&dev->gadget.dev);
1394 DMSG("unregistered gadget driver '%s'\n", driver->driver.name);
1395 dump_state(dev);
1396 return 0;
1398 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1401 /*-------------------------------------------------------------------------*/
1403 #ifdef CONFIG_ARCH_LUBBOCK
1405 /* Lubbock has separate connect and disconnect irqs. More typical designs
1406 * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1409 static irqreturn_t
1410 lubbock_vbus_irq(int irq, void *_dev)
1412 struct pxa25x_udc *dev = _dev;
1413 int vbus;
1415 dev->stats.irqs++;
1416 switch (irq) {
1417 case LUBBOCK_USB_IRQ:
1418 vbus = 1;
1419 disable_irq(LUBBOCK_USB_IRQ);
1420 enable_irq(LUBBOCK_USB_DISC_IRQ);
1421 break;
1422 case LUBBOCK_USB_DISC_IRQ:
1423 vbus = 0;
1424 disable_irq(LUBBOCK_USB_DISC_IRQ);
1425 enable_irq(LUBBOCK_USB_IRQ);
1426 break;
1427 default:
1428 return IRQ_NONE;
1431 pxa25x_udc_vbus_session(&dev->gadget, vbus);
1432 return IRQ_HANDLED;
1435 #endif
1437 static irqreturn_t udc_vbus_irq(int irq, void *_dev)
1439 struct pxa25x_udc *dev = _dev;
1441 pxa25x_udc_vbus_session(&dev->gadget, is_vbus_present());
1442 return IRQ_HANDLED;
1446 /*-------------------------------------------------------------------------*/
1448 static inline void clear_ep_state (struct pxa25x_udc *dev)
1450 unsigned i;
1452 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1453 * fifos, and pending transactions mustn't be continued in any case.
1455 for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1456 nuke(&dev->ep[i], -ECONNABORTED);
1459 static void udc_watchdog(unsigned long _dev)
1461 struct pxa25x_udc *dev = (void *)_dev;
1463 local_irq_disable();
1464 if (dev->ep0state == EP0_STALL
1465 && (UDCCS0 & UDCCS0_FST) == 0
1466 && (UDCCS0 & UDCCS0_SST) == 0) {
1467 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1468 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1469 start_watchdog(dev);
1471 local_irq_enable();
1474 static void handle_ep0 (struct pxa25x_udc *dev)
1476 u32 udccs0 = UDCCS0;
1477 struct pxa25x_ep *ep = &dev->ep [0];
1478 struct pxa25x_request *req;
1479 union {
1480 struct usb_ctrlrequest r;
1481 u8 raw [8];
1482 u32 word [2];
1483 } u;
1485 if (list_empty(&ep->queue))
1486 req = NULL;
1487 else
1488 req = list_entry(ep->queue.next, struct pxa25x_request, queue);
1490 /* clear stall status */
1491 if (udccs0 & UDCCS0_SST) {
1492 nuke(ep, -EPIPE);
1493 UDCCS0 = UDCCS0_SST;
1494 del_timer(&dev->timer);
1495 ep0_idle(dev);
1498 /* previous request unfinished? non-error iff back-to-back ... */
1499 if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1500 nuke(ep, 0);
1501 del_timer(&dev->timer);
1502 ep0_idle(dev);
1505 switch (dev->ep0state) {
1506 case EP0_IDLE:
1507 /* late-breaking status? */
1508 udccs0 = UDCCS0;
1510 /* start control request? */
1511 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1512 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1513 int i;
1515 nuke (ep, -EPROTO);
1517 /* read SETUP packet */
1518 for (i = 0; i < 8; i++) {
1519 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1520 bad_setup:
1521 DMSG("SETUP %d!\n", i);
1522 goto stall;
1524 u.raw [i] = (u8) UDDR0;
1526 if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1527 goto bad_setup;
1529 got_setup:
1530 DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1531 u.r.bRequestType, u.r.bRequest,
1532 le16_to_cpu(u.r.wValue),
1533 le16_to_cpu(u.r.wIndex),
1534 le16_to_cpu(u.r.wLength));
1536 /* cope with automagic for some standard requests. */
1537 dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1538 == USB_TYPE_STANDARD;
1539 dev->req_config = 0;
1540 dev->req_pending = 1;
1541 switch (u.r.bRequest) {
1542 /* hardware restricts gadget drivers here! */
1543 case USB_REQ_SET_CONFIGURATION:
1544 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1545 /* reflect hardware's automagic
1546 * up to the gadget driver.
1548 config_change:
1549 dev->req_config = 1;
1550 clear_ep_state(dev);
1551 /* if !has_cfr, there's no synch
1552 * else use AREN (later) not SA|OPR
1553 * USIR0_IR0 acts edge sensitive
1556 break;
1557 /* ... and here, even more ... */
1558 case USB_REQ_SET_INTERFACE:
1559 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1560 /* udc hardware is broken by design:
1561 * - altsetting may only be zero;
1562 * - hw resets all interfaces' eps;
1563 * - ep reset doesn't include halt(?).
1565 DMSG("broken set_interface (%d/%d)\n",
1566 le16_to_cpu(u.r.wIndex),
1567 le16_to_cpu(u.r.wValue));
1568 goto config_change;
1570 break;
1571 /* hardware was supposed to hide this */
1572 case USB_REQ_SET_ADDRESS:
1573 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1574 ep0start(dev, 0, "address");
1575 return;
1577 break;
1580 if (u.r.bRequestType & USB_DIR_IN)
1581 dev->ep0state = EP0_IN_DATA_PHASE;
1582 else
1583 dev->ep0state = EP0_OUT_DATA_PHASE;
1585 i = dev->driver->setup(&dev->gadget, &u.r);
1586 if (i < 0) {
1587 /* hardware automagic preventing STALL... */
1588 if (dev->req_config) {
1589 /* hardware sometimes neglects to tell
1590 * tell us about config change events,
1591 * so later ones may fail...
1593 WARNING("config change %02x fail %d?\n",
1594 u.r.bRequest, i);
1595 return;
1596 /* TODO experiment: if has_cfr,
1597 * hardware didn't ACK; maybe we
1598 * could actually STALL!
1601 DBG(DBG_VERBOSE, "protocol STALL, "
1602 "%02x err %d\n", UDCCS0, i);
1603 stall:
1604 /* the watchdog timer helps deal with cases
1605 * where udc seems to clear FST wrongly, and
1606 * then NAKs instead of STALLing.
1608 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1609 start_watchdog(dev);
1610 dev->ep0state = EP0_STALL;
1612 /* deferred i/o == no response yet */
1613 } else if (dev->req_pending) {
1614 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1615 || dev->req_std || u.r.wLength))
1616 ep0start(dev, 0, "defer");
1617 else
1618 ep0start(dev, UDCCS0_IPR, "defer/IPR");
1621 /* expect at least one data or status stage irq */
1622 return;
1624 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1625 == (UDCCS0_OPR|UDCCS0_SA))) {
1626 unsigned i;
1628 /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1629 * still observed on a pxa255 a0.
1631 DBG(DBG_VERBOSE, "e131\n");
1632 nuke(ep, -EPROTO);
1634 /* read SETUP data, but don't trust it too much */
1635 for (i = 0; i < 8; i++)
1636 u.raw [i] = (u8) UDDR0;
1637 if ((u.r.bRequestType & USB_RECIP_MASK)
1638 > USB_RECIP_OTHER)
1639 goto stall;
1640 if (u.word [0] == 0 && u.word [1] == 0)
1641 goto stall;
1642 goto got_setup;
1643 } else {
1644 /* some random early IRQ:
1645 * - we acked FST
1646 * - IPR cleared
1647 * - OPR got set, without SA (likely status stage)
1649 UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1651 break;
1652 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
1653 if (udccs0 & UDCCS0_OPR) {
1654 UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1655 DBG(DBG_VERBOSE, "ep0in premature status\n");
1656 if (req)
1657 done(ep, req, 0);
1658 ep0_idle(dev);
1659 } else /* irq was IPR clearing */ {
1660 if (req) {
1661 /* this IN packet might finish the request */
1662 (void) write_ep0_fifo(ep, req);
1663 } /* else IN token before response was written */
1665 break;
1666 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
1667 if (udccs0 & UDCCS0_OPR) {
1668 if (req) {
1669 /* this OUT packet might finish the request */
1670 if (read_ep0_fifo(ep, req))
1671 done(ep, req, 0);
1672 /* else more OUT packets expected */
1673 } /* else OUT token before read was issued */
1674 } else /* irq was IPR clearing */ {
1675 DBG(DBG_VERBOSE, "ep0out premature status\n");
1676 if (req)
1677 done(ep, req, 0);
1678 ep0_idle(dev);
1680 break;
1681 case EP0_END_XFER:
1682 if (req)
1683 done(ep, req, 0);
1684 /* ack control-IN status (maybe in-zlp was skipped)
1685 * also appears after some config change events.
1687 if (udccs0 & UDCCS0_OPR)
1688 UDCCS0 = UDCCS0_OPR;
1689 ep0_idle(dev);
1690 break;
1691 case EP0_STALL:
1692 UDCCS0 = UDCCS0_FST;
1693 break;
1695 USIR0 = USIR0_IR0;
1698 static void handle_ep(struct pxa25x_ep *ep)
1700 struct pxa25x_request *req;
1701 int is_in = ep->bEndpointAddress & USB_DIR_IN;
1702 int completed;
1703 u32 udccs, tmp;
1705 do {
1706 completed = 0;
1707 if (likely (!list_empty(&ep->queue)))
1708 req = list_entry(ep->queue.next,
1709 struct pxa25x_request, queue);
1710 else
1711 req = NULL;
1713 // TODO check FST handling
1715 udccs = *ep->reg_udccs;
1716 if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */
1717 tmp = UDCCS_BI_TUR;
1718 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1719 tmp |= UDCCS_BI_SST;
1720 tmp &= udccs;
1721 if (likely (tmp))
1722 *ep->reg_udccs = tmp;
1723 if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1724 completed = write_fifo(ep, req);
1726 } else { /* irq from RPC (or for ISO, ROF) */
1727 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1728 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1729 else
1730 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1731 tmp &= udccs;
1732 if (likely(tmp))
1733 *ep->reg_udccs = tmp;
1735 /* fifos can hold packets, ready for reading... */
1736 if (likely(req)) {
1737 completed = read_fifo(ep, req);
1738 } else
1739 pio_irq_disable (ep->bEndpointAddress);
1741 ep->pio_irqs++;
1742 } while (completed);
1746 * pxa25x_udc_irq - interrupt handler
1748 * avoid delays in ep0 processing. the control handshaking isn't always
1749 * under software control (pxa250c0 and the pxa255 are better), and delays
1750 * could cause usb protocol errors.
1752 static irqreturn_t
1753 pxa25x_udc_irq(int irq, void *_dev)
1755 struct pxa25x_udc *dev = _dev;
1756 int handled;
1758 dev->stats.irqs++;
1759 do {
1760 u32 udccr = UDCCR;
1762 handled = 0;
1764 /* SUSpend Interrupt Request */
1765 if (unlikely(udccr & UDCCR_SUSIR)) {
1766 udc_ack_int_UDCCR(UDCCR_SUSIR);
1767 handled = 1;
1768 DBG(DBG_VERBOSE, "USB suspend%s\n", is_vbus_present()
1769 ? "" : "+disconnect");
1771 if (!is_vbus_present())
1772 stop_activity(dev, dev->driver);
1773 else if (dev->gadget.speed != USB_SPEED_UNKNOWN
1774 && dev->driver
1775 && dev->driver->suspend)
1776 dev->driver->suspend(&dev->gadget);
1777 ep0_idle (dev);
1780 /* RESume Interrupt Request */
1781 if (unlikely(udccr & UDCCR_RESIR)) {
1782 udc_ack_int_UDCCR(UDCCR_RESIR);
1783 handled = 1;
1784 DBG(DBG_VERBOSE, "USB resume\n");
1786 if (dev->gadget.speed != USB_SPEED_UNKNOWN
1787 && dev->driver
1788 && dev->driver->resume
1789 && is_vbus_present())
1790 dev->driver->resume(&dev->gadget);
1793 /* ReSeT Interrupt Request - USB reset */
1794 if (unlikely(udccr & UDCCR_RSTIR)) {
1795 udc_ack_int_UDCCR(UDCCR_RSTIR);
1796 handled = 1;
1798 if ((UDCCR & UDCCR_UDA) == 0) {
1799 DBG(DBG_VERBOSE, "USB reset start\n");
1801 /* reset driver and endpoints,
1802 * in case that's not yet done
1804 stop_activity (dev, dev->driver);
1806 } else {
1807 DBG(DBG_VERBOSE, "USB reset end\n");
1808 dev->gadget.speed = USB_SPEED_FULL;
1809 memset(&dev->stats, 0, sizeof dev->stats);
1810 /* driver and endpoints are still reset */
1813 } else {
1814 u32 usir0 = USIR0 & ~UICR0;
1815 u32 usir1 = USIR1 & ~UICR1;
1816 int i;
1818 if (unlikely (!usir0 && !usir1))
1819 continue;
1821 DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1823 /* control traffic */
1824 if (usir0 & USIR0_IR0) {
1825 dev->ep[0].pio_irqs++;
1826 handle_ep0(dev);
1827 handled = 1;
1830 /* endpoint data transfers */
1831 for (i = 0; i < 8; i++) {
1832 u32 tmp = 1 << i;
1834 if (i && (usir0 & tmp)) {
1835 handle_ep(&dev->ep[i]);
1836 USIR0 |= tmp;
1837 handled = 1;
1839 #ifndef CONFIG_USB_PXA25X_SMALL
1840 if (usir1 & tmp) {
1841 handle_ep(&dev->ep[i+8]);
1842 USIR1 |= tmp;
1843 handled = 1;
1845 #endif
1849 /* we could also ask for 1 msec SOF (SIR) interrupts */
1851 } while (handled);
1852 return IRQ_HANDLED;
1855 /*-------------------------------------------------------------------------*/
1857 static void nop_release (struct device *dev)
1859 DMSG("%s %s\n", __func__, dev_name(dev));
1862 /* this uses load-time allocation and initialization (instead of
1863 * doing it at run-time) to save code, eliminate fault paths, and
1864 * be more obviously correct.
1866 static struct pxa25x_udc memory = {
1867 .gadget = {
1868 .ops = &pxa25x_udc_ops,
1869 .ep0 = &memory.ep[0].ep,
1870 .name = driver_name,
1871 .dev = {
1872 .init_name = "gadget",
1873 .release = nop_release,
1877 /* control endpoint */
1878 .ep[0] = {
1879 .ep = {
1880 .name = ep0name,
1881 .ops = &pxa25x_ep_ops,
1882 .maxpacket = EP0_FIFO_SIZE,
1884 .dev = &memory,
1885 .reg_udccs = &UDCCS0,
1886 .reg_uddr = &UDDR0,
1889 /* first group of endpoints */
1890 .ep[1] = {
1891 .ep = {
1892 .name = "ep1in-bulk",
1893 .ops = &pxa25x_ep_ops,
1894 .maxpacket = BULK_FIFO_SIZE,
1896 .dev = &memory,
1897 .fifo_size = BULK_FIFO_SIZE,
1898 .bEndpointAddress = USB_DIR_IN | 1,
1899 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1900 .reg_udccs = &UDCCS1,
1901 .reg_uddr = &UDDR1,
1903 .ep[2] = {
1904 .ep = {
1905 .name = "ep2out-bulk",
1906 .ops = &pxa25x_ep_ops,
1907 .maxpacket = BULK_FIFO_SIZE,
1909 .dev = &memory,
1910 .fifo_size = BULK_FIFO_SIZE,
1911 .bEndpointAddress = 2,
1912 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1913 .reg_udccs = &UDCCS2,
1914 .reg_ubcr = &UBCR2,
1915 .reg_uddr = &UDDR2,
1917 #ifndef CONFIG_USB_PXA25X_SMALL
1918 .ep[3] = {
1919 .ep = {
1920 .name = "ep3in-iso",
1921 .ops = &pxa25x_ep_ops,
1922 .maxpacket = ISO_FIFO_SIZE,
1924 .dev = &memory,
1925 .fifo_size = ISO_FIFO_SIZE,
1926 .bEndpointAddress = USB_DIR_IN | 3,
1927 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1928 .reg_udccs = &UDCCS3,
1929 .reg_uddr = &UDDR3,
1931 .ep[4] = {
1932 .ep = {
1933 .name = "ep4out-iso",
1934 .ops = &pxa25x_ep_ops,
1935 .maxpacket = ISO_FIFO_SIZE,
1937 .dev = &memory,
1938 .fifo_size = ISO_FIFO_SIZE,
1939 .bEndpointAddress = 4,
1940 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1941 .reg_udccs = &UDCCS4,
1942 .reg_ubcr = &UBCR4,
1943 .reg_uddr = &UDDR4,
1945 .ep[5] = {
1946 .ep = {
1947 .name = "ep5in-int",
1948 .ops = &pxa25x_ep_ops,
1949 .maxpacket = INT_FIFO_SIZE,
1951 .dev = &memory,
1952 .fifo_size = INT_FIFO_SIZE,
1953 .bEndpointAddress = USB_DIR_IN | 5,
1954 .bmAttributes = USB_ENDPOINT_XFER_INT,
1955 .reg_udccs = &UDCCS5,
1956 .reg_uddr = &UDDR5,
1959 /* second group of endpoints */
1960 .ep[6] = {
1961 .ep = {
1962 .name = "ep6in-bulk",
1963 .ops = &pxa25x_ep_ops,
1964 .maxpacket = BULK_FIFO_SIZE,
1966 .dev = &memory,
1967 .fifo_size = BULK_FIFO_SIZE,
1968 .bEndpointAddress = USB_DIR_IN | 6,
1969 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1970 .reg_udccs = &UDCCS6,
1971 .reg_uddr = &UDDR6,
1973 .ep[7] = {
1974 .ep = {
1975 .name = "ep7out-bulk",
1976 .ops = &pxa25x_ep_ops,
1977 .maxpacket = BULK_FIFO_SIZE,
1979 .dev = &memory,
1980 .fifo_size = BULK_FIFO_SIZE,
1981 .bEndpointAddress = 7,
1982 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1983 .reg_udccs = &UDCCS7,
1984 .reg_ubcr = &UBCR7,
1985 .reg_uddr = &UDDR7,
1987 .ep[8] = {
1988 .ep = {
1989 .name = "ep8in-iso",
1990 .ops = &pxa25x_ep_ops,
1991 .maxpacket = ISO_FIFO_SIZE,
1993 .dev = &memory,
1994 .fifo_size = ISO_FIFO_SIZE,
1995 .bEndpointAddress = USB_DIR_IN | 8,
1996 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1997 .reg_udccs = &UDCCS8,
1998 .reg_uddr = &UDDR8,
2000 .ep[9] = {
2001 .ep = {
2002 .name = "ep9out-iso",
2003 .ops = &pxa25x_ep_ops,
2004 .maxpacket = ISO_FIFO_SIZE,
2006 .dev = &memory,
2007 .fifo_size = ISO_FIFO_SIZE,
2008 .bEndpointAddress = 9,
2009 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2010 .reg_udccs = &UDCCS9,
2011 .reg_ubcr = &UBCR9,
2012 .reg_uddr = &UDDR9,
2014 .ep[10] = {
2015 .ep = {
2016 .name = "ep10in-int",
2017 .ops = &pxa25x_ep_ops,
2018 .maxpacket = INT_FIFO_SIZE,
2020 .dev = &memory,
2021 .fifo_size = INT_FIFO_SIZE,
2022 .bEndpointAddress = USB_DIR_IN | 10,
2023 .bmAttributes = USB_ENDPOINT_XFER_INT,
2024 .reg_udccs = &UDCCS10,
2025 .reg_uddr = &UDDR10,
2028 /* third group of endpoints */
2029 .ep[11] = {
2030 .ep = {
2031 .name = "ep11in-bulk",
2032 .ops = &pxa25x_ep_ops,
2033 .maxpacket = BULK_FIFO_SIZE,
2035 .dev = &memory,
2036 .fifo_size = BULK_FIFO_SIZE,
2037 .bEndpointAddress = USB_DIR_IN | 11,
2038 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2039 .reg_udccs = &UDCCS11,
2040 .reg_uddr = &UDDR11,
2042 .ep[12] = {
2043 .ep = {
2044 .name = "ep12out-bulk",
2045 .ops = &pxa25x_ep_ops,
2046 .maxpacket = BULK_FIFO_SIZE,
2048 .dev = &memory,
2049 .fifo_size = BULK_FIFO_SIZE,
2050 .bEndpointAddress = 12,
2051 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2052 .reg_udccs = &UDCCS12,
2053 .reg_ubcr = &UBCR12,
2054 .reg_uddr = &UDDR12,
2056 .ep[13] = {
2057 .ep = {
2058 .name = "ep13in-iso",
2059 .ops = &pxa25x_ep_ops,
2060 .maxpacket = ISO_FIFO_SIZE,
2062 .dev = &memory,
2063 .fifo_size = ISO_FIFO_SIZE,
2064 .bEndpointAddress = USB_DIR_IN | 13,
2065 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2066 .reg_udccs = &UDCCS13,
2067 .reg_uddr = &UDDR13,
2069 .ep[14] = {
2070 .ep = {
2071 .name = "ep14out-iso",
2072 .ops = &pxa25x_ep_ops,
2073 .maxpacket = ISO_FIFO_SIZE,
2075 .dev = &memory,
2076 .fifo_size = ISO_FIFO_SIZE,
2077 .bEndpointAddress = 14,
2078 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2079 .reg_udccs = &UDCCS14,
2080 .reg_ubcr = &UBCR14,
2081 .reg_uddr = &UDDR14,
2083 .ep[15] = {
2084 .ep = {
2085 .name = "ep15in-int",
2086 .ops = &pxa25x_ep_ops,
2087 .maxpacket = INT_FIFO_SIZE,
2089 .dev = &memory,
2090 .fifo_size = INT_FIFO_SIZE,
2091 .bEndpointAddress = USB_DIR_IN | 15,
2092 .bmAttributes = USB_ENDPOINT_XFER_INT,
2093 .reg_udccs = &UDCCS15,
2094 .reg_uddr = &UDDR15,
2096 #endif /* !CONFIG_USB_PXA25X_SMALL */
2099 #define CP15R0_VENDOR_MASK 0xffffe000
2101 #if defined(CONFIG_ARCH_PXA)
2102 #define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */
2104 #elif defined(CONFIG_ARCH_IXP4XX)
2105 #define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */
2107 #endif
2109 #define CP15R0_PROD_MASK 0x000003f0
2110 #define PXA25x 0x00000100 /* and PXA26x */
2111 #define PXA210 0x00000120
2113 #define CP15R0_REV_MASK 0x0000000f
2115 #define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2117 #define PXA255_A0 0x00000106 /* or PXA260_B1 */
2118 #define PXA250_C0 0x00000105 /* or PXA26x_B0 */
2119 #define PXA250_B2 0x00000104
2120 #define PXA250_B1 0x00000103 /* or PXA260_A0 */
2121 #define PXA250_B0 0x00000102
2122 #define PXA250_A1 0x00000101
2123 #define PXA250_A0 0x00000100
2125 #define PXA210_C0 0x00000125
2126 #define PXA210_B2 0x00000124
2127 #define PXA210_B1 0x00000123
2128 #define PXA210_B0 0x00000122
2129 #define IXP425_A0 0x000001c1
2130 #define IXP425_B0 0x000001f1
2131 #define IXP465_AD 0x00000200
2134 * probe - binds to the platform device
2136 static int __init pxa25x_udc_probe(struct platform_device *pdev)
2138 struct pxa25x_udc *dev = &memory;
2139 int retval, vbus_irq, irq;
2140 u32 chiprev;
2142 /* insist on Intel/ARM/XScale */
2143 asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2144 if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2145 pr_err("%s: not XScale!\n", driver_name);
2146 return -ENODEV;
2149 /* trigger chiprev-specific logic */
2150 switch (chiprev & CP15R0_PRODREV_MASK) {
2151 #if defined(CONFIG_ARCH_PXA)
2152 case PXA255_A0:
2153 dev->has_cfr = 1;
2154 break;
2155 case PXA250_A0:
2156 case PXA250_A1:
2157 /* A0/A1 "not released"; ep 13, 15 unusable */
2158 /* fall through */
2159 case PXA250_B2: case PXA210_B2:
2160 case PXA250_B1: case PXA210_B1:
2161 case PXA250_B0: case PXA210_B0:
2162 /* OUT-DMA is broken ... */
2163 /* fall through */
2164 case PXA250_C0: case PXA210_C0:
2165 break;
2166 #elif defined(CONFIG_ARCH_IXP4XX)
2167 case IXP425_A0:
2168 case IXP425_B0:
2169 case IXP465_AD:
2170 dev->has_cfr = 1;
2171 break;
2172 #endif
2173 default:
2174 pr_err("%s: unrecognized processor: %08x\n",
2175 driver_name, chiprev);
2176 /* iop3xx, ixp4xx, ... */
2177 return -ENODEV;
2180 irq = platform_get_irq(pdev, 0);
2181 if (irq < 0)
2182 return -ENODEV;
2184 dev->clk = clk_get(&pdev->dev, NULL);
2185 if (IS_ERR(dev->clk)) {
2186 retval = PTR_ERR(dev->clk);
2187 goto err_clk;
2190 pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2191 dev->has_cfr ? "" : " (!cfr)",
2192 SIZE_STR "(pio)"
2195 /* other non-static parts of init */
2196 dev->dev = &pdev->dev;
2197 dev->mach = pdev->dev.platform_data;
2199 dev->transceiver = otg_get_transceiver();
2201 if (gpio_is_valid(dev->mach->gpio_vbus)) {
2202 if ((retval = gpio_request(dev->mach->gpio_vbus,
2203 "pxa25x_udc GPIO VBUS"))) {
2204 dev_dbg(&pdev->dev,
2205 "can't get vbus gpio %d, err: %d\n",
2206 dev->mach->gpio_vbus, retval);
2207 goto err_gpio_vbus;
2209 gpio_direction_input(dev->mach->gpio_vbus);
2210 vbus_irq = gpio_to_irq(dev->mach->gpio_vbus);
2211 } else
2212 vbus_irq = 0;
2214 if (gpio_is_valid(dev->mach->gpio_pullup)) {
2215 if ((retval = gpio_request(dev->mach->gpio_pullup,
2216 "pca25x_udc GPIO PULLUP"))) {
2217 dev_dbg(&pdev->dev,
2218 "can't get pullup gpio %d, err: %d\n",
2219 dev->mach->gpio_pullup, retval);
2220 goto err_gpio_pullup;
2222 gpio_direction_output(dev->mach->gpio_pullup, 0);
2225 init_timer(&dev->timer);
2226 dev->timer.function = udc_watchdog;
2227 dev->timer.data = (unsigned long) dev;
2229 device_initialize(&dev->gadget.dev);
2230 dev->gadget.dev.parent = &pdev->dev;
2231 dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
2233 the_controller = dev;
2234 platform_set_drvdata(pdev, dev);
2236 udc_disable(dev);
2237 udc_reinit(dev);
2239 dev->vbus = !!is_vbus_present();
2241 /* irq setup after old hardware state is cleaned up */
2242 retval = request_irq(irq, pxa25x_udc_irq,
2243 IRQF_DISABLED, driver_name, dev);
2244 if (retval != 0) {
2245 pr_err("%s: can't get irq %d, err %d\n",
2246 driver_name, irq, retval);
2247 goto err_irq1;
2249 dev->got_irq = 1;
2251 #ifdef CONFIG_ARCH_LUBBOCK
2252 if (machine_is_lubbock()) {
2253 retval = request_irq(LUBBOCK_USB_DISC_IRQ,
2254 lubbock_vbus_irq,
2255 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2256 driver_name, dev);
2257 if (retval != 0) {
2258 pr_err("%s: can't get irq %i, err %d\n",
2259 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2260 lubbock_fail0:
2261 goto err_irq_lub;
2263 retval = request_irq(LUBBOCK_USB_IRQ,
2264 lubbock_vbus_irq,
2265 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2266 driver_name, dev);
2267 if (retval != 0) {
2268 pr_err("%s: can't get irq %i, err %d\n",
2269 driver_name, LUBBOCK_USB_IRQ, retval);
2270 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2271 goto lubbock_fail0;
2273 } else
2274 #endif
2275 if (vbus_irq) {
2276 retval = request_irq(vbus_irq, udc_vbus_irq,
2277 IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
2278 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
2279 driver_name, dev);
2280 if (retval != 0) {
2281 pr_err("%s: can't get irq %i, err %d\n",
2282 driver_name, vbus_irq, retval);
2283 goto err_vbus_irq;
2286 create_debug_files(dev);
2288 return 0;
2290 err_vbus_irq:
2291 #ifdef CONFIG_ARCH_LUBBOCK
2292 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2293 err_irq_lub:
2294 #endif
2295 free_irq(irq, dev);
2296 err_irq1:
2297 if (gpio_is_valid(dev->mach->gpio_pullup))
2298 gpio_free(dev->mach->gpio_pullup);
2299 err_gpio_pullup:
2300 if (gpio_is_valid(dev->mach->gpio_vbus))
2301 gpio_free(dev->mach->gpio_vbus);
2302 err_gpio_vbus:
2303 if (dev->transceiver) {
2304 otg_put_transceiver(dev->transceiver);
2305 dev->transceiver = NULL;
2307 clk_put(dev->clk);
2308 err_clk:
2309 return retval;
2312 static void pxa25x_udc_shutdown(struct platform_device *_dev)
2314 pullup_off();
2317 static int __exit pxa25x_udc_remove(struct platform_device *pdev)
2319 struct pxa25x_udc *dev = platform_get_drvdata(pdev);
2321 if (dev->driver)
2322 return -EBUSY;
2324 dev->pullup = 0;
2325 pullup(dev);
2327 remove_debug_files(dev);
2329 if (dev->got_irq) {
2330 free_irq(platform_get_irq(pdev, 0), dev);
2331 dev->got_irq = 0;
2333 #ifdef CONFIG_ARCH_LUBBOCK
2334 if (machine_is_lubbock()) {
2335 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2336 free_irq(LUBBOCK_USB_IRQ, dev);
2338 #endif
2339 if (gpio_is_valid(dev->mach->gpio_vbus)) {
2340 free_irq(gpio_to_irq(dev->mach->gpio_vbus), dev);
2341 gpio_free(dev->mach->gpio_vbus);
2343 if (gpio_is_valid(dev->mach->gpio_pullup))
2344 gpio_free(dev->mach->gpio_pullup);
2346 clk_put(dev->clk);
2348 if (dev->transceiver) {
2349 otg_put_transceiver(dev->transceiver);
2350 dev->transceiver = NULL;
2353 platform_set_drvdata(pdev, NULL);
2354 the_controller = NULL;
2355 return 0;
2358 /*-------------------------------------------------------------------------*/
2360 #ifdef CONFIG_PM
2362 /* USB suspend (controlled by the host) and system suspend (controlled
2363 * by the PXA) don't necessarily work well together. If USB is active,
2364 * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2365 * mode, or any deeper PM saving state.
2367 * For now, we punt and forcibly disconnect from the USB host when PXA
2368 * enters any suspend state. While we're disconnected, we always disable
2369 * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2370 * Boards without software pullup control shouldn't use those states.
2371 * VBUS IRQs should probably be ignored so that the PXA device just acts
2372 * "dead" to USB hosts until system resume.
2374 static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
2376 struct pxa25x_udc *udc = platform_get_drvdata(dev);
2377 unsigned long flags;
2379 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
2380 WARNING("USB host won't detect disconnect!\n");
2381 udc->suspended = 1;
2383 local_irq_save(flags);
2384 pullup(udc);
2385 local_irq_restore(flags);
2387 return 0;
2390 static int pxa25x_udc_resume(struct platform_device *dev)
2392 struct pxa25x_udc *udc = platform_get_drvdata(dev);
2393 unsigned long flags;
2395 udc->suspended = 0;
2396 local_irq_save(flags);
2397 pullup(udc);
2398 local_irq_restore(flags);
2400 return 0;
2403 #else
2404 #define pxa25x_udc_suspend NULL
2405 #define pxa25x_udc_resume NULL
2406 #endif
2408 /*-------------------------------------------------------------------------*/
2410 static struct platform_driver udc_driver = {
2411 .shutdown = pxa25x_udc_shutdown,
2412 .remove = __exit_p(pxa25x_udc_remove),
2413 .suspend = pxa25x_udc_suspend,
2414 .resume = pxa25x_udc_resume,
2415 .driver = {
2416 .owner = THIS_MODULE,
2417 .name = "pxa25x-udc",
2421 static int __init udc_init(void)
2423 pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2424 return platform_driver_probe(&udc_driver, pxa25x_udc_probe);
2426 module_init(udc_init);
2428 static void __exit udc_exit(void)
2430 platform_driver_unregister(&udc_driver);
2432 module_exit(udc_exit);
2434 MODULE_DESCRIPTION(DRIVER_DESC);
2435 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2436 MODULE_LICENSE("GPL");
2437 MODULE_ALIAS("platform:pxa25x-udc");