drivers/net/bfin_mac.c

   1 /*
   2  * Blackfin On-Chip MAC Driver
   3  *
   4  * Copyright 2004-2007 Analog Devices Inc.
   5  *
   6  * Enter bugs at http://blackfin.uclinux.org/
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #include <linux/init.h>
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/sched.h>
  15 #include <linux/slab.h>
  16 #include <linux/delay.h>
  17 #include <linux/timer.h>
  18 #include <linux/errno.h>
  19 #include <linux/irq.h>
  20 #include <linux/io.h>
  21 #include <linux/ioport.h>
  22 #include <linux/crc32.h>
  23 #include <linux/device.h>
  24 #include <linux/spinlock.h>
  25 #include <linux/mii.h>
  26 #include <linux/phy.h>
  27 #include <linux/netdevice.h>
  28 #include <linux/etherdevice.h>
  29 #include <linux/ethtool.h>
  30 #include <linux/skbuff.h>
  31 #include <linux/platform_device.h>
  32
  33 #include <asm/dma.h>
  34 #include <linux/dma-mapping.h>
  35
  36 #include <asm/dpmc.h>
  37 #include <asm/blackfin.h>
  38 #include <asm/cacheflush.h>
  39 #include <asm/portmux.h>
  40
  41 #include "bfin_mac.h"
  42
  43 #define DRV_NAME        "bfin_mac"
  44 #define DRV_VERSION     "1.1"
  45 #define DRV_AUTHOR      "Bryan Wu, Luke Yang"
  46 #define DRV_DESC        "Blackfin on-chip Ethernet MAC driver"
  47
  48 MODULE_AUTHOR(DRV_AUTHOR);
  49 MODULE_LICENSE("GPL");
  50 MODULE_DESCRIPTION(DRV_DESC);
  51 MODULE_ALIAS("platform:bfin_mac");
  52
  53 #if defined(CONFIG_BFIN_MAC_USE_L1)
  54 # define bfin_mac_alloc(dma_handle, size)  l1_data_sram_zalloc(size)
  55 # define bfin_mac_free(dma_handle, ptr)    l1_data_sram_free(ptr)
  56 #else
  57 # define bfin_mac_alloc(dma_handle, size) \
  58         dma_alloc_coherent(NULL, size, dma_handle, GFP_KERNEL)
  59 # define bfin_mac_free(dma_handle, ptr) \
  60         dma_free_coherent(NULL, sizeof(*ptr), ptr, dma_handle)
  61 #endif
  62
  63 #define PKT_BUF_SZ 1580
  64
  65 #define MAX_TIMEOUT_CNT 500
  66
  67 /* pointers to maintain transmit list */
  68 static struct net_dma_desc_tx *tx_list_head;
  69 static struct net_dma_desc_tx *tx_list_tail;
  70 static struct net_dma_desc_rx *rx_list_head;
  71 static struct net_dma_desc_rx *rx_list_tail;
  72 static struct net_dma_desc_rx *current_rx_ptr;
  73 static struct net_dma_desc_tx *current_tx_ptr;
  74 static struct net_dma_desc_tx *tx_desc;
  75 static struct net_dma_desc_rx *rx_desc;
  76
  77 #if defined(CONFIG_BFIN_MAC_RMII)
  78 static u16 pin_req[] = P_RMII0;
  79 #else
  80 static u16 pin_req[] = P_MII0;
  81 #endif
  82
  83 static void bfin_mac_disable(void);
  84 static void bfin_mac_enable(void);
  85
  86 static void desc_list_free(void)
  87 {
  88         struct net_dma_desc_rx *r;
  89         struct net_dma_desc_tx *t;
  90         int i;
  91 #if !defined(CONFIG_BFIN_MAC_USE_L1)
  92         dma_addr_t dma_handle = 0;
  93 #endif
  94
  95         if (tx_desc) {
  96                 t = tx_list_head;
  97                 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
  98                         if (t) {
  99                                 if (t->skb) {
 100                                         dev_kfree_skb(t->skb);
 101                                         t->skb = NULL;
 102                                 }
 103                                 t = t->next;
 104                         }
 105                 }
 106                 bfin_mac_free(dma_handle, tx_desc);
 107         }
 108
 109         if (rx_desc) {
 110                 r = rx_list_head;
 111                 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
 112                         if (r) {
 113                                 if (r->skb) {
 114                                         dev_kfree_skb(r->skb);
 115                                         r->skb = NULL;
 116                                 }
 117                                 r = r->next;
 118                         }
 119                 }
 120                 bfin_mac_free(dma_handle, rx_desc);
 121         }
 122 }
 123
 124 static int desc_list_init(void)
 125 {
 126         int i;
 127         struct sk_buff *new_skb;
 128 #if !defined(CONFIG_BFIN_MAC_USE_L1)
 129         /*
 130          * This dma_handle is useless in Blackfin dma_alloc_coherent().
 131          * The real dma handler is the return value of dma_alloc_coherent().
 132          */
 133         dma_addr_t dma_handle;
 134 #endif
 135
 136         tx_desc = bfin_mac_alloc(&dma_handle,
 137                                 sizeof(struct net_dma_desc_tx) *
 138                                 CONFIG_BFIN_TX_DESC_NUM);
 139         if (tx_desc == NULL)
 140                 goto init_error;
 141
 142         rx_desc = bfin_mac_alloc(&dma_handle,
 143                                 sizeof(struct net_dma_desc_rx) *
 144                                 CONFIG_BFIN_RX_DESC_NUM);
 145         if (rx_desc == NULL)
 146                 goto init_error;
 147
 148         /* init tx_list */
 149         tx_list_head = tx_list_tail = tx_desc;
 150
 151         for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
 152                 struct net_dma_desc_tx *t = tx_desc + i;
 153                 struct dma_descriptor *a = &(t->desc_a);
 154                 struct dma_descriptor *b = &(t->desc_b);
 155
 156                 /*
 157                  * disable DMA
 158                  * read from memory WNR = 0
 159                  * wordsize is 32 bits
 160                  * 6 half words is desc size
 161                  * large desc flow
 162                  */
 163                 a->config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
 164                 a->start_addr = (unsigned long)t->packet;
 165                 a->x_count = 0;
 166                 a->next_dma_desc = b;
 167
 168                 /*
 169                  * enabled DMA
 170                  * write to memory WNR = 1
 171                  * wordsize is 32 bits
 172                  * disable interrupt
 173                  * 6 half words is desc size
 174                  * large desc flow
 175                  */
 176                 b->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
 177                 b->start_addr = (unsigned long)(&(t->status));
 178                 b->x_count = 0;
 179
 180                 t->skb = NULL;
 181                 tx_list_tail->desc_b.next_dma_desc = a;
 182                 tx_list_tail->next = t;
 183                 tx_list_tail = t;
 184         }
 185         tx_list_tail->next = tx_list_head;      /* tx_list is a circle */
 186         tx_list_tail->desc_b.next_dma_desc = &(tx_list_head->desc_a);
 187         current_tx_ptr = tx_list_head;
 188
 189         /* init rx_list */
 190         rx_list_head = rx_list_tail = rx_desc;
 191
 192         for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
 193                 struct net_dma_desc_rx *r = rx_desc + i;
 194                 struct dma_descriptor *a = &(r->desc_a);
 195                 struct dma_descriptor *b = &(r->desc_b);
 196
 197                 /* allocate a new skb for next time receive */
 198                 new_skb = dev_alloc_skb(PKT_BUF_SZ + NET_IP_ALIGN);
 199                 if (!new_skb) {
 200                         printk(KERN_NOTICE DRV_NAME
 201                                ": init: low on mem - packet dropped\n");
 202                         goto init_error;
 203                 }
 204                 skb_reserve(new_skb, NET_IP_ALIGN);
 205                 r->skb = new_skb;
 206
 207                 /*
 208                  * enabled DMA
 209                  * write to memory WNR = 1
 210                  * wordsize is 32 bits
 211                  * disable interrupt
 212                  * 6 half words is desc size
 213                  * large desc flow
 214                  */
 215                 a->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
 216                 /* since RXDWA is enabled */
 217                 a->start_addr = (unsigned long)new_skb->data - 2;
 218                 a->x_count = 0;
 219                 a->next_dma_desc = b;
 220
 221                 /*
 222                  * enabled DMA
 223                  * write to memory WNR = 1
 224                  * wordsize is 32 bits
 225                  * enable interrupt
 226                  * 6 half words is desc size
 227                  * large desc flow
 228                  */
 229                 b->config = DMAEN | WNR | WDSIZE_32 | DI_EN |
 230                                 NDSIZE_6 | DMAFLOW_LARGE;
 231                 b->start_addr = (unsigned long)(&(r->status));
 232                 b->x_count = 0;
 233
 234                 rx_list_tail->desc_b.next_dma_desc = a;
 235                 rx_list_tail->next = r;
 236                 rx_list_tail = r;
 237         }
 238         rx_list_tail->next = rx_list_head;      /* rx_list is a circle */
 239         rx_list_tail->desc_b.next_dma_desc = &(rx_list_head->desc_a);
 240         current_rx_ptr = rx_list_head;
 241
 242         return 0;
 243
 244 init_error:
 245         desc_list_free();
 246         printk(KERN_ERR DRV_NAME ": kmalloc failed\n");
 247         return -ENOMEM;
 248 }
 249
 250
 251 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
 252
 253 /*
 254  * MII operations
 255  */
 256 /* Wait until the previous MDC/MDIO transaction has completed */
 257 static void bfin_mdio_poll(void)
 258 {
 259         int timeout_cnt = MAX_TIMEOUT_CNT;
 260
 261         /* poll the STABUSY bit */
 262         while ((bfin_read_EMAC_STAADD()) & STABUSY) {
 263                 udelay(1);
 264                 if (timeout_cnt-- < 0) {
 265                         printk(KERN_ERR DRV_NAME
 266                         ": wait MDC/MDIO transaction to complete timeout\n");
 267                         break;
 268                 }
 269         }
 270 }
 271
 272 /* Read an off-chip register in a PHY through the MDC/MDIO port */
 273 static int bfin_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
 274 {
 275         bfin_mdio_poll();
 276
 277         /* read mode */
 278         bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
 279                                 SET_REGAD((u16) regnum) |
 280                                 STABUSY);
 281
 282         bfin_mdio_poll();
 283
 284         return (int) bfin_read_EMAC_STADAT();
 285 }
 286
 287 /* Write an off-chip register in a PHY through the MDC/MDIO port */
 288 static int bfin_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
 289                               u16 value)
 290 {
 291         bfin_mdio_poll();
 292
 293         bfin_write_EMAC_STADAT((u32) value);
 294
 295         /* write mode */
 296         bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
 297                                 SET_REGAD((u16) regnum) |
 298                                 STAOP |
 299                                 STABUSY);
 300
 301         bfin_mdio_poll();
 302
 303         return 0;
 304 }
 305
 306 static int bfin_mdiobus_reset(struct mii_bus *bus)
 307 {
 308         return 0;
 309 }
 310
 311 static void bfin_mac_adjust_link(struct net_device *dev)
 312 {
 313         struct bfin_mac_local *lp = netdev_priv(dev);
 314         struct phy_device *phydev = lp->phydev;
 315         unsigned long flags;
 316         int new_state = 0;
 317
 318         spin_lock_irqsave(&lp->lock, flags);
 319         if (phydev->link) {
 320                 /* Now we make sure that we can be in full duplex mode.
 321                  * If not, we operate in half-duplex mode. */
 322                 if (phydev->duplex != lp->old_duplex) {
 323                         u32 opmode = bfin_read_EMAC_OPMODE();
 324                         new_state = 1;
 325
 326                         if (phydev->duplex)
 327                                 opmode |= FDMODE;
 328                         else
 329                                 opmode &= ~(FDMODE);
 330
 331                         bfin_write_EMAC_OPMODE(opmode);
 332                         lp->old_duplex = phydev->duplex;
 333                 }
 334
 335                 if (phydev->speed != lp->old_speed) {
 336 #if defined(CONFIG_BFIN_MAC_RMII)
 337                         u32 opmode = bfin_read_EMAC_OPMODE();
 338                         switch (phydev->speed) {
 339                         case 10:
 340                                 opmode |= RMII_10;
 341                                 break;
 342                         case 100:
 343                                 opmode &= ~(RMII_10);
 344                                 break;
 345                         default:
 346                                 printk(KERN_WARNING
 347                                         "%s: Ack!  Speed (%d) is not 10/100!\n",
 348                                         DRV_NAME, phydev->speed);
 349                                 break;
 350                         }
 351                         bfin_write_EMAC_OPMODE(opmode);
 352 #endif
 353
 354                         new_state = 1;
 355                         lp->old_speed = phydev->speed;
 356                 }
 357
 358                 if (!lp->old_link) {
 359                         new_state = 1;
 360                         lp->old_link = 1;
 361                 }
 362         } else if (lp->old_link) {
 363                 new_state = 1;
 364                 lp->old_link = 0;
 365                 lp->old_speed = 0;
 366                 lp->old_duplex = -1;
 367         }
 368
 369         if (new_state) {
 370                 u32 opmode = bfin_read_EMAC_OPMODE();
 371                 phy_print_status(phydev);
 372                 pr_debug("EMAC_OPMODE = 0x%08x\n", opmode);
 373         }
 374
 375         spin_unlock_irqrestore(&lp->lock, flags);
 376 }
 377
 378 /* MDC  = 2.5 MHz */
 379 #define MDC_CLK 2500000
 380
 381 static int mii_probe(struct net_device *dev)
 382 {
 383         struct bfin_mac_local *lp = netdev_priv(dev);
 384         struct phy_device *phydev = NULL;
 385         unsigned short sysctl;
 386         int i;
 387         u32 sclk, mdc_div;
 388
 389         /* Enable PHY output early */
 390         if (!(bfin_read_VR_CTL() & CLKBUFOE))
 391                 bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);
 392
 393         sclk = get_sclk();
 394         mdc_div = ((sclk / MDC_CLK) / 2) - 1;
 395
 396         sysctl = bfin_read_EMAC_SYSCTL();
 397         sysctl = (sysctl & ~MDCDIV) | SET_MDCDIV(mdc_div);
 398         bfin_write_EMAC_SYSCTL(sysctl);
 399
 400         /* search for connect PHY device */
 401         for (i = 0; i < PHY_MAX_ADDR; i++) {
 402                 struct phy_device *const tmp_phydev = lp->mii_bus->phy_map[i];
 403
 404                 if (!tmp_phydev)
 405                         continue; /* no PHY here... */
 406
 407                 phydev = tmp_phydev;
 408                 break; /* found it */
 409         }
 410
 411         /* now we are supposed to have a proper phydev, to attach to... */
 412         if (!phydev) {
 413                 printk(KERN_INFO "%s: Don't found any phy device at all\n",
 414                         dev->name);
 415                 return -ENODEV;
 416         }
 417
 418 #if defined(CONFIG_BFIN_MAC_RMII)
 419         phydev = phy_connect(dev, dev_name(&phydev->dev), &bfin_mac_adjust_link,
 420                         0, PHY_INTERFACE_MODE_RMII);
 421 #else
 422         phydev = phy_connect(dev, dev_name(&phydev->dev), &bfin_mac_adjust_link,
 423                         0, PHY_INTERFACE_MODE_MII);
 424 #endif
 425
 426         if (IS_ERR(phydev)) {
 427                 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
 428                 return PTR_ERR(phydev);
 429         }
 430
 431         /* mask with MAC supported features */
 432         phydev->supported &= (SUPPORTED_10baseT_Half
 433                               | SUPPORTED_10baseT_Full
 434                               | SUPPORTED_100baseT_Half
 435                               | SUPPORTED_100baseT_Full
 436                               | SUPPORTED_Autoneg
 437                               | SUPPORTED_Pause | SUPPORTED_Asym_Pause
 438                               | SUPPORTED_MII
 439                               | SUPPORTED_TP);
 440
 441         phydev->advertising = phydev->supported;
 442
 443         lp->old_link = 0;
 444         lp->old_speed = 0;
 445         lp->old_duplex = -1;
 446         lp->phydev = phydev;
 447
 448         printk(KERN_INFO "%s: attached PHY driver [%s] "
 449                "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)"
 450                "@sclk=%dMHz)\n",
 451                DRV_NAME, phydev->drv->name, dev_name(&phydev->dev), phydev->irq,
 452                MDC_CLK, mdc_div, sclk/1000000);
 453
 454         return 0;
 455 }
 456
 457 /*
 458  * Ethtool support
 459  */
 460
 461 static int
 462 bfin_mac_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
 463 {
 464         struct bfin_mac_local *lp = netdev_priv(dev);
 465
 466         if (lp->phydev)
 467                 return phy_ethtool_gset(lp->phydev, cmd);
 468
 469         return -EINVAL;
 470 }
 471
 472 static int
 473 bfin_mac_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
 474 {
 475         struct bfin_mac_local *lp = netdev_priv(dev);
 476
 477         if (!capable(CAP_NET_ADMIN))
 478                 return -EPERM;
 479
 480         if (lp->phydev)
 481                 return phy_ethtool_sset(lp->phydev, cmd);
 482
 483         return -EINVAL;
 484 }
 485
 486 static void bfin_mac_ethtool_getdrvinfo(struct net_device *dev,
 487                                         struct ethtool_drvinfo *info)
 488 {
 489         strcpy(info->driver, DRV_NAME);
 490         strcpy(info->version, DRV_VERSION);
 491         strcpy(info->fw_version, "N/A");
 492         strcpy(info->bus_info, dev_name(&dev->dev));
 493 }
 494
 495 static const struct ethtool_ops bfin_mac_ethtool_ops = {
 496         .get_settings = bfin_mac_ethtool_getsettings,
 497         .set_settings = bfin_mac_ethtool_setsettings,
 498         .get_link = ethtool_op_get_link,
 499         .get_drvinfo = bfin_mac_ethtool_getdrvinfo,
 500 };
 501
 502 /**************************************************************************/
 503 void setup_system_regs(struct net_device *dev)
 504 {
 505         unsigned short sysctl;
 506
 507         /*
 508          * Odd word alignment for Receive Frame DMA word
 509          * Configure checksum support and rcve frame word alignment
 510          */
 511         sysctl = bfin_read_EMAC_SYSCTL();
 512 #if defined(BFIN_MAC_CSUM_OFFLOAD)
 513         sysctl |= RXDWA | RXCKS;
 514 #else
 515         sysctl |= RXDWA;
 516 #endif
 517         bfin_write_EMAC_SYSCTL(sysctl);
 518
 519         bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
 520
 521         /* Initialize the TX DMA channel registers */
 522         bfin_write_DMA2_X_COUNT(0);
 523         bfin_write_DMA2_X_MODIFY(4);
 524         bfin_write_DMA2_Y_COUNT(0);
 525         bfin_write_DMA2_Y_MODIFY(0);
 526
 527         /* Initialize the RX DMA channel registers */
 528         bfin_write_DMA1_X_COUNT(0);
 529         bfin_write_DMA1_X_MODIFY(4);
 530         bfin_write_DMA1_Y_COUNT(0);
 531         bfin_write_DMA1_Y_MODIFY(0);
 532 }
 533
 534 static void setup_mac_addr(u8 *mac_addr)
 535 {
 536         u32 addr_low = le32_to_cpu(*(__le32 *) & mac_addr[0]);
 537         u16 addr_hi = le16_to_cpu(*(__le16 *) & mac_addr[4]);
 538
 539         /* this depends on a little-endian machine */
 540         bfin_write_EMAC_ADDRLO(addr_low);
 541         bfin_write_EMAC_ADDRHI(addr_hi);
 542 }
 543
 544 static int bfin_mac_set_mac_address(struct net_device *dev, void *p)
 545 {
 546         struct sockaddr *addr = p;
 547         if (netif_running(dev))
 548                 return -EBUSY;
 549         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
 550         setup_mac_addr(dev->dev_addr);
 551         return 0;
 552 }
 553
 554 static void adjust_tx_list(void)
 555 {
 556         int timeout_cnt = MAX_TIMEOUT_CNT;
 557
 558         if (tx_list_head->status.status_word != 0 &&
 559             current_tx_ptr != tx_list_head) {
 560                 goto adjust_head;       /* released something, just return; */
 561         }
 562
 563         /*
 564          * if nothing released, check wait condition
 565          * current's next can not be the head,
 566          * otherwise the dma will not stop as we want
 567          */
 568         if (current_tx_ptr->next->next == tx_list_head) {
 569                 while (tx_list_head->status.status_word == 0) {
 570                         udelay(10);
 571                         if (tx_list_head->status.status_word != 0 ||
 572                             !(bfin_read_DMA2_IRQ_STATUS() & DMA_RUN)) {
 573                                 goto adjust_head;
 574                         }
 575                         if (timeout_cnt-- < 0) {
 576                                 printk(KERN_ERR DRV_NAME
 577                                 ": wait for adjust tx list head timeout\n");
 578                                 break;
 579                         }
 580                 }
 581                 if (tx_list_head->status.status_word != 0) {
 582                         goto adjust_head;
 583                 }
 584         }
 585
 586         return;
 587
 588 adjust_head:
 589         do {
 590                 tx_list_head->desc_a.config &= ~DMAEN;
 591                 tx_list_head->status.status_word = 0;
 592                 if (tx_list_head->skb) {
 593                         dev_kfree_skb(tx_list_head->skb);
 594                         tx_list_head->skb = NULL;
 595                 } else {
 596                         printk(KERN_ERR DRV_NAME
 597                                ": no sk_buff in a transmitted frame!\n");
 598                 }
 599                 tx_list_head = tx_list_head->next;
 600         } while (tx_list_head->status.status_word != 0 &&
 601                  current_tx_ptr != tx_list_head);
 602         return;
 603
 604 }
 605
 606 static int bfin_mac_hard_start_xmit(struct sk_buff *skb,
 607                                 struct net_device *dev)
 608 {
 609         u16 *data;
 610         u32 data_align = (unsigned long)(skb->data) & 0x3;
 611         current_tx_ptr->skb = skb;
 612
 613         if (data_align == 0x2) {
 614                 /* move skb->data to current_tx_ptr payload */
 615                 data = (u16 *)(skb->data) - 1;
 616                                 *data = (u16)(skb->len);
 617                 current_tx_ptr->desc_a.start_addr = (u32)data;
 618                 /* this is important! */
 619                 blackfin_dcache_flush_range((u32)data,
 620                                 (u32)((u8 *)data + skb->len + 4));
 621         } else {
 622                 *((u16 *)(current_tx_ptr->packet)) = (u16)(skb->len);
 623                 memcpy((u8 *)(current_tx_ptr->packet + 2), skb->data,
 624                         skb->len);
 625                 current_tx_ptr->desc_a.start_addr =
 626                         (u32)current_tx_ptr->packet;
 627                 if (current_tx_ptr->status.status_word != 0)
 628                         current_tx_ptr->status.status_word = 0;
 629                 blackfin_dcache_flush_range(
 630                         (u32)current_tx_ptr->packet,
 631                         (u32)(current_tx_ptr->packet + skb->len + 2));
 632         }
 633
 634         /* make sure the internal data buffers in the core are drained
 635          * so that the DMA descriptors are completely written when the
 636          * DMA engine goes to fetch them below
 637          */
 638         SSYNC();
 639
 640         /* enable this packet's dma */
 641         current_tx_ptr->desc_a.config |= DMAEN;
 642
 643         /* tx dma is running, just return */
 644         if (bfin_read_DMA2_IRQ_STATUS() & DMA_RUN)
 645                 goto out;
 646
 647         /* tx dma is not running */
 648         bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr->desc_a));
 649         /* dma enabled, read from memory, size is 6 */
 650         bfin_write_DMA2_CONFIG(current_tx_ptr->desc_a.config);
 651         /* Turn on the EMAC tx */
 652         bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
 653
 654 out:
 655         adjust_tx_list();
 656         current_tx_ptr = current_tx_ptr->next;
 657         dev->trans_start = jiffies;
 658         dev->stats.tx_packets++;
 659         dev->stats.tx_bytes += (skb->len);
 660         return NETDEV_TX_OK;
 661 }
 662
 663 static void bfin_mac_rx(struct net_device *dev)
 664 {
 665         struct sk_buff *skb, *new_skb;
 666         unsigned short len;
 667
 668         /* allocate a new skb for next time receive */
 669         skb = current_rx_ptr->skb;
 670         new_skb = dev_alloc_skb(PKT_BUF_SZ + NET_IP_ALIGN);
 671         if (!new_skb) {
 672                 printk(KERN_NOTICE DRV_NAME
 673                        ": rx: low on mem - packet dropped\n");
 674                 dev->stats.rx_dropped++;
 675                 goto out;
 676         }
 677         /* reserve 2 bytes for RXDWA padding */
 678         skb_reserve(new_skb, NET_IP_ALIGN);
 679         current_rx_ptr->skb = new_skb;
 680         current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2;
 681
 682         /* Invidate the data cache of skb->data range when it is write back
 683          * cache. It will prevent overwritting the new data from DMA
 684          */
 685         blackfin_dcache_invalidate_range((unsigned long)new_skb->head,
 686                                          (unsigned long)new_skb->end);
 687
 688         len = (unsigned short)((current_rx_ptr->status.status_word) & RX_FRLEN);
 689         skb_put(skb, len);
 690         blackfin_dcache_invalidate_range((unsigned long)skb->head,
 691                                          (unsigned long)skb->tail);
 692
 693         skb->protocol = eth_type_trans(skb, dev);
 694 #if defined(BFIN_MAC_CSUM_OFFLOAD)
 695         skb->csum = current_rx_ptr->status.ip_payload_csum;
 696         skb->ip_summed = CHECKSUM_COMPLETE;
 697 #endif
 698
 699         netif_rx(skb);
 700         dev->stats.rx_packets++;
 701         dev->stats.rx_bytes += len;
 702         current_rx_ptr->status.status_word = 0x00000000;
 703         current_rx_ptr = current_rx_ptr->next;
 704
 705 out:
 706         return;
 707 }
 708
 709 /* interrupt routine to handle rx and error signal */
 710 static irqreturn_t bfin_mac_interrupt(int irq, void *dev_id)
 711 {
 712         struct net_device *dev = dev_id;
 713         int number = 0;
 714
 715 get_one_packet:
 716         if (current_rx_ptr->status.status_word == 0) {
 717                 /* no more new packet received */
 718                 if (number == 0) {
 719                         if (current_rx_ptr->next->status.status_word != 0) {
 720                                 current_rx_ptr = current_rx_ptr->next;
 721                                 goto real_rx;
 722                         }
 723                 }
 724                 bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
 725                                            DMA_DONE | DMA_ERR);
 726                 return IRQ_HANDLED;
 727         }
 728
 729 real_rx:
 730         bfin_mac_rx(dev);
 731         number++;
 732         goto get_one_packet;
 733 }
 734
 735 #ifdef CONFIG_NET_POLL_CONTROLLER
 736 static void bfin_mac_poll(struct net_device *dev)
 737 {
 738         disable_irq(IRQ_MAC_RX);
 739         bfin_mac_interrupt(IRQ_MAC_RX, dev);
 740         enable_irq(IRQ_MAC_RX);
 741 }
 742 #endif                          /* CONFIG_NET_POLL_CONTROLLER */
 743
 744 static void bfin_mac_disable(void)
 745 {
 746         unsigned int opmode;
 747
 748         opmode = bfin_read_EMAC_OPMODE();
 749         opmode &= (~RE);
 750         opmode &= (~TE);
 751         /* Turn off the EMAC */
 752         bfin_write_EMAC_OPMODE(opmode);
 753 }
 754
 755 /*
 756  * Enable Interrupts, Receive, and Transmit
 757  */
 758 static void bfin_mac_enable(void)
 759 {
 760         u32 opmode;
 761
 762         pr_debug("%s: %s\n", DRV_NAME, __func__);
 763
 764         /* Set RX DMA */
 765         bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head->desc_a));
 766         bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config);
 767
 768         /* Wait MII done */
 769         bfin_mdio_poll();
 770
 771         /* We enable only RX here */
 772         /* ASTP   : Enable Automatic Pad Stripping
 773            PR     : Promiscuous Mode for test
 774            PSF    : Receive frames with total length less than 64 bytes.
 775            FDMODE : Full Duplex Mode
 776            LB     : Internal Loopback for test
 777            RE     : Receiver Enable */
 778         opmode = bfin_read_EMAC_OPMODE();
 779         if (opmode & FDMODE)
 780                 opmode |= PSF;
 781         else
 782                 opmode |= DRO | DC | PSF;
 783         opmode |= RE;
 784
 785 #if defined(CONFIG_BFIN_MAC_RMII)
 786         opmode |= RMII; /* For Now only 100MBit are supported */
 787 #if (defined(CONFIG_BF537) || defined(CONFIG_BF536)) && CONFIG_BF_REV_0_2
 788         opmode |= TE;
 789 #endif
 790 #endif
 791         /* Turn on the EMAC rx */
 792         bfin_write_EMAC_OPMODE(opmode);
 793 }
 794
 795 /* Our watchdog timed out. Called by the networking layer */
 796 static void bfin_mac_timeout(struct net_device *dev)
 797 {
 798         pr_debug("%s: %s\n", dev->name, __func__);
 799
 800         bfin_mac_disable();
 801
 802         /* reset tx queue */
 803         tx_list_tail = tx_list_head->next;
 804
 805         bfin_mac_enable();
 806
 807         /* We can accept TX packets again */
 808         dev->trans_start = jiffies;
 809         netif_wake_queue(dev);
 810 }
 811
 812 static void bfin_mac_multicast_hash(struct net_device *dev)
 813 {
 814         u32 emac_hashhi, emac_hashlo;
 815         struct dev_mc_list *dmi;
 816         char *addrs;
 817         u32 crc;
 818
 819         emac_hashhi = emac_hashlo = 0;
 820
 821         netdev_for_each_mc_addr(dmi, dev) {
 822                 addrs = dmi->dmi_addr;
 823
 824                 /* skip non-multicast addresses */
 825                 if (!(*addrs & 1))
 826                         continue;
 827
 828                 crc = ether_crc(ETH_ALEN, addrs);
 829                 crc >>= 26;
 830
 831                 if (crc & 0x20)
 832                         emac_hashhi |= 1 << (crc & 0x1f);
 833                 else
 834                         emac_hashlo |= 1 << (crc & 0x1f);
 835         }
 836
 837         bfin_write_EMAC_HASHHI(emac_hashhi);
 838         bfin_write_EMAC_HASHLO(emac_hashlo);
 839
 840         return;
 841 }
 842
 843 /*
 844  * This routine will, depending on the values passed to it,
 845  * either make it accept multicast packets, go into
 846  * promiscuous mode (for TCPDUMP and cousins) or accept
 847  * a select set of multicast packets
 848  */
 849 static void bfin_mac_set_multicast_list(struct net_device *dev)
 850 {
 851         u32 sysctl;
 852
 853         if (dev->flags & IFF_PROMISC) {
 854                 printk(KERN_INFO "%s: set to promisc mode\n", dev->name);
 855                 sysctl = bfin_read_EMAC_OPMODE();
 856                 sysctl |= RAF;
 857                 bfin_write_EMAC_OPMODE(sysctl);
 858         } else if (dev->flags & IFF_ALLMULTI) {
 859                 /* accept all multicast */
 860                 sysctl = bfin_read_EMAC_OPMODE();
 861                 sysctl |= PAM;
 862                 bfin_write_EMAC_OPMODE(sysctl);
 863         } else if (!netdev_mc_empty(dev)) {
 864                 /* set up multicast hash table */
 865                 sysctl = bfin_read_EMAC_OPMODE();
 866                 sysctl |= HM;
 867                 bfin_write_EMAC_OPMODE(sysctl);
 868                 bfin_mac_multicast_hash(dev);
 869         } else {
 870                 /* clear promisc or multicast mode */
 871                 sysctl = bfin_read_EMAC_OPMODE();
 872                 sysctl &= ~(RAF | PAM);
 873                 bfin_write_EMAC_OPMODE(sysctl);
 874         }
 875 }
 876
 877 /*
 878  * this puts the device in an inactive state
 879  */
 880 static void bfin_mac_shutdown(struct net_device *dev)
 881 {
 882         /* Turn off the EMAC */
 883         bfin_write_EMAC_OPMODE(0x00000000);
 884         /* Turn off the EMAC RX DMA */
 885         bfin_write_DMA1_CONFIG(0x0000);
 886         bfin_write_DMA2_CONFIG(0x0000);
 887 }
 888
 889 /*
 890  * Open and Initialize the interface
 891  *
 892  * Set up everything, reset the card, etc..
 893  */
 894 static int bfin_mac_open(struct net_device *dev)
 895 {
 896         struct bfin_mac_local *lp = netdev_priv(dev);
 897         int retval;
 898         pr_debug("%s: %s\n", dev->name, __func__);
 899
 900         /*
 901          * Check that the address is valid.  If its not, refuse
 902          * to bring the device up.  The user must specify an
 903          * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
 904          */
 905         if (!is_valid_ether_addr(dev->dev_addr)) {
 906                 printk(KERN_WARNING DRV_NAME ": no valid ethernet hw addr\n");
 907                 return -EINVAL;
 908         }
 909
 910         /* initial rx and tx list */
 911         retval = desc_list_init();
 912
 913         if (retval)
 914                 return retval;
 915
 916         phy_start(lp->phydev);
 917         phy_write(lp->phydev, MII_BMCR, BMCR_RESET);
 918         setup_system_regs(dev);
 919         setup_mac_addr(dev->dev_addr);
 920         bfin_mac_disable();
 921         bfin_mac_enable();
 922         pr_debug("hardware init finished\n");
 923         netif_start_queue(dev);
 924         netif_carrier_on(dev);
 925
 926         return 0;
 927 }
 928
 929 /*
 930  * this makes the board clean up everything that it can
 931  * and not talk to the outside world.   Caused by
 932  * an 'ifconfig ethX down'
 933  */
 934 static int bfin_mac_close(struct net_device *dev)
 935 {
 936         struct bfin_mac_local *lp = netdev_priv(dev);
 937         pr_debug("%s: %s\n", dev->name, __func__);
 938
 939         netif_stop_queue(dev);
 940         netif_carrier_off(dev);
 941
 942         phy_stop(lp->phydev);
 943         phy_write(lp->phydev, MII_BMCR, BMCR_PDOWN);
 944
 945         /* clear everything */
 946         bfin_mac_shutdown(dev);
 947
 948         /* free the rx/tx buffers */
 949         desc_list_free();
 950
 951         return 0;
 952 }
 953
 954 static const struct net_device_ops bfin_mac_netdev_ops = {
 955         .ndo_open               = bfin_mac_open,
 956         .ndo_stop               = bfin_mac_close,
 957         .ndo_start_xmit         = bfin_mac_hard_start_xmit,
 958         .ndo_set_mac_address    = bfin_mac_set_mac_address,
 959         .ndo_tx_timeout         = bfin_mac_timeout,
 960         .ndo_set_multicast_list = bfin_mac_set_multicast_list,
 961         .ndo_validate_addr      = eth_validate_addr,
 962         .ndo_change_mtu         = eth_change_mtu,
 963 #ifdef CONFIG_NET_POLL_CONTROLLER
 964         .ndo_poll_controller    = bfin_mac_poll,
 965 #endif
 966 };
 967
 968 static int __devinit bfin_mac_probe(struct platform_device *pdev)
 969 {
 970         struct net_device *ndev;
 971         struct bfin_mac_local *lp;
 972         struct platform_device *pd;
 973         int rc;
 974
 975         ndev = alloc_etherdev(sizeof(struct bfin_mac_local));
 976         if (!ndev) {
 977                 dev_err(&pdev->dev, "Cannot allocate net device!\n");
 978                 return -ENOMEM;
 979         }
 980
 981         SET_NETDEV_DEV(ndev, &pdev->dev);
 982         platform_set_drvdata(pdev, ndev);
 983         lp = netdev_priv(ndev);
 984
 985         /* Grab the MAC address in the MAC */
 986         *(__le32 *) (&(ndev->dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
 987         *(__le16 *) (&(ndev->dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI());
 988
 989         /* probe mac */
 990         /*todo: how to proble? which is revision_register */
 991         bfin_write_EMAC_ADDRLO(0x12345678);
 992         if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
 993                 dev_err(&pdev->dev, "Cannot detect Blackfin on-chip ethernet MAC controller!\n");
 994                 rc = -ENODEV;
 995                 goto out_err_probe_mac;
 996         }
 997
 998
 999         /*
1000          * Is it valid? (Did bootloader initialize it?)
1001          * Grab the MAC from the board somehow
1002          * this is done in the arch/blackfin/mach-bfxxx/boards/eth_mac.c
1003          */
1004         if (!is_valid_ether_addr(ndev->dev_addr))
1005                 bfin_get_ether_addr(ndev->dev_addr);
1006
1007         /* If still not valid, get a random one */
1008         if (!is_valid_ether_addr(ndev->dev_addr))
1009                 random_ether_addr(ndev->dev_addr);
1010
1011         setup_mac_addr(ndev->dev_addr);
1012
1013         if (!pdev->dev.platform_data) {
1014                 dev_err(&pdev->dev, "Cannot get platform device bfin_mii_bus!\n");
1015                 rc = -ENODEV;
1016                 goto out_err_probe_mac;
1017         }
1018         pd = pdev->dev.platform_data;
1019         lp->mii_bus = platform_get_drvdata(pd);
1020         lp->mii_bus->priv = ndev;
1021
1022         rc = mii_probe(ndev);
1023         if (rc) {
1024                 dev_err(&pdev->dev, "MII Probe failed!\n");
1025                 goto out_err_mii_probe;
1026         }
1027
1028         /* Fill in the fields of the device structure with ethernet values. */
1029         ether_setup(ndev);
1030
1031         ndev->netdev_ops = &bfin_mac_netdev_ops;
1032         ndev->ethtool_ops = &bfin_mac_ethtool_ops;
1033
1034         spin_lock_init(&lp->lock);
1035
1036         /* now, enable interrupts */
1037         /* register irq handler */
1038         rc = request_irq(IRQ_MAC_RX, bfin_mac_interrupt,
1039                         IRQF_DISABLED, "EMAC_RX", ndev);
1040         if (rc) {
1041                 dev_err(&pdev->dev, "Cannot request Blackfin MAC RX IRQ!\n");
1042                 rc = -EBUSY;
1043                 goto out_err_request_irq;
1044         }
1045
1046         rc = register_netdev(ndev);
1047         if (rc) {
1048                 dev_err(&pdev->dev, "Cannot register net device!\n");
1049                 goto out_err_reg_ndev;
1050         }
1051
1052         /* now, print out the card info, in a short format.. */
1053         dev_info(&pdev->dev, "%s, Version %s\n", DRV_DESC, DRV_VERSION);
1054
1055         return 0;
1056
1057 out_err_reg_ndev:
1058         free_irq(IRQ_MAC_RX, ndev);
1059 out_err_request_irq:
1060 out_err_mii_probe:
1061         mdiobus_unregister(lp->mii_bus);
1062         mdiobus_free(lp->mii_bus);
1063         peripheral_free_list(pin_req);
1064 out_err_probe_mac:
1065         platform_set_drvdata(pdev, NULL);
1066         free_netdev(ndev);
1067
1068         return rc;
1069 }
1070
1071 static int __devexit bfin_mac_remove(struct platform_device *pdev)
1072 {
1073         struct net_device *ndev = platform_get_drvdata(pdev);
1074         struct bfin_mac_local *lp = netdev_priv(ndev);
1075
1076         platform_set_drvdata(pdev, NULL);
1077
1078         lp->mii_bus->priv = NULL;
1079
1080         unregister_netdev(ndev);
1081
1082         free_irq(IRQ_MAC_RX, ndev);
1083
1084         free_netdev(ndev);
1085
1086         peripheral_free_list(pin_req);
1087
1088         return 0;
1089 }
1090
1091 #ifdef CONFIG_PM
1092 static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg)
1093 {
1094         struct net_device *net_dev = platform_get_drvdata(pdev);
1095
1096         if (netif_running(net_dev))
1097                 bfin_mac_close(net_dev);
1098
1099         return 0;
1100 }
1101
1102 static int bfin_mac_resume(struct platform_device *pdev)
1103 {
1104         struct net_device *net_dev = platform_get_drvdata(pdev);
1105
1106         if (netif_running(net_dev))
1107                 bfin_mac_open(net_dev);
1108
1109         return 0;
1110 }
1111 #else
1112 #define bfin_mac_suspend NULL
1113 #define bfin_mac_resume NULL
1114 #endif  /* CONFIG_PM */
1115
1116 static int __devinit bfin_mii_bus_probe(struct platform_device *pdev)
1117 {
1118         struct mii_bus *miibus;
1119         int rc, i;
1120
1121         /*
1122          * We are setting up a network card,
1123          * so set the GPIO pins to Ethernet mode
1124          */
1125         rc = peripheral_request_list(pin_req, DRV_NAME);
1126         if (rc) {
1127                 dev_err(&pdev->dev, "Requesting peripherals failed!\n");
1128                 return rc;
1129         }
1130
1131         rc = -ENOMEM;
1132         miibus = mdiobus_alloc();
1133         if (miibus == NULL)
1134                 goto out_err_alloc;
1135         miibus->read = bfin_mdiobus_read;
1136         miibus->write = bfin_mdiobus_write;
1137         miibus->reset = bfin_mdiobus_reset;
1138
1139         miibus->parent = &pdev->dev;
1140         miibus->name = "bfin_mii_bus";
1141         snprintf(miibus->id, MII_BUS_ID_SIZE, "0");
1142         miibus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
1143         if (miibus->irq == NULL)
1144                 goto out_err_alloc;
1145         for (i = 0; i < PHY_MAX_ADDR; ++i)
1146                 miibus->irq[i] = PHY_POLL;
1147
1148         rc = mdiobus_register(miibus);
1149         if (rc) {
1150                 dev_err(&pdev->dev, "Cannot register MDIO bus!\n");
1151                 goto out_err_mdiobus_register;
1152         }
1153
1154         platform_set_drvdata(pdev, miibus);
1155         return 0;
1156
1157 out_err_mdiobus_register:
1158         mdiobus_free(miibus);
1159 out_err_alloc:
1160         peripheral_free_list(pin_req);
1161
1162         return rc;
1163 }
1164
1165 static int __devexit bfin_mii_bus_remove(struct platform_device *pdev)
1166 {
1167         struct mii_bus *miibus = platform_get_drvdata(pdev);
1168         platform_set_drvdata(pdev, NULL);
1169         mdiobus_unregister(miibus);
1170         mdiobus_free(miibus);
1171         peripheral_free_list(pin_req);
1172         return 0;
1173 }
1174
1175 static struct platform_driver bfin_mii_bus_driver = {
1176         .probe = bfin_mii_bus_probe,
1177         .remove = __devexit_p(bfin_mii_bus_remove),
1178         .driver = {
1179                 .name = "bfin_mii_bus",
1180                 .owner  = THIS_MODULE,
1181         },
1182 };
1183
1184 static struct platform_driver bfin_mac_driver = {
1185         .probe = bfin_mac_probe,
1186         .remove = __devexit_p(bfin_mac_remove),
1187         .resume = bfin_mac_resume,
1188         .suspend = bfin_mac_suspend,
1189         .driver = {
1190                 .name = DRV_NAME,
1191                 .owner  = THIS_MODULE,
1192         },
1193 };
1194
1195 static int __init bfin_mac_init(void)
1196 {
1197         int ret;
1198         ret = platform_driver_register(&bfin_mii_bus_driver);
1199         if (!ret)
1200                 return platform_driver_register(&bfin_mac_driver);
1201         return -ENODEV;
1202 }
1203
1204 module_init(bfin_mac_init);
1205
1206 static void __exit bfin_mac_cleanup(void)
1207 {
1208         platform_driver_unregister(&bfin_mac_driver);
1209         platform_driver_unregister(&bfin_mii_bus_driver);
1210 }
1211
1212 module_exit(bfin_mac_cleanup);
1213