drivers/usb/otg/fsl_otg.c

   1 /*
   2  * Copyright (C) 2007,2008 Freescale semiconductor, Inc.
   3  *
   4  * Author: Li Yang <LeoLi@freescale.com>
   5  *         Jerry Huang <Chang-Ming.Huang@freescale.com>
   6  *
   7  * Initialization based on code from Shlomi Gridish.
   8  *
   9  * This program is free software; you can redistribute  it and/or modify it
  10  * under  the terms of  the GNU General  Public License as published by the
  11  * Free Software Foundation;  either version 2 of the  License, or (at your
  12  * option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the  GNU General Public License along
  20  * with this program; if not, write  to the Free Software Foundation, Inc.,
  21  * 675 Mass Ave, Cambridge, MA 02139, USA.
  22  */
  23
  24 #include <linux/module.h>
  25 #include <linux/kernel.h>
  26 #include <linux/delay.h>
  27 #include <linux/slab.h>
  28 #include <linux/proc_fs.h>
  29 #include <linux/errno.h>
  30 #include <linux/init.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/io.h>
  33 #include <linux/timer.h>
  34 #include <linux/usb.h>
  35 #include <linux/device.h>
  36 #include <linux/usb/ch9.h>
  37 #include <linux/usb/gadget.h>
  38 #include <linux/workqueue.h>
  39 #include <linux/time.h>
  40 #include <linux/fsl_devices.h>
  41 #include <linux/platform_device.h>
  42 #include <linux/uaccess.h>
  43
  44 #include <asm/unaligned.h>
  45
  46 #include "fsl_otg.h"
  47
  48 #define DRIVER_VERSION "Rev. 1.55"
  49 #define DRIVER_AUTHOR "Jerry Huang/Li Yang"
  50 #define DRIVER_DESC "Freescale USB OTG Transceiver Driver"
  51 #define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
  52
  53 static const char driver_name[] = "fsl-usb2-otg";
  54
  55 const pm_message_t otg_suspend_state = {
  56         .event = 1,
  57 };
  58
  59 #define HA_DATA_PULSE
  60
  61 static struct usb_dr_mmap *usb_dr_regs;
  62 static struct fsl_otg *fsl_otg_dev;
  63 static int srp_wait_done;
  64
  65 /* FSM timers */
  66 struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr,
  67         *b_ase0_brst_tmr, *b_se0_srp_tmr;
  68
  69 /* Driver specific timers */
  70 struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr,
  71         *b_srp_wait_tmr, *a_wait_enum_tmr;
  72
  73 static struct list_head active_timers;
  74
  75 static struct fsl_otg_config fsl_otg_initdata = {
  76         .otg_port = 1,
  77 };
  78
  79 #ifdef CONFIG_PPC32
  80 static u32 _fsl_readl_be(const unsigned __iomem *p)
  81 {
  82         return in_be32(p);
  83 }
  84
  85 static u32 _fsl_readl_le(const unsigned __iomem *p)
  86 {
  87         return in_le32(p);
  88 }
  89
  90 static void _fsl_writel_be(u32 v, unsigned __iomem *p)
  91 {
  92         out_be32(p, v);
  93 }
  94
  95 static void _fsl_writel_le(u32 v, unsigned __iomem *p)
  96 {
  97         out_le32(p, v);
  98 }
  99
 100 static u32 (*_fsl_readl)(const unsigned __iomem *p);
 101 static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
 102
 103 #define fsl_readl(p)            (*_fsl_readl)((p))
 104 #define fsl_writel(v, p)        (*_fsl_writel)((v), (p))
 105
 106 #else
 107 #define fsl_readl(addr)         readl(addr)
 108 #define fsl_writel(val, addr)   writel(val, addr)
 109 #endif /* CONFIG_PPC32 */
 110
 111 /* Routines to access transceiver ULPI registers */
 112 u8 view_ulpi(u8 addr)
 113 {
 114         u32 temp;
 115
 116         temp = 0x40000000 | (addr << 16);
 117         fsl_writel(temp, &usb_dr_regs->ulpiview);
 118         udelay(1000);
 119         while (temp & 0x40)
 120                 temp = fsl_readl(&usb_dr_regs->ulpiview);
 121         return (le32_to_cpu(temp) & 0x0000ff00) >> 8;
 122 }
 123
 124 int write_ulpi(u8 addr, u8 data)
 125 {
 126         u32 temp;
 127
 128         temp = 0x60000000 | (addr << 16) | data;
 129         fsl_writel(temp, &usb_dr_regs->ulpiview);
 130         return 0;
 131 }
 132
 133 /* -------------------------------------------------------------*/
 134 /* Operations that will be called from OTG Finite State Machine */
 135
 136 /* Charge vbus for vbus pulsing in SRP */
 137 void fsl_otg_chrg_vbus(int on)
 138 {
 139         u32 tmp;
 140
 141         tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
 142
 143         if (on)
 144                 /* stop discharging, start charging */
 145                 tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) |
 146                         OTGSC_CTRL_VBUS_CHARGE;
 147         else
 148                 /* stop charging */
 149                 tmp &= ~OTGSC_CTRL_VBUS_CHARGE;
 150
 151         fsl_writel(tmp, &usb_dr_regs->otgsc);
 152 }
 153
 154 /* Discharge vbus through a resistor to ground */
 155 void fsl_otg_dischrg_vbus(int on)
 156 {
 157         u32 tmp;
 158
 159         tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
 160
 161         if (on)
 162                 /* stop charging, start discharging */
 163                 tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) |
 164                         OTGSC_CTRL_VBUS_DISCHARGE;
 165         else
 166                 /* stop discharging */
 167                 tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE;
 168
 169         fsl_writel(tmp, &usb_dr_regs->otgsc);
 170 }
 171
 172 /* A-device driver vbus, controlled through PP bit in PORTSC */
 173 void fsl_otg_drv_vbus(int on)
 174 {
 175         u32 tmp;
 176
 177         if (on) {
 178                 tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS;
 179                 fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc);
 180         } else {
 181                 tmp = fsl_readl(&usb_dr_regs->portsc) &
 182                       ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER;
 183                 fsl_writel(tmp, &usb_dr_regs->portsc);
 184         }
 185 }
 186
 187 /*
 188  * Pull-up D+, signalling connect by periperal. Also used in
 189  * data-line pulsing in SRP
 190  */
 191 void fsl_otg_loc_conn(int on)
 192 {
 193         u32 tmp;
 194
 195         tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
 196
 197         if (on)
 198                 tmp |= OTGSC_CTRL_DATA_PULSING;
 199         else
 200                 tmp &= ~OTGSC_CTRL_DATA_PULSING;
 201
 202         fsl_writel(tmp, &usb_dr_regs->otgsc);
 203 }
 204
 205 /*
 206  * Generate SOF by host.  This is controlled through suspend/resume the
 207  * port.  In host mode, controller will automatically send SOF.
 208  * Suspend will block the data on the port.
 209  */
 210 void fsl_otg_loc_sof(int on)
 211 {
 212         u32 tmp;
 213
 214         tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS;
 215         if (on)
 216                 tmp |= PORTSC_PORT_FORCE_RESUME;
 217         else
 218                 tmp |= PORTSC_PORT_SUSPEND;
 219
 220         fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc);
 221
 222 }
 223
 224 /* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */
 225 void fsl_otg_start_pulse(void)
 226 {
 227         u32 tmp;
 228
 229         srp_wait_done = 0;
 230 #ifdef HA_DATA_PULSE
 231         tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
 232         tmp |= OTGSC_HA_DATA_PULSE;
 233         fsl_writel(tmp, &usb_dr_regs->otgsc);
 234 #else
 235         fsl_otg_loc_conn(1);
 236 #endif
 237
 238         fsl_otg_add_timer(b_data_pulse_tmr);
 239 }
 240
 241 void b_data_pulse_end(unsigned long foo)
 242 {
 243 #ifdef HA_DATA_PULSE
 244 #else
 245         fsl_otg_loc_conn(0);
 246 #endif
 247
 248         /* Do VBUS pulse after data pulse */
 249         fsl_otg_pulse_vbus();
 250 }
 251
 252 void fsl_otg_pulse_vbus(void)
 253 {
 254         srp_wait_done = 0;
 255         fsl_otg_chrg_vbus(1);
 256         /* start the timer to end vbus charge */
 257         fsl_otg_add_timer(b_vbus_pulse_tmr);
 258 }
 259
 260 void b_vbus_pulse_end(unsigned long foo)
 261 {
 262         fsl_otg_chrg_vbus(0);
 263
 264         /*
 265          * As USB3300 using the same a_sess_vld and b_sess_vld voltage
 266          * we need to discharge the bus for a while to distinguish
 267          * residual voltage of vbus pulsing and A device pull up
 268          */
 269         fsl_otg_dischrg_vbus(1);
 270         fsl_otg_add_timer(b_srp_wait_tmr);
 271 }
 272
 273 void b_srp_end(unsigned long foo)
 274 {
 275         fsl_otg_dischrg_vbus(0);
 276         srp_wait_done = 1;
 277
 278         if ((fsl_otg_dev->otg.state == OTG_STATE_B_SRP_INIT) &&
 279             fsl_otg_dev->fsm.b_sess_vld)
 280                 fsl_otg_dev->fsm.b_srp_done = 1;
 281 }
 282
 283 /*
 284  * Workaround for a_host suspending too fast.  When a_bus_req=0,
 285  * a_host will start by SRP.  It needs to set b_hnp_enable before
 286  * actually suspending to start HNP
 287  */
 288 void a_wait_enum(unsigned long foo)
 289 {
 290         VDBG("a_wait_enum timeout\n");
 291         if (!fsl_otg_dev->otg.host->b_hnp_enable)
 292                 fsl_otg_add_timer(a_wait_enum_tmr);
 293         else
 294                 otg_statemachine(&fsl_otg_dev->fsm);
 295 }
 296
 297 /* The timeout callback function to set time out bit */
 298 void set_tmout(unsigned long indicator)
 299 {
 300         *(int *)indicator = 1;
 301 }
 302
 303 /* Initialize timers */
 304 int fsl_otg_init_timers(struct otg_fsm *fsm)
 305 {
 306         /* FSM used timers */
 307         a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
 308                                 (unsigned long)&fsm->a_wait_vrise_tmout);
 309         if (!a_wait_vrise_tmr)
 310                 return -ENOMEM;
 311
 312         a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
 313                                 (unsigned long)&fsm->a_wait_bcon_tmout);
 314         if (!a_wait_bcon_tmr)
 315                 return -ENOMEM;
 316
 317         a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
 318                                 (unsigned long)&fsm->a_aidl_bdis_tmout);
 319         if (!a_aidl_bdis_tmr)
 320                 return -ENOMEM;
 321
 322         b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
 323                                 (unsigned long)&fsm->b_ase0_brst_tmout);
 324         if (!b_ase0_brst_tmr)
 325                 return -ENOMEM;
 326
 327         b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
 328                                 (unsigned long)&fsm->b_se0_srp);
 329         if (!b_se0_srp_tmr)
 330                 return -ENOMEM;
 331
 332         b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL,
 333                                 (unsigned long)&fsm->b_srp_done);
 334         if (!b_srp_fail_tmr)
 335                 return -ENOMEM;
 336
 337         a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10,
 338                                 (unsigned long)&fsm);
 339         if (!a_wait_enum_tmr)
 340                 return -ENOMEM;
 341
 342         /* device driver used timers */
 343         b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0);
 344         if (!b_srp_wait_tmr)
 345                 return -ENOMEM;
 346
 347         b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end,
 348                                 TB_DATA_PLS, 0);
 349         if (!b_data_pulse_tmr)
 350                 return -ENOMEM;
 351
 352         b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end,
 353                                 TB_VBUS_PLS, 0);
 354         if (!b_vbus_pulse_tmr)
 355                 return -ENOMEM;
 356
 357         return 0;
 358 }
 359
 360 /* Uninitialize timers */
 361 void fsl_otg_uninit_timers(void)
 362 {
 363         /* FSM used timers */
 364         if (a_wait_vrise_tmr != NULL)
 365                 kfree(a_wait_vrise_tmr);
 366         if (a_wait_bcon_tmr != NULL)
 367                 kfree(a_wait_bcon_tmr);
 368         if (a_aidl_bdis_tmr != NULL)
 369                 kfree(a_aidl_bdis_tmr);
 370         if (b_ase0_brst_tmr != NULL)
 371                 kfree(b_ase0_brst_tmr);
 372         if (b_se0_srp_tmr != NULL)
 373                 kfree(b_se0_srp_tmr);
 374         if (b_srp_fail_tmr != NULL)
 375                 kfree(b_srp_fail_tmr);
 376         if (a_wait_enum_tmr != NULL)
 377                 kfree(a_wait_enum_tmr);
 378
 379         /* device driver used timers */
 380         if (b_srp_wait_tmr != NULL)
 381                 kfree(b_srp_wait_tmr);
 382         if (b_data_pulse_tmr != NULL)
 383                 kfree(b_data_pulse_tmr);
 384         if (b_vbus_pulse_tmr != NULL)
 385                 kfree(b_vbus_pulse_tmr);
 386 }
 387
 388 /* Add timer to timer list */
 389 void fsl_otg_add_timer(void *gtimer)
 390 {
 391         struct fsl_otg_timer *timer = gtimer;
 392         struct fsl_otg_timer *tmp_timer;
 393
 394         /*
 395          * Check if the timer is already in the active list,
 396          * if so update timer count
 397          */
 398         list_for_each_entry(tmp_timer, &active_timers, list)
 399             if (tmp_timer == timer) {
 400                 timer->count = timer->expires;
 401                 return;
 402         }
 403         timer->count = timer->expires;
 404         list_add_tail(&timer->list, &active_timers);
 405 }
 406
 407 /* Remove timer from the timer list; clear timeout status */
 408 void fsl_otg_del_timer(void *gtimer)
 409 {
 410         struct fsl_otg_timer *timer = gtimer;
 411         struct fsl_otg_timer *tmp_timer, *del_tmp;
 412
 413         list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
 414                 if (tmp_timer == timer)
 415                         list_del(&timer->list);
 416 }
 417
 418 /*
 419  * Reduce timer count by 1, and find timeout conditions.
 420  * Called by fsl_otg 1ms timer interrupt
 421  */
 422 int fsl_otg_tick_timer(void)
 423 {
 424         struct fsl_otg_timer *tmp_timer, *del_tmp;
 425         int expired = 0;
 426
 427         list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) {
 428                 tmp_timer->count--;
 429                 /* check if timer expires */
 430                 if (!tmp_timer->count) {
 431                         list_del(&tmp_timer->list);
 432                         tmp_timer->function(tmp_timer->data);
 433                         expired = 1;
 434                 }
 435         }
 436
 437         return expired;
 438 }
 439
 440 /* Reset controller, not reset the bus */
 441 void otg_reset_controller(void)
 442 {
 443         u32 command;
 444
 445         command = fsl_readl(&usb_dr_regs->usbcmd);
 446         command |= (1 << 1);
 447         fsl_writel(command, &usb_dr_regs->usbcmd);
 448         while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1))
 449                 ;
 450 }
 451
 452 /* Call suspend/resume routines in host driver */
 453 int fsl_otg_start_host(struct otg_fsm *fsm, int on)
 454 {
 455         struct otg_transceiver *xceiv = fsm->transceiver;
 456         struct device *dev;
 457         struct fsl_otg *otg_dev = container_of(xceiv, struct fsl_otg, otg);
 458         u32 retval = 0;
 459
 460         if (!xceiv->host)
 461                 return -ENODEV;
 462         dev = xceiv->host->controller;
 463
 464         /*
 465          * Update a_vbus_vld state as a_vbus_vld int is disabled
 466          * in device mode
 467          */
 468         fsm->a_vbus_vld =
 469                 !!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID);
 470         if (on) {
 471                 /* start fsl usb host controller */
 472                 if (otg_dev->host_working)
 473                         goto end;
 474                 else {
 475                         otg_reset_controller();
 476                         VDBG("host on......\n");
 477                         if (dev->driver->pm && dev->driver->pm->resume) {
 478                                 retval = dev->driver->pm->resume(dev);
 479                                 if (fsm->id) {
 480                                         /* default-b */
 481                                         fsl_otg_drv_vbus(1);
 482                                         /*
 483                                          * Workaround: b_host can't driver
 484                                          * vbus, but PP in PORTSC needs to
 485                                          * be 1 for host to work.
 486                                          * So we set drv_vbus bit in
 487                                          * transceiver to 0 thru ULPI.
 488                                          */
 489                                         write_ulpi(0x0c, 0x20);
 490                                 }
 491                         }
 492
 493                         otg_dev->host_working = 1;
 494                 }
 495         } else {
 496                 /* stop fsl usb host controller */
 497                 if (!otg_dev->host_working)
 498                         goto end;
 499                 else {
 500                         VDBG("host off......\n");
 501                         if (dev && dev->driver) {
 502                                 if (dev->driver->pm && dev->driver->pm->suspend)
 503                                         retval = dev->driver->pm->suspend(dev);
 504                                 if (fsm->id)
 505                                         /* default-b */
 506                                         fsl_otg_drv_vbus(0);
 507                         }
 508                         otg_dev->host_working = 0;
 509                 }
 510         }
 511 end:
 512         return retval;
 513 }
 514
 515 /*
 516  * Call suspend and resume function in udc driver
 517  * to stop and start udc driver.
 518  */
 519 int fsl_otg_start_gadget(struct otg_fsm *fsm, int on)
 520 {
 521         struct otg_transceiver *xceiv = fsm->transceiver;
 522         struct device *dev;
 523
 524         if (!xceiv->gadget || !xceiv->gadget->dev.parent)
 525                 return -ENODEV;
 526
 527         VDBG("gadget %s\n", on ? "on" : "off");
 528         dev = xceiv->gadget->dev.parent;
 529
 530         if (on) {
 531                 if (dev->driver->resume)
 532                         dev->driver->resume(dev);
 533         } else {
 534                 if (dev->driver->suspend)
 535                         dev->driver->suspend(dev, otg_suspend_state);
 536         }
 537
 538         return 0;
 539 }
 540
 541 /*
 542  * Called by initialization code of host driver.  Register host controller
 543  * to the OTG.  Suspend host for OTG role detection.
 544  */
 545 static int fsl_otg_set_host(struct otg_transceiver *otg_p, struct usb_bus *host)
 546 {
 547         struct fsl_otg *otg_dev = container_of(otg_p, struct fsl_otg, otg);
 548
 549         if (!otg_p || otg_dev != fsl_otg_dev)
 550                 return -ENODEV;
 551
 552         otg_p->host = host;
 553
 554         otg_dev->fsm.a_bus_drop = 0;
 555         otg_dev->fsm.a_bus_req = 1;
 556
 557         if (host) {
 558                 VDBG("host off......\n");
 559
 560                 otg_p->host->otg_port = fsl_otg_initdata.otg_port;
 561                 otg_p->host->is_b_host = otg_dev->fsm.id;
 562                 /*
 563                  * must leave time for khubd to finish its thing
 564                  * before yanking the host driver out from under it,
 565                  * so suspend the host after a short delay.
 566                  */
 567                 otg_dev->host_working = 1;
 568                 schedule_delayed_work(&otg_dev->otg_event, 100);
 569                 return 0;
 570         } else {
 571                 /* host driver going away */
 572                 if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) &
 573                       OTGSC_STS_USB_ID)) {
 574                         /* Mini-A cable connected */
 575                         struct otg_fsm *fsm = &otg_dev->fsm;
 576
 577                         otg_p->state = OTG_STATE_UNDEFINED;
 578                         fsm->protocol = PROTO_UNDEF;
 579                 }
 580         }
 581
 582         otg_dev->host_working = 0;
 583
 584         otg_statemachine(&otg_dev->fsm);
 585
 586         return 0;
 587 }
 588
 589 /* Called by initialization code of udc.  Register udc to OTG. */
 590 static int fsl_otg_set_peripheral(struct otg_transceiver *otg_p,
 591                                   struct usb_gadget *gadget)
 592 {
 593         struct fsl_otg *otg_dev = container_of(otg_p, struct fsl_otg, otg);
 594
 595         VDBG("otg_dev 0x%x\n", (int)otg_dev);
 596         VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev);
 597
 598         if (!otg_p || otg_dev != fsl_otg_dev)
 599                 return -ENODEV;
 600
 601         if (!gadget) {
 602                 if (!otg_dev->otg.default_a)
 603                         otg_p->gadget->ops->vbus_draw(otg_p->gadget, 0);
 604                 usb_gadget_vbus_disconnect(otg_dev->otg.gadget);
 605                 otg_dev->otg.gadget = 0;
 606                 otg_dev->fsm.b_bus_req = 0;
 607                 otg_statemachine(&otg_dev->fsm);
 608                 return 0;
 609         }
 610
 611         otg_p->gadget = gadget;
 612         otg_p->gadget->is_a_peripheral = !otg_dev->fsm.id;
 613
 614         otg_dev->fsm.b_bus_req = 1;
 615
 616         /* start the gadget right away if the ID pin says Mini-B */
 617         DBG("ID pin=%d\n", otg_dev->fsm.id);
 618         if (otg_dev->fsm.id == 1) {
 619                 fsl_otg_start_host(&otg_dev->fsm, 0);
 620                 otg_drv_vbus(&otg_dev->fsm, 0);
 621                 fsl_otg_start_gadget(&otg_dev->fsm, 1);
 622         }
 623
 624         return 0;
 625 }
 626
 627 /* Set OTG port power, only for B-device */
 628 static int fsl_otg_set_power(struct otg_transceiver *otg_p, unsigned mA)
 629 {
 630         if (!fsl_otg_dev)
 631                 return -ENODEV;
 632         if (otg_p->state == OTG_STATE_B_PERIPHERAL)
 633                 pr_info("FSL OTG: Draw %d mA\n", mA);
 634
 635         return 0;
 636 }
 637
 638 /*
 639  * Delayed pin detect interrupt processing.
 640  *
 641  * When the Mini-A cable is disconnected from the board,
 642  * the pin-detect interrupt happens before the disconnnect
 643  * interrupts for the connected device(s).  In order to
 644  * process the disconnect interrupt(s) prior to switching
 645  * roles, the pin-detect interrupts are delayed, and handled
 646  * by this routine.
 647  */
 648 static void fsl_otg_event(struct work_struct *work)
 649 {
 650         struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work);
 651         struct otg_fsm *fsm = &og->fsm;
 652
 653         if (fsm->id) {          /* switch to gadget */
 654                 fsl_otg_start_host(fsm, 0);
 655                 otg_drv_vbus(fsm, 0);
 656                 fsl_otg_start_gadget(fsm, 1);
 657         }
 658 }
 659
 660 /* B-device start SRP */
 661 static int fsl_otg_start_srp(struct otg_transceiver *otg_p)
 662 {
 663         struct fsl_otg *otg_dev = container_of(otg_p, struct fsl_otg, otg);
 664
 665         if (!otg_p || otg_dev != fsl_otg_dev
 666             || otg_p->state != OTG_STATE_B_IDLE)
 667                 return -ENODEV;
 668
 669         otg_dev->fsm.b_bus_req = 1;
 670         otg_statemachine(&otg_dev->fsm);
 671
 672         return 0;
 673 }
 674
 675 /* A_host suspend will call this function to start hnp */
 676 static int fsl_otg_start_hnp(struct otg_transceiver *otg_p)
 677 {
 678         struct fsl_otg *otg_dev = container_of(otg_p, struct fsl_otg, otg);
 679
 680         if (!otg_p || otg_dev != fsl_otg_dev)
 681                 return -ENODEV;
 682
 683         DBG("start_hnp...n");
 684
 685         /* clear a_bus_req to enter a_suspend state */
 686         otg_dev->fsm.a_bus_req = 0;
 687         otg_statemachine(&otg_dev->fsm);
 688
 689         return 0;
 690 }
 691
 692 /*
 693  * Interrupt handler.  OTG/host/peripheral share the same int line.
 694  * OTG driver clears OTGSC interrupts and leaves USB interrupts
 695  * intact.  It needs to have knowledge of some USB interrupts
 696  * such as port change.
 697  */
 698 irqreturn_t fsl_otg_isr(int irq, void *dev_id)
 699 {
 700         struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
 701         struct otg_transceiver *otg = &((struct fsl_otg *)dev_id)->otg;
 702         u32 otg_int_src, otg_sc;
 703
 704         otg_sc = fsl_readl(&usb_dr_regs->otgsc);
 705         otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8);
 706
 707         /* Only clear otg interrupts */
 708         fsl_writel(otg_sc, &usb_dr_regs->otgsc);
 709
 710         /*FIXME: ID change not generate when init to 0 */
 711         fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
 712         otg->default_a = (fsm->id == 0);
 713
 714         /* process OTG interrupts */
 715         if (otg_int_src) {
 716                 if (otg_int_src & OTGSC_INTSTS_USB_ID) {
 717                         fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
 718                         otg->default_a = (fsm->id == 0);
 719                         /* clear conn information */
 720                         if (fsm->id)
 721                                 fsm->b_conn = 0;
 722                         else
 723                                 fsm->a_conn = 0;
 724
 725                         if (otg->host)
 726                                 otg->host->is_b_host = fsm->id;
 727                         if (otg->gadget)
 728                                 otg->gadget->is_a_peripheral = !fsm->id;
 729                         VDBG("ID int (ID is %d)\n", fsm->id);
 730
 731                         if (fsm->id) {  /* switch to gadget */
 732                                 schedule_delayed_work(
 733                                         &((struct fsl_otg *)dev_id)->otg_event,
 734                                         100);
 735                         } else {        /* switch to host */
 736                                 cancel_delayed_work(&
 737                                                     ((struct fsl_otg *)dev_id)->
 738                                                     otg_event);
 739                                 fsl_otg_start_gadget(fsm, 0);
 740                                 otg_drv_vbus(fsm, 1);
 741                                 fsl_otg_start_host(fsm, 1);
 742                         }
 743                         return IRQ_HANDLED;
 744                 }
 745         }
 746         return IRQ_NONE;
 747 }
 748
 749 static struct otg_fsm_ops fsl_otg_ops = {
 750         .chrg_vbus = fsl_otg_chrg_vbus,
 751         .drv_vbus = fsl_otg_drv_vbus,
 752         .loc_conn = fsl_otg_loc_conn,
 753         .loc_sof = fsl_otg_loc_sof,
 754         .start_pulse = fsl_otg_start_pulse,
 755
 756         .add_timer = fsl_otg_add_timer,
 757         .del_timer = fsl_otg_del_timer,
 758
 759         .start_host = fsl_otg_start_host,
 760         .start_gadget = fsl_otg_start_gadget,
 761 };
 762
 763 /* Initialize the global variable fsl_otg_dev and request IRQ for OTG */
 764 static int fsl_otg_conf(struct platform_device *pdev)
 765 {
 766         struct fsl_otg *fsl_otg_tc;
 767         int status;
 768
 769         if (fsl_otg_dev)
 770                 return 0;
 771
 772         /* allocate space to fsl otg device */
 773         fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL);
 774         if (!fsl_otg_tc)
 775                 return -ENOMEM;
 776
 777         INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event);
 778
 779         INIT_LIST_HEAD(&active_timers);
 780         status = fsl_otg_init_timers(&fsl_otg_tc->fsm);
 781         if (status) {
 782                 pr_info("Couldn't init OTG timers\n");
 783                 goto err;
 784         }
 785         spin_lock_init(&fsl_otg_tc->fsm.lock);
 786
 787         /* Set OTG state machine operations */
 788         fsl_otg_tc->fsm.ops = &fsl_otg_ops;
 789
 790         /* initialize the otg structure */
 791         fsl_otg_tc->otg.label = DRIVER_DESC;
 792         fsl_otg_tc->otg.set_host = fsl_otg_set_host;
 793         fsl_otg_tc->otg.set_peripheral = fsl_otg_set_peripheral;
 794         fsl_otg_tc->otg.set_power = fsl_otg_set_power;
 795         fsl_otg_tc->otg.start_hnp = fsl_otg_start_hnp;
 796         fsl_otg_tc->otg.start_srp = fsl_otg_start_srp;
 797
 798         fsl_otg_dev = fsl_otg_tc;
 799
 800         /* Store the otg transceiver */
 801         status = otg_set_transceiver(&fsl_otg_tc->otg);
 802         if (status) {
 803                 pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n");
 804                 goto err;
 805         }
 806
 807         return 0;
 808 err:
 809         fsl_otg_uninit_timers();
 810         kfree(fsl_otg_tc);
 811         return status;
 812 }
 813
 814 /* OTG Initialization */
 815 int usb_otg_start(struct platform_device *pdev)
 816 {
 817         struct fsl_otg *p_otg;
 818         struct otg_transceiver *otg_trans = otg_get_transceiver();
 819         struct otg_fsm *fsm;
 820         int status;
 821         struct resource *res;
 822         u32 temp;
 823         struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
 824
 825         p_otg = container_of(otg_trans, struct fsl_otg, otg);
 826         fsm = &p_otg->fsm;
 827
 828         /* Initialize the state machine structure with default values */
 829         SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED);
 830         fsm->transceiver = &p_otg->otg;
 831
 832         /* We don't require predefined MEM/IRQ resource index */
 833         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 834         if (!res)
 835                 return -ENXIO;
 836
 837         /* We don't request_mem_region here to enable resource sharing
 838          * with host/device */
 839
 840         usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap));
 841         p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs;
 842         pdata->regs = (void *)usb_dr_regs;
 843
 844         if (pdata->init && pdata->init(pdev) != 0)
 845                 return -EINVAL;
 846
 847         if (pdata->big_endian_mmio) {
 848                 _fsl_readl = _fsl_readl_be;
 849                 _fsl_writel = _fsl_writel_be;
 850         } else {
 851                 _fsl_readl = _fsl_readl_le;
 852                 _fsl_writel = _fsl_writel_le;
 853         }
 854
 855         /* request irq */
 856         p_otg->irq = platform_get_irq(pdev, 0);
 857         status = request_irq(p_otg->irq, fsl_otg_isr,
 858                                 IRQF_SHARED, driver_name, p_otg);
 859         if (status) {
 860                 dev_dbg(p_otg->otg.dev, "can't get IRQ %d, error %d\n",
 861                         p_otg->irq, status);
 862                 iounmap(p_otg->dr_mem_map);
 863                 kfree(p_otg);
 864                 return status;
 865         }
 866
 867         /* stop the controller */
 868         temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
 869         temp &= ~USB_CMD_RUN_STOP;
 870         fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
 871
 872         /* reset the controller */
 873         temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
 874         temp |= USB_CMD_CTRL_RESET;
 875         fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
 876
 877         /* wait reset completed */
 878         while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET)
 879                 ;
 880
 881         /* configure the VBUSHS as IDLE(both host and device) */
 882         temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0);
 883         fsl_writel(temp, &p_otg->dr_mem_map->usbmode);
 884
 885         /* configure PHY interface */
 886         temp = fsl_readl(&p_otg->dr_mem_map->portsc);
 887         temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW);
 888         switch (pdata->phy_mode) {
 889         case FSL_USB2_PHY_ULPI:
 890                 temp |= PORTSC_PTS_ULPI;
 891                 break;
 892         case FSL_USB2_PHY_UTMI_WIDE:
 893                 temp |= PORTSC_PTW_16BIT;
 894                 /* fall through */
 895         case FSL_USB2_PHY_UTMI:
 896                 temp |= PORTSC_PTS_UTMI;
 897                 /* fall through */
 898         default:
 899                 break;
 900         }
 901         fsl_writel(temp, &p_otg->dr_mem_map->portsc);
 902
 903         if (pdata->have_sysif_regs) {
 904                 /* configure control enable IO output, big endian register */
 905                 temp = __raw_readl(&p_otg->dr_mem_map->control);
 906                 temp |= USB_CTRL_IOENB;
 907                 __raw_writel(temp, &p_otg->dr_mem_map->control);
 908         }
 909
 910         /* disable all interrupt and clear all OTGSC status */
 911         temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
 912         temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK;
 913         temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
 914         fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
 915
 916         /*
 917          * The identification (id) input is FALSE when a Mini-A plug is inserted
 918          * in the devices Mini-AB receptacle. Otherwise, this input is TRUE.
 919          * Also: record initial state of ID pin
 920          */
 921         if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) {
 922                 p_otg->otg.state = OTG_STATE_UNDEFINED;
 923                 p_otg->fsm.id = 1;
 924         } else {
 925                 p_otg->otg.state = OTG_STATE_A_IDLE;
 926                 p_otg->fsm.id = 0;
 927         }
 928
 929         DBG("initial ID pin=%d\n", p_otg->fsm.id);
 930
 931         /* enable OTG ID pin interrupt */
 932         temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
 933         temp |= OTGSC_INTR_USB_ID_EN;
 934         temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN);
 935         fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
 936
 937         return 0;
 938 }
 939
 940 /*
 941  * state file in sysfs
 942  */
 943 static int show_fsl_usb2_otg_state(struct device *dev,
 944                                    struct device_attribute *attr, char *buf)
 945 {
 946         struct otg_fsm *fsm = &fsl_otg_dev->fsm;
 947         char *next = buf;
 948         unsigned size = PAGE_SIZE;
 949         unsigned long flags;
 950         int t;
 951
 952         spin_lock_irqsave(&fsm->lock, flags);
 953
 954         /* basic driver infomation */
 955         t = scnprintf(next, size,
 956                         DRIVER_DESC "\n" "fsl_usb2_otg version: %s\n\n",
 957                         DRIVER_VERSION);
 958         size -= t;
 959         next += t;
 960
 961         /* Registers */
 962         t = scnprintf(next, size,
 963                         "OTGSC:   0x%08x\n"
 964                         "PORTSC:  0x%08x\n"
 965                         "USBMODE: 0x%08x\n"
 966                         "USBCMD:  0x%08x\n"
 967                         "USBSTS:  0x%08x\n"
 968                         "USBINTR: 0x%08x\n",
 969                         fsl_readl(&usb_dr_regs->otgsc),
 970                         fsl_readl(&usb_dr_regs->portsc),
 971                         fsl_readl(&usb_dr_regs->usbmode),
 972                         fsl_readl(&usb_dr_regs->usbcmd),
 973                         fsl_readl(&usb_dr_regs->usbsts),
 974                         fsl_readl(&usb_dr_regs->usbintr));
 975         size -= t;
 976         next += t;
 977
 978         /* State */
 979         t = scnprintf(next, size,
 980                       "OTG state: %s\n\n",
 981                       otg_state_string(fsl_otg_dev->otg.state));
 982         size -= t;
 983         next += t;
 984
 985         /* State Machine Variables */
 986         t = scnprintf(next, size,
 987                         "a_bus_req: %d\n"
 988                         "b_bus_req: %d\n"
 989                         "a_bus_resume: %d\n"
 990                         "a_bus_suspend: %d\n"
 991                         "a_conn: %d\n"
 992                         "a_sess_vld: %d\n"
 993                         "a_srp_det: %d\n"
 994                         "a_vbus_vld: %d\n"
 995                         "b_bus_resume: %d\n"
 996                         "b_bus_suspend: %d\n"
 997                         "b_conn: %d\n"
 998                         "b_se0_srp: %d\n"
 999                         "b_sess_end: %d\n"
1000                         "b_sess_vld: %d\n"
1001                         "id: %d\n",
1002                         fsm->a_bus_req,
1003                         fsm->b_bus_req,
1004                         fsm->a_bus_resume,
1005                         fsm->a_bus_suspend,
1006                         fsm->a_conn,
1007                         fsm->a_sess_vld,
1008                         fsm->a_srp_det,
1009                         fsm->a_vbus_vld,
1010                         fsm->b_bus_resume,
1011                         fsm->b_bus_suspend,
1012                         fsm->b_conn,
1013                         fsm->b_se0_srp,
1014                         fsm->b_sess_end,
1015                         fsm->b_sess_vld,
1016                         fsm->id);
1017         size -= t;
1018         next += t;
1019
1020         spin_unlock_irqrestore(&fsm->lock, flags);
1021
1022         return PAGE_SIZE - size;
1023 }
1024
1025 static DEVICE_ATTR(fsl_usb2_otg_state, S_IRUGO, show_fsl_usb2_otg_state, NULL);
1026
1027
1028 /* Char driver interface to control some OTG input */
1029
1030 /*
1031  * Handle some ioctl command, such as get otg
1032  * status and set host suspend
1033  */
1034 static long fsl_otg_ioctl(struct file *file, unsigned int cmd,
1035                           unsigned long arg)
1036 {
1037         u32 retval = 0;
1038
1039         switch (cmd) {
1040         case GET_OTG_STATUS:
1041                 retval = fsl_otg_dev->host_working;
1042                 break;
1043
1044         case SET_A_SUSPEND_REQ:
1045                 fsl_otg_dev->fsm.a_suspend_req = arg;
1046                 break;
1047
1048         case SET_A_BUS_DROP:
1049                 fsl_otg_dev->fsm.a_bus_drop = arg;
1050                 break;
1051
1052         case SET_A_BUS_REQ:
1053                 fsl_otg_dev->fsm.a_bus_req = arg;
1054                 break;
1055
1056         case SET_B_BUS_REQ:
1057                 fsl_otg_dev->fsm.b_bus_req = arg;
1058                 break;
1059
1060         default:
1061                 break;
1062         }
1063
1064         otg_statemachine(&fsl_otg_dev->fsm);
1065
1066         return retval;
1067 }
1068
1069 static int fsl_otg_open(struct inode *inode, struct file *file)
1070 {
1071         return 0;
1072 }
1073
1074 static int fsl_otg_release(struct inode *inode, struct file *file)
1075 {
1076         return 0;
1077 }
1078
1079 static const struct file_operations otg_fops = {
1080         .owner = THIS_MODULE,
1081         .llseek = NULL,
1082         .read = NULL,
1083         .write = NULL,
1084         .unlocked_ioctl = fsl_otg_ioctl,
1085         .open = fsl_otg_open,
1086         .release = fsl_otg_release,
1087 };
1088
1089 static int __devinit fsl_otg_probe(struct platform_device *pdev)
1090 {
1091         int ret;
1092
1093         if (!pdev->dev.platform_data)
1094                 return -ENODEV;
1095
1096         /* configure the OTG */
1097         ret = fsl_otg_conf(pdev);
1098         if (ret) {
1099                 dev_err(&pdev->dev, "Couldn't configure OTG module\n");
1100                 return ret;
1101         }
1102
1103         /* start OTG */
1104         ret = usb_otg_start(pdev);
1105         if (ret) {
1106                 dev_err(&pdev->dev, "Can't init FSL OTG device\n");
1107                 return ret;
1108         }
1109
1110         ret = register_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME, &otg_fops);
1111         if (ret) {
1112                 dev_err(&pdev->dev, "unable to register FSL OTG device\n");
1113                 return ret;
1114         }
1115
1116         ret = device_create_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1117         if (ret)
1118                 dev_warn(&pdev->dev, "Can't register sysfs attribute\n");
1119
1120         return ret;
1121 }
1122
1123 static int __devexit fsl_otg_remove(struct platform_device *pdev)
1124 {
1125         struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
1126
1127         otg_set_transceiver(NULL);
1128         free_irq(fsl_otg_dev->irq, fsl_otg_dev);
1129
1130         iounmap((void *)usb_dr_regs);
1131
1132         fsl_otg_uninit_timers();
1133         kfree(fsl_otg_dev);
1134
1135         device_remove_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1136
1137         unregister_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME);
1138
1139         if (pdata->exit)
1140                 pdata->exit(pdev);
1141
1142         return 0;
1143 }
1144
1145 struct platform_driver fsl_otg_driver = {
1146         .probe = fsl_otg_probe,
1147         .remove = __devexit_p(fsl_otg_remove),
1148         .driver = {
1149                 .name = driver_name,
1150                 .owner = THIS_MODULE,
1151         },
1152 };
1153
1154 static int __init fsl_usb_otg_init(void)
1155 {
1156         pr_info(DRIVER_INFO "\n");
1157         return platform_driver_register(&fsl_otg_driver);
1158 }
1159 module_init(fsl_usb_otg_init);
1160
1161 static void __exit fsl_usb_otg_exit(void)
1162 {
1163         platform_driver_unregister(&fsl_otg_driver);
1164 }
1165 module_exit(fsl_usb_otg_exit);
1166
1167 MODULE_DESCRIPTION(DRIVER_INFO);
1168 MODULE_AUTHOR(DRIVER_AUTHOR);
1169 MODULE_LICENSE("GPL");