2 * ALSA SoC TWL4030 codec driver
4 * Author: Steve Sakoman, <steve@sakoman.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/i2c/twl.h>
30 #include <linux/slab.h>
31 #include <sound/core.h>
32 #include <sound/pcm.h>
33 #include <sound/pcm_params.h>
34 #include <sound/soc.h>
35 #include <sound/soc-dapm.h>
36 #include <sound/initval.h>
37 #include <sound/tlv.h>
39 /* Register descriptions are here */
40 #include <linux/mfd/twl4030-codec.h>
42 /* Shadow register used by the audio driver */
43 #define TWL4030_REG_SW_SHADOW 0x4A
44 #define TWL4030_CACHEREGNUM (TWL4030_REG_SW_SHADOW + 1)
46 /* TWL4030_REG_SW_SHADOW (0x4A) Fields */
47 #define TWL4030_HFL_EN 0x01
48 #define TWL4030_HFR_EN 0x02
51 * twl4030 register cache & default register settings
53 static const u8 twl4030_reg
[TWL4030_CACHEREGNUM
] = {
54 0x00, /* this register not used */
55 0x00, /* REG_CODEC_MODE (0x1) */
56 0x00, /* REG_OPTION (0x2) */
57 0x00, /* REG_UNKNOWN (0x3) */
58 0x00, /* REG_MICBIAS_CTL (0x4) */
59 0x00, /* REG_ANAMICL (0x5) */
60 0x00, /* REG_ANAMICR (0x6) */
61 0x00, /* REG_AVADC_CTL (0x7) */
62 0x00, /* REG_ADCMICSEL (0x8) */
63 0x00, /* REG_DIGMIXING (0x9) */
64 0x0f, /* REG_ATXL1PGA (0xA) */
65 0x0f, /* REG_ATXR1PGA (0xB) */
66 0x0f, /* REG_AVTXL2PGA (0xC) */
67 0x0f, /* REG_AVTXR2PGA (0xD) */
68 0x00, /* REG_AUDIO_IF (0xE) */
69 0x00, /* REG_VOICE_IF (0xF) */
70 0x3f, /* REG_ARXR1PGA (0x10) */
71 0x3f, /* REG_ARXL1PGA (0x11) */
72 0x3f, /* REG_ARXR2PGA (0x12) */
73 0x3f, /* REG_ARXL2PGA (0x13) */
74 0x25, /* REG_VRXPGA (0x14) */
75 0x00, /* REG_VSTPGA (0x15) */
76 0x00, /* REG_VRX2ARXPGA (0x16) */
77 0x00, /* REG_AVDAC_CTL (0x17) */
78 0x00, /* REG_ARX2VTXPGA (0x18) */
79 0x32, /* REG_ARXL1_APGA_CTL (0x19) */
80 0x32, /* REG_ARXR1_APGA_CTL (0x1A) */
81 0x32, /* REG_ARXL2_APGA_CTL (0x1B) */
82 0x32, /* REG_ARXR2_APGA_CTL (0x1C) */
83 0x00, /* REG_ATX2ARXPGA (0x1D) */
84 0x00, /* REG_BT_IF (0x1E) */
85 0x55, /* REG_BTPGA (0x1F) */
86 0x00, /* REG_BTSTPGA (0x20) */
87 0x00, /* REG_EAR_CTL (0x21) */
88 0x00, /* REG_HS_SEL (0x22) */
89 0x00, /* REG_HS_GAIN_SET (0x23) */
90 0x00, /* REG_HS_POPN_SET (0x24) */
91 0x00, /* REG_PREDL_CTL (0x25) */
92 0x00, /* REG_PREDR_CTL (0x26) */
93 0x00, /* REG_PRECKL_CTL (0x27) */
94 0x00, /* REG_PRECKR_CTL (0x28) */
95 0x00, /* REG_HFL_CTL (0x29) */
96 0x00, /* REG_HFR_CTL (0x2A) */
97 0x05, /* REG_ALC_CTL (0x2B) */
98 0x00, /* REG_ALC_SET1 (0x2C) */
99 0x00, /* REG_ALC_SET2 (0x2D) */
100 0x00, /* REG_BOOST_CTL (0x2E) */
101 0x00, /* REG_SOFTVOL_CTL (0x2F) */
102 0x13, /* REG_DTMF_FREQSEL (0x30) */
103 0x00, /* REG_DTMF_TONEXT1H (0x31) */
104 0x00, /* REG_DTMF_TONEXT1L (0x32) */
105 0x00, /* REG_DTMF_TONEXT2H (0x33) */
106 0x00, /* REG_DTMF_TONEXT2L (0x34) */
107 0x79, /* REG_DTMF_TONOFF (0x35) */
108 0x11, /* REG_DTMF_WANONOFF (0x36) */
109 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
110 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
111 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
112 0x06, /* REG_APLL_CTL (0x3A) */
113 0x00, /* REG_DTMF_CTL (0x3B) */
114 0x44, /* REG_DTMF_PGA_CTL2 (0x3C) */
115 0x69, /* REG_DTMF_PGA_CTL1 (0x3D) */
116 0x00, /* REG_MISC_SET_1 (0x3E) */
117 0x00, /* REG_PCMBTMUX (0x3F) */
118 0x00, /* not used (0x40) */
119 0x00, /* not used (0x41) */
120 0x00, /* not used (0x42) */
121 0x00, /* REG_RX_PATH_SEL (0x43) */
122 0x32, /* REG_VDL_APGA_CTL (0x44) */
123 0x00, /* REG_VIBRA_CTL (0x45) */
124 0x00, /* REG_VIBRA_SET (0x46) */
125 0x00, /* REG_VIBRA_PWM_SET (0x47) */
126 0x00, /* REG_ANAMIC_GAIN (0x48) */
127 0x00, /* REG_MISC_SET_2 (0x49) */
128 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
131 /* codec private data */
132 struct twl4030_priv
{
133 struct snd_soc_codec codec
;
135 unsigned int codec_powered
;
137 /* reference counts of AIF/APLL users */
138 unsigned int apll_enabled
;
140 struct snd_pcm_substream
*master_substream
;
141 struct snd_pcm_substream
*slave_substream
;
143 unsigned int configured
;
145 unsigned int sample_bits
;
146 unsigned int channels
;
150 /* Output (with associated amp) states */
151 u8 hsl_enabled
, hsr_enabled
;
153 u8 predrivel_enabled
, predriver_enabled
;
154 u8 carkitl_enabled
, carkitr_enabled
;
156 /* Delay needed after enabling the digimic interface */
157 unsigned int digimic_delay
;
161 * read twl4030 register cache
163 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec
*codec
,
166 u8
*cache
= codec
->reg_cache
;
168 if (reg
>= TWL4030_CACHEREGNUM
)
175 * write twl4030 register cache
177 static inline void twl4030_write_reg_cache(struct snd_soc_codec
*codec
,
180 u8
*cache
= codec
->reg_cache
;
182 if (reg
>= TWL4030_CACHEREGNUM
)
188 * write to the twl4030 register space
190 static int twl4030_write(struct snd_soc_codec
*codec
,
191 unsigned int reg
, unsigned int value
)
193 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
194 int write_to_reg
= 0;
196 twl4030_write_reg_cache(codec
, reg
, value
);
197 if (likely(reg
< TWL4030_REG_SW_SHADOW
)) {
198 /* Decide if the given register can be written */
200 case TWL4030_REG_EAR_CTL
:
201 if (twl4030
->earpiece_enabled
)
204 case TWL4030_REG_PREDL_CTL
:
205 if (twl4030
->predrivel_enabled
)
208 case TWL4030_REG_PREDR_CTL
:
209 if (twl4030
->predriver_enabled
)
212 case TWL4030_REG_PRECKL_CTL
:
213 if (twl4030
->carkitl_enabled
)
216 case TWL4030_REG_PRECKR_CTL
:
217 if (twl4030
->carkitr_enabled
)
220 case TWL4030_REG_HS_GAIN_SET
:
221 if (twl4030
->hsl_enabled
|| twl4030
->hsr_enabled
)
225 /* All other register can be written */
230 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
236 static void twl4030_codec_enable(struct snd_soc_codec
*codec
, int enable
)
238 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
241 if (enable
== twl4030
->codec_powered
)
245 mode
= twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER
);
247 mode
= twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER
);
250 twl4030_write_reg_cache(codec
, TWL4030_REG_CODEC_MODE
, mode
);
251 twl4030
->codec_powered
= enable
;
254 /* REVISIT: this delay is present in TI sample drivers */
255 /* but there seems to be no TRM requirement for it */
259 static inline void twl4030_check_defaults(struct snd_soc_codec
*codec
)
261 int i
, difference
= 0;
264 dev_dbg(codec
->dev
, "Checking TWL audio default configuration\n");
265 for (i
= 1; i
<= TWL4030_REG_MISC_SET_2
; i
++) {
266 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE
, &val
, i
);
267 if (val
!= twl4030_reg
[i
]) {
270 "Reg 0x%02x: chip: 0x%02x driver: 0x%02x\n",
271 i
, val
, twl4030_reg
[i
]);
274 dev_dbg(codec
->dev
, "Found %d non maching registers. %s\n",
275 difference
, difference
? "Not OK" : "OK");
278 static inline void twl4030_reset_registers(struct snd_soc_codec
*codec
)
282 /* set all audio section registers to reasonable defaults */
283 for (i
= TWL4030_REG_OPTION
; i
<= TWL4030_REG_MISC_SET_2
; i
++)
284 if (i
!= TWL4030_REG_APLL_CTL
)
285 twl4030_write(codec
, i
, twl4030_reg
[i
]);
289 static void twl4030_init_chip(struct snd_soc_codec
*codec
)
291 struct twl4030_codec_audio_data
*pdata
= dev_get_platdata(codec
->dev
);
292 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
296 /* Check defaults, if instructed before anything else */
297 if (pdata
&& pdata
->check_defaults
)
298 twl4030_check_defaults(codec
);
300 /* Reset registers, if no setup data or if instructed to do so */
301 if (!pdata
|| (pdata
&& pdata
->reset_registers
))
302 twl4030_reset_registers(codec
);
304 /* Refresh APLL_CTL register from HW */
305 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE
, &byte
,
306 TWL4030_REG_APLL_CTL
);
307 twl4030_write_reg_cache(codec
, TWL4030_REG_APLL_CTL
, byte
);
309 /* anti-pop when changing analog gain */
310 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_MISC_SET_1
);
311 twl4030_write(codec
, TWL4030_REG_MISC_SET_1
,
312 reg
| TWL4030_SMOOTH_ANAVOL_EN
);
314 twl4030_write(codec
, TWL4030_REG_OPTION
,
315 TWL4030_ATXL1_EN
| TWL4030_ATXR1_EN
|
316 TWL4030_ARXL2_EN
| TWL4030_ARXR2_EN
);
318 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
319 twl4030_write(codec
, TWL4030_REG_ARXR2_APGA_CTL
, 0x32);
321 /* Machine dependent setup */
325 twl4030
->digimic_delay
= pdata
->digimic_delay
;
327 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
);
328 reg
&= ~TWL4030_RAMP_DELAY
;
329 reg
|= (pdata
->ramp_delay_value
<< 2);
330 twl4030_write_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
, reg
);
332 /* initiate offset cancellation */
333 twl4030_codec_enable(codec
, 1);
335 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_ANAMICL
);
336 reg
&= ~TWL4030_OFFSET_CNCL_SEL
;
337 reg
|= pdata
->offset_cncl_path
;
338 twl4030_write(codec
, TWL4030_REG_ANAMICL
,
339 reg
| TWL4030_CNCL_OFFSET_START
);
341 /* wait for offset cancellation to complete */
343 /* this takes a little while, so don't slam i2c */
345 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE
, &byte
,
346 TWL4030_REG_ANAMICL
);
347 } while ((i
++ < 100) &&
348 ((byte
& TWL4030_CNCL_OFFSET_START
) ==
349 TWL4030_CNCL_OFFSET_START
));
351 /* Make sure that the reg_cache has the same value as the HW */
352 twl4030_write_reg_cache(codec
, TWL4030_REG_ANAMICL
, byte
);
354 twl4030_codec_enable(codec
, 0);
357 static void twl4030_apll_enable(struct snd_soc_codec
*codec
, int enable
)
359 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
363 twl4030
->apll_enabled
++;
364 if (twl4030
->apll_enabled
== 1)
365 status
= twl4030_codec_enable_resource(
366 TWL4030_CODEC_RES_APLL
);
368 twl4030
->apll_enabled
--;
369 if (!twl4030
->apll_enabled
)
370 status
= twl4030_codec_disable_resource(
371 TWL4030_CODEC_RES_APLL
);
375 twl4030_write_reg_cache(codec
, TWL4030_REG_APLL_CTL
, status
);
379 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls
[] = {
380 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL
, 0, 1, 0),
381 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL
, 1, 1, 0),
382 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL
, 2, 1, 0),
383 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL
, 3, 1, 0),
387 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls
[] = {
388 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL
, 0, 1, 0),
389 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL
, 1, 1, 0),
390 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL
, 2, 1, 0),
391 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL
, 3, 1, 0),
395 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls
[] = {
396 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL
, 0, 1, 0),
397 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL
, 1, 1, 0),
398 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL
, 2, 1, 0),
399 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL
, 3, 1, 0),
403 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls
[] = {
404 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL
, 0, 1, 0),
405 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL
, 1, 1, 0),
406 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL
, 2, 1, 0),
410 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls
[] = {
411 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL
, 3, 1, 0),
412 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL
, 4, 1, 0),
413 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL
, 5, 1, 0),
417 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls
[] = {
418 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL
, 0, 1, 0),
419 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL
, 1, 1, 0),
420 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL
, 2, 1, 0),
424 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls
[] = {
425 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL
, 0, 1, 0),
426 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL
, 1, 1, 0),
427 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL
, 2, 1, 0),
431 static const char *twl4030_handsfreel_texts
[] =
432 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
434 static const struct soc_enum twl4030_handsfreel_enum
=
435 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL
, 0,
436 ARRAY_SIZE(twl4030_handsfreel_texts
),
437 twl4030_handsfreel_texts
);
439 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control
=
440 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum
);
442 /* Handsfree Left virtual mute */
443 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control
=
444 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW
, 0, 1, 0);
446 /* Handsfree Right */
447 static const char *twl4030_handsfreer_texts
[] =
448 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
450 static const struct soc_enum twl4030_handsfreer_enum
=
451 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL
, 0,
452 ARRAY_SIZE(twl4030_handsfreer_texts
),
453 twl4030_handsfreer_texts
);
455 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control
=
456 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum
);
458 /* Handsfree Right virtual mute */
459 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control
=
460 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW
, 1, 1, 0);
463 /* Vibra audio path selection */
464 static const char *twl4030_vibra_texts
[] =
465 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
467 static const struct soc_enum twl4030_vibra_enum
=
468 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 2,
469 ARRAY_SIZE(twl4030_vibra_texts
),
470 twl4030_vibra_texts
);
472 static const struct snd_kcontrol_new twl4030_dapm_vibra_control
=
473 SOC_DAPM_ENUM("Route", twl4030_vibra_enum
);
475 /* Vibra path selection: local vibrator (PWM) or audio driven */
476 static const char *twl4030_vibrapath_texts
[] =
477 {"Local vibrator", "Audio"};
479 static const struct soc_enum twl4030_vibrapath_enum
=
480 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 4,
481 ARRAY_SIZE(twl4030_vibrapath_texts
),
482 twl4030_vibrapath_texts
);
484 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control
=
485 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum
);
487 /* Left analog microphone selection */
488 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls
[] = {
489 SOC_DAPM_SINGLE("Main Mic Capture Switch",
490 TWL4030_REG_ANAMICL
, 0, 1, 0),
491 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
492 TWL4030_REG_ANAMICL
, 1, 1, 0),
493 SOC_DAPM_SINGLE("AUXL Capture Switch",
494 TWL4030_REG_ANAMICL
, 2, 1, 0),
495 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
496 TWL4030_REG_ANAMICL
, 3, 1, 0),
499 /* Right analog microphone selection */
500 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls
[] = {
501 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR
, 0, 1, 0),
502 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR
, 2, 1, 0),
505 /* TX1 L/R Analog/Digital microphone selection */
506 static const char *twl4030_micpathtx1_texts
[] =
507 {"Analog", "Digimic0"};
509 static const struct soc_enum twl4030_micpathtx1_enum
=
510 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 0,
511 ARRAY_SIZE(twl4030_micpathtx1_texts
),
512 twl4030_micpathtx1_texts
);
514 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control
=
515 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum
);
517 /* TX2 L/R Analog/Digital microphone selection */
518 static const char *twl4030_micpathtx2_texts
[] =
519 {"Analog", "Digimic1"};
521 static const struct soc_enum twl4030_micpathtx2_enum
=
522 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 2,
523 ARRAY_SIZE(twl4030_micpathtx2_texts
),
524 twl4030_micpathtx2_texts
);
526 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control
=
527 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum
);
529 /* Analog bypass for AudioR1 */
530 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control
=
531 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL
, 2, 1, 0);
533 /* Analog bypass for AudioL1 */
534 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control
=
535 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL
, 2, 1, 0);
537 /* Analog bypass for AudioR2 */
538 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control
=
539 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL
, 2, 1, 0);
541 /* Analog bypass for AudioL2 */
542 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control
=
543 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL
, 2, 1, 0);
545 /* Analog bypass for Voice */
546 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control
=
547 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL
, 2, 1, 0);
549 /* Digital bypass gain, mute instead of -30dB */
550 static const unsigned int twl4030_dapm_dbypass_tlv
[] = {
551 TLV_DB_RANGE_HEAD(3),
552 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
553 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
554 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
557 /* Digital bypass left (TX1L -> RX2L) */
558 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control
=
559 SOC_DAPM_SINGLE_TLV("Volume",
560 TWL4030_REG_ATX2ARXPGA
, 3, 7, 0,
561 twl4030_dapm_dbypass_tlv
);
563 /* Digital bypass right (TX1R -> RX2R) */
564 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control
=
565 SOC_DAPM_SINGLE_TLV("Volume",
566 TWL4030_REG_ATX2ARXPGA
, 0, 7, 0,
567 twl4030_dapm_dbypass_tlv
);
570 * Voice Sidetone GAIN volume control:
571 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
573 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv
, -5100, 100, 1);
575 /* Digital bypass voice: sidetone (VUL -> VDL)*/
576 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control
=
577 SOC_DAPM_SINGLE_TLV("Volume",
578 TWL4030_REG_VSTPGA
, 0, 0x29, 0,
579 twl4030_dapm_dbypassv_tlv
);
582 * Output PGA builder:
583 * Handle the muting and unmuting of the given output (turning off the
584 * amplifier associated with the output pin)
585 * On mute bypass the reg_cache and write 0 to the register
586 * On unmute: restore the register content from the reg_cache
587 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
589 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
590 static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
591 struct snd_kcontrol *kcontrol, int event) \
593 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
596 case SND_SOC_DAPM_POST_PMU: \
597 twl4030->pin_name##_enabled = 1; \
598 twl4030_write(w->codec, reg, \
599 twl4030_read_reg_cache(w->codec, reg)); \
601 case SND_SOC_DAPM_POST_PMD: \
602 twl4030->pin_name##_enabled = 0; \
603 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
610 TWL4030_OUTPUT_PGA(earpiece
, TWL4030_REG_EAR_CTL
, TWL4030_EAR_GAIN
);
611 TWL4030_OUTPUT_PGA(predrivel
, TWL4030_REG_PREDL_CTL
, TWL4030_PREDL_GAIN
);
612 TWL4030_OUTPUT_PGA(predriver
, TWL4030_REG_PREDR_CTL
, TWL4030_PREDR_GAIN
);
613 TWL4030_OUTPUT_PGA(carkitl
, TWL4030_REG_PRECKL_CTL
, TWL4030_PRECKL_GAIN
);
614 TWL4030_OUTPUT_PGA(carkitr
, TWL4030_REG_PRECKR_CTL
, TWL4030_PRECKR_GAIN
);
616 static void handsfree_ramp(struct snd_soc_codec
*codec
, int reg
, int ramp
)
618 unsigned char hs_ctl
;
620 hs_ctl
= twl4030_read_reg_cache(codec
, reg
);
624 hs_ctl
|= TWL4030_HF_CTL_REF_EN
;
625 twl4030_write(codec
, reg
, hs_ctl
);
627 hs_ctl
|= TWL4030_HF_CTL_RAMP_EN
;
628 twl4030_write(codec
, reg
, hs_ctl
);
630 hs_ctl
|= TWL4030_HF_CTL_LOOP_EN
;
631 hs_ctl
|= TWL4030_HF_CTL_HB_EN
;
632 twl4030_write(codec
, reg
, hs_ctl
);
635 hs_ctl
&= ~TWL4030_HF_CTL_LOOP_EN
;
636 hs_ctl
&= ~TWL4030_HF_CTL_HB_EN
;
637 twl4030_write(codec
, reg
, hs_ctl
);
638 hs_ctl
&= ~TWL4030_HF_CTL_RAMP_EN
;
639 twl4030_write(codec
, reg
, hs_ctl
);
641 hs_ctl
&= ~TWL4030_HF_CTL_REF_EN
;
642 twl4030_write(codec
, reg
, hs_ctl
);
646 static int handsfreelpga_event(struct snd_soc_dapm_widget
*w
,
647 struct snd_kcontrol
*kcontrol
, int event
)
650 case SND_SOC_DAPM_POST_PMU
:
651 handsfree_ramp(w
->codec
, TWL4030_REG_HFL_CTL
, 1);
653 case SND_SOC_DAPM_POST_PMD
:
654 handsfree_ramp(w
->codec
, TWL4030_REG_HFL_CTL
, 0);
660 static int handsfreerpga_event(struct snd_soc_dapm_widget
*w
,
661 struct snd_kcontrol
*kcontrol
, int event
)
664 case SND_SOC_DAPM_POST_PMU
:
665 handsfree_ramp(w
->codec
, TWL4030_REG_HFR_CTL
, 1);
667 case SND_SOC_DAPM_POST_PMD
:
668 handsfree_ramp(w
->codec
, TWL4030_REG_HFR_CTL
, 0);
674 static int vibramux_event(struct snd_soc_dapm_widget
*w
,
675 struct snd_kcontrol
*kcontrol
, int event
)
677 twl4030_write(w
->codec
, TWL4030_REG_VIBRA_SET
, 0xff);
681 static int apll_event(struct snd_soc_dapm_widget
*w
,
682 struct snd_kcontrol
*kcontrol
, int event
)
685 case SND_SOC_DAPM_PRE_PMU
:
686 twl4030_apll_enable(w
->codec
, 1);
688 case SND_SOC_DAPM_POST_PMD
:
689 twl4030_apll_enable(w
->codec
, 0);
695 static int aif_event(struct snd_soc_dapm_widget
*w
,
696 struct snd_kcontrol
*kcontrol
, int event
)
700 audio_if
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_AUDIO_IF
);
702 case SND_SOC_DAPM_PRE_PMU
:
704 /* enable the PLL before we use it to clock the DAI */
705 twl4030_apll_enable(w
->codec
, 1);
707 twl4030_write(w
->codec
, TWL4030_REG_AUDIO_IF
,
708 audio_if
| TWL4030_AIF_EN
);
710 case SND_SOC_DAPM_POST_PMD
:
711 /* disable the DAI before we stop it's source PLL */
712 twl4030_write(w
->codec
, TWL4030_REG_AUDIO_IF
,
713 audio_if
& ~TWL4030_AIF_EN
);
714 twl4030_apll_enable(w
->codec
, 0);
720 static void headset_ramp(struct snd_soc_codec
*codec
, int ramp
)
722 struct twl4030_codec_audio_data
*pdata
= codec
->dev
->platform_data
;
723 unsigned char hs_gain
, hs_pop
;
724 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
725 /* Base values for ramp delay calculation: 2^19 - 2^26 */
726 unsigned int ramp_base
[] = {524288, 1048576, 2097152, 4194304,
727 8388608, 16777216, 33554432, 67108864};
729 hs_gain
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_GAIN_SET
);
730 hs_pop
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
);
732 /* Enable external mute control, this dramatically reduces
734 if (pdata
&& pdata
->hs_extmute
) {
735 if (pdata
->set_hs_extmute
) {
736 pdata
->set_hs_extmute(1);
738 hs_pop
|= TWL4030_EXTMUTE
;
739 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
744 /* Headset ramp-up according to the TRM */
745 hs_pop
|= TWL4030_VMID_EN
;
746 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
747 /* Actually write to the register */
748 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
750 TWL4030_REG_HS_GAIN_SET
);
751 hs_pop
|= TWL4030_RAMP_EN
;
752 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
753 /* Wait ramp delay time + 1, so the VMID can settle */
754 mdelay((ramp_base
[(hs_pop
& TWL4030_RAMP_DELAY
) >> 2] /
755 twl4030
->sysclk
) + 1);
757 /* Headset ramp-down _not_ according to
758 * the TRM, but in a way that it is working */
759 hs_pop
&= ~TWL4030_RAMP_EN
;
760 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
761 /* Wait ramp delay time + 1, so the VMID can settle */
762 mdelay((ramp_base
[(hs_pop
& TWL4030_RAMP_DELAY
) >> 2] /
763 twl4030
->sysclk
) + 1);
764 /* Bypass the reg_cache to mute the headset */
765 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
767 TWL4030_REG_HS_GAIN_SET
);
769 hs_pop
&= ~TWL4030_VMID_EN
;
770 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
773 /* Disable external mute */
774 if (pdata
&& pdata
->hs_extmute
) {
775 if (pdata
->set_hs_extmute
) {
776 pdata
->set_hs_extmute(0);
778 hs_pop
&= ~TWL4030_EXTMUTE
;
779 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
784 static int headsetlpga_event(struct snd_soc_dapm_widget
*w
,
785 struct snd_kcontrol
*kcontrol
, int event
)
787 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(w
->codec
);
790 case SND_SOC_DAPM_POST_PMU
:
791 /* Do the ramp-up only once */
792 if (!twl4030
->hsr_enabled
)
793 headset_ramp(w
->codec
, 1);
795 twl4030
->hsl_enabled
= 1;
797 case SND_SOC_DAPM_POST_PMD
:
798 /* Do the ramp-down only if both headsetL/R is disabled */
799 if (!twl4030
->hsr_enabled
)
800 headset_ramp(w
->codec
, 0);
802 twl4030
->hsl_enabled
= 0;
808 static int headsetrpga_event(struct snd_soc_dapm_widget
*w
,
809 struct snd_kcontrol
*kcontrol
, int event
)
811 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(w
->codec
);
814 case SND_SOC_DAPM_POST_PMU
:
815 /* Do the ramp-up only once */
816 if (!twl4030
->hsl_enabled
)
817 headset_ramp(w
->codec
, 1);
819 twl4030
->hsr_enabled
= 1;
821 case SND_SOC_DAPM_POST_PMD
:
822 /* Do the ramp-down only if both headsetL/R is disabled */
823 if (!twl4030
->hsl_enabled
)
824 headset_ramp(w
->codec
, 0);
826 twl4030
->hsr_enabled
= 0;
832 static int digimic_event(struct snd_soc_dapm_widget
*w
,
833 struct snd_kcontrol
*kcontrol
, int event
)
835 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(w
->codec
);
837 if (twl4030
->digimic_delay
)
838 mdelay(twl4030
->digimic_delay
);
843 * Some of the gain controls in TWL (mostly those which are associated with
844 * the outputs) are implemented in an interesting way:
845 * 0x0 : Power down (mute)
849 * Inverting not going to help with these.
850 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
852 #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
853 xinvert, tlv_array) \
854 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
855 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
856 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
857 .tlv.p = (tlv_array), \
858 .info = snd_soc_info_volsw, \
859 .get = snd_soc_get_volsw_twl4030, \
860 .put = snd_soc_put_volsw_twl4030, \
861 .private_value = (unsigned long)&(struct soc_mixer_control) \
862 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
863 .max = xmax, .invert = xinvert} }
864 #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
865 xinvert, tlv_array) \
866 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
867 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
868 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
869 .tlv.p = (tlv_array), \
870 .info = snd_soc_info_volsw_2r, \
871 .get = snd_soc_get_volsw_r2_twl4030,\
872 .put = snd_soc_put_volsw_r2_twl4030, \
873 .private_value = (unsigned long)&(struct soc_mixer_control) \
874 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
875 .rshift = xshift, .max = xmax, .invert = xinvert} }
876 #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
877 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
880 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
881 struct snd_ctl_elem_value
*ucontrol
)
883 struct soc_mixer_control
*mc
=
884 (struct soc_mixer_control
*)kcontrol
->private_value
;
885 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
886 unsigned int reg
= mc
->reg
;
887 unsigned int shift
= mc
->shift
;
888 unsigned int rshift
= mc
->rshift
;
890 int mask
= (1 << fls(max
)) - 1;
892 ucontrol
->value
.integer
.value
[0] =
893 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
894 if (ucontrol
->value
.integer
.value
[0])
895 ucontrol
->value
.integer
.value
[0] =
896 max
+ 1 - ucontrol
->value
.integer
.value
[0];
898 if (shift
!= rshift
) {
899 ucontrol
->value
.integer
.value
[1] =
900 (snd_soc_read(codec
, reg
) >> rshift
) & mask
;
901 if (ucontrol
->value
.integer
.value
[1])
902 ucontrol
->value
.integer
.value
[1] =
903 max
+ 1 - ucontrol
->value
.integer
.value
[1];
909 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
910 struct snd_ctl_elem_value
*ucontrol
)
912 struct soc_mixer_control
*mc
=
913 (struct soc_mixer_control
*)kcontrol
->private_value
;
914 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
915 unsigned int reg
= mc
->reg
;
916 unsigned int shift
= mc
->shift
;
917 unsigned int rshift
= mc
->rshift
;
919 int mask
= (1 << fls(max
)) - 1;
920 unsigned short val
, val2
, val_mask
;
922 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
924 val_mask
= mask
<< shift
;
928 if (shift
!= rshift
) {
929 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
930 val_mask
|= mask
<< rshift
;
932 val2
= max
+ 1 - val2
;
933 val
|= val2
<< rshift
;
935 return snd_soc_update_bits(codec
, reg
, val_mask
, val
);
938 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
939 struct snd_ctl_elem_value
*ucontrol
)
941 struct soc_mixer_control
*mc
=
942 (struct soc_mixer_control
*)kcontrol
->private_value
;
943 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
944 unsigned int reg
= mc
->reg
;
945 unsigned int reg2
= mc
->rreg
;
946 unsigned int shift
= mc
->shift
;
948 int mask
= (1<<fls(max
))-1;
950 ucontrol
->value
.integer
.value
[0] =
951 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
952 ucontrol
->value
.integer
.value
[1] =
953 (snd_soc_read(codec
, reg2
) >> shift
) & mask
;
955 if (ucontrol
->value
.integer
.value
[0])
956 ucontrol
->value
.integer
.value
[0] =
957 max
+ 1 - ucontrol
->value
.integer
.value
[0];
958 if (ucontrol
->value
.integer
.value
[1])
959 ucontrol
->value
.integer
.value
[1] =
960 max
+ 1 - ucontrol
->value
.integer
.value
[1];
965 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
966 struct snd_ctl_elem_value
*ucontrol
)
968 struct soc_mixer_control
*mc
=
969 (struct soc_mixer_control
*)kcontrol
->private_value
;
970 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
971 unsigned int reg
= mc
->reg
;
972 unsigned int reg2
= mc
->rreg
;
973 unsigned int shift
= mc
->shift
;
975 int mask
= (1 << fls(max
)) - 1;
977 unsigned short val
, val2
, val_mask
;
979 val_mask
= mask
<< shift
;
980 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
981 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
986 val2
= max
+ 1 - val2
;
989 val2
= val2
<< shift
;
991 err
= snd_soc_update_bits(codec
, reg
, val_mask
, val
);
995 err
= snd_soc_update_bits(codec
, reg2
, val_mask
, val2
);
999 /* Codec operation modes */
1000 static const char *twl4030_op_modes_texts
[] = {
1001 "Option 2 (voice/audio)", "Option 1 (audio)"
1004 static const struct soc_enum twl4030_op_modes_enum
=
1005 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE
, 0,
1006 ARRAY_SIZE(twl4030_op_modes_texts
),
1007 twl4030_op_modes_texts
);
1009 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol
*kcontrol
,
1010 struct snd_ctl_elem_value
*ucontrol
)
1012 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
1013 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
1014 struct soc_enum
*e
= (struct soc_enum
*)kcontrol
->private_value
;
1016 unsigned short mask
, bitmask
;
1018 if (twl4030
->configured
) {
1019 printk(KERN_ERR
"twl4030 operation mode cannot be "
1020 "changed on-the-fly\n");
1024 for (bitmask
= 1; bitmask
< e
->max
; bitmask
<<= 1)
1026 if (ucontrol
->value
.enumerated
.item
[0] > e
->max
- 1)
1029 val
= ucontrol
->value
.enumerated
.item
[0] << e
->shift_l
;
1030 mask
= (bitmask
- 1) << e
->shift_l
;
1031 if (e
->shift_l
!= e
->shift_r
) {
1032 if (ucontrol
->value
.enumerated
.item
[1] > e
->max
- 1)
1034 val
|= ucontrol
->value
.enumerated
.item
[1] << e
->shift_r
;
1035 mask
|= (bitmask
- 1) << e
->shift_r
;
1038 return snd_soc_update_bits(codec
, e
->reg
, mask
, val
);
1042 * FGAIN volume control:
1043 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
1045 static DECLARE_TLV_DB_SCALE(digital_fine_tlv
, -6300, 100, 1);
1048 * CGAIN volume control:
1049 * 0 dB to 12 dB in 6 dB steps
1050 * value 2 and 3 means 12 dB
1052 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv
, 0, 600, 0);
1055 * Voice Downlink GAIN volume control:
1056 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
1058 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv
, -3700, 100, 1);
1061 * Analog playback gain
1062 * -24 dB to 12 dB in 2 dB steps
1064 static DECLARE_TLV_DB_SCALE(analog_tlv
, -2400, 200, 0);
1067 * Gain controls tied to outputs
1068 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1070 static DECLARE_TLV_DB_SCALE(output_tvl
, -1200, 600, 1);
1073 * Gain control for earpiece amplifier
1074 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1076 static DECLARE_TLV_DB_SCALE(output_ear_tvl
, -600, 600, 1);
1079 * Capture gain after the ADCs
1080 * from 0 dB to 31 dB in 1 dB steps
1082 static DECLARE_TLV_DB_SCALE(digital_capture_tlv
, 0, 100, 0);
1085 * Gain control for input amplifiers
1086 * 0 dB to 30 dB in 6 dB steps
1088 static DECLARE_TLV_DB_SCALE(input_gain_tlv
, 0, 600, 0);
1090 /* AVADC clock priority */
1091 static const char *twl4030_avadc_clk_priority_texts
[] = {
1092 "Voice high priority", "HiFi high priority"
1095 static const struct soc_enum twl4030_avadc_clk_priority_enum
=
1096 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL
, 2,
1097 ARRAY_SIZE(twl4030_avadc_clk_priority_texts
),
1098 twl4030_avadc_clk_priority_texts
);
1100 static const char *twl4030_rampdelay_texts
[] = {
1101 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1102 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1106 static const struct soc_enum twl4030_rampdelay_enum
=
1107 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET
, 2,
1108 ARRAY_SIZE(twl4030_rampdelay_texts
),
1109 twl4030_rampdelay_texts
);
1111 /* Vibra H-bridge direction mode */
1112 static const char *twl4030_vibradirmode_texts
[] = {
1113 "Vibra H-bridge direction", "Audio data MSB",
1116 static const struct soc_enum twl4030_vibradirmode_enum
=
1117 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 5,
1118 ARRAY_SIZE(twl4030_vibradirmode_texts
),
1119 twl4030_vibradirmode_texts
);
1121 /* Vibra H-bridge direction */
1122 static const char *twl4030_vibradir_texts
[] = {
1123 "Positive polarity", "Negative polarity",
1126 static const struct soc_enum twl4030_vibradir_enum
=
1127 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 1,
1128 ARRAY_SIZE(twl4030_vibradir_texts
),
1129 twl4030_vibradir_texts
);
1131 /* Digimic Left and right swapping */
1132 static const char *twl4030_digimicswap_texts
[] = {
1133 "Not swapped", "Swapped",
1136 static const struct soc_enum twl4030_digimicswap_enum
=
1137 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1
, 0,
1138 ARRAY_SIZE(twl4030_digimicswap_texts
),
1139 twl4030_digimicswap_texts
);
1141 static const struct snd_kcontrol_new twl4030_snd_controls
[] = {
1142 /* Codec operation mode control */
1143 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum
,
1144 snd_soc_get_enum_double
,
1145 snd_soc_put_twl4030_opmode_enum_double
),
1147 /* Common playback gain controls */
1148 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1149 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
1150 0, 0x3f, 0, digital_fine_tlv
),
1151 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1152 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
1153 0, 0x3f, 0, digital_fine_tlv
),
1155 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1156 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
1157 6, 0x2, 0, digital_coarse_tlv
),
1158 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1159 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
1160 6, 0x2, 0, digital_coarse_tlv
),
1162 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1163 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
1164 3, 0x12, 1, analog_tlv
),
1165 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1166 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
1167 3, 0x12, 1, analog_tlv
),
1168 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1169 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
1171 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1172 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
1175 /* Common voice downlink gain controls */
1176 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1177 TWL4030_REG_VRXPGA
, 0, 0x31, 0, digital_voice_downlink_tlv
),
1179 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1180 TWL4030_REG_VDL_APGA_CTL
, 3, 0x12, 1, analog_tlv
),
1182 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1183 TWL4030_REG_VDL_APGA_CTL
, 1, 1, 0),
1185 /* Separate output gain controls */
1186 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
1187 TWL4030_REG_PREDL_CTL
, TWL4030_REG_PREDR_CTL
,
1188 4, 3, 0, output_tvl
),
1190 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
1191 TWL4030_REG_HS_GAIN_SET
, 0, 2, 3, 0, output_tvl
),
1193 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
1194 TWL4030_REG_PRECKL_CTL
, TWL4030_REG_PRECKR_CTL
,
1195 4, 3, 0, output_tvl
),
1197 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
1198 TWL4030_REG_EAR_CTL
, 4, 3, 0, output_ear_tvl
),
1200 /* Common capture gain controls */
1201 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
1202 TWL4030_REG_ATXL1PGA
, TWL4030_REG_ATXR1PGA
,
1203 0, 0x1f, 0, digital_capture_tlv
),
1204 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1205 TWL4030_REG_AVTXL2PGA
, TWL4030_REG_AVTXR2PGA
,
1206 0, 0x1f, 0, digital_capture_tlv
),
1208 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN
,
1209 0, 3, 5, 0, input_gain_tlv
),
1211 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum
),
1213 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum
),
1215 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum
),
1216 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum
),
1218 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum
),
1221 static const struct snd_soc_dapm_widget twl4030_dapm_widgets
[] = {
1222 /* Left channel inputs */
1223 SND_SOC_DAPM_INPUT("MAINMIC"),
1224 SND_SOC_DAPM_INPUT("HSMIC"),
1225 SND_SOC_DAPM_INPUT("AUXL"),
1226 SND_SOC_DAPM_INPUT("CARKITMIC"),
1227 /* Right channel inputs */
1228 SND_SOC_DAPM_INPUT("SUBMIC"),
1229 SND_SOC_DAPM_INPUT("AUXR"),
1230 /* Digital microphones (Stereo) */
1231 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1232 SND_SOC_DAPM_INPUT("DIGIMIC1"),
1235 SND_SOC_DAPM_OUTPUT("EARPIECE"),
1236 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1237 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
1238 SND_SOC_DAPM_OUTPUT("HSOL"),
1239 SND_SOC_DAPM_OUTPUT("HSOR"),
1240 SND_SOC_DAPM_OUTPUT("CARKITL"),
1241 SND_SOC_DAPM_OUTPUT("CARKITR"),
1242 SND_SOC_DAPM_OUTPUT("HFL"),
1243 SND_SOC_DAPM_OUTPUT("HFR"),
1244 SND_SOC_DAPM_OUTPUT("VIBRA"),
1246 /* AIF and APLL clocks for running DAIs (including loopback) */
1247 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1248 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1249 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1252 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
1253 SND_SOC_NOPM
, 0, 0),
1254 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
1255 SND_SOC_NOPM
, 0, 0),
1256 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
1257 SND_SOC_NOPM
, 0, 0),
1258 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
1259 SND_SOC_NOPM
, 0, 0),
1260 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
1261 SND_SOC_NOPM
, 0, 0),
1263 /* Analog bypasses */
1264 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1265 &twl4030_dapm_abypassr1_control
),
1266 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1267 &twl4030_dapm_abypassl1_control
),
1268 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1269 &twl4030_dapm_abypassr2_control
),
1270 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1271 &twl4030_dapm_abypassl2_control
),
1272 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM
, 0, 0,
1273 &twl4030_dapm_abypassv_control
),
1275 /* Master analog loopback switch */
1276 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1
, 5, 0,
1279 /* Digital bypasses */
1280 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM
, 0, 0,
1281 &twl4030_dapm_dbypassl_control
),
1282 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM
, 0, 0,
1283 &twl4030_dapm_dbypassr_control
),
1284 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM
, 0, 0,
1285 &twl4030_dapm_dbypassv_control
),
1287 /* Digital mixers, power control for the physical DACs */
1288 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1289 TWL4030_REG_AVDAC_CTL
, 0, 0, NULL
, 0),
1290 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1291 TWL4030_REG_AVDAC_CTL
, 1, 0, NULL
, 0),
1292 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1293 TWL4030_REG_AVDAC_CTL
, 2, 0, NULL
, 0),
1294 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1295 TWL4030_REG_AVDAC_CTL
, 3, 0, NULL
, 0),
1296 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1297 TWL4030_REG_AVDAC_CTL
, 4, 0, NULL
, 0),
1299 /* Analog mixers, power control for the physical PGAs */
1300 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1301 TWL4030_REG_ARXR1_APGA_CTL
, 0, 0, NULL
, 0),
1302 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1303 TWL4030_REG_ARXL1_APGA_CTL
, 0, 0, NULL
, 0),
1304 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1305 TWL4030_REG_ARXR2_APGA_CTL
, 0, 0, NULL
, 0),
1306 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1307 TWL4030_REG_ARXL2_APGA_CTL
, 0, 0, NULL
, 0),
1308 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1309 TWL4030_REG_VDL_APGA_CTL
, 0, 0, NULL
, 0),
1311 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM
, 0, 0, apll_event
,
1312 SND_SOC_DAPM_PRE_PMU
|SND_SOC_DAPM_POST_PMD
),
1314 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM
, 0, 0, aif_event
,
1315 SND_SOC_DAPM_PRE_PMU
|SND_SOC_DAPM_POST_PMD
),
1317 /* Output MIXER controls */
1319 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM
, 0, 0,
1320 &twl4030_dapm_earpiece_controls
[0],
1321 ARRAY_SIZE(twl4030_dapm_earpiece_controls
)),
1322 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM
,
1323 0, 0, NULL
, 0, earpiecepga_event
,
1324 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1326 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM
, 0, 0,
1327 &twl4030_dapm_predrivel_controls
[0],
1328 ARRAY_SIZE(twl4030_dapm_predrivel_controls
)),
1329 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM
,
1330 0, 0, NULL
, 0, predrivelpga_event
,
1331 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1332 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM
, 0, 0,
1333 &twl4030_dapm_predriver_controls
[0],
1334 ARRAY_SIZE(twl4030_dapm_predriver_controls
)),
1335 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM
,
1336 0, 0, NULL
, 0, predriverpga_event
,
1337 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1339 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM
, 0, 0,
1340 &twl4030_dapm_hsol_controls
[0],
1341 ARRAY_SIZE(twl4030_dapm_hsol_controls
)),
1342 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM
,
1343 0, 0, NULL
, 0, headsetlpga_event
,
1344 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1345 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM
, 0, 0,
1346 &twl4030_dapm_hsor_controls
[0],
1347 ARRAY_SIZE(twl4030_dapm_hsor_controls
)),
1348 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM
,
1349 0, 0, NULL
, 0, headsetrpga_event
,
1350 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1352 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM
, 0, 0,
1353 &twl4030_dapm_carkitl_controls
[0],
1354 ARRAY_SIZE(twl4030_dapm_carkitl_controls
)),
1355 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM
,
1356 0, 0, NULL
, 0, carkitlpga_event
,
1357 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1358 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM
, 0, 0,
1359 &twl4030_dapm_carkitr_controls
[0],
1360 ARRAY_SIZE(twl4030_dapm_carkitr_controls
)),
1361 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM
,
1362 0, 0, NULL
, 0, carkitrpga_event
,
1363 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1365 /* Output MUX controls */
1367 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM
, 0, 0,
1368 &twl4030_dapm_handsfreel_control
),
1369 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM
, 0, 0,
1370 &twl4030_dapm_handsfreelmute_control
),
1371 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM
,
1372 0, 0, NULL
, 0, handsfreelpga_event
,
1373 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1374 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM
, 5, 0,
1375 &twl4030_dapm_handsfreer_control
),
1376 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM
, 0, 0,
1377 &twl4030_dapm_handsfreermute_control
),
1378 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM
,
1379 0, 0, NULL
, 0, handsfreerpga_event
,
1380 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1382 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL
, 0, 0,
1383 &twl4030_dapm_vibra_control
, vibramux_event
,
1384 SND_SOC_DAPM_PRE_PMU
),
1385 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM
, 0, 0,
1386 &twl4030_dapm_vibrapath_control
),
1388 /* Introducing four virtual ADC, since TWL4030 have four channel for
1390 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1391 SND_SOC_NOPM
, 0, 0),
1392 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1393 SND_SOC_NOPM
, 0, 0),
1394 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1395 SND_SOC_NOPM
, 0, 0),
1396 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1397 SND_SOC_NOPM
, 0, 0),
1399 /* Analog/Digital mic path selection.
1400 TX1 Left/Right: either analog Left/Right or Digimic0
1401 TX2 Left/Right: either analog Left/Right or Digimic1 */
1402 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM
, 0, 0,
1403 &twl4030_dapm_micpathtx1_control
),
1404 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM
, 0, 0,
1405 &twl4030_dapm_micpathtx2_control
),
1407 /* Analog input mixers for the capture amplifiers */
1408 SND_SOC_DAPM_MIXER("Analog Left",
1409 TWL4030_REG_ANAMICL
, 4, 0,
1410 &twl4030_dapm_analoglmic_controls
[0],
1411 ARRAY_SIZE(twl4030_dapm_analoglmic_controls
)),
1412 SND_SOC_DAPM_MIXER("Analog Right",
1413 TWL4030_REG_ANAMICR
, 4, 0,
1414 &twl4030_dapm_analogrmic_controls
[0],
1415 ARRAY_SIZE(twl4030_dapm_analogrmic_controls
)),
1417 SND_SOC_DAPM_PGA("ADC Physical Left",
1418 TWL4030_REG_AVADC_CTL
, 3, 0, NULL
, 0),
1419 SND_SOC_DAPM_PGA("ADC Physical Right",
1420 TWL4030_REG_AVADC_CTL
, 1, 0, NULL
, 0),
1422 SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1423 TWL4030_REG_ADCMICSEL
, 1, 0, NULL
, 0,
1424 digimic_event
, SND_SOC_DAPM_POST_PMU
),
1425 SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1426 TWL4030_REG_ADCMICSEL
, 3, 0, NULL
, 0,
1427 digimic_event
, SND_SOC_DAPM_POST_PMU
),
1429 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL
, 5, 0,
1431 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL
, 6, 0,
1434 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL
, 0, 0),
1435 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL
, 1, 0),
1436 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL
, 2, 0),
1440 static const struct snd_soc_dapm_route intercon
[] = {
1441 {"Digital L1 Playback Mixer", NULL
, "DAC Left1"},
1442 {"Digital R1 Playback Mixer", NULL
, "DAC Right1"},
1443 {"Digital L2 Playback Mixer", NULL
, "DAC Left2"},
1444 {"Digital R2 Playback Mixer", NULL
, "DAC Right2"},
1445 {"Digital Voice Playback Mixer", NULL
, "DAC Voice"},
1447 /* Supply for the digital part (APLL) */
1448 {"Digital Voice Playback Mixer", NULL
, "APLL Enable"},
1450 {"DAC Left1", NULL
, "AIF Enable"},
1451 {"DAC Right1", NULL
, "AIF Enable"},
1452 {"DAC Left2", NULL
, "AIF Enable"},
1453 {"DAC Right1", NULL
, "AIF Enable"},
1455 {"Digital R2 Playback Mixer", NULL
, "AIF Enable"},
1456 {"Digital L2 Playback Mixer", NULL
, "AIF Enable"},
1458 {"Analog L1 Playback Mixer", NULL
, "Digital L1 Playback Mixer"},
1459 {"Analog R1 Playback Mixer", NULL
, "Digital R1 Playback Mixer"},
1460 {"Analog L2 Playback Mixer", NULL
, "Digital L2 Playback Mixer"},
1461 {"Analog R2 Playback Mixer", NULL
, "Digital R2 Playback Mixer"},
1462 {"Analog Voice Playback Mixer", NULL
, "Digital Voice Playback Mixer"},
1464 /* Internal playback routings */
1466 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1467 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1468 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1469 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1470 {"Earpiece PGA", NULL
, "Earpiece Mixer"},
1472 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1473 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1474 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1475 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1476 {"PredriveL PGA", NULL
, "PredriveL Mixer"},
1478 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1479 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1480 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1481 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1482 {"PredriveR PGA", NULL
, "PredriveR Mixer"},
1484 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1485 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1486 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1487 {"HeadsetL PGA", NULL
, "HeadsetL Mixer"},
1489 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1490 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1491 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1492 {"HeadsetR PGA", NULL
, "HeadsetR Mixer"},
1494 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1495 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1496 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1497 {"CarkitL PGA", NULL
, "CarkitL Mixer"},
1499 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1500 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1501 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1502 {"CarkitR PGA", NULL
, "CarkitR Mixer"},
1504 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1505 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1506 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1507 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
1508 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1509 {"HandsfreeL PGA", NULL
, "HandsfreeL"},
1511 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1512 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1513 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1514 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
1515 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1516 {"HandsfreeR PGA", NULL
, "HandsfreeR"},
1518 {"Vibra Mux", "AudioL1", "DAC Left1"},
1519 {"Vibra Mux", "AudioR1", "DAC Right1"},
1520 {"Vibra Mux", "AudioL2", "DAC Left2"},
1521 {"Vibra Mux", "AudioR2", "DAC Right2"},
1524 /* Must be always connected (for AIF and APLL) */
1525 {"Virtual HiFi OUT", NULL
, "DAC Left1"},
1526 {"Virtual HiFi OUT", NULL
, "DAC Right1"},
1527 {"Virtual HiFi OUT", NULL
, "DAC Left2"},
1528 {"Virtual HiFi OUT", NULL
, "DAC Right2"},
1529 /* Must be always connected (for APLL) */
1530 {"Virtual Voice OUT", NULL
, "Digital Voice Playback Mixer"},
1531 /* Physical outputs */
1532 {"EARPIECE", NULL
, "Earpiece PGA"},
1533 {"PREDRIVEL", NULL
, "PredriveL PGA"},
1534 {"PREDRIVER", NULL
, "PredriveR PGA"},
1535 {"HSOL", NULL
, "HeadsetL PGA"},
1536 {"HSOR", NULL
, "HeadsetR PGA"},
1537 {"CARKITL", NULL
, "CarkitL PGA"},
1538 {"CARKITR", NULL
, "CarkitR PGA"},
1539 {"HFL", NULL
, "HandsfreeL PGA"},
1540 {"HFR", NULL
, "HandsfreeR PGA"},
1541 {"Vibra Route", "Audio", "Vibra Mux"},
1542 {"VIBRA", NULL
, "Vibra Route"},
1545 /* Must be always connected (for AIF and APLL) */
1546 {"ADC Virtual Left1", NULL
, "Virtual HiFi IN"},
1547 {"ADC Virtual Right1", NULL
, "Virtual HiFi IN"},
1548 {"ADC Virtual Left2", NULL
, "Virtual HiFi IN"},
1549 {"ADC Virtual Right2", NULL
, "Virtual HiFi IN"},
1550 /* Physical inputs */
1551 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1552 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1553 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1554 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
1556 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1557 {"Analog Right", "AUXR Capture Switch", "AUXR"},
1559 {"ADC Physical Left", NULL
, "Analog Left"},
1560 {"ADC Physical Right", NULL
, "Analog Right"},
1562 {"Digimic0 Enable", NULL
, "DIGIMIC0"},
1563 {"Digimic1 Enable", NULL
, "DIGIMIC1"},
1565 {"DIGIMIC0", NULL
, "micbias1 select"},
1566 {"DIGIMIC1", NULL
, "micbias2 select"},
1568 /* TX1 Left capture path */
1569 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
1570 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1571 /* TX1 Right capture path */
1572 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
1573 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1574 /* TX2 Left capture path */
1575 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
1576 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1577 /* TX2 Right capture path */
1578 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
1579 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1581 {"ADC Virtual Left1", NULL
, "TX1 Capture Route"},
1582 {"ADC Virtual Right1", NULL
, "TX1 Capture Route"},
1583 {"ADC Virtual Left2", NULL
, "TX2 Capture Route"},
1584 {"ADC Virtual Right2", NULL
, "TX2 Capture Route"},
1586 {"ADC Virtual Left1", NULL
, "AIF Enable"},
1587 {"ADC Virtual Right1", NULL
, "AIF Enable"},
1588 {"ADC Virtual Left2", NULL
, "AIF Enable"},
1589 {"ADC Virtual Right2", NULL
, "AIF Enable"},
1591 /* Analog bypass routes */
1592 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1593 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1594 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1595 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1596 {"Voice Analog Loopback", "Switch", "Analog Left"},
1598 /* Supply for the Analog loopbacks */
1599 {"Right1 Analog Loopback", NULL
, "FM Loop Enable"},
1600 {"Left1 Analog Loopback", NULL
, "FM Loop Enable"},
1601 {"Right2 Analog Loopback", NULL
, "FM Loop Enable"},
1602 {"Left2 Analog Loopback", NULL
, "FM Loop Enable"},
1603 {"Voice Analog Loopback", NULL
, "FM Loop Enable"},
1605 {"Analog R1 Playback Mixer", NULL
, "Right1 Analog Loopback"},
1606 {"Analog L1 Playback Mixer", NULL
, "Left1 Analog Loopback"},
1607 {"Analog R2 Playback Mixer", NULL
, "Right2 Analog Loopback"},
1608 {"Analog L2 Playback Mixer", NULL
, "Left2 Analog Loopback"},
1609 {"Analog Voice Playback Mixer", NULL
, "Voice Analog Loopback"},
1611 /* Digital bypass routes */
1612 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1613 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1614 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
1616 {"Digital R2 Playback Mixer", NULL
, "Right Digital Loopback"},
1617 {"Digital L2 Playback Mixer", NULL
, "Left Digital Loopback"},
1618 {"Digital Voice Playback Mixer", NULL
, "Voice Digital Loopback"},
1622 static int twl4030_add_widgets(struct snd_soc_codec
*codec
)
1624 snd_soc_dapm_new_controls(codec
, twl4030_dapm_widgets
,
1625 ARRAY_SIZE(twl4030_dapm_widgets
));
1627 snd_soc_dapm_add_routes(codec
, intercon
, ARRAY_SIZE(intercon
));
1632 static int twl4030_set_bias_level(struct snd_soc_codec
*codec
,
1633 enum snd_soc_bias_level level
)
1636 case SND_SOC_BIAS_ON
:
1638 case SND_SOC_BIAS_PREPARE
:
1640 case SND_SOC_BIAS_STANDBY
:
1641 if (codec
->bias_level
== SND_SOC_BIAS_OFF
)
1642 twl4030_codec_enable(codec
, 1);
1644 case SND_SOC_BIAS_OFF
:
1645 twl4030_codec_enable(codec
, 0);
1648 codec
->bias_level
= level
;
1653 static void twl4030_constraints(struct twl4030_priv
*twl4030
,
1654 struct snd_pcm_substream
*mst_substream
)
1656 struct snd_pcm_substream
*slv_substream
;
1658 /* Pick the stream, which need to be constrained */
1659 if (mst_substream
== twl4030
->master_substream
)
1660 slv_substream
= twl4030
->slave_substream
;
1661 else if (mst_substream
== twl4030
->slave_substream
)
1662 slv_substream
= twl4030
->master_substream
;
1663 else /* This should not happen.. */
1666 /* Set the constraints according to the already configured stream */
1667 snd_pcm_hw_constraint_minmax(slv_substream
->runtime
,
1668 SNDRV_PCM_HW_PARAM_RATE
,
1672 snd_pcm_hw_constraint_minmax(slv_substream
->runtime
,
1673 SNDRV_PCM_HW_PARAM_SAMPLE_BITS
,
1674 twl4030
->sample_bits
,
1675 twl4030
->sample_bits
);
1677 snd_pcm_hw_constraint_minmax(slv_substream
->runtime
,
1678 SNDRV_PCM_HW_PARAM_CHANNELS
,
1683 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1684 * capture has to be enabled/disabled. */
1685 static void twl4030_tdm_enable(struct snd_soc_codec
*codec
, int direction
,
1690 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_OPTION
);
1692 if (direction
== SNDRV_PCM_STREAM_PLAYBACK
)
1693 mask
= TWL4030_ARXL1_VRX_EN
| TWL4030_ARXR1_EN
;
1695 mask
= TWL4030_ATXL2_VTXL_EN
| TWL4030_ATXR2_VTXR_EN
;
1702 twl4030_write(codec
, TWL4030_REG_OPTION
, reg
);
1705 static int twl4030_startup(struct snd_pcm_substream
*substream
,
1706 struct snd_soc_dai
*dai
)
1708 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1709 struct snd_soc_codec
*codec
= rtd
->codec
;
1710 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
1712 if (twl4030
->master_substream
) {
1713 twl4030
->slave_substream
= substream
;
1714 /* The DAI has one configuration for playback and capture, so
1715 * if the DAI has been already configured then constrain this
1716 * substream to match it. */
1717 if (twl4030
->configured
)
1718 twl4030_constraints(twl4030
, twl4030
->master_substream
);
1720 if (!(twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
) &
1721 TWL4030_OPTION_1
)) {
1722 /* In option2 4 channel is not supported, set the
1723 * constraint for the first stream for channels, the
1724 * second stream will 'inherit' this cosntraint */
1725 snd_pcm_hw_constraint_minmax(substream
->runtime
,
1726 SNDRV_PCM_HW_PARAM_CHANNELS
,
1729 twl4030
->master_substream
= substream
;
1735 static void twl4030_shutdown(struct snd_pcm_substream
*substream
,
1736 struct snd_soc_dai
*dai
)
1738 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1739 struct snd_soc_codec
*codec
= rtd
->codec
;
1740 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
1742 if (twl4030
->master_substream
== substream
)
1743 twl4030
->master_substream
= twl4030
->slave_substream
;
1745 twl4030
->slave_substream
= NULL
;
1747 /* If all streams are closed, or the remaining stream has not yet
1748 * been configured than set the DAI as not configured. */
1749 if (!twl4030
->master_substream
)
1750 twl4030
->configured
= 0;
1751 else if (!twl4030
->master_substream
->runtime
->channels
)
1752 twl4030
->configured
= 0;
1754 /* If the closing substream had 4 channel, do the necessary cleanup */
1755 if (substream
->runtime
->channels
== 4)
1756 twl4030_tdm_enable(codec
, substream
->stream
, 0);
1759 static int twl4030_hw_params(struct snd_pcm_substream
*substream
,
1760 struct snd_pcm_hw_params
*params
,
1761 struct snd_soc_dai
*dai
)
1763 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1764 struct snd_soc_codec
*codec
= rtd
->codec
;
1765 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
1766 u8 mode
, old_mode
, format
, old_format
;
1768 /* If the substream has 4 channel, do the necessary setup */
1769 if (params_channels(params
) == 4) {
1770 format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1771 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
);
1773 /* Safety check: are we in the correct operating mode and
1774 * the interface is in TDM mode? */
1775 if ((mode
& TWL4030_OPTION_1
) &&
1776 ((format
& TWL4030_AIF_FORMAT
) == TWL4030_AIF_FORMAT_TDM
))
1777 twl4030_tdm_enable(codec
, substream
->stream
, 1);
1782 if (twl4030
->configured
)
1783 /* Ignoring hw_params for already configured DAI */
1787 old_mode
= twl4030_read_reg_cache(codec
,
1788 TWL4030_REG_CODEC_MODE
) & ~TWL4030_CODECPDZ
;
1789 mode
= old_mode
& ~TWL4030_APLL_RATE
;
1791 switch (params_rate(params
)) {
1793 mode
|= TWL4030_APLL_RATE_8000
;
1796 mode
|= TWL4030_APLL_RATE_11025
;
1799 mode
|= TWL4030_APLL_RATE_12000
;
1802 mode
|= TWL4030_APLL_RATE_16000
;
1805 mode
|= TWL4030_APLL_RATE_22050
;
1808 mode
|= TWL4030_APLL_RATE_24000
;
1811 mode
|= TWL4030_APLL_RATE_32000
;
1814 mode
|= TWL4030_APLL_RATE_44100
;
1817 mode
|= TWL4030_APLL_RATE_48000
;
1820 mode
|= TWL4030_APLL_RATE_96000
;
1823 printk(KERN_ERR
"TWL4030 hw params: unknown rate %d\n",
1824 params_rate(params
));
1829 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1830 format
= old_format
;
1831 format
&= ~TWL4030_DATA_WIDTH
;
1832 switch (params_format(params
)) {
1833 case SNDRV_PCM_FORMAT_S16_LE
:
1834 format
|= TWL4030_DATA_WIDTH_16S_16W
;
1836 case SNDRV_PCM_FORMAT_S24_LE
:
1837 format
|= TWL4030_DATA_WIDTH_32S_24W
;
1840 printk(KERN_ERR
"TWL4030 hw params: unknown format %d\n",
1841 params_format(params
));
1845 if (format
!= old_format
|| mode
!= old_mode
) {
1846 if (twl4030
->codec_powered
) {
1848 * If the codec is powered, than we need to toggle the
1851 twl4030_codec_enable(codec
, 0);
1852 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
1853 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1854 twl4030_codec_enable(codec
, 1);
1856 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
1857 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1861 /* Store the important parameters for the DAI configuration and set
1862 * the DAI as configured */
1863 twl4030
->configured
= 1;
1864 twl4030
->rate
= params_rate(params
);
1865 twl4030
->sample_bits
= hw_param_interval(params
,
1866 SNDRV_PCM_HW_PARAM_SAMPLE_BITS
)->min
;
1867 twl4030
->channels
= params_channels(params
);
1869 /* If both playback and capture streams are open, and one of them
1870 * is setting the hw parameters right now (since we are here), set
1871 * constraints to the other stream to match the current one. */
1872 if (twl4030
->slave_substream
)
1873 twl4030_constraints(twl4030
, substream
);
1878 static int twl4030_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1879 int clk_id
, unsigned int freq
, int dir
)
1881 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1882 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
1890 dev_err(codec
->dev
, "Unsupported APLL mclk: %u\n", freq
);
1894 if ((freq
/ 1000) != twl4030
->sysclk
) {
1896 "Mismatch in APLL mclk: %u (configured: %u)\n",
1897 freq
, twl4030
->sysclk
* 1000);
1904 static int twl4030_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1907 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1908 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
1909 u8 old_format
, format
;
1912 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1913 format
= old_format
;
1915 /* set master/slave audio interface */
1916 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1917 case SND_SOC_DAIFMT_CBM_CFM
:
1918 format
&= ~(TWL4030_AIF_SLAVE_EN
);
1919 format
&= ~(TWL4030_CLK256FS_EN
);
1921 case SND_SOC_DAIFMT_CBS_CFS
:
1922 format
|= TWL4030_AIF_SLAVE_EN
;
1923 format
|= TWL4030_CLK256FS_EN
;
1929 /* interface format */
1930 format
&= ~TWL4030_AIF_FORMAT
;
1931 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1932 case SND_SOC_DAIFMT_I2S
:
1933 format
|= TWL4030_AIF_FORMAT_CODEC
;
1935 case SND_SOC_DAIFMT_DSP_A
:
1936 format
|= TWL4030_AIF_FORMAT_TDM
;
1942 if (format
!= old_format
) {
1943 if (twl4030
->codec_powered
) {
1945 * If the codec is powered, than we need to toggle the
1948 twl4030_codec_enable(codec
, 0);
1949 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1950 twl4030_codec_enable(codec
, 1);
1952 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1959 static int twl4030_set_tristate(struct snd_soc_dai
*dai
, int tristate
)
1961 struct snd_soc_codec
*codec
= dai
->codec
;
1962 u8 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1965 reg
|= TWL4030_AIF_TRI_EN
;
1967 reg
&= ~TWL4030_AIF_TRI_EN
;
1969 return twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, reg
);
1972 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1973 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1974 static void twl4030_voice_enable(struct snd_soc_codec
*codec
, int direction
,
1979 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_OPTION
);
1981 if (direction
== SNDRV_PCM_STREAM_PLAYBACK
)
1982 mask
= TWL4030_ARXL1_VRX_EN
;
1984 mask
= TWL4030_ATXL2_VTXL_EN
| TWL4030_ATXR2_VTXR_EN
;
1991 twl4030_write(codec
, TWL4030_REG_OPTION
, reg
);
1994 static int twl4030_voice_startup(struct snd_pcm_substream
*substream
,
1995 struct snd_soc_dai
*dai
)
1997 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1998 struct snd_soc_codec
*codec
= rtd
->codec
;
1999 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
2002 /* If the system master clock is not 26MHz, the voice PCM interface is
2005 if (twl4030
->sysclk
!= 26000) {
2006 dev_err(codec
->dev
, "The board is configured for %u Hz, while"
2007 "the Voice interface needs 26MHz APLL mclk\n",
2008 twl4030
->sysclk
* 1000);
2012 /* If the codec mode is not option2, the voice PCM interface is not
2015 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
)
2018 if (mode
!= TWL4030_OPTION_2
) {
2019 printk(KERN_ERR
"TWL4030 voice startup: "
2020 "the codec mode is not option2\n");
2027 static void twl4030_voice_shutdown(struct snd_pcm_substream
*substream
,
2028 struct snd_soc_dai
*dai
)
2030 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
2031 struct snd_soc_codec
*codec
= rtd
->codec
;
2033 /* Enable voice digital filters */
2034 twl4030_voice_enable(codec
, substream
->stream
, 0);
2037 static int twl4030_voice_hw_params(struct snd_pcm_substream
*substream
,
2038 struct snd_pcm_hw_params
*params
, struct snd_soc_dai
*dai
)
2040 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
2041 struct snd_soc_codec
*codec
= rtd
->codec
;
2042 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
2045 /* Enable voice digital filters */
2046 twl4030_voice_enable(codec
, substream
->stream
, 1);
2049 old_mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
)
2050 & ~(TWL4030_CODECPDZ
);
2053 switch (params_rate(params
)) {
2055 mode
&= ~(TWL4030_SEL_16K
);
2058 mode
|= TWL4030_SEL_16K
;
2061 printk(KERN_ERR
"TWL4030 voice hw params: unknown rate %d\n",
2062 params_rate(params
));
2066 if (mode
!= old_mode
) {
2067 if (twl4030
->codec_powered
) {
2069 * If the codec is powered, than we need to toggle the
2072 twl4030_codec_enable(codec
, 0);
2073 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
2074 twl4030_codec_enable(codec
, 1);
2076 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
2083 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
2084 int clk_id
, unsigned int freq
, int dir
)
2086 struct snd_soc_codec
*codec
= codec_dai
->codec
;
2087 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
2089 if (freq
!= 26000000) {
2090 dev_err(codec
->dev
, "Unsupported APLL mclk: %u, the Voice"
2091 "interface needs 26MHz APLL mclk\n", freq
);
2094 if ((freq
/ 1000) != twl4030
->sysclk
) {
2096 "Mismatch in APLL mclk: %u (configured: %u)\n",
2097 freq
, twl4030
->sysclk
* 1000);
2103 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
2106 struct snd_soc_codec
*codec
= codec_dai
->codec
;
2107 struct twl4030_priv
*twl4030
= snd_soc_codec_get_drvdata(codec
);
2108 u8 old_format
, format
;
2111 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_VOICE_IF
);
2112 format
= old_format
;
2114 /* set master/slave audio interface */
2115 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
2116 case SND_SOC_DAIFMT_CBM_CFM
:
2117 format
&= ~(TWL4030_VIF_SLAVE_EN
);
2119 case SND_SOC_DAIFMT_CBS_CFS
:
2120 format
|= TWL4030_VIF_SLAVE_EN
;
2126 /* clock inversion */
2127 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
2128 case SND_SOC_DAIFMT_IB_NF
:
2129 format
&= ~(TWL4030_VIF_FORMAT
);
2131 case SND_SOC_DAIFMT_NB_IF
:
2132 format
|= TWL4030_VIF_FORMAT
;
2138 if (format
!= old_format
) {
2139 if (twl4030
->codec_powered
) {
2141 * If the codec is powered, than we need to toggle the
2144 twl4030_codec_enable(codec
, 0);
2145 twl4030_write(codec
, TWL4030_REG_VOICE_IF
, format
);
2146 twl4030_codec_enable(codec
, 1);
2148 twl4030_write(codec
, TWL4030_REG_VOICE_IF
, format
);
2155 static int twl4030_voice_set_tristate(struct snd_soc_dai
*dai
, int tristate
)
2157 struct snd_soc_codec
*codec
= dai
->codec
;
2158 u8 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_VOICE_IF
);
2161 reg
|= TWL4030_VIF_TRI_EN
;
2163 reg
&= ~TWL4030_VIF_TRI_EN
;
2165 return twl4030_write(codec
, TWL4030_REG_VOICE_IF
, reg
);
2168 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
2169 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
2171 static struct snd_soc_dai_ops twl4030_dai_hifi_ops
= {
2172 .startup
= twl4030_startup
,
2173 .shutdown
= twl4030_shutdown
,
2174 .hw_params
= twl4030_hw_params
,
2175 .set_sysclk
= twl4030_set_dai_sysclk
,
2176 .set_fmt
= twl4030_set_dai_fmt
,
2177 .set_tristate
= twl4030_set_tristate
,
2180 static struct snd_soc_dai_ops twl4030_dai_voice_ops
= {
2181 .startup
= twl4030_voice_startup
,
2182 .shutdown
= twl4030_voice_shutdown
,
2183 .hw_params
= twl4030_voice_hw_params
,
2184 .set_sysclk
= twl4030_voice_set_dai_sysclk
,
2185 .set_fmt
= twl4030_voice_set_dai_fmt
,
2186 .set_tristate
= twl4030_voice_set_tristate
,
2189 static struct snd_soc_dai_driver twl4030_dai
[] = {
2191 .name
= "twl4030-hifi",
2193 .stream_name
= "HiFi Playback",
2196 .rates
= TWL4030_RATES
| SNDRV_PCM_RATE_96000
,
2197 .formats
= TWL4030_FORMATS
,},
2199 .stream_name
= "Capture",
2202 .rates
= TWL4030_RATES
,
2203 .formats
= TWL4030_FORMATS
,},
2204 .ops
= &twl4030_dai_hifi_ops
,
2207 .name
= "twl4030-voice",
2209 .stream_name
= "Voice Playback",
2212 .rates
= SNDRV_PCM_RATE_8000
| SNDRV_PCM_RATE_16000
,
2213 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
2215 .stream_name
= "Capture",
2218 .rates
= SNDRV_PCM_RATE_8000
| SNDRV_PCM_RATE_16000
,
2219 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
2220 .ops
= &twl4030_dai_voice_ops
,
2224 static int twl4030_soc_suspend(struct snd_soc_codec
*codec
, pm_message_t state
)
2226 twl4030_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
2230 static int twl4030_soc_resume(struct snd_soc_codec
*codec
)
2232 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
2236 static int twl4030_soc_probe(struct snd_soc_codec
*codec
)
2238 struct twl4030_priv
*twl4030
;
2240 twl4030
= kzalloc(sizeof(struct twl4030_priv
), GFP_KERNEL
);
2241 if (twl4030
== NULL
) {
2242 printk("Can not allocate memroy\n");
2245 snd_soc_codec_set_drvdata(codec
, twl4030
);
2246 /* Set the defaults, and power up the codec */
2247 twl4030
->sysclk
= twl4030_codec_get_mclk() / 1000;
2248 codec
->idle_bias_off
= 1;
2250 twl4030_init_chip(codec
);
2252 snd_soc_add_controls(codec
, twl4030_snd_controls
,
2253 ARRAY_SIZE(twl4030_snd_controls
));
2254 twl4030_add_widgets(codec
);
2258 static int twl4030_soc_remove(struct snd_soc_codec
*codec
)
2260 /* Reset registers to their chip default before leaving */
2261 twl4030_reset_registers(codec
);
2262 twl4030_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
2266 static struct snd_soc_codec_driver soc_codec_dev_twl4030
= {
2267 .probe
= twl4030_soc_probe
,
2268 .remove
= twl4030_soc_remove
,
2269 .suspend
= twl4030_soc_suspend
,
2270 .resume
= twl4030_soc_resume
,
2271 .read
= twl4030_read_reg_cache
,
2272 .write
= twl4030_write
,
2273 .set_bias_level
= twl4030_set_bias_level
,
2274 .reg_cache_size
= sizeof(twl4030_reg
),
2275 .reg_word_size
= sizeof(u8
),
2276 .reg_cache_default
= twl4030_reg
,
2279 static int __devinit
twl4030_codec_probe(struct platform_device
*pdev
)
2281 struct twl4030_codec_audio_data
*pdata
= pdev
->dev
.platform_data
;
2284 dev_err(&pdev
->dev
, "platform_data is missing\n");
2288 return snd_soc_register_codec(&pdev
->dev
, &soc_codec_dev_twl4030
,
2289 twl4030_dai
, ARRAY_SIZE(twl4030_dai
));
2292 static int __devexit
twl4030_codec_remove(struct platform_device
*pdev
)
2294 struct twl4030_priv
*twl4030
= dev_get_drvdata(&pdev
->dev
);
2296 snd_soc_unregister_codec(&pdev
->dev
);
2301 MODULE_ALIAS("platform:twl4030-codec");
2303 static struct platform_driver twl4030_codec_driver
= {
2304 .probe
= twl4030_codec_probe
,
2305 .remove
= __devexit_p(twl4030_codec_remove
),
2307 .name
= "twl4030-codec",
2308 .owner
= THIS_MODULE
,
2312 static int __init
twl4030_modinit(void)
2314 return platform_driver_register(&twl4030_codec_driver
);
2316 module_init(twl4030_modinit
);
2318 static void __exit
twl4030_exit(void)
2320 platform_driver_unregister(&twl4030_codec_driver
);
2322 module_exit(twl4030_exit
);
2324 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2325 MODULE_AUTHOR("Steve Sakoman");
2326 MODULE_LICENSE("GPL");