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ASoC: Add fsi_is_play function
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / sound / soc / sh / fsi.c
blobdfc04bc2809ee0eaac6ba553558d5ca234d4eda8
1 /*
2 * Fifo-attached Serial Interface (FSI) support for SH7724
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
6 *
7 * Based on ssi.c
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/delay.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/io.h>
18 #include <linux/slab.h>
19 #include <sound/soc.h>
20 #include <sound/sh_fsi.h>
21
22 #define DO_FMT 0x0000
23 #define DOFF_CTL 0x0004
24 #define DOFF_ST 0x0008
25 #define DI_FMT 0x000C
26 #define DIFF_CTL 0x0010
27 #define DIFF_ST 0x0014
28 #define CKG1 0x0018
29 #define CKG2 0x001C
30 #define DIDT 0x0020
31 #define DODT 0x0024
32 #define MUTE_ST 0x0028
33 #define OUT_SEL 0x0030
34 #define REG_END OUT_SEL
35
36 #define A_MST_CTLR 0x0180
37 #define B_MST_CTLR 0x01A0
38 #define CPU_INT_ST 0x01F4
39 #define CPU_IEMSK 0x01F8
40 #define CPU_IMSK 0x01FC
41 #define INT_ST 0x0200
42 #define IEMSK 0x0204
43 #define IMSK 0x0208
44 #define MUTE 0x020C
45 #define CLK_RST 0x0210
46 #define SOFT_RST 0x0214
47 #define FIFO_SZ 0x0218
48 #define MREG_START A_MST_CTLR
49 #define MREG_END FIFO_SZ
50
51 /* DO_FMT */
52 /* DI_FMT */
53 #define CR_MONO (0x0 << 4)
54 #define CR_MONO_D (0x1 << 4)
55 #define CR_PCM (0x2 << 4)
56 #define CR_I2S (0x3 << 4)
57 #define CR_TDM (0x4 << 4)
58 #define CR_TDM_D (0x5 << 4)
59 #define CR_SPDIF 0x00100120
60
61 /* DOFF_CTL */
62 /* DIFF_CTL */
63 #define IRQ_HALF 0x00100000
64 #define FIFO_CLR 0x00000001
65
66 /* DOFF_ST */
67 #define ERR_OVER 0x00000010
68 #define ERR_UNDER 0x00000001
69 #define ST_ERR (ERR_OVER | ERR_UNDER)
70
71 /* CKG1 */
72 #define ACKMD_MASK 0x00007000
73 #define BPFMD_MASK 0x00000700
74
75 /* A/B MST_CTLR */
76 #define BP (1 << 4) /* Fix the signal of Biphase output */
77 #define SE (1 << 0) /* Fix the master clock */
78
79 /* CLK_RST */
80 #define B_CLK 0x00000010
81 #define A_CLK 0x00000001
82
83 /* IO SHIFT / MACRO */
84 #define BI_SHIFT 12
85 #define BO_SHIFT 8
86 #define AI_SHIFT 4
87 #define AO_SHIFT 0
88 #define AB_IO(param, shift) (param << shift)
89
90 /* SOFT_RST */
91 #define PBSR (1 << 12) /* Port B Software Reset */
92 #define PASR (1 << 8) /* Port A Software Reset */
93 #define IR (1 << 4) /* Interrupt Reset */
94 #define FSISR (1 << 0) /* Software Reset */
95
96 /* FIFO_SZ */
97 #define FIFO_SZ_MASK 0x7
98
99 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
100
101 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
102
103 /*
104 * FSI driver use below type name for variable
105 *
106 * xxx_len : data length
107 * xxx_width : data width
108 * xxx_offset : data offset
109 * xxx_num : number of data
110 */
111
112 /*
113 * struct
114 */
115
116 struct fsi_priv {
117 void __iomem *base;
118 struct snd_pcm_substream *substream;
119 struct fsi_master *master;
120
121 int fifo_max_num;
122 int chan_num;
123
124 int buff_offset;
125 int buff_len;
126 int period_len;
127 int period_num;
128
129 u32 mst_ctrl;
130 };
131
132 struct fsi_core {
133 int ver;
134
135 u32 int_st;
136 u32 iemsk;
137 u32 imsk;
138 };
139
140 struct fsi_master {
141 void __iomem *base;
142 int irq;
143 struct fsi_priv fsia;
144 struct fsi_priv fsib;
145 struct fsi_core *core;
146 struct sh_fsi_platform_info *info;
147 spinlock_t lock;
148 };
149
150 /*
151 * basic read write function
152 */
153
154 static void __fsi_reg_write(u32 reg, u32 data)
155 {
156 /* valid data area is 24bit */
157 data &= 0x00ffffff;
158
159 __raw_writel(data, reg);
160 }
161
162 static u32 __fsi_reg_read(u32 reg)
163 {
164 return __raw_readl(reg);
165 }
166
167 static void __fsi_reg_mask_set(u32 reg, u32 mask, u32 data)
168 {
169 u32 val = __fsi_reg_read(reg);
170
171 val &= ~mask;
172 val |= data & mask;
173
174 __fsi_reg_write(reg, val);
175 }
176
177 static void fsi_reg_write(struct fsi_priv *fsi, u32 reg, u32 data)
178 {
179 if (reg > REG_END) {
180 pr_err("fsi: register access err (%s)\n", __func__);
181 return;
182 }
183
184 __fsi_reg_write((u32)(fsi->base + reg), data);
185 }
186
187 static u32 fsi_reg_read(struct fsi_priv *fsi, u32 reg)
188 {
189 if (reg > REG_END) {
190 pr_err("fsi: register access err (%s)\n", __func__);
191 return 0;
192 }
193
194 return __fsi_reg_read((u32)(fsi->base + reg));
195 }
196
197 static void fsi_reg_mask_set(struct fsi_priv *fsi, u32 reg, u32 mask, u32 data)
198 {
199 if (reg > REG_END) {
200 pr_err("fsi: register access err (%s)\n", __func__);
201 return;
202 }
203
204 __fsi_reg_mask_set((u32)(fsi->base + reg), mask, data);
205 }
206
207 static void fsi_master_write(struct fsi_master *master, u32 reg, u32 data)
208 {
209 unsigned long flags;
210
211 if ((reg < MREG_START) ||
212 (reg > MREG_END)) {
213 pr_err("fsi: register access err (%s)\n", __func__);
214 return;
215 }
216
217 spin_lock_irqsave(&master->lock, flags);
218 __fsi_reg_write((u32)(master->base + reg), data);
219 spin_unlock_irqrestore(&master->lock, flags);
220 }
221
222 static u32 fsi_master_read(struct fsi_master *master, u32 reg)
223 {
224 u32 ret;
225 unsigned long flags;
226
227 if ((reg < MREG_START) ||
228 (reg > MREG_END)) {
229 pr_err("fsi: register access err (%s)\n", __func__);
230 return 0;
231 }
232
233 spin_lock_irqsave(&master->lock, flags);
234 ret = __fsi_reg_read((u32)(master->base + reg));
235 spin_unlock_irqrestore(&master->lock, flags);
236
237 return ret;
238 }
239
240 static void fsi_master_mask_set(struct fsi_master *master,
241 u32 reg, u32 mask, u32 data)
242 {
243 unsigned long flags;
244
245 if ((reg < MREG_START) ||
246 (reg > MREG_END)) {
247 pr_err("fsi: register access err (%s)\n", __func__);
248 return;
249 }
250
251 spin_lock_irqsave(&master->lock, flags);
252 __fsi_reg_mask_set((u32)(master->base + reg), mask, data);
253 spin_unlock_irqrestore(&master->lock, flags);
254 }
255
256 /*
257 * basic function
258 */
259
260 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
261 {
262 return fsi->master;
263 }
264
265 static int fsi_is_port_a(struct fsi_priv *fsi)
266 {
267 return fsi->master->base == fsi->base;
268 }
269
270 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
271 {
272 struct snd_soc_pcm_runtime *rtd = substream->private_data;
273
274 return rtd->cpu_dai;
275 }
276
277 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
278 {
279 struct snd_soc_dai *dai = fsi_get_dai(substream);
280 struct fsi_master *master = snd_soc_dai_get_drvdata(dai);
281
282 if (dai->id == 0)
283 return &master->fsia;
284 else
285 return &master->fsib;
286 }
287
288 static u32 fsi_get_info_flags(struct fsi_priv *fsi)
289 {
290 int is_porta = fsi_is_port_a(fsi);
291 struct fsi_master *master = fsi_get_master(fsi);
292
293 return is_porta ? master->info->porta_flags :
294 master->info->portb_flags;
295 }
296
297 static inline int fsi_is_play(struct snd_pcm_substream *substream)
298 {
299 return substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
300 }
301
302 static int fsi_is_master_mode(struct fsi_priv *fsi, int is_play)
303 {
304 u32 mode;
305 u32 flags = fsi_get_info_flags(fsi);
306
307 mode = is_play ? SH_FSI_OUT_SLAVE_MODE : SH_FSI_IN_SLAVE_MODE;
308
309 /* return
310 * 1 : master mode
311 * 0 : slave mode
312 */
313
314 return (mode & flags) != mode;
315 }
316
317 static u32 fsi_get_port_shift(struct fsi_priv *fsi, int is_play)
318 {
319 int is_porta = fsi_is_port_a(fsi);
320 u32 shift;
321
322 if (is_porta)
323 shift = is_play ? AO_SHIFT : AI_SHIFT;
324 else
325 shift = is_play ? BO_SHIFT : BI_SHIFT;
326
327 return shift;
328 }
329
330 static void fsi_stream_push(struct fsi_priv *fsi,
331 struct snd_pcm_substream *substream,
332 u32 buffer_len,
333 u32 period_len)
334 {
335 fsi->substream = substream;
336 fsi->buff_len = buffer_len;
337 fsi->buff_offset = 0;
338 fsi->period_len = period_len;
339 fsi->period_num = 0;
340 }
341
342 static void fsi_stream_pop(struct fsi_priv *fsi)
343 {
344 fsi->substream = NULL;
345 fsi->buff_len = 0;
346 fsi->buff_offset = 0;
347 fsi->period_len = 0;
348 fsi->period_num = 0;
349 }
350
351 static int fsi_get_fifo_data_num(struct fsi_priv *fsi, int is_play)
352 {
353 u32 status;
354 u32 reg = is_play ? DOFF_ST : DIFF_ST;
355 int data_num;
356
357 status = fsi_reg_read(fsi, reg);
358 data_num = 0x1ff & (status >> 8);
359 data_num *= fsi->chan_num;
360
361 return data_num;
362 }
363
364 static int fsi_len2num(int len, int width)
365 {
366 return len / width;
367 }
368
369 #define fsi_num2offset(a, b) fsi_num2len(a, b)
370 static int fsi_num2len(int num, int width)
371 {
372 return num * width;
373 }
374
375 static int fsi_get_frame_width(struct fsi_priv *fsi)
376 {
377 struct snd_pcm_substream *substream = fsi->substream;
378 struct snd_pcm_runtime *runtime = substream->runtime;
379
380 return frames_to_bytes(runtime, 1) / fsi->chan_num;
381 }
382
383 /*
384 * dma function
385 */
386
387 static u8 *fsi_dma_get_area(struct fsi_priv *fsi)
388 {
389 return fsi->substream->runtime->dma_area + fsi->buff_offset;
390 }
391
392 static void fsi_dma_soft_push16(struct fsi_priv *fsi, int num)
393 {
394 u16 *start;
395 int i;
396
397 start = (u16 *)fsi_dma_get_area(fsi);
398
399 for (i = 0; i < num; i++)
400 fsi_reg_write(fsi, DODT, ((u32)*(start + i) << 8));
401 }
402
403 static void fsi_dma_soft_pop16(struct fsi_priv *fsi, int num)
404 {
405 u16 *start;
406 int i;
407
408 start = (u16 *)fsi_dma_get_area(fsi);
409
410 for (i = 0; i < num; i++)
411 *(start + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8);
412 }
413
414 static void fsi_dma_soft_push32(struct fsi_priv *fsi, int num)
415 {
416 u32 *start;
417 int i;
418
419 start = (u32 *)fsi_dma_get_area(fsi);
420
421 for (i = 0; i < num; i++)
422 fsi_reg_write(fsi, DODT, *(start + i));
423 }
424
425 static void fsi_dma_soft_pop32(struct fsi_priv *fsi, int num)
426 {
427 u32 *start;
428 int i;
429
430 start = (u32 *)fsi_dma_get_area(fsi);
431
432 for (i = 0; i < num; i++)
433 *(start + i) = fsi_reg_read(fsi, DIDT);
434 }
435
436 /*
437 * irq function
438 */
439
440 static void fsi_irq_enable(struct fsi_priv *fsi, int is_play)
441 {
442 u32 data = AB_IO(1, fsi_get_port_shift(fsi, is_play));
443 struct fsi_master *master = fsi_get_master(fsi);
444
445 fsi_master_mask_set(master, master->core->imsk, data, data);
446 fsi_master_mask_set(master, master->core->iemsk, data, data);
447 }
448
449 static void fsi_irq_disable(struct fsi_priv *fsi, int is_play)
450 {
451 u32 data = AB_IO(1, fsi_get_port_shift(fsi, is_play));
452 struct fsi_master *master = fsi_get_master(fsi);
453
454 fsi_master_mask_set(master, master->core->imsk, data, 0);
455 fsi_master_mask_set(master, master->core->iemsk, data, 0);
456 }
457
458 static u32 fsi_irq_get_status(struct fsi_master *master)
459 {
460 return fsi_master_read(master, master->core->int_st);
461 }
462
463 static void fsi_irq_clear_all_status(struct fsi_master *master)
464 {
465 fsi_master_write(master, master->core->int_st, 0);
466 }
467
468 static void fsi_irq_clear_status(struct fsi_priv *fsi)
469 {
470 u32 data = 0;
471 struct fsi_master *master = fsi_get_master(fsi);
472
473 data |= AB_IO(1, fsi_get_port_shift(fsi, 0));
474 data |= AB_IO(1, fsi_get_port_shift(fsi, 1));
475
476 /* clear interrupt factor */
477 fsi_master_mask_set(master, master->core->int_st, data, 0);
478 }
479
480 /*
481 * SPDIF master clock function
482 *
483 * These functions are used later FSI2
484 */
485 static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
486 {
487 struct fsi_master *master = fsi_get_master(fsi);
488 u32 val = BP | SE;
489
490 if (master->core->ver < 2) {
491 pr_err("fsi: register access err (%s)\n", __func__);
492 return;
493 }
494
495 if (enable)
496 fsi_master_mask_set(master, fsi->mst_ctrl, val, val);
497 else
498 fsi_master_mask_set(master, fsi->mst_ctrl, val, 0);
499 }
500
501 /*
502 * ctrl function
503 */
504
505 static void fsi_clk_ctrl(struct fsi_priv *fsi, int enable)
506 {
507 u32 val = fsi_is_port_a(fsi) ? (1 << 0) : (1 << 4);
508 struct fsi_master *master = fsi_get_master(fsi);
509
510 if (enable)
511 fsi_master_mask_set(master, CLK_RST, val, val);
512 else
513 fsi_master_mask_set(master, CLK_RST, val, 0);
514 }
515
516 static void fsi_fifo_init(struct fsi_priv *fsi,
517 int is_play,
518 struct snd_soc_dai *dai)
519 {
520 struct fsi_master *master = fsi_get_master(fsi);
521 u32 ctrl, shift, i;
522
523 /* get on-chip RAM capacity */
524 shift = fsi_master_read(master, FIFO_SZ);
525 shift >>= fsi_get_port_shift(fsi, is_play);
526 shift &= FIFO_SZ_MASK;
527 fsi->fifo_max_num = 256 << shift;
528 dev_dbg(dai->dev, "fifo = %d words\n", fsi->fifo_max_num);
529
530 /*
531 * The maximum number of sample data varies depending
532 * on the number of channels selected for the format.
533 *
534 * FIFOs are used in 4-channel units in 3-channel mode
535 * and in 8-channel units in 5- to 7-channel mode
536 * meaning that more FIFOs than the required size of DPRAM
537 * are used.
538 *
539 * ex) if 256 words of DP-RAM is connected
540 * 1 channel: 256 (256 x 1 = 256)
541 * 2 channels: 128 (128 x 2 = 256)
542 * 3 channels: 64 ( 64 x 3 = 192)
543 * 4 channels: 64 ( 64 x 4 = 256)
544 * 5 channels: 32 ( 32 x 5 = 160)
545 * 6 channels: 32 ( 32 x 6 = 192)
546 * 7 channels: 32 ( 32 x 7 = 224)
547 * 8 channels: 32 ( 32 x 8 = 256)
548 */
549 for (i = 1; i < fsi->chan_num; i <<= 1)
550 fsi->fifo_max_num >>= 1;
551 dev_dbg(dai->dev, "%d channel %d store\n",
552 fsi->chan_num, fsi->fifo_max_num);
553
554 ctrl = is_play ? DOFF_CTL : DIFF_CTL;
555
556 /* set interrupt generation factor */
557 fsi_reg_write(fsi, ctrl, IRQ_HALF);
558
559 /* clear FIFO */
560 fsi_reg_mask_set(fsi, ctrl, FIFO_CLR, FIFO_CLR);
561 }
562
563 static void fsi_soft_all_reset(struct fsi_master *master)
564 {
565 /* port AB reset */
566 fsi_master_mask_set(master, SOFT_RST, PASR | PBSR, 0);
567 mdelay(10);
568
569 /* soft reset */
570 fsi_master_mask_set(master, SOFT_RST, FSISR, 0);
571 fsi_master_mask_set(master, SOFT_RST, FSISR, FSISR);
572 mdelay(10);
573 }
574
575 static int fsi_fifo_data_ctrl(struct fsi_priv *fsi, int startup, int is_play)
576 {
577 struct snd_pcm_runtime *runtime;
578 struct snd_pcm_substream *substream = NULL;
579 u32 status_reg = is_play ? DOFF_ST : DIFF_ST;
580 int data_residue_num;
581 int data_num;
582 int data_num_max;
583 int ch_width;
584 int over_period;
585 void (*fn)(struct fsi_priv *fsi, int size);
586
587 if (!fsi ||
588 !fsi->substream ||
589 !fsi->substream->runtime)
590 return -EINVAL;
591
592 over_period = 0;
593 substream = fsi->substream;
594 runtime = substream->runtime;
595
596 /* FSI FIFO has limit.
597 * So, this driver can not send periods data at a time
598 */
599 if (fsi->buff_offset >=
600 fsi_num2offset(fsi->period_num + 1, fsi->period_len)) {
601
602 over_period = 1;
603 fsi->period_num = (fsi->period_num + 1) % runtime->periods;
604
605 if (0 == fsi->period_num)
606 fsi->buff_offset = 0;
607 }
608
609 /* get 1 channel data width */
610 ch_width = fsi_get_frame_width(fsi);
611
612 /* get residue data number of alsa */
613 data_residue_num = fsi_len2num(fsi->buff_len - fsi->buff_offset,
614 ch_width);
615
616 if (is_play) {
617 /*
618 * for play-back
619 *
620 * data_num_max : number of FSI fifo free space
621 * data_num : number of ALSA residue data
622 */
623 data_num_max = fsi->fifo_max_num * fsi->chan_num;
624 data_num_max -= fsi_get_fifo_data_num(fsi, is_play);
625
626 data_num = data_residue_num;
627
628 switch (ch_width) {
629 case 2:
630 fn = fsi_dma_soft_push16;
631 break;
632 case 4:
633 fn = fsi_dma_soft_push32;
634 break;
635 default:
636 return -EINVAL;
637 }
638 } else {
639 /*
640 * for capture
641 *
642 * data_num_max : number of ALSA free space
643 * data_num : number of data in FSI fifo
644 */
645 data_num_max = data_residue_num;
646 data_num = fsi_get_fifo_data_num(fsi, is_play);
647
648 switch (ch_width) {
649 case 2:
650 fn = fsi_dma_soft_pop16;
651 break;
652 case 4:
653 fn = fsi_dma_soft_pop32;
654 break;
655 default:
656 return -EINVAL;
657 }
658 }
659
660 data_num = min(data_num, data_num_max);
661
662 fn(fsi, data_num);
663
664 /* update buff_offset */
665 fsi->buff_offset += fsi_num2offset(data_num, ch_width);
666
667 /* check fifo status */
668 if (!startup) {
669 struct snd_soc_dai *dai = fsi_get_dai(substream);
670 u32 status = fsi_reg_read(fsi, status_reg);
671
672 if (status & ERR_OVER)
673 dev_err(dai->dev, "over run\n");
674 if (status & ERR_UNDER)
675 dev_err(dai->dev, "under run\n");
676 }
677 fsi_reg_write(fsi, status_reg, 0);
678
679 /* re-enable irq */
680 fsi_irq_enable(fsi, is_play);
681
682 if (over_period)
683 snd_pcm_period_elapsed(substream);
684
685 return 0;
686 }
687
688 static int fsi_data_pop(struct fsi_priv *fsi, int startup)
689 {
690 return fsi_fifo_data_ctrl(fsi, startup, 0);
691 }
692
693 static int fsi_data_push(struct fsi_priv *fsi, int startup)
694 {
695 return fsi_fifo_data_ctrl(fsi, startup, 1);
696 }
697
698 static irqreturn_t fsi_interrupt(int irq, void *data)
699 {
700 struct fsi_master *master = data;
701 u32 int_st = fsi_irq_get_status(master);
702
703 /* clear irq status */
704 fsi_master_mask_set(master, SOFT_RST, IR, 0);
705 fsi_master_mask_set(master, SOFT_RST, IR, IR);
706
707 if (int_st & AB_IO(1, AO_SHIFT))
708 fsi_data_push(&master->fsia, 0);
709 if (int_st & AB_IO(1, BO_SHIFT))
710 fsi_data_push(&master->fsib, 0);
711 if (int_st & AB_IO(1, AI_SHIFT))
712 fsi_data_pop(&master->fsia, 0);
713 if (int_st & AB_IO(1, BI_SHIFT))
714 fsi_data_pop(&master->fsib, 0);
715
716 fsi_irq_clear_all_status(master);
717
718 return IRQ_HANDLED;
719 }
720
721 /*
722 * dai ops
723 */
724
725 static int fsi_dai_startup(struct snd_pcm_substream *substream,
726 struct snd_soc_dai *dai)
727 {
728 struct fsi_priv *fsi = fsi_get_priv(substream);
729 u32 flags = fsi_get_info_flags(fsi);
730 struct fsi_master *master = fsi_get_master(fsi);
731 u32 fmt;
732 u32 reg;
733 u32 data;
734 int is_play = fsi_is_play(substream);
735 int is_master;
736
737 pm_runtime_get_sync(dai->dev);
738
739 /* CKG1 */
740 data = is_play ? (1 << 0) : (1 << 4);
741 is_master = fsi_is_master_mode(fsi, is_play);
742 if (is_master)
743 fsi_reg_mask_set(fsi, CKG1, data, data);
744 else
745 fsi_reg_mask_set(fsi, CKG1, data, 0);
746
747 /* clock inversion (CKG2) */
748 data = 0;
749 if (SH_FSI_LRM_INV & flags)
750 data |= 1 << 12;
751 if (SH_FSI_BRM_INV & flags)
752 data |= 1 << 8;
753 if (SH_FSI_LRS_INV & flags)
754 data |= 1 << 4;
755 if (SH_FSI_BRS_INV & flags)
756 data |= 1 << 0;
757
758 fsi_reg_write(fsi, CKG2, data);
759
760 /* do fmt, di fmt */
761 data = 0;
762 reg = is_play ? DO_FMT : DI_FMT;
763 fmt = is_play ? SH_FSI_GET_OFMT(flags) : SH_FSI_GET_IFMT(flags);
764 switch (fmt) {
765 case SH_FSI_FMT_MONO:
766 data = CR_MONO;
767 fsi->chan_num = 1;
768 break;
769 case SH_FSI_FMT_MONO_DELAY:
770 data = CR_MONO_D;
771 fsi->chan_num = 1;
772 break;
773 case SH_FSI_FMT_PCM:
774 data = CR_PCM;
775 fsi->chan_num = 2;
776 break;
777 case SH_FSI_FMT_I2S:
778 data = CR_I2S;
779 fsi->chan_num = 2;
780 break;
781 case SH_FSI_FMT_TDM:
782 fsi->chan_num = is_play ?
783 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
784 data = CR_TDM | (fsi->chan_num - 1);
785 break;
786 case SH_FSI_FMT_TDM_DELAY:
787 fsi->chan_num = is_play ?
788 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
789 data = CR_TDM_D | (fsi->chan_num - 1);
790 break;
791 case SH_FSI_FMT_SPDIF:
792 if (master->core->ver < 2) {
793 dev_err(dai->dev, "This FSI can not use SPDIF\n");
794 return -EINVAL;
795 }
796 data = CR_SPDIF;
797 fsi->chan_num = 2;
798 fsi_spdif_clk_ctrl(fsi, 1);
799 fsi_reg_mask_set(fsi, OUT_SEL, 0x0010, 0x0010);
800 break;
801 default:
802 dev_err(dai->dev, "unknown format.\n");
803 return -EINVAL;
804 }
805 fsi_reg_write(fsi, reg, data);
806
807 /* irq clear */
808 fsi_irq_disable(fsi, is_play);
809 fsi_irq_clear_status(fsi);
810
811 /* fifo init */
812 fsi_fifo_init(fsi, is_play, dai);
813
814 return 0;
815 }
816
817 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
818 struct snd_soc_dai *dai)
819 {
820 struct fsi_priv *fsi = fsi_get_priv(substream);
821 int is_play = fsi_is_play(substream);
822
823 fsi_irq_disable(fsi, is_play);
824 fsi_clk_ctrl(fsi, 0);
825
826 pm_runtime_put_sync(dai->dev);
827 }
828
829 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
830 struct snd_soc_dai *dai)
831 {
832 struct fsi_priv *fsi = fsi_get_priv(substream);
833 struct snd_pcm_runtime *runtime = substream->runtime;
834 int is_play = fsi_is_play(substream);
835 int ret = 0;
836
837 switch (cmd) {
838 case SNDRV_PCM_TRIGGER_START:
839 fsi_stream_push(fsi, substream,
840 frames_to_bytes(runtime, runtime->buffer_size),
841 frames_to_bytes(runtime, runtime->period_size));
842 ret = is_play ? fsi_data_push(fsi, 1) : fsi_data_pop(fsi, 1);
843 break;
844 case SNDRV_PCM_TRIGGER_STOP:
845 fsi_irq_disable(fsi, is_play);
846 fsi_stream_pop(fsi);
847 break;
848 }
849
850 return ret;
851 }
852
853 static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
854 struct snd_pcm_hw_params *params,
855 struct snd_soc_dai *dai)
856 {
857 struct fsi_priv *fsi = fsi_get_priv(substream);
858 struct fsi_master *master = fsi_get_master(fsi);
859 int (*set_rate)(int is_porta, int rate) = master->info->set_rate;
860 int fsi_ver = master->core->ver;
861 int is_play = fsi_is_play(substream);
862 int ret;
863
864 /* if slave mode, set_rate is not needed */
865 if (!fsi_is_master_mode(fsi, is_play))
866 return 0;
867
868 /* it is error if no set_rate */
869 if (!set_rate)
870 return -EIO;
871
872 ret = set_rate(fsi_is_port_a(fsi), params_rate(params));
873 if (ret > 0) {
874 u32 data = 0;
875
876 switch (ret & SH_FSI_ACKMD_MASK) {
877 default:
878 /* FALL THROUGH */
879 case SH_FSI_ACKMD_512:
880 data |= (0x0 << 12);
881 break;
882 case SH_FSI_ACKMD_256:
883 data |= (0x1 << 12);
884 break;
885 case SH_FSI_ACKMD_128:
886 data |= (0x2 << 12);
887 break;
888 case SH_FSI_ACKMD_64:
889 data |= (0x3 << 12);
890 break;
891 case SH_FSI_ACKMD_32:
892 if (fsi_ver < 2)
893 dev_err(dai->dev, "unsupported ACKMD\n");
894 else
895 data |= (0x4 << 12);
896 break;
897 }
898
899 switch (ret & SH_FSI_BPFMD_MASK) {
900 default:
901 /* FALL THROUGH */
902 case SH_FSI_BPFMD_32:
903 data |= (0x0 << 8);
904 break;
905 case SH_FSI_BPFMD_64:
906 data |= (0x1 << 8);
907 break;
908 case SH_FSI_BPFMD_128:
909 data |= (0x2 << 8);
910 break;
911 case SH_FSI_BPFMD_256:
912 data |= (0x3 << 8);
913 break;
914 case SH_FSI_BPFMD_512:
915 data |= (0x4 << 8);
916 break;
917 case SH_FSI_BPFMD_16:
918 if (fsi_ver < 2)
919 dev_err(dai->dev, "unsupported ACKMD\n");
920 else
921 data |= (0x7 << 8);
922 break;
923 }
924
925 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
926 udelay(10);
927 fsi_clk_ctrl(fsi, 1);
928 ret = 0;
929 }
930
931 return ret;
932
933 }
934
935 static struct snd_soc_dai_ops fsi_dai_ops = {
936 .startup = fsi_dai_startup,
937 .shutdown = fsi_dai_shutdown,
938 .trigger = fsi_dai_trigger,
939 .hw_params = fsi_dai_hw_params,
940 };
941
942 /*
943 * pcm ops
944 */
945
946 static struct snd_pcm_hardware fsi_pcm_hardware = {
947 .info = SNDRV_PCM_INFO_INTERLEAVED |
948 SNDRV_PCM_INFO_MMAP |
949 SNDRV_PCM_INFO_MMAP_VALID |
950 SNDRV_PCM_INFO_PAUSE,
951 .formats = FSI_FMTS,
952 .rates = FSI_RATES,
953 .rate_min = 8000,
954 .rate_max = 192000,
955 .channels_min = 1,
956 .channels_max = 2,
957 .buffer_bytes_max = 64 * 1024,
958 .period_bytes_min = 32,
959 .period_bytes_max = 8192,
960 .periods_min = 1,
961 .periods_max = 32,
962 .fifo_size = 256,
963 };
964
965 static int fsi_pcm_open(struct snd_pcm_substream *substream)
966 {
967 struct snd_pcm_runtime *runtime = substream->runtime;
968 int ret = 0;
969
970 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
971
972 ret = snd_pcm_hw_constraint_integer(runtime,
973 SNDRV_PCM_HW_PARAM_PERIODS);
974
975 return ret;
976 }
977
978 static int fsi_hw_params(struct snd_pcm_substream *substream,
979 struct snd_pcm_hw_params *hw_params)
980 {
981 return snd_pcm_lib_malloc_pages(substream,
982 params_buffer_bytes(hw_params));
983 }
984
985 static int fsi_hw_free(struct snd_pcm_substream *substream)
986 {
987 return snd_pcm_lib_free_pages(substream);
988 }
989
990 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
991 {
992 struct snd_pcm_runtime *runtime = substream->runtime;
993 struct fsi_priv *fsi = fsi_get_priv(substream);
994 long location;
995
996 location = (fsi->buff_offset - 1);
997 if (location < 0)
998 location = 0;
999
1000 return bytes_to_frames(runtime, location);
1001 }
1002
1003 static struct snd_pcm_ops fsi_pcm_ops = {
1004 .open = fsi_pcm_open,
1005 .ioctl = snd_pcm_lib_ioctl,
1006 .hw_params = fsi_hw_params,
1007 .hw_free = fsi_hw_free,
1008 .pointer = fsi_pointer,
1009 };
1010
1011 /*
1012 * snd_soc_platform
1013 */
1014
1015 #define PREALLOC_BUFFER (32 * 1024)
1016 #define PREALLOC_BUFFER_MAX (32 * 1024)
1017
1018 static void fsi_pcm_free(struct snd_pcm *pcm)
1019 {
1020 snd_pcm_lib_preallocate_free_for_all(pcm);
1021 }
1022
1023 static int fsi_pcm_new(struct snd_card *card,
1024 struct snd_soc_dai *dai,
1025 struct snd_pcm *pcm)
1026 {
1027 /*
1028 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
1029 * in MMAP mode (i.e. aplay -M)
1030 */
1031 return snd_pcm_lib_preallocate_pages_for_all(
1032 pcm,
1033 SNDRV_DMA_TYPE_CONTINUOUS,
1034 snd_dma_continuous_data(GFP_KERNEL),
1035 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
1036 }
1037
1038 /*
1039 * alsa struct
1040 */
1041
1042 static struct snd_soc_dai_driver fsi_soc_dai[] = {
1043 {
1044 .name = "fsia-dai",
1045 .playback = {
1046 .rates = FSI_RATES,
1047 .formats = FSI_FMTS,
1048 .channels_min = 1,
1049 .channels_max = 8,
1050 },
1051 .capture = {
1052 .rates = FSI_RATES,
1053 .formats = FSI_FMTS,
1054 .channels_min = 1,
1055 .channels_max = 8,
1056 },
1057 .ops = &fsi_dai_ops,
1058 },
1059 {
1060 .name = "fsib-dai",
1061 .playback = {
1062 .rates = FSI_RATES,
1063 .formats = FSI_FMTS,
1064 .channels_min = 1,
1065 .channels_max = 8,
1066 },
1067 .capture = {
1068 .rates = FSI_RATES,
1069 .formats = FSI_FMTS,
1070 .channels_min = 1,
1071 .channels_max = 8,
1072 },
1073 .ops = &fsi_dai_ops,
1074 },
1075 };
1076
1077 static struct snd_soc_platform_driver fsi_soc_platform = {
1078 .ops = &fsi_pcm_ops,
1079 .pcm_new = fsi_pcm_new,
1080 .pcm_free = fsi_pcm_free,
1081 };
1082
1083 /*
1084 * platform function
1085 */
1086
1087 static int fsi_probe(struct platform_device *pdev)
1088 {
1089 struct fsi_master *master;
1090 const struct platform_device_id *id_entry;
1091 struct resource *res;
1092 unsigned int irq;
1093 int ret;
1094
1095 id_entry = pdev->id_entry;
1096 if (!id_entry) {
1097 dev_err(&pdev->dev, "unknown fsi device\n");
1098 return -ENODEV;
1099 }
1100
1101 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1102 irq = platform_get_irq(pdev, 0);
1103 if (!res || (int)irq <= 0) {
1104 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
1105 ret = -ENODEV;
1106 goto exit;
1107 }
1108
1109 master = kzalloc(sizeof(*master), GFP_KERNEL);
1110 if (!master) {
1111 dev_err(&pdev->dev, "Could not allocate master\n");
1112 ret = -ENOMEM;
1113 goto exit;
1114 }
1115
1116 master->base = ioremap_nocache(res->start, resource_size(res));
1117 if (!master->base) {
1118 ret = -ENXIO;
1119 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
1120 goto exit_kfree;
1121 }
1122
1123 /* master setting */
1124 master->irq = irq;
1125 master->info = pdev->dev.platform_data;
1126 master->core = (struct fsi_core *)id_entry->driver_data;
1127 spin_lock_init(&master->lock);
1128
1129 /* FSI A setting */
1130 master->fsia.base = master->base;
1131 master->fsia.master = master;
1132 master->fsia.mst_ctrl = A_MST_CTLR;
1133
1134 /* FSI B setting */
1135 master->fsib.base = master->base + 0x40;
1136 master->fsib.master = master;
1137 master->fsib.mst_ctrl = B_MST_CTLR;
1138
1139 pm_runtime_enable(&pdev->dev);
1140 pm_runtime_resume(&pdev->dev);
1141 dev_set_drvdata(&pdev->dev, master);
1142
1143 fsi_soft_all_reset(master);
1144
1145 ret = request_irq(irq, &fsi_interrupt, IRQF_DISABLED,
1146 id_entry->name, master);
1147 if (ret) {
1148 dev_err(&pdev->dev, "irq request err\n");
1149 goto exit_iounmap;
1150 }
1151
1152 ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform);
1153 if (ret < 0) {
1154 dev_err(&pdev->dev, "cannot snd soc register\n");
1155 goto exit_free_irq;
1156 }
1157
1158 return snd_soc_register_dais(&pdev->dev, fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
1159
1160 exit_free_irq:
1161 free_irq(irq, master);
1162 exit_iounmap:
1163 iounmap(master->base);
1164 pm_runtime_disable(&pdev->dev);
1165 exit_kfree:
1166 kfree(master);
1167 master = NULL;
1168 exit:
1169 return ret;
1170 }
1171
1172 static int fsi_remove(struct platform_device *pdev)
1173 {
1174 struct fsi_master *master;
1175
1176 master = dev_get_drvdata(&pdev->dev);
1177
1178 snd_soc_unregister_dais(&pdev->dev, ARRAY_SIZE(fsi_soc_dai));
1179 snd_soc_unregister_platform(&pdev->dev);
1180
1181 pm_runtime_disable(&pdev->dev);
1182
1183 free_irq(master->irq, master);
1184
1185 iounmap(master->base);
1186 kfree(master);
1187
1188 return 0;
1189 }
1190
1191 static int fsi_runtime_nop(struct device *dev)
1192 {
1193 /* Runtime PM callback shared between ->runtime_suspend()
1194 * and ->runtime_resume(). Simply returns success.
1195 *
1196 * This driver re-initializes all registers after
1197 * pm_runtime_get_sync() anyway so there is no need
1198 * to save and restore registers here.
1199 */
1200 return 0;
1201 }
1202
1203 static struct dev_pm_ops fsi_pm_ops = {
1204 .runtime_suspend = fsi_runtime_nop,
1205 .runtime_resume = fsi_runtime_nop,
1206 };
1207
1208 static struct fsi_core fsi1_core = {
1209 .ver = 1,
1210
1211 /* Interrupt */
1212 .int_st = INT_ST,
1213 .iemsk = IEMSK,
1214 .imsk = IMSK,
1215 };
1216
1217 static struct fsi_core fsi2_core = {
1218 .ver = 2,
1219
1220 /* Interrupt */
1221 .int_st = CPU_INT_ST,
1222 .iemsk = CPU_IEMSK,
1223 .imsk = CPU_IMSK,
1224 };
1225
1226 static struct platform_device_id fsi_id_table[] = {
1227 { "sh_fsi", (kernel_ulong_t)&fsi1_core },
1228 { "sh_fsi2", (kernel_ulong_t)&fsi2_core },
1229 {},
1230 };
1231 MODULE_DEVICE_TABLE(platform, fsi_id_table);
1232
1233 static struct platform_driver fsi_driver = {
1234 .driver = {
1235 .name = "fsi-pcm-audio",
1236 .pm = &fsi_pm_ops,
1237 },
1238 .probe = fsi_probe,
1239 .remove = fsi_remove,
1240 .id_table = fsi_id_table,
1241 };
1242
1243 static int __init fsi_mobile_init(void)
1244 {
1245 return platform_driver_register(&fsi_driver);
1246 }
1247
1248 static void __exit fsi_mobile_exit(void)
1249 {
1250 platform_driver_unregister(&fsi_driver);
1251 }
1252
1253 module_init(fsi_mobile_init);
1254 module_exit(fsi_mobile_exit);
1255
1256 MODULE_LICENSE("GPL");
1257 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
1258 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree