2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
7 * Much of the core SMP work is based on previous work by Thomas Radke, to
8 * whom a great many thanks are extended.
10 * Thanks to Intel for making available several different Pentium,
11 * Pentium Pro and Pentium-II/Xeon MP machines.
12 * Original development of Linux SMP code supported by Caldera.
14 * This code is released under the GNU General Public License version 2 or
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Martin J. Bligh : Added support for multi-quad systems
33 * Dave Jones : Report invalid combinations of Athlon CPUs.
34 * Rusty Russell : Hacked into shape for new "hotplug" boot process. */
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/kernel.h>
41 #include <linux/sched.h>
42 #include <linux/kernel_stat.h>
43 #include <linux/bootmem.h>
44 #include <linux/notifier.h>
45 #include <linux/cpu.h>
46 #include <linux/percpu.h>
47 #include <linux/nmi.h>
49 #include <linux/delay.h>
50 #include <linux/mc146818rtc.h>
51 #include <asm/tlbflush.h>
53 #include <asm/arch_hooks.h>
56 #include <mach_apic.h>
57 #include <mach_wakecpu.h>
58 #include <smpboot_hooks.h>
62 extern int smp_b_stepping
;
64 static cpumask_t smp_commenced_mask
;
66 /* which logical CPU number maps to which CPU (physical APIC ID) */
67 u16 x86_cpu_to_apicid_init
[NR_CPUS
] __initdata
=
68 { [0 ... NR_CPUS
-1] = BAD_APICID
};
69 void *x86_cpu_to_apicid_early_ptr
;
70 DEFINE_PER_CPU(u16
, x86_cpu_to_apicid
) = BAD_APICID
;
71 EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid
);
73 u8 apicid_2_node
[MAX_APICID
];
75 static void map_cpu_to_logical_apicid(void);
77 /* State of each CPU. */
78 DEFINE_PER_CPU(int, cpu_state
) = { 0 };
80 static atomic_t init_deasserted
;
82 static void __cpuinit
smp_callin(void)
85 unsigned long timeout
;
88 * If waken up by an INIT in an 82489DX configuration
89 * we may get here before an INIT-deassert IPI reaches
90 * our local APIC. We have to wait for the IPI or we'll
91 * lock up on an APIC access.
93 wait_for_init_deassert(&init_deasserted
);
96 * (This works even if the APIC is not enabled.)
98 phys_id
= GET_APIC_ID(apic_read(APIC_ID
));
99 cpuid
= smp_processor_id();
100 if (cpu_isset(cpuid
, cpu_callin_map
)) {
101 printk("huh, phys CPU#%d, CPU#%d already present??\n",
105 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid
, phys_id
);
108 * STARTUP IPIs are fragile beasts as they might sometimes
109 * trigger some glue motherboard logic. Complete APIC bus
110 * silence for 1 second, this overestimates the time the
111 * boot CPU is spending to send the up to 2 STARTUP IPIs
112 * by a factor of two. This should be enough.
116 * Waiting 2s total for startup (udelay is not yet working)
118 timeout
= jiffies
+ 2*HZ
;
119 while (time_before(jiffies
, timeout
)) {
121 * Has the boot CPU finished it's STARTUP sequence?
123 if (cpu_isset(cpuid
, cpu_callout_map
))
128 if (!time_before(jiffies
, timeout
)) {
129 printk("BUG: CPU%d started up but did not get a callout!\n",
135 * the boot CPU has finished the init stage and is spinning
136 * on callin_map until we finish. We are free to set up this
137 * CPU, first the APIC. (this is probably redundant on most
141 Dprintk("CALLIN, before setup_local_APIC().\n");
142 smp_callin_clear_local_apic();
144 map_cpu_to_logical_apicid();
150 Dprintk("Stack at about %p\n",&cpuid
);
153 * Save our processor parameters
155 smp_store_cpu_info(cpuid
);
158 * Allow the master to continue.
160 cpu_set(cpuid
, cpu_callin_map
);
166 * Activate a secondary processor.
168 static void __cpuinit
start_secondary(void *unused
)
171 * Don't put *anything* before cpu_init(), SMP booting is too
172 * fragile that we want to limit the things done here to the
173 * most necessary things.
181 while (!cpu_isset(smp_processor_id(), smp_commenced_mask
))
184 * Check TSC synchronization with the BP:
186 check_tsc_sync_target();
188 if (nmi_watchdog
== NMI_IO_APIC
) {
189 disable_8259A_irq(0);
190 enable_NMI_through_LVT0();
194 * low-memory mappings have been cleared, flush them from
195 * the local TLBs too.
199 /* This must be done before setting cpu_online_map */
200 set_cpu_sibling_map(raw_smp_processor_id());
204 * We need to hold call_lock, so there is no inconsistency
205 * between the time smp_call_function() determines number of
206 * IPI recipients, and the time when the determination is made
207 * for which cpus receive the IPI. Holding this
208 * lock helps us to not include this cpu in a currently in progress
209 * smp_call_function().
211 lock_ipi_call_lock();
212 cpu_set(smp_processor_id(), cpu_online_map
);
213 unlock_ipi_call_lock();
214 per_cpu(cpu_state
, smp_processor_id()) = CPU_ONLINE
;
216 setup_secondary_clock();
223 * Everything has been set up for the secondary
224 * CPUs - they just need to reload everything
225 * from the task structure
226 * This function must not return.
228 void __devinit
initialize_secondary(void)
231 * We don't actually need to load the full TSS,
232 * basically just the stack pointer and the ip.
239 :"m" (current
->thread
.sp
),"m" (current
->thread
.ip
));
242 /* Static state in head.S used to set up a CPU */
250 /* which logical CPUs are on which nodes */
251 cpumask_t node_to_cpumask_map
[MAX_NUMNODES
] __read_mostly
=
252 { [0 ... MAX_NUMNODES
-1] = CPU_MASK_NONE
};
253 EXPORT_SYMBOL(node_to_cpumask_map
);
254 /* which node each logical CPU is on */
255 int cpu_to_node_map
[NR_CPUS
] __read_mostly
= { [0 ... NR_CPUS
-1] = 0 };
256 EXPORT_SYMBOL(cpu_to_node_map
);
258 /* set up a mapping between cpu and node. */
259 static inline void map_cpu_to_node(int cpu
, int node
)
261 printk("Mapping cpu %d to node %d\n", cpu
, node
);
262 cpu_set(cpu
, node_to_cpumask_map
[node
]);
263 cpu_to_node_map
[cpu
] = node
;
266 /* undo a mapping between cpu and node. */
267 static inline void unmap_cpu_to_node(int cpu
)
271 printk("Unmapping cpu %d from all nodes\n", cpu
);
272 for (node
= 0; node
< MAX_NUMNODES
; node
++)
273 cpu_clear(cpu
, node_to_cpumask_map
[node
]);
274 cpu_to_node_map
[cpu
] = 0;
276 #else /* !CONFIG_NUMA */
278 #define map_cpu_to_node(cpu, node) ({})
279 #define unmap_cpu_to_node(cpu) ({})
281 #endif /* CONFIG_NUMA */
283 u8 cpu_2_logical_apicid
[NR_CPUS
] __read_mostly
= { [0 ... NR_CPUS
-1] = BAD_APICID
};
285 static void map_cpu_to_logical_apicid(void)
287 int cpu
= smp_processor_id();
288 int apicid
= logical_smp_processor_id();
289 int node
= apicid_to_node(apicid
);
291 if (!node_online(node
))
292 node
= first_online_node
;
294 cpu_2_logical_apicid
[cpu
] = apicid
;
295 map_cpu_to_node(cpu
, node
);
298 static void unmap_cpu_to_logical_apicid(int cpu
)
300 cpu_2_logical_apicid
[cpu
] = BAD_APICID
;
301 unmap_cpu_to_node(cpu
);
304 static inline void __inquire_remote_apic(int apicid
)
306 unsigned i
, regs
[] = { APIC_ID
>> 4, APIC_LVR
>> 4, APIC_SPIV
>> 4 };
307 char *names
[] = { "ID", "VERSION", "SPIV" };
311 printk(KERN_INFO
"Inquiring remote APIC #%d...\n", apicid
);
313 for (i
= 0; i
< ARRAY_SIZE(regs
); i
++) {
314 printk(KERN_INFO
"... APIC #%d %s: ", apicid
, names
[i
]);
319 status
= safe_apic_wait_icr_idle();
322 "a previous APIC delivery may have failed\n");
324 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(apicid
));
325 apic_write_around(APIC_ICR
, APIC_DM_REMRD
| regs
[i
]);
330 status
= apic_read(APIC_ICR
) & APIC_ICR_RR_MASK
;
331 } while (status
== APIC_ICR_RR_INPROG
&& timeout
++ < 1000);
334 case APIC_ICR_RR_VALID
:
335 status
= apic_read(APIC_RRR
);
336 printk(KERN_CONT
"%08x\n", status
);
339 printk(KERN_CONT
"failed\n");
344 #ifdef WAKE_SECONDARY_VIA_NMI
346 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
347 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
348 * won't ... remember to clear down the APIC, etc later.
351 wakeup_secondary_cpu(int logical_apicid
, unsigned long start_eip
)
353 unsigned long send_status
, accept_status
= 0;
357 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(logical_apicid
));
359 /* Boot on the stack */
360 /* Kick the second */
361 apic_write_around(APIC_ICR
, APIC_DM_NMI
| APIC_DEST_LOGICAL
);
363 Dprintk("Waiting for send to finish...\n");
364 send_status
= safe_apic_wait_icr_idle();
367 * Give the other CPU some time to accept the IPI.
371 * Due to the Pentium erratum 3AP.
373 maxlvt
= lapic_get_maxlvt();
375 apic_read_around(APIC_SPIV
);
376 apic_write(APIC_ESR
, 0);
378 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
379 Dprintk("NMI sent.\n");
382 printk("APIC never delivered???\n");
384 printk("APIC delivery error (%lx).\n", accept_status
);
386 return (send_status
| accept_status
);
388 #endif /* WAKE_SECONDARY_VIA_NMI */
390 #ifdef WAKE_SECONDARY_VIA_INIT
392 wakeup_secondary_cpu(int phys_apicid
, unsigned long start_eip
)
394 unsigned long send_status
, accept_status
= 0;
395 int maxlvt
, num_starts
, j
;
398 * Be paranoid about clearing APIC errors.
400 if (APIC_INTEGRATED(apic_version
[phys_apicid
])) {
401 apic_read_around(APIC_SPIV
);
402 apic_write(APIC_ESR
, 0);
406 Dprintk("Asserting INIT.\n");
409 * Turn INIT on target chip
411 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(phys_apicid
));
416 apic_write_around(APIC_ICR
, APIC_INT_LEVELTRIG
| APIC_INT_ASSERT
419 Dprintk("Waiting for send to finish...\n");
420 send_status
= safe_apic_wait_icr_idle();
424 Dprintk("Deasserting INIT.\n");
427 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(phys_apicid
));
430 apic_write_around(APIC_ICR
, APIC_INT_LEVELTRIG
| APIC_DM_INIT
);
432 Dprintk("Waiting for send to finish...\n");
433 send_status
= safe_apic_wait_icr_idle();
435 atomic_set(&init_deasserted
, 1);
438 * Should we send STARTUP IPIs ?
440 * Determine this based on the APIC version.
441 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
443 if (APIC_INTEGRATED(apic_version
[phys_apicid
]))
449 * Paravirt / VMI wants a startup IPI hook here to set up the
450 * target processor state.
452 startup_ipi_hook(phys_apicid
, (unsigned long) start_secondary
,
453 (unsigned long) stack_start
.sp
);
456 * Run STARTUP IPI loop.
458 Dprintk("#startup loops: %d.\n", num_starts
);
460 maxlvt
= lapic_get_maxlvt();
462 for (j
= 1; j
<= num_starts
; j
++) {
463 Dprintk("Sending STARTUP #%d.\n",j
);
464 apic_read_around(APIC_SPIV
);
465 apic_write(APIC_ESR
, 0);
467 Dprintk("After apic_write.\n");
474 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(phys_apicid
));
476 /* Boot on the stack */
477 /* Kick the second */
478 apic_write_around(APIC_ICR
, APIC_DM_STARTUP
479 | (start_eip
>> 12));
482 * Give the other CPU some time to accept the IPI.
486 Dprintk("Startup point 1.\n");
488 Dprintk("Waiting for send to finish...\n");
489 send_status
= safe_apic_wait_icr_idle();
492 * Give the other CPU some time to accept the IPI.
496 * Due to the Pentium erratum 3AP.
499 apic_read_around(APIC_SPIV
);
500 apic_write(APIC_ESR
, 0);
502 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
503 if (send_status
|| accept_status
)
506 Dprintk("After Startup.\n");
509 printk("APIC never delivered???\n");
511 printk("APIC delivery error (%lx).\n", accept_status
);
513 return (send_status
| accept_status
);
515 #endif /* WAKE_SECONDARY_VIA_INIT */
517 extern cpumask_t cpu_initialized
;
518 static inline int alloc_cpu_id(void)
522 cpus_complement(tmp_map
, cpu_present_map
);
523 cpu
= first_cpu(tmp_map
);
529 #ifdef CONFIG_HOTPLUG_CPU
530 static struct task_struct
* __cpuinitdata cpu_idle_tasks
[NR_CPUS
];
531 static inline struct task_struct
* __cpuinit
alloc_idle_task(int cpu
)
533 struct task_struct
*idle
;
535 if ((idle
= cpu_idle_tasks
[cpu
]) != NULL
) {
536 /* initialize thread_struct. we really want to avoid destroy
539 idle
->thread
.sp
= (unsigned long)task_pt_regs(idle
);
540 init_idle(idle
, cpu
);
543 idle
= fork_idle(cpu
);
546 cpu_idle_tasks
[cpu
] = idle
;
550 #define alloc_idle_task(cpu) fork_idle(cpu)
553 static int __cpuinit
do_boot_cpu(int apicid
, int cpu
)
555 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
556 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
557 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
560 struct task_struct
*idle
;
561 unsigned long boot_error
;
563 unsigned long start_eip
;
564 unsigned short nmi_high
= 0, nmi_low
= 0;
567 * Save current MTRR state in case it was changed since early boot
568 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
573 * We can't use kernel_thread since we must avoid to
574 * reschedule the child.
576 idle
= alloc_idle_task(cpu
);
578 panic("failed fork for CPU %d", cpu
);
581 per_cpu(current_task
, cpu
) = idle
;
582 early_gdt_descr
.address
= (unsigned long)get_cpu_gdt_table(cpu
);
584 idle
->thread
.ip
= (unsigned long) start_secondary
;
585 /* start_eip had better be page-aligned! */
586 start_eip
= setup_trampoline();
589 alternatives_smp_switch(1);
591 /* So we see what's up */
592 printk("Booting processor %d/%d ip %lx\n", cpu
, apicid
, start_eip
);
593 /* Stack for startup_32 can be just as for start_secondary onwards */
594 stack_start
.sp
= (void *) idle
->thread
.sp
;
598 per_cpu(x86_cpu_to_apicid
, cpu
) = apicid
;
600 * This grunge runs the startup process for
601 * the targeted processor.
604 atomic_set(&init_deasserted
, 0);
606 Dprintk("Setting warm reset code and vector.\n");
608 store_NMI_vector(&nmi_high
, &nmi_low
);
610 smpboot_setup_warm_reset_vector(start_eip
);
613 * Starting actual IPI sequence...
615 boot_error
= wakeup_secondary_cpu(apicid
, start_eip
);
619 * allow APs to start initializing.
621 Dprintk("Before Callout %d.\n", cpu
);
622 cpu_set(cpu
, cpu_callout_map
);
623 Dprintk("After Callout %d.\n", cpu
);
626 * Wait 5s total for a response
628 for (timeout
= 0; timeout
< 50000; timeout
++) {
629 if (cpu_isset(cpu
, cpu_callin_map
))
630 break; /* It has booted */
634 if (cpu_isset(cpu
, cpu_callin_map
)) {
635 /* number CPUs logically, starting from 1 (BSP is 0) */
637 printk("CPU%d: ", cpu
);
638 print_cpu_info(&cpu_data(cpu
));
639 Dprintk("CPU has booted.\n");
642 if (*((volatile unsigned char *)trampoline_base
)
644 /* trampoline started but...? */
645 printk("Stuck ??\n");
647 /* trampoline code not run */
648 printk("Not responding.\n");
649 inquire_remote_apic(apicid
);
654 /* Try to put things back the way they were before ... */
655 unmap_cpu_to_logical_apicid(cpu
);
656 cpu_clear(cpu
, cpu_callout_map
); /* was set here (do_boot_cpu()) */
657 cpu_clear(cpu
, cpu_initialized
); /* was set by cpu_init() */
660 per_cpu(x86_cpu_to_apicid
, cpu
) = apicid
;
661 cpu_set(cpu
, cpu_present_map
);
664 /* mark "stuck" area as not stuck */
665 *((volatile unsigned long *)trampoline_base
) = 0;
670 #ifdef CONFIG_HOTPLUG_CPU
671 void cpu_exit_clear(void)
673 int cpu
= raw_smp_processor_id();
681 cpu_clear(cpu
, cpu_callout_map
);
682 cpu_clear(cpu
, cpu_callin_map
);
684 cpu_clear(cpu
, smp_commenced_mask
);
685 unmap_cpu_to_logical_apicid(cpu
);
688 struct warm_boot_cpu_info
{
689 struct completion
*complete
;
690 struct work_struct task
;
695 static void __cpuinit
do_warm_boot_cpu(struct work_struct
*work
)
697 struct warm_boot_cpu_info
*info
=
698 container_of(work
, struct warm_boot_cpu_info
, task
);
699 do_boot_cpu(info
->apicid
, info
->cpu
);
700 complete(info
->complete
);
703 static int __cpuinit
__smp_prepare_cpu(int cpu
)
705 DECLARE_COMPLETION_ONSTACK(done
);
706 struct warm_boot_cpu_info info
;
709 apicid
= per_cpu(x86_cpu_to_apicid
, cpu
);
710 if (apicid
== BAD_APICID
) {
715 info
.complete
= &done
;
716 info
.apicid
= apicid
;
718 INIT_WORK(&info
.task
, do_warm_boot_cpu
);
720 /* init low mem mapping */
721 clone_pgd_range(swapper_pg_dir
, swapper_pg_dir
+ USER_PGD_PTRS
,
722 min_t(unsigned long, KERNEL_PGD_PTRS
, USER_PGD_PTRS
));
724 schedule_work(&info
.task
);
725 wait_for_completion(&done
);
735 * Cycle through the processors sending APIC IPIs to boot each.
738 static int boot_cpu_logical_apicid
;
739 /* Where the IO area was mapped on multiquad, always 0 otherwise */
741 #ifdef CONFIG_X86_NUMAQ
742 EXPORT_SYMBOL(xquad_portio
);
745 static void __init
smp_boot_cpus(unsigned int max_cpus
)
747 int apicid
, cpu
, bit
, kicked
;
748 unsigned long bogosum
= 0;
751 * Setup boot CPU information
753 smp_store_cpu_info(0); /* Final full version of the data */
754 printk("CPU%d: ", 0);
755 print_cpu_info(&cpu_data(0));
757 boot_cpu_physical_apicid
= GET_APIC_ID(apic_read(APIC_ID
));
758 boot_cpu_logical_apicid
= logical_smp_processor_id();
759 per_cpu(x86_cpu_to_apicid
, 0) = boot_cpu_physical_apicid
;
761 current_thread_info()->cpu
= 0;
763 set_cpu_sibling_map(0);
766 * If we couldn't find an SMP configuration at boot time,
767 * get out of here now!
769 if (!smp_found_config
&& !acpi_lapic
) {
770 printk(KERN_NOTICE
"SMP motherboard not detected.\n");
771 smpboot_clear_io_apic_irqs();
772 phys_cpu_present_map
= physid_mask_of_physid(0);
773 if (APIC_init_uniprocessor())
774 printk(KERN_NOTICE
"Local APIC not detected."
775 " Using dummy APIC emulation.\n");
776 map_cpu_to_logical_apicid();
777 cpu_set(0, per_cpu(cpu_sibling_map
, 0));
778 cpu_set(0, per_cpu(cpu_core_map
, 0));
783 * Should not be necessary because the MP table should list the boot
784 * CPU too, but we do it for the sake of robustness anyway.
785 * Makes no sense to do this check in clustered apic mode, so skip it
787 if (!check_phys_apicid_present(boot_cpu_physical_apicid
)) {
788 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
789 boot_cpu_physical_apicid
);
790 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
794 * If we couldn't find a local APIC, then get out of here now!
796 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
]) && !cpu_has_apic
) {
797 printk(KERN_ERR
"BIOS bug, local APIC #%d not detected!...\n",
798 boot_cpu_physical_apicid
);
799 printk(KERN_ERR
"... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
800 smpboot_clear_io_apic_irqs();
801 phys_cpu_present_map
= physid_mask_of_physid(0);
802 map_cpu_to_logical_apicid();
803 cpu_set(0, per_cpu(cpu_sibling_map
, 0));
804 cpu_set(0, per_cpu(cpu_core_map
, 0));
811 * If SMP should be disabled, then really disable it!
814 smp_found_config
= 0;
815 printk(KERN_INFO
"SMP mode deactivated, forcing use of dummy APIC emulation.\n");
817 if (nmi_watchdog
== NMI_LOCAL_APIC
) {
818 printk(KERN_INFO
"activating minimal APIC for NMI watchdog use.\n");
822 smpboot_clear_io_apic_irqs();
823 phys_cpu_present_map
= physid_mask_of_physid(0);
824 map_cpu_to_logical_apicid();
825 cpu_set(0, per_cpu(cpu_sibling_map
, 0));
826 cpu_set(0, per_cpu(cpu_core_map
, 0));
832 map_cpu_to_logical_apicid();
835 setup_portio_remap();
838 * Scan the CPU present map and fire up the other CPUs via do_boot_cpu
840 * In clustered apic mode, phys_cpu_present_map is a constructed thus:
841 * bits 0-3 are quad0, 4-7 are quad1, etc. A perverse twist on the
844 Dprintk("CPU present map: %lx\n", physids_coerce(phys_cpu_present_map
));
847 for (bit
= 0; kicked
< NR_CPUS
&& bit
< MAX_APICS
; bit
++) {
848 apicid
= cpu_present_to_apicid(bit
);
850 * Don't even attempt to start the boot CPU!
852 if ((apicid
== boot_cpu_apicid
) || (apicid
== BAD_APICID
))
855 if (!check_apicid_present(bit
))
857 if (max_cpus
<= cpucount
+1)
860 if (((cpu
= alloc_cpu_id()) <= 0) || do_boot_cpu(apicid
, cpu
))
861 printk("CPU #%d not responding - cannot use it.\n",
868 * Cleanup possible dangling ends...
870 smpboot_restore_warm_reset_vector();
873 * Allow the user to impress friends.
875 Dprintk("Before bogomips.\n");
876 for_each_possible_cpu(cpu
)
877 if (cpu_isset(cpu
, cpu_callout_map
))
878 bogosum
+= cpu_data(cpu
).loops_per_jiffy
;
880 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
883 (bogosum
/(5000/HZ
))%100);
885 Dprintk("Before bogocount - setting activated=1.\n");
888 printk(KERN_WARNING
"WARNING: SMP operation may be unreliable with B stepping processors.\n");
891 * Don't taint if we are running SMP kernel on a single non-MP
894 if (tainted
& TAINT_UNSAFE_SMP
) {
896 printk (KERN_INFO
"WARNING: This combination of AMD processors is not suitable for SMP.\n");
898 tainted
&= ~TAINT_UNSAFE_SMP
;
901 Dprintk("Boot done.\n");
904 * construct cpu_sibling_map, so that we can tell sibling CPUs
907 for_each_possible_cpu(cpu
) {
908 cpus_clear(per_cpu(cpu_sibling_map
, cpu
));
909 cpus_clear(per_cpu(cpu_core_map
, cpu
));
912 cpu_set(0, per_cpu(cpu_sibling_map
, 0));
913 cpu_set(0, per_cpu(cpu_core_map
, 0));
915 smpboot_setup_io_apic();
920 /* These are wrappers to interface to the new boot process. Someone
921 who understands all this stuff should rewrite it properly. --RR 15/Jul/02 */
922 void __init
native_smp_prepare_cpus(unsigned int max_cpus
)
924 smp_commenced_mask
= cpumask_of_cpu(0);
925 cpu_callin_map
= cpumask_of_cpu(0);
927 smp_boot_cpus(max_cpus
);
930 void __init
native_smp_prepare_boot_cpu(void)
932 unsigned int cpu
= smp_processor_id();
937 cpu_set(cpu
, cpu_online_map
);
938 cpu_set(cpu
, cpu_callout_map
);
939 cpu_set(cpu
, cpu_present_map
);
940 cpu_set(cpu
, cpu_possible_map
);
941 __get_cpu_var(cpu_state
) = CPU_ONLINE
;
944 int __cpuinit
native_cpu_up(unsigned int cpu
)
947 #ifdef CONFIG_HOTPLUG_CPU
951 * We do warm boot only on cpus that had booted earlier
952 * Otherwise cold boot is all handled from smp_boot_cpus().
953 * cpu_callin_map is set during AP kickstart process. Its reset
954 * when a cpu is taken offline from cpu_exit_clear().
956 if (!cpu_isset(cpu
, cpu_callin_map
))
957 ret
= __smp_prepare_cpu(cpu
);
963 /* In case one didn't come up */
964 if (!cpu_isset(cpu
, cpu_callin_map
)) {
965 printk(KERN_DEBUG
"skipping cpu%d, didn't come online\n", cpu
);
969 per_cpu(cpu_state
, cpu
) = CPU_UP_PREPARE
;
970 /* Unleash the CPU! */
971 cpu_set(cpu
, smp_commenced_mask
);
974 * Check TSC synchronization with the AP (keep irqs disabled
977 local_irq_save(flags
);
978 check_tsc_sync_source(cpu
);
979 local_irq_restore(flags
);
981 while (!cpu_isset(cpu
, cpu_online_map
)) {
983 touch_nmi_watchdog();
989 void __init
native_smp_cpus_done(unsigned int max_cpus
)
991 #ifdef CONFIG_X86_IO_APIC
997 void __init
smp_intr_init(void)
1000 * IRQ0 must be given a fixed assignment and initialized,
1001 * because it's used before the IO-APIC is set up.
1003 set_intr_gate(FIRST_DEVICE_VECTOR
, interrupt
[0]);
1006 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
1007 * IPI, driven by wakeup.
1009 set_intr_gate(RESCHEDULE_VECTOR
, reschedule_interrupt
);
1011 /* IPI for invalidation */
1012 set_intr_gate(INVALIDATE_TLB_VECTOR
, invalidate_interrupt
);
1014 /* IPI for generic function call */
1015 set_intr_gate(CALL_FUNCTION_VECTOR
, call_function_interrupt
);