1 #ifndef __ASM_NUMAQ_APIC_H
2 #define __ASM_NUMAQ_APIC_H
5 #include <linux/mmzone.h>
6 #include <linux/nodemask.h>
8 #define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
10 static inline cpumask_t
target_cpus(void)
15 #define TARGET_CPUS (target_cpus())
17 #define NO_BALANCE_IRQ (1)
18 #define esr_disable (1)
20 #define INT_DELIVERY_MODE dest_LowestPrio
21 #define INT_DEST_MODE 0 /* physical delivery on LOCAL quad */
23 static inline unsigned long check_apicid_used(physid_mask_t bitmap
, int apicid
)
25 return physid_isset(apicid
, bitmap
);
27 static inline unsigned long check_apicid_present(int bit
)
29 return physid_isset(bit
, phys_cpu_present_map
);
31 #define apicid_cluster(apicid) (apicid & 0xF0)
33 static inline int apic_id_registered(void)
38 static inline void init_apic_ldr(void)
40 /* Already done in NUMA-Q firmware */
43 static inline void setup_apic_routing(void)
45 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
46 "NUMA-Q", nr_ioapics
);
50 * Skip adding the timer int on secondary nodes, which causes
51 * a small but painful rift in the time-space continuum.
53 static inline int multi_timer_check(int apic
, int irq
)
55 return apic
!= 0 && irq
== 0;
58 static inline physid_mask_t
ioapic_phys_id_map(physid_mask_t phys_map
)
60 /* We don't have a good way to do this yet - hack */
61 return physids_promote(0xFUL
);
64 /* Mapping from cpu number to logical apicid */
65 extern u8 cpu_2_logical_apicid
[];
66 static inline int cpu_to_logical_apicid(int cpu
)
70 return (int)cpu_2_logical_apicid
[cpu
];
74 * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
75 * cpu to APIC ID relation to properly interact with the intelligent
76 * mode of the cluster controller.
78 static inline int cpu_present_to_apicid(int mps_cpu
)
81 return ((mps_cpu
>> 2) << 4) | (1 << (mps_cpu
& 0x3));
86 static inline int apicid_to_node(int logical_apicid
)
88 return logical_apicid
>> 4;
91 static inline physid_mask_t
apicid_to_cpu_present(int logical_apicid
)
93 int node
= apicid_to_node(logical_apicid
);
94 int cpu
= __ffs(logical_apicid
& 0xf);
96 return physid_mask_of_physid(cpu
+ 4*node
);
99 extern void *xquad_portio
;
101 static inline void setup_portio_remap(void)
103 int num_quads
= num_online_nodes();
108 printk("Remapping cross-quad port I/O for %d quads\n", num_quads
);
109 xquad_portio
= ioremap(XQUAD_PORTIO_BASE
, num_quads
*XQUAD_PORTIO_QUAD
);
110 printk("xquad_portio vaddr 0x%08lx, len %08lx\n",
111 (u_long
) xquad_portio
, (u_long
) num_quads
*XQUAD_PORTIO_QUAD
);
114 static inline int check_phys_apicid_present(int boot_cpu_physical_apicid
)
119 static inline void enable_apic_mode(void)
124 * We use physical apicids here, not logical, so just return the default
125 * physical broadcast to stop people from breaking us
127 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask
)
132 /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
133 static inline u32
phys_pkg_id(u32 cpuid_apic
, int index_msb
)
135 return cpuid_apic
>> index_msb
;
138 #endif /* __ASM_NUMAQ_APIC_H */