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nsc-ircc: default to dongle type 9 on IBM hardware
[linux-2.6/linux-acpi-2.6.git] / drivers / media / video / tvaudio.c
blob463680b13289c6515d658225b8711f6e39c26caf
1 /*
2 * experimental driver for simple i2c audio chips.
3 *
4 * Copyright (c) 2000 Gerd Knorr
5 * based on code by:
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
9 *
10 * This code is placed under the terms of the GNU General Public License
11 *
12 * OPTIONS:
13 * debug - set to 1 if you'd like to see debug messages
14 *
15 */
16
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/string.h>
21 #include <linux/timer.h>
22 #include <linux/delay.h>
23 #include <linux/errno.h>
24 #include <linux/slab.h>
25 #include <linux/videodev.h>
26 #include <linux/i2c.h>
27 #include <linux/init.h>
28 #include <linux/kthread.h>
29 #include <linux/freezer.h>
30
31 #include <media/tvaudio.h>
32 #include <media/v4l2-common.h>
33 #include <media/v4l2-chip-ident.h>
34 #include <media/v4l2-i2c-drv-legacy.h>
35
36 #include <media/i2c-addr.h>
37
38 /* ---------------------------------------------------------------------- */
39 /* insmod args */
40
41 static int debug; /* insmod parameter */
42 module_param(debug, int, 0644);
43
44 MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
45 MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
46 MODULE_LICENSE("GPL");
47
48 #define UNSET (-1U)
49
50 /* ---------------------------------------------------------------------- */
51 /* our structs */
52
53 #define MAXREGS 64
54
55 struct CHIPSTATE;
56 typedef int (*getvalue)(int);
57 typedef int (*checkit)(struct CHIPSTATE*);
58 typedef int (*initialize)(struct CHIPSTATE*);
59 typedef int (*getmode)(struct CHIPSTATE*);
60 typedef void (*setmode)(struct CHIPSTATE*, int mode);
61 typedef void (*checkmode)(struct CHIPSTATE*);
62
63 /* i2c command */
64 typedef struct AUDIOCMD {
65 int count; /* # of bytes to send */
66 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
67 } audiocmd;
68
69 /* chip description */
70 struct CHIPDESC {
71 char *name; /* chip name */
72 int addr_lo, addr_hi; /* i2c address range */
73 int registers; /* # of registers */
74
75 int *insmodopt;
76 checkit checkit;
77 initialize initialize;
78 int flags;
79 #define CHIP_HAS_VOLUME 1
80 #define CHIP_HAS_BASSTREBLE 2
81 #define CHIP_HAS_INPUTSEL 4
82
83 /* various i2c command sequences */
84 audiocmd init;
85
86 /* which register has which value */
87 int leftreg,rightreg,treblereg,bassreg;
88
89 /* initialize with (defaults to 65535/65535/32768/32768 */
90 int leftinit,rightinit,trebleinit,bassinit;
91
92 /* functions to convert the values (v4l -> chip) */
93 getvalue volfunc,treblefunc,bassfunc;
94
95 /* get/set mode */
96 getmode getmode;
97 setmode setmode;
98
99 /* check / autoswitch audio after channel switches */
100 checkmode checkmode;
101
102 /* input switch register + values for v4l inputs */
103 int inputreg;
104 int inputmap[4];
105 int inputmute;
106 int inputmask;
107 };
108 static struct CHIPDESC chiplist[];
109
110 /* current state of the chip */
111 struct CHIPSTATE {
112 struct i2c_client *c;
113
114 /* index into CHIPDESC array */
115 int type;
116
117 /* shadow register set */
118 audiocmd shadow;
119
120 /* current settings */
121 __u16 left,right,treble,bass,muted,mode;
122 int prevmode;
123 int radio;
124 int input;
125
126 /* thread */
127 struct task_struct *thread;
128 struct timer_list wt;
129 int watch_stereo;
130 int audmode;
131 };
132
133 /* ---------------------------------------------------------------------- */
134 /* i2c addresses */
135
136 static unsigned short normal_i2c[] = {
137 I2C_ADDR_TDA8425 >> 1,
138 I2C_ADDR_TEA6300 >> 1,
139 I2C_ADDR_TEA6420 >> 1,
140 I2C_ADDR_TDA9840 >> 1,
141 I2C_ADDR_TDA985x_L >> 1,
142 I2C_ADDR_TDA985x_H >> 1,
143 I2C_ADDR_TDA9874 >> 1,
144 I2C_ADDR_PIC16C54 >> 1,
145 I2C_CLIENT_END };
146 I2C_CLIENT_INSMOD;
147
148 /* ---------------------------------------------------------------------- */
149 /* i2c I/O functions */
150
151 static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
152 {
153 unsigned char buffer[2];
154
155 if (-1 == subaddr) {
156 v4l_dbg(1, debug, chip->c, "%s: chip_write: 0x%x\n",
157 chip->c->name, val);
158 chip->shadow.bytes[1] = val;
159 buffer[0] = val;
160 if (1 != i2c_master_send(chip->c,buffer,1)) {
161 v4l_warn(chip->c, "%s: I/O error (write 0x%x)\n",
162 chip->c->name, val);
163 return -1;
164 }
165 } else {
166 v4l_dbg(1, debug, chip->c, "%s: chip_write: reg%d=0x%x\n",
167 chip->c->name, subaddr, val);
168 chip->shadow.bytes[subaddr+1] = val;
169 buffer[0] = subaddr;
170 buffer[1] = val;
171 if (2 != i2c_master_send(chip->c,buffer,2)) {
172 v4l_warn(chip->c, "%s: I/O error (write reg%d=0x%x)\n",
173 chip->c->name, subaddr, val);
174 return -1;
175 }
176 }
177 return 0;
178 }
179
180 static int chip_write_masked(struct CHIPSTATE *chip, int subaddr, int val, int mask)
181 {
182 if (mask != 0) {
183 if (-1 == subaddr) {
184 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
185 } else {
186 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
187 }
188 }
189 return chip_write(chip, subaddr, val);
190 }
191
192 static int chip_read(struct CHIPSTATE *chip)
193 {
194 unsigned char buffer;
195
196 if (1 != i2c_master_recv(chip->c,&buffer,1)) {
197 v4l_warn(chip->c, "%s: I/O error (read)\n",
198 chip->c->name);
199 return -1;
200 }
201 v4l_dbg(1, debug, chip->c, "%s: chip_read: 0x%x\n",chip->c->name, buffer);
202 return buffer;
203 }
204
205 static int chip_read2(struct CHIPSTATE *chip, int subaddr)
206 {
207 unsigned char write[1];
208 unsigned char read[1];
209 struct i2c_msg msgs[2] = {
210 { chip->c->addr, 0, 1, write },
211 { chip->c->addr, I2C_M_RD, 1, read }
212 };
213 write[0] = subaddr;
214
215 if (2 != i2c_transfer(chip->c->adapter,msgs,2)) {
216 v4l_warn(chip->c, "%s: I/O error (read2)\n", chip->c->name);
217 return -1;
218 }
219 v4l_dbg(1, debug, chip->c, "%s: chip_read2: reg%d=0x%x\n",
220 chip->c->name, subaddr,read[0]);
221 return read[0];
222 }
223
224 static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
225 {
226 int i;
227
228 if (0 == cmd->count)
229 return 0;
230
231 /* update our shadow register set; print bytes if (debug > 0) */
232 v4l_dbg(1, debug, chip->c, "%s: chip_cmd(%s): reg=%d, data:",
233 chip->c->name, name,cmd->bytes[0]);
234 for (i = 1; i < cmd->count; i++) {
235 if (debug)
236 printk(" 0x%x",cmd->bytes[i]);
237 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
238 }
239 if (debug)
240 printk("\n");
241
242 /* send data to the chip */
243 if (cmd->count != i2c_master_send(chip->c,cmd->bytes,cmd->count)) {
244 v4l_warn(chip->c, "%s: I/O error (%s)\n", chip->c->name, name);
245 return -1;
246 }
247 return 0;
248 }
249
250 /* ---------------------------------------------------------------------- */
251 /* kernel thread for doing i2c stuff asyncronly
252 * right now it is used only to check the audio mode (mono/stereo/whatever)
253 * some time after switching to another TV channel, then turn on stereo
254 * if available, ...
255 */
256
257 static void chip_thread_wake(unsigned long data)
258 {
259 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
260 wake_up_process(chip->thread);
261 }
262
263 static int chip_thread(void *data)
264 {
265 struct CHIPSTATE *chip = data;
266 struct CHIPDESC *desc = chiplist + chip->type;
267
268 v4l_dbg(1, debug, chip->c, "%s: thread started\n", chip->c->name);
269 set_freezable();
270 for (;;) {
271 set_current_state(TASK_INTERRUPTIBLE);
272 if (!kthread_should_stop())
273 schedule();
274 set_current_state(TASK_RUNNING);
275 try_to_freeze();
276 if (kthread_should_stop())
277 break;
278 v4l_dbg(1, debug, chip->c, "%s: thread wakeup\n", chip->c->name);
279
280 /* don't do anything for radio or if mode != auto */
281 if (chip->radio || chip->mode != 0)
282 continue;
283
284 /* have a look what's going on */
285 desc->checkmode(chip);
286
287 /* schedule next check */
288 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
289 }
290
291 v4l_dbg(1, debug, chip->c, "%s: thread exiting\n", chip->c->name);
292 return 0;
293 }
294
295 static void generic_checkmode(struct CHIPSTATE *chip)
296 {
297 struct CHIPDESC *desc = chiplist + chip->type;
298 int mode = desc->getmode(chip);
299
300 if (mode == chip->prevmode)
301 return;
302
303 v4l_dbg(1, debug, chip->c, "%s: thread checkmode\n", chip->c->name);
304 chip->prevmode = mode;
305
306 if (mode & V4L2_TUNER_MODE_STEREO)
307 desc->setmode(chip,V4L2_TUNER_MODE_STEREO);
308 if (mode & V4L2_TUNER_MODE_LANG1_LANG2)
309 desc->setmode(chip,V4L2_TUNER_MODE_STEREO);
310 else if (mode & V4L2_TUNER_MODE_LANG1)
311 desc->setmode(chip,V4L2_TUNER_MODE_LANG1);
312 else if (mode & V4L2_TUNER_MODE_LANG2)
313 desc->setmode(chip,V4L2_TUNER_MODE_LANG2);
314 else
315 desc->setmode(chip,V4L2_TUNER_MODE_MONO);
316 }
317
318 /* ---------------------------------------------------------------------- */
319 /* audio chip descriptions - defines+functions for tda9840 */
320
321 #define TDA9840_SW 0x00
322 #define TDA9840_LVADJ 0x02
323 #define TDA9840_STADJ 0x03
324 #define TDA9840_TEST 0x04
325
326 #define TDA9840_MONO 0x10
327 #define TDA9840_STEREO 0x2a
328 #define TDA9840_DUALA 0x12
329 #define TDA9840_DUALB 0x1e
330 #define TDA9840_DUALAB 0x1a
331 #define TDA9840_DUALBA 0x16
332 #define TDA9840_EXTERNAL 0x7a
333
334 #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
335 #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
336 #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
337
338 #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
339 #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
340
341 static int tda9840_getmode(struct CHIPSTATE *chip)
342 {
343 int val, mode;
344
345 val = chip_read(chip);
346 mode = V4L2_TUNER_MODE_MONO;
347 if (val & TDA9840_DS_DUAL)
348 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
349 if (val & TDA9840_ST_STEREO)
350 mode |= V4L2_TUNER_MODE_STEREO;
351
352 v4l_dbg(1, debug, chip->c, "tda9840_getmode(): raw chip read: %d, return: %d\n",
353 val, mode);
354 return mode;
355 }
356
357 static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
358 {
359 int update = 1;
360 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
361
362 switch (mode) {
363 case V4L2_TUNER_MODE_MONO:
364 t |= TDA9840_MONO;
365 break;
366 case V4L2_TUNER_MODE_STEREO:
367 t |= TDA9840_STEREO;
368 break;
369 case V4L2_TUNER_MODE_LANG1:
370 t |= TDA9840_DUALA;
371 break;
372 case V4L2_TUNER_MODE_LANG2:
373 t |= TDA9840_DUALB;
374 break;
375 default:
376 update = 0;
377 }
378
379 if (update)
380 chip_write(chip, TDA9840_SW, t);
381 }
382
383 static int tda9840_checkit(struct CHIPSTATE *chip)
384 {
385 int rc;
386 rc = chip_read(chip);
387 /* lower 5 bits should be 0 */
388 return ((rc & 0x1f) == 0) ? 1 : 0;
389 }
390
391 /* ---------------------------------------------------------------------- */
392 /* audio chip descriptions - defines+functions for tda985x */
393
394 /* subaddresses for TDA9855 */
395 #define TDA9855_VR 0x00 /* Volume, right */
396 #define TDA9855_VL 0x01 /* Volume, left */
397 #define TDA9855_BA 0x02 /* Bass */
398 #define TDA9855_TR 0x03 /* Treble */
399 #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
400
401 /* subaddresses for TDA9850 */
402 #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
403
404 /* subaddesses for both chips */
405 #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
406 #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
407 #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
408 #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
409 #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
410 #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
411
412 /* Masks for bits in TDA9855 subaddresses */
413 /* 0x00 - VR in TDA9855 */
414 /* 0x01 - VL in TDA9855 */
415 /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
416 * in 1dB steps - mute is 0x27 */
417
418
419 /* 0x02 - BA in TDA9855 */
420 /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
421 * in .5dB steps - 0 is 0x0E */
422
423
424 /* 0x03 - TR in TDA9855 */
425 /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
426 * in 3dB steps - 0 is 0x7 */
427
428 /* Masks for bits in both chips' subaddresses */
429 /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
430 /* Unique to TDA9855: */
431 /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
432 * in 3dB steps - mute is 0x0 */
433
434 /* Unique to TDA9850: */
435 /* lower 4 bits control stereo noise threshold, over which stereo turns off
436 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
437
438
439 /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
440 /* Unique to TDA9855: */
441 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
442 #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
443 #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
444 #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
445 /* Bits 0 to 3 select various combinations
446 * of line in and line out, only the
447 * interesting ones are defined */
448 #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
449 #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
450
451 /* Unique to TDA9850: */
452 /* lower 4 bits contol SAP noise threshold, over which SAP turns off
453 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
454
455
456 /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
457 /* Common to TDA9855 and TDA9850: */
458 #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
459 #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
460 #define TDA985x_MONO 0 /* Forces Mono output */
461 #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
462
463 /* Unique to TDA9855: */
464 #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
465 #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
466 #define TDA9855_LINEAR 0 /* Linear Stereo */
467 #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
468 #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
469 #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
470 #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
471
472 /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
473 /* Common to both TDA9855 and TDA9850: */
474 /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
475 * in .5dB steps - 0dB is 0x7 */
476
477 /* 0x08, 0x09 - A1 and A2 (read/write) */
478 /* Common to both TDA9855 and TDA9850: */
479 /* lower 5 bites are wideband and spectral expander alignment
480 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
481 #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
482 #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
483 #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
484
485 /* 0x0a - A3 */
486 /* Common to both TDA9855 and TDA9850: */
487 /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
488 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
489 #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
490
491 static int tda9855_volume(int val) { return val/0x2e8+0x27; }
492 static int tda9855_bass(int val) { return val/0xccc+0x06; }
493 static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
494
495 static int tda985x_getmode(struct CHIPSTATE *chip)
496 {
497 int mode;
498
499 mode = ((TDA985x_STP | TDA985x_SAPP) &
500 chip_read(chip)) >> 4;
501 /* Add mono mode regardless of SAP and stereo */
502 /* Allows forced mono */
503 return mode | V4L2_TUNER_MODE_MONO;
504 }
505
506 static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
507 {
508 int update = 1;
509 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
510
511 switch (mode) {
512 case V4L2_TUNER_MODE_MONO:
513 c6 |= TDA985x_MONO;
514 break;
515 case V4L2_TUNER_MODE_STEREO:
516 c6 |= TDA985x_STEREO;
517 break;
518 case V4L2_TUNER_MODE_LANG1:
519 c6 |= TDA985x_SAP;
520 break;
521 default:
522 update = 0;
523 }
524 if (update)
525 chip_write(chip,TDA985x_C6,c6);
526 }
527
528
529 /* ---------------------------------------------------------------------- */
530 /* audio chip descriptions - defines+functions for tda9873h */
531
532 /* Subaddresses for TDA9873H */
533
534 #define TDA9873_SW 0x00 /* Switching */
535 #define TDA9873_AD 0x01 /* Adjust */
536 #define TDA9873_PT 0x02 /* Port */
537
538 /* Subaddress 0x00: Switching Data
539 * B7..B0:
540 *
541 * B1, B0: Input source selection
542 * 0, 0 internal
543 * 1, 0 external stereo
544 * 0, 1 external mono
545 */
546 #define TDA9873_INP_MASK 3
547 #define TDA9873_INTERNAL 0
548 #define TDA9873_EXT_STEREO 2
549 #define TDA9873_EXT_MONO 1
550
551 /* B3, B2: output signal select
552 * B4 : transmission mode
553 * 0, 0, 1 Mono
554 * 1, 0, 0 Stereo
555 * 1, 1, 1 Stereo (reversed channel)
556 * 0, 0, 0 Dual AB
557 * 0, 0, 1 Dual AA
558 * 0, 1, 0 Dual BB
559 * 0, 1, 1 Dual BA
560 */
561
562 #define TDA9873_TR_MASK (7 << 2)
563 #define TDA9873_TR_MONO 4
564 #define TDA9873_TR_STEREO 1 << 4
565 #define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
566 #define TDA9873_TR_DUALA 1 << 2
567 #define TDA9873_TR_DUALB 1 << 3
568
569 /* output level controls
570 * B5: output level switch (0 = reduced gain, 1 = normal gain)
571 * B6: mute (1 = muted)
572 * B7: auto-mute (1 = auto-mute enabled)
573 */
574
575 #define TDA9873_GAIN_NORMAL 1 << 5
576 #define TDA9873_MUTE 1 << 6
577 #define TDA9873_AUTOMUTE 1 << 7
578
579 /* Subaddress 0x01: Adjust/standard */
580
581 /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
582 * Recommended value is +0 dB
583 */
584
585 #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
586
587 /* Bits C6..C4 control FM stantard
588 * C6, C5, C4
589 * 0, 0, 0 B/G (PAL FM)
590 * 0, 0, 1 M
591 * 0, 1, 0 D/K(1)
592 * 0, 1, 1 D/K(2)
593 * 1, 0, 0 D/K(3)
594 * 1, 0, 1 I
595 */
596 #define TDA9873_BG 0
597 #define TDA9873_M 1
598 #define TDA9873_DK1 2
599 #define TDA9873_DK2 3
600 #define TDA9873_DK3 4
601 #define TDA9873_I 5
602
603 /* C7 controls identification response time (1=fast/0=normal)
604 */
605 #define TDA9873_IDR_NORM 0
606 #define TDA9873_IDR_FAST 1 << 7
607
608
609 /* Subaddress 0x02: Port data */
610
611 /* E1, E0 free programmable ports P1/P2
612 0, 0 both ports low
613 0, 1 P1 high
614 1, 0 P2 high
615 1, 1 both ports high
616 */
617
618 #define TDA9873_PORTS 3
619
620 /* E2: test port */
621 #define TDA9873_TST_PORT 1 << 2
622
623 /* E5..E3 control mono output channel (together with transmission mode bit B4)
624 *
625 * E5 E4 E3 B4 OUTM
626 * 0 0 0 0 mono
627 * 0 0 1 0 DUAL B
628 * 0 1 0 1 mono (from stereo decoder)
629 */
630 #define TDA9873_MOUT_MONO 0
631 #define TDA9873_MOUT_FMONO 0
632 #define TDA9873_MOUT_DUALA 0
633 #define TDA9873_MOUT_DUALB 1 << 3
634 #define TDA9873_MOUT_ST 1 << 4
635 #define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
636 #define TDA9873_MOUT_EXTL 1 << 5
637 #define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
638 #define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
639 #define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
640
641 /* Status bits: (chip read) */
642 #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
643 #define TDA9873_STEREO 2 /* Stereo sound is identified */
644 #define TDA9873_DUAL 4 /* Dual sound is identified */
645
646 static int tda9873_getmode(struct CHIPSTATE *chip)
647 {
648 int val,mode;
649
650 val = chip_read(chip);
651 mode = V4L2_TUNER_MODE_MONO;
652 if (val & TDA9873_STEREO)
653 mode |= V4L2_TUNER_MODE_STEREO;
654 if (val & TDA9873_DUAL)
655 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
656 v4l_dbg(1, debug, chip->c, "tda9873_getmode(): raw chip read: %d, return: %d\n",
657 val, mode);
658 return mode;
659 }
660
661 static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
662 {
663 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
664 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
665
666 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
667 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): external input\n");
668 return;
669 }
670
671 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
672 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): sw_data = %d\n", sw_data);
673
674 switch (mode) {
675 case V4L2_TUNER_MODE_MONO:
676 sw_data |= TDA9873_TR_MONO;
677 break;
678 case V4L2_TUNER_MODE_STEREO:
679 sw_data |= TDA9873_TR_STEREO;
680 break;
681 case V4L2_TUNER_MODE_LANG1:
682 sw_data |= TDA9873_TR_DUALA;
683 break;
684 case V4L2_TUNER_MODE_LANG2:
685 sw_data |= TDA9873_TR_DUALB;
686 break;
687 default:
688 chip->mode = 0;
689 return;
690 }
691
692 chip_write(chip, TDA9873_SW, sw_data);
693 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
694 mode, sw_data);
695 }
696
697 static int tda9873_checkit(struct CHIPSTATE *chip)
698 {
699 int rc;
700
701 if (-1 == (rc = chip_read2(chip,254)))
702 return 0;
703 return (rc & ~0x1f) == 0x80;
704 }
705
706
707 /* ---------------------------------------------------------------------- */
708 /* audio chip description - defines+functions for tda9874h and tda9874a */
709 /* Dariusz Kowalewski <darekk@automex.pl> */
710
711 /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
712 #define TDA9874A_AGCGR 0x00 /* AGC gain */
713 #define TDA9874A_GCONR 0x01 /* general config */
714 #define TDA9874A_MSR 0x02 /* monitor select */
715 #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
716 #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
717 #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
718 #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
719 #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
720 #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
721 #define TDA9874A_DCR 0x09 /* demodulator config */
722 #define TDA9874A_FMER 0x0a /* FM de-emphasis */
723 #define TDA9874A_FMMR 0x0b /* FM dematrix */
724 #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
725 #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
726 #define TDA9874A_NCONR 0x0e /* NICAM config */
727 #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
728 #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
729 #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
730 #define TDA9874A_AMCONR 0x12 /* audio mute control */
731 #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
732 #define TDA9874A_AOSR 0x14 /* analog output select */
733 #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
734 #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
735 #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
736 #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
737 #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
738
739 /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
740 #define TDA9874A_DSR 0x00 /* device status */
741 #define TDA9874A_NSR 0x01 /* NICAM status */
742 #define TDA9874A_NECR 0x02 /* NICAM error count */
743 #define TDA9874A_DR1 0x03 /* add. data LSB */
744 #define TDA9874A_DR2 0x04 /* add. data MSB */
745 #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
746 #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
747 #define TDA9874A_SIFLR 0x07 /* SIF level */
748 #define TDA9874A_TR2 252 /* test reg. 2 */
749 #define TDA9874A_TR1 253 /* test reg. 1 */
750 #define TDA9874A_DIC 254 /* device id. code */
751 #define TDA9874A_SIC 255 /* software id. code */
752
753
754 static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
755 static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
756 static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
757 static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
758 static int tda9874a_dic = -1; /* device id. code */
759
760 /* insmod options for tda9874a */
761 static unsigned int tda9874a_SIF = UNSET;
762 static unsigned int tda9874a_AMSEL = UNSET;
763 static unsigned int tda9874a_STD = UNSET;
764 module_param(tda9874a_SIF, int, 0444);
765 module_param(tda9874a_AMSEL, int, 0444);
766 module_param(tda9874a_STD, int, 0444);
767
768 /*
769 * initialization table for tda9874 decoder:
770 * - carrier 1 freq. registers (3 bytes)
771 * - carrier 2 freq. registers (3 bytes)
772 * - demudulator config register
773 * - FM de-emphasis register (slow identification mode)
774 * Note: frequency registers must be written in single i2c transfer.
775 */
776 static struct tda9874a_MODES {
777 char *name;
778 audiocmd cmd;
779 } tda9874a_modelist[9] = {
780 { "A2, B/G",
781 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
782 { "A2, M (Korea)",
783 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
784 { "A2, D/K (1)",
785 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
786 { "A2, D/K (2)",
787 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
788 { "A2, D/K (3)",
789 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
790 { "NICAM, I",
791 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
792 { "NICAM, B/G",
793 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
794 { "NICAM, D/K", /* default */
795 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
796 { "NICAM, L",
797 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
798 };
799
800 static int tda9874a_setup(struct CHIPSTATE *chip)
801 {
802 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
803 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
804 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
805 if(tda9874a_dic == 0x11) {
806 chip_write(chip, TDA9874A_FMMR, 0x80);
807 } else { /* dic == 0x07 */
808 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
809 chip_write(chip, TDA9874A_FMMR, 0x00);
810 }
811 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
812 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
813 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
814 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
815 /* Note: If signal quality is poor you may want to change NICAM */
816 /* error limit registers (NLELR and NUELR) to some greater values. */
817 /* Then the sound would remain stereo, but won't be so clear. */
818 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
819 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
820
821 if(tda9874a_dic == 0x11) {
822 chip_write(chip, TDA9874A_AMCONR, 0xf9);
823 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
824 chip_write(chip, TDA9874A_AOSR, 0x80);
825 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
826 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
827 } else { /* dic == 0x07 */
828 chip_write(chip, TDA9874A_AMCONR, 0xfb);
829 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
830 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
831 }
832 v4l_dbg(1, debug, chip->c, "tda9874a_setup(): %s [0x%02X].\n",
833 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
834 return 1;
835 }
836
837 static int tda9874a_getmode(struct CHIPSTATE *chip)
838 {
839 int dsr,nsr,mode;
840 int necr; /* just for debugging */
841
842 mode = V4L2_TUNER_MODE_MONO;
843
844 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
845 return mode;
846 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
847 return mode;
848 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
849 return mode;
850
851 /* need to store dsr/nsr somewhere */
852 chip->shadow.bytes[MAXREGS-2] = dsr;
853 chip->shadow.bytes[MAXREGS-1] = nsr;
854
855 if(tda9874a_mode) {
856 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
857 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
858 * that sound has (temporarily) switched from NICAM to
859 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
860 * error count. So in fact there is no stereo in this case :-(
861 * But changing the mode to V4L2_TUNER_MODE_MONO would switch
862 * external 4052 multiplexer in audio_hook().
863 */
864 if(nsr & 0x02) /* NSR.S/MB=1 */
865 mode |= V4L2_TUNER_MODE_STEREO;
866 if(nsr & 0x01) /* NSR.D/SB=1 */
867 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
868 } else {
869 if(dsr & 0x02) /* DSR.IDSTE=1 */
870 mode |= V4L2_TUNER_MODE_STEREO;
871 if(dsr & 0x04) /* DSR.IDDUA=1 */
872 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
873 }
874
875 v4l_dbg(1, debug, chip->c, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
876 dsr, nsr, necr, mode);
877 return mode;
878 }
879
880 static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
881 {
882 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
883 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
884 if(tda9874a_mode) {
885 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
886 tda9874a_NCONR &= 0xfe; /* enable */
887 else
888 tda9874a_NCONR |= 0x01; /* disable */
889 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
890 }
891
892 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
893 * and has auto-select function for audio output (AOSR register).
894 * Old TDA9874H doesn't support these features.
895 * TDA9874A also has additional mono output pin (OUTM), which
896 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
897 */
898 if(tda9874a_dic == 0x11) {
899 int aosr = 0x80;
900 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
901
902 switch(mode) {
903 case V4L2_TUNER_MODE_MONO:
904 case V4L2_TUNER_MODE_STEREO:
905 break;
906 case V4L2_TUNER_MODE_LANG1:
907 aosr = 0x80; /* auto-select, dual A/A */
908 mdacosr = (tda9874a_mode) ? 0x82:0x80;
909 break;
910 case V4L2_TUNER_MODE_LANG2:
911 aosr = 0xa0; /* auto-select, dual B/B */
912 mdacosr = (tda9874a_mode) ? 0x83:0x81;
913 break;
914 default:
915 chip->mode = 0;
916 return;
917 }
918 chip_write(chip, TDA9874A_AOSR, aosr);
919 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
920
921 v4l_dbg(1, debug, chip->c, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
922 mode, aosr, mdacosr);
923
924 } else { /* dic == 0x07 */
925 int fmmr,aosr;
926
927 switch(mode) {
928 case V4L2_TUNER_MODE_MONO:
929 fmmr = 0x00; /* mono */
930 aosr = 0x10; /* A/A */
931 break;
932 case V4L2_TUNER_MODE_STEREO:
933 if(tda9874a_mode) {
934 fmmr = 0x00;
935 aosr = 0x00; /* handled by NICAM auto-mute */
936 } else {
937 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
938 aosr = 0x00;
939 }
940 break;
941 case V4L2_TUNER_MODE_LANG1:
942 fmmr = 0x02; /* dual */
943 aosr = 0x10; /* dual A/A */
944 break;
945 case V4L2_TUNER_MODE_LANG2:
946 fmmr = 0x02; /* dual */
947 aosr = 0x20; /* dual B/B */
948 break;
949 default:
950 chip->mode = 0;
951 return;
952 }
953 chip_write(chip, TDA9874A_FMMR, fmmr);
954 chip_write(chip, TDA9874A_AOSR, aosr);
955
956 v4l_dbg(1, debug, chip->c, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
957 mode, fmmr, aosr);
958 }
959 }
960
961 static int tda9874a_checkit(struct CHIPSTATE *chip)
962 {
963 int dic,sic; /* device id. and software id. codes */
964
965 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
966 return 0;
967 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
968 return 0;
969
970 v4l_dbg(1, debug, chip->c, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
971
972 if((dic == 0x11)||(dic == 0x07)) {
973 v4l_info(chip->c, "found tda9874%s.\n", (dic == 0x11) ? "a":"h");
974 tda9874a_dic = dic; /* remember device id. */
975 return 1;
976 }
977 return 0; /* not found */
978 }
979
980 static int tda9874a_initialize(struct CHIPSTATE *chip)
981 {
982 if (tda9874a_SIF > 2)
983 tda9874a_SIF = 1;
984 if (tda9874a_STD > 8)
985 tda9874a_STD = 0;
986 if(tda9874a_AMSEL > 1)
987 tda9874a_AMSEL = 0;
988
989 if(tda9874a_SIF == 1)
990 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
991 else
992 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
993
994 tda9874a_ESP = tda9874a_STD;
995 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
996
997 if(tda9874a_AMSEL == 0)
998 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
999 else
1000 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1001
1002 tda9874a_setup(chip);
1003 return 0;
1004 }
1005
1006
1007 /* ---------------------------------------------------------------------- */
1008 /* audio chip descriptions - defines+functions for tea6420 */
1009
1010 #define TEA6300_VL 0x00 /* volume left */
1011 #define TEA6300_VR 0x01 /* volume right */
1012 #define TEA6300_BA 0x02 /* bass */
1013 #define TEA6300_TR 0x03 /* treble */
1014 #define TEA6300_FA 0x04 /* fader control */
1015 #define TEA6300_S 0x05 /* switch register */
1016 /* values for those registers: */
1017 #define TEA6300_S_SA 0x01 /* stereo A input */
1018 #define TEA6300_S_SB 0x02 /* stereo B */
1019 #define TEA6300_S_SC 0x04 /* stereo C */
1020 #define TEA6300_S_GMU 0x80 /* general mute */
1021
1022 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1023 #define TEA6320_FFR 0x01 /* fader front right (0-5) */
1024 #define TEA6320_FFL 0x02 /* fader front left (0-5) */
1025 #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1026 #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1027 #define TEA6320_BA 0x05 /* bass (0-4) */
1028 #define TEA6320_TR 0x06 /* treble (0-4) */
1029 #define TEA6320_S 0x07 /* switch register */
1030 /* values for those registers: */
1031 #define TEA6320_S_SA 0x07 /* stereo A input */
1032 #define TEA6320_S_SB 0x06 /* stereo B */
1033 #define TEA6320_S_SC 0x05 /* stereo C */
1034 #define TEA6320_S_SD 0x04 /* stereo D */
1035 #define TEA6320_S_GMU 0x80 /* general mute */
1036
1037 #define TEA6420_S_SA 0x00 /* stereo A input */
1038 #define TEA6420_S_SB 0x01 /* stereo B */
1039 #define TEA6420_S_SC 0x02 /* stereo C */
1040 #define TEA6420_S_SD 0x03 /* stereo D */
1041 #define TEA6420_S_SE 0x04 /* stereo E */
1042 #define TEA6420_S_GMU 0x05 /* general mute */
1043
1044 static int tea6300_shift10(int val) { return val >> 10; }
1045 static int tea6300_shift12(int val) { return val >> 12; }
1046
1047 /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1048 /* 0x0c mirror those immediately higher) */
1049 static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1050 static int tea6320_shift11(int val) { return val >> 11; }
1051 static int tea6320_initialize(struct CHIPSTATE * chip)
1052 {
1053 chip_write(chip, TEA6320_FFR, 0x3f);
1054 chip_write(chip, TEA6320_FFL, 0x3f);
1055 chip_write(chip, TEA6320_FRR, 0x3f);
1056 chip_write(chip, TEA6320_FRL, 0x3f);
1057
1058 return 0;
1059 }
1060
1061
1062 /* ---------------------------------------------------------------------- */
1063 /* audio chip descriptions - defines+functions for tda8425 */
1064
1065 #define TDA8425_VL 0x00 /* volume left */
1066 #define TDA8425_VR 0x01 /* volume right */
1067 #define TDA8425_BA 0x02 /* bass */
1068 #define TDA8425_TR 0x03 /* treble */
1069 #define TDA8425_S1 0x08 /* switch functions */
1070 /* values for those registers: */
1071 #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1072 #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1073 #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1074 #define TDA8425_S1_MU 0x20 /* mute bit */
1075 #define TDA8425_S1_STEREO 0x18 /* stereo bits */
1076 #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1077 #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1078 #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1079 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1080 #define TDA8425_S1_ML 0x06 /* language selector */
1081 #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1082 #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1083 #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1084 #define TDA8425_S1_IS 0x01 /* channel selector */
1085
1086
1087 static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1088 static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1089
1090 static int tda8425_initialize(struct CHIPSTATE *chip)
1091 {
1092 struct CHIPDESC *desc = chiplist + chip->type;
1093 int inputmap[4] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1094 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF};
1095
1096 if (chip->c->adapter->id == I2C_HW_B_RIVA) {
1097 memcpy (desc->inputmap, inputmap, sizeof (inputmap));
1098 }
1099 return 0;
1100 }
1101
1102 static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1103 {
1104 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1105
1106 if (mode & V4L2_TUNER_MODE_LANG1) {
1107 s1 |= TDA8425_S1_ML_SOUND_A;
1108 s1 |= TDA8425_S1_STEREO_PSEUDO;
1109
1110 } else if (mode & V4L2_TUNER_MODE_LANG2) {
1111 s1 |= TDA8425_S1_ML_SOUND_B;
1112 s1 |= TDA8425_S1_STEREO_PSEUDO;
1113
1114 } else {
1115 s1 |= TDA8425_S1_ML_STEREO;
1116
1117 if (mode & V4L2_TUNER_MODE_MONO)
1118 s1 |= TDA8425_S1_STEREO_MONO;
1119 if (mode & V4L2_TUNER_MODE_STEREO)
1120 s1 |= TDA8425_S1_STEREO_SPATIAL;
1121 }
1122 chip_write(chip,TDA8425_S1,s1);
1123 }
1124
1125
1126 /* ---------------------------------------------------------------------- */
1127 /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1128
1129 /* the registers of 16C54, I2C sub address. */
1130 #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1131 #define PIC16C54_REG_MISC 0x02
1132
1133 /* bit definition of the RESET register, I2C data. */
1134 #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
1135 /* code of remote controller */
1136 #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1137 #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1138 #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1139 #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1140 #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1141 #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1142 #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1143
1144 /* ---------------------------------------------------------------------- */
1145 /* audio chip descriptions - defines+functions for TA8874Z */
1146
1147 /* write 1st byte */
1148 #define TA8874Z_LED_STE 0x80
1149 #define TA8874Z_LED_BIL 0x40
1150 #define TA8874Z_LED_EXT 0x20
1151 #define TA8874Z_MONO_SET 0x10
1152 #define TA8874Z_MUTE 0x08
1153 #define TA8874Z_F_MONO 0x04
1154 #define TA8874Z_MODE_SUB 0x02
1155 #define TA8874Z_MODE_MAIN 0x01
1156
1157 /* write 2nd byte */
1158 /*#define TA8874Z_TI 0x80 */ /* test mode */
1159 #define TA8874Z_SEPARATION 0x3f
1160 #define TA8874Z_SEPARATION_DEFAULT 0x10
1161
1162 /* read */
1163 #define TA8874Z_B1 0x80
1164 #define TA8874Z_B0 0x40
1165 #define TA8874Z_CHAG_FLAG 0x20
1166
1167 /*
1168 * B1 B0
1169 * mono L H
1170 * stereo L L
1171 * BIL H L
1172 */
1173 static int ta8874z_getmode(struct CHIPSTATE *chip)
1174 {
1175 int val, mode;
1176
1177 val = chip_read(chip);
1178 mode = V4L2_TUNER_MODE_MONO;
1179 if (val & TA8874Z_B1){
1180 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1181 }else if (!(val & TA8874Z_B0)){
1182 mode |= V4L2_TUNER_MODE_STEREO;
1183 }
1184 /* v4l_dbg(1, debug, chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1185 return mode;
1186 }
1187
1188 static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1189 static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1190 static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1191 static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1192
1193 static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1194 {
1195 int update = 1;
1196 audiocmd *t = NULL;
1197 v4l_dbg(1, debug, chip->c, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1198
1199 switch(mode){
1200 case V4L2_TUNER_MODE_MONO:
1201 t = &ta8874z_mono;
1202 break;
1203 case V4L2_TUNER_MODE_STEREO:
1204 t = &ta8874z_stereo;
1205 break;
1206 case V4L2_TUNER_MODE_LANG1:
1207 t = &ta8874z_main;
1208 break;
1209 case V4L2_TUNER_MODE_LANG2:
1210 t = &ta8874z_sub;
1211 break;
1212 default:
1213 update = 0;
1214 }
1215
1216 if(update)
1217 chip_cmd(chip, "TA8874Z", t);
1218 }
1219
1220 static int ta8874z_checkit(struct CHIPSTATE *chip)
1221 {
1222 int rc;
1223 rc = chip_read(chip);
1224 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1225 }
1226
1227 /* ---------------------------------------------------------------------- */
1228 /* audio chip descriptions - struct CHIPDESC */
1229
1230 /* insmod options to enable/disable individual audio chips */
1231 static int tda8425 = 1;
1232 static int tda9840 = 1;
1233 static int tda9850 = 1;
1234 static int tda9855 = 1;
1235 static int tda9873 = 1;
1236 static int tda9874a = 1;
1237 static int tea6300; /* default 0 - address clash with msp34xx */
1238 static int tea6320; /* default 0 - address clash with msp34xx */
1239 static int tea6420 = 1;
1240 static int pic16c54 = 1;
1241 static int ta8874z; /* default 0 - address clash with tda9840 */
1242
1243 module_param(tda8425, int, 0444);
1244 module_param(tda9840, int, 0444);
1245 module_param(tda9850, int, 0444);
1246 module_param(tda9855, int, 0444);
1247 module_param(tda9873, int, 0444);
1248 module_param(tda9874a, int, 0444);
1249 module_param(tea6300, int, 0444);
1250 module_param(tea6320, int, 0444);
1251 module_param(tea6420, int, 0444);
1252 module_param(pic16c54, int, 0444);
1253 module_param(ta8874z, int, 0444);
1254
1255 static struct CHIPDESC chiplist[] = {
1256 {
1257 .name = "tda9840",
1258 .insmodopt = &tda9840,
1259 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1260 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1261 .registers = 5,
1262
1263 .checkit = tda9840_checkit,
1264 .getmode = tda9840_getmode,
1265 .setmode = tda9840_setmode,
1266 .checkmode = generic_checkmode,
1267
1268 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1269 /* ,TDA9840_SW, TDA9840_MONO */} }
1270 },
1271 {
1272 .name = "tda9873h",
1273 .checkit = tda9873_checkit,
1274 .insmodopt = &tda9873,
1275 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1276 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1277 .registers = 3,
1278 .flags = CHIP_HAS_INPUTSEL,
1279
1280 .getmode = tda9873_getmode,
1281 .setmode = tda9873_setmode,
1282 .checkmode = generic_checkmode,
1283
1284 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1285 .inputreg = TDA9873_SW,
1286 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1287 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1288 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1289
1290 },
1291 {
1292 .name = "tda9874h/a",
1293 .checkit = tda9874a_checkit,
1294 .initialize = tda9874a_initialize,
1295 .insmodopt = &tda9874a,
1296 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1297 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1298
1299 .getmode = tda9874a_getmode,
1300 .setmode = tda9874a_setmode,
1301 .checkmode = generic_checkmode,
1302 },
1303 {
1304 .name = "tda9850",
1305 .insmodopt = &tda9850,
1306 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1307 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1308 .registers = 11,
1309
1310 .getmode = tda985x_getmode,
1311 .setmode = tda985x_setmode,
1312
1313 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1314 },
1315 {
1316 .name = "tda9855",
1317 .insmodopt = &tda9855,
1318 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1319 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1320 .registers = 11,
1321 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1322
1323 .leftreg = TDA9855_VL,
1324 .rightreg = TDA9855_VR,
1325 .bassreg = TDA9855_BA,
1326 .treblereg = TDA9855_TR,
1327 .volfunc = tda9855_volume,
1328 .bassfunc = tda9855_bass,
1329 .treblefunc = tda9855_treble,
1330
1331 .getmode = tda985x_getmode,
1332 .setmode = tda985x_setmode,
1333
1334 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1335 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1336 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1337 0x07, 0x10, 0x10, 0x03 }}
1338 },
1339 {
1340 .name = "tea6300",
1341 .insmodopt = &tea6300,
1342 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1343 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1344 .registers = 6,
1345 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1346
1347 .leftreg = TEA6300_VR,
1348 .rightreg = TEA6300_VL,
1349 .bassreg = TEA6300_BA,
1350 .treblereg = TEA6300_TR,
1351 .volfunc = tea6300_shift10,
1352 .bassfunc = tea6300_shift12,
1353 .treblefunc = tea6300_shift12,
1354
1355 .inputreg = TEA6300_S,
1356 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1357 .inputmute = TEA6300_S_GMU,
1358 },
1359 {
1360 .name = "tea6320",
1361 .initialize = tea6320_initialize,
1362 .insmodopt = &tea6320,
1363 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1364 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1365 .registers = 8,
1366 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1367
1368 .leftreg = TEA6320_V,
1369 .rightreg = TEA6320_V,
1370 .bassreg = TEA6320_BA,
1371 .treblereg = TEA6320_TR,
1372 .volfunc = tea6320_volume,
1373 .bassfunc = tea6320_shift11,
1374 .treblefunc = tea6320_shift11,
1375
1376 .inputreg = TEA6320_S,
1377 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1378 .inputmute = TEA6300_S_GMU,
1379 },
1380 {
1381 .name = "tea6420",
1382 .insmodopt = &tea6420,
1383 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1384 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1385 .registers = 1,
1386 .flags = CHIP_HAS_INPUTSEL,
1387
1388 .inputreg = -1,
1389 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1390 .inputmute = TEA6300_S_GMU,
1391 },
1392 {
1393 .name = "tda8425",
1394 .insmodopt = &tda8425,
1395 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1396 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1397 .registers = 9,
1398 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1399
1400 .leftreg = TDA8425_VL,
1401 .rightreg = TDA8425_VR,
1402 .bassreg = TDA8425_BA,
1403 .treblereg = TDA8425_TR,
1404 .volfunc = tda8425_shift10,
1405 .bassfunc = tda8425_shift12,
1406 .treblefunc = tda8425_shift12,
1407
1408 .inputreg = TDA8425_S1,
1409 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1410 .inputmute = TDA8425_S1_OFF,
1411
1412 .setmode = tda8425_setmode,
1413 .initialize = tda8425_initialize,
1414 },
1415 {
1416 .name = "pic16c54 (PV951)",
1417 .insmodopt = &pic16c54,
1418 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1419 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1420 .registers = 2,
1421 .flags = CHIP_HAS_INPUTSEL,
1422
1423 .inputreg = PIC16C54_REG_MISC,
1424 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1425 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1426 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1427 PIC16C54_MISC_SND_MUTE},
1428 .inputmute = PIC16C54_MISC_SND_MUTE,
1429 },
1430 {
1431 .name = "ta8874z",
1432 .checkit = ta8874z_checkit,
1433 .insmodopt = &ta8874z,
1434 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1435 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1436 .registers = 2,
1437
1438 .getmode = ta8874z_getmode,
1439 .setmode = ta8874z_setmode,
1440 .checkmode = generic_checkmode,
1441
1442 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1443 },
1444 { .name = NULL } /* EOF */
1445 };
1446
1447
1448 /* ---------------------------------------------------------------------- */
1449 /* i2c registration */
1450
1451 static int chip_probe(struct i2c_client *client, const struct i2c_device_id *id)
1452 {
1453 struct CHIPSTATE *chip;
1454 struct CHIPDESC *desc;
1455
1456 if (debug) {
1457 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1458 printk(KERN_INFO "tvaudio: known chips: ");
1459 for (desc = chiplist; desc->name != NULL; desc++)
1460 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1461 printk("\n");
1462 }
1463
1464 chip = kzalloc(sizeof(*chip),GFP_KERNEL);
1465 if (!chip)
1466 return -ENOMEM;
1467 chip->c = client;
1468 i2c_set_clientdata(client, chip);
1469
1470 /* find description for the chip */
1471 v4l_dbg(1, debug, client, "chip found @ 0x%x\n", client->addr<<1);
1472 for (desc = chiplist; desc->name != NULL; desc++) {
1473 if (0 == *(desc->insmodopt))
1474 continue;
1475 if (client->addr < desc->addr_lo ||
1476 client->addr > desc->addr_hi)
1477 continue;
1478 if (desc->checkit && !desc->checkit(chip))
1479 continue;
1480 break;
1481 }
1482 if (desc->name == NULL) {
1483 v4l_dbg(1, debug, client, "no matching chip description found\n");
1484 return -EIO;
1485 }
1486 v4l_info(client, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
1487 if (desc->flags) {
1488 v4l_dbg(1, debug, client, "matches:%s%s%s.\n",
1489 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1490 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1491 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
1492 }
1493
1494 /* fill required data structures */
1495 if (!id)
1496 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
1497 chip->type = desc-chiplist;
1498 chip->shadow.count = desc->registers+1;
1499 chip->prevmode = -1;
1500 chip->audmode = V4L2_TUNER_MODE_LANG1;
1501
1502 /* initialization */
1503 if (desc->initialize != NULL)
1504 desc->initialize(chip);
1505 else
1506 chip_cmd(chip,"init",&desc->init);
1507
1508 if (desc->flags & CHIP_HAS_VOLUME) {
1509 chip->left = desc->leftinit ? desc->leftinit : 65535;
1510 chip->right = desc->rightinit ? desc->rightinit : 65535;
1511 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1512 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1513 }
1514 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1515 chip->treble = desc->trebleinit ? desc->trebleinit : 32768;
1516 chip->bass = desc->bassinit ? desc->bassinit : 32768;
1517 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1518 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1519 }
1520
1521 chip->thread = NULL;
1522 if (desc->checkmode) {
1523 /* start async thread */
1524 init_timer(&chip->wt);
1525 chip->wt.function = chip_thread_wake;
1526 chip->wt.data = (unsigned long)chip;
1527 chip->thread = kthread_run(chip_thread, chip, chip->c->name);
1528 if (IS_ERR(chip->thread)) {
1529 v4l_warn(chip->c, "%s: failed to create kthread\n",
1530 chip->c->name);
1531 chip->thread = NULL;
1532 }
1533 }
1534 return 0;
1535 }
1536
1537 static int chip_remove(struct i2c_client *client)
1538 {
1539 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1540
1541 del_timer_sync(&chip->wt);
1542 if (chip->thread) {
1543 /* shutdown async thread */
1544 kthread_stop(chip->thread);
1545 chip->thread = NULL;
1546 }
1547
1548 kfree(chip);
1549 return 0;
1550 }
1551
1552 static int tvaudio_get_ctrl(struct CHIPSTATE *chip,
1553 struct v4l2_control *ctrl)
1554 {
1555 struct CHIPDESC *desc = chiplist + chip->type;
1556
1557 switch (ctrl->id) {
1558 case V4L2_CID_AUDIO_MUTE:
1559 ctrl->value=chip->muted;
1560 return 0;
1561 case V4L2_CID_AUDIO_VOLUME:
1562 if (!(desc->flags & CHIP_HAS_VOLUME))
1563 break;
1564 ctrl->value = max(chip->left,chip->right);
1565 return 0;
1566 case V4L2_CID_AUDIO_BALANCE:
1567 {
1568 int volume;
1569 if (!(desc->flags & CHIP_HAS_VOLUME))
1570 break;
1571 volume = max(chip->left,chip->right);
1572 if (volume)
1573 ctrl->value=(32768*min(chip->left,chip->right))/volume;
1574 else
1575 ctrl->value=32768;
1576 return 0;
1577 }
1578 case V4L2_CID_AUDIO_BASS:
1579 if (desc->flags & CHIP_HAS_BASSTREBLE)
1580 break;
1581 ctrl->value = chip->bass;
1582 return 0;
1583 case V4L2_CID_AUDIO_TREBLE:
1584 if (desc->flags & CHIP_HAS_BASSTREBLE)
1585 return -EINVAL;
1586 ctrl->value = chip->treble;
1587 return 0;
1588 }
1589 return -EINVAL;
1590 }
1591
1592 static int tvaudio_set_ctrl(struct CHIPSTATE *chip,
1593 struct v4l2_control *ctrl)
1594 {
1595 struct CHIPDESC *desc = chiplist + chip->type;
1596
1597 switch (ctrl->id) {
1598 case V4L2_CID_AUDIO_MUTE:
1599 if (ctrl->value < 0 || ctrl->value >= 2)
1600 return -ERANGE;
1601 chip->muted = ctrl->value;
1602 if (chip->muted)
1603 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1604 else
1605 chip_write_masked(chip,desc->inputreg,
1606 desc->inputmap[chip->input],desc->inputmask);
1607 return 0;
1608 case V4L2_CID_AUDIO_VOLUME:
1609 {
1610 int volume,balance;
1611
1612 if (!(desc->flags & CHIP_HAS_VOLUME))
1613 break;
1614
1615 volume = max(chip->left,chip->right);
1616 if (volume)
1617 balance=(32768*min(chip->left,chip->right))/volume;
1618 else
1619 balance=32768;
1620
1621 volume=ctrl->value;
1622 chip->left = (min(65536 - balance,32768) * volume) / 32768;
1623 chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1624
1625 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1626 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1627
1628 return 0;
1629 }
1630 case V4L2_CID_AUDIO_BALANCE:
1631 {
1632 int volume, balance;
1633 if (!(desc->flags & CHIP_HAS_VOLUME))
1634 break;
1635
1636 volume = max(chip->left,chip->right);
1637 balance = ctrl->value;
1638
1639 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1640 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1641
1642 return 0;
1643 }
1644 case V4L2_CID_AUDIO_BASS:
1645 if (desc->flags & CHIP_HAS_BASSTREBLE)
1646 break;
1647 chip->bass = ctrl->value;
1648 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1649
1650 return 0;
1651 case V4L2_CID_AUDIO_TREBLE:
1652 if (desc->flags & CHIP_HAS_BASSTREBLE)
1653 return -EINVAL;
1654
1655 chip->treble = ctrl->value;
1656 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1657
1658 return 0;
1659 }
1660 return -EINVAL;
1661 }
1662
1663
1664 /* ---------------------------------------------------------------------- */
1665 /* video4linux interface */
1666
1667 static int chip_command(struct i2c_client *client,
1668 unsigned int cmd, void *arg)
1669 {
1670 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1671 struct CHIPDESC *desc = chiplist + chip->type;
1672
1673 v4l_dbg(1, debug, chip->c, "%s: chip_command 0x%x\n", chip->c->name, cmd);
1674
1675 switch (cmd) {
1676 case AUDC_SET_RADIO:
1677 chip->radio = 1;
1678 chip->watch_stereo = 0;
1679 /* del_timer(&chip->wt); */
1680 break;
1681 /* --- v4l ioctls --- */
1682 /* take care: bttv does userspace copying, we'll get a
1683 kernel pointer here... */
1684 case VIDIOC_QUERYCTRL:
1685 {
1686 struct v4l2_queryctrl *qc = arg;
1687
1688 switch (qc->id) {
1689 case V4L2_CID_AUDIO_MUTE:
1690 break;
1691 case V4L2_CID_AUDIO_VOLUME:
1692 case V4L2_CID_AUDIO_BALANCE:
1693 if (!(desc->flags & CHIP_HAS_VOLUME))
1694 return -EINVAL;
1695 break;
1696 case V4L2_CID_AUDIO_BASS:
1697 case V4L2_CID_AUDIO_TREBLE:
1698 if (desc->flags & CHIP_HAS_BASSTREBLE)
1699 return -EINVAL;
1700 break;
1701 default:
1702 return -EINVAL;
1703 }
1704 return v4l2_ctrl_query_fill_std(qc);
1705 }
1706 case VIDIOC_S_CTRL:
1707 return tvaudio_set_ctrl(chip, arg);
1708
1709 case VIDIOC_G_CTRL:
1710 return tvaudio_get_ctrl(chip, arg);
1711 case VIDIOC_INT_G_AUDIO_ROUTING:
1712 {
1713 struct v4l2_routing *rt = arg;
1714
1715 rt->input = chip->input;
1716 rt->output = 0;
1717 break;
1718 }
1719 case VIDIOC_INT_S_AUDIO_ROUTING:
1720 {
1721 struct v4l2_routing *rt = arg;
1722
1723 if (!(desc->flags & CHIP_HAS_INPUTSEL) || rt->input >= 4)
1724 return -EINVAL;
1725 /* There are four inputs: tuner, radio, extern and intern. */
1726 chip->input = rt->input;
1727 if (chip->muted)
1728 break;
1729 chip_write_masked(chip, desc->inputreg,
1730 desc->inputmap[chip->input], desc->inputmask);
1731 break;
1732 }
1733 case VIDIOC_S_TUNER:
1734 {
1735 struct v4l2_tuner *vt = arg;
1736 int mode = 0;
1737
1738 if (chip->radio)
1739 break;
1740 switch (vt->audmode) {
1741 case V4L2_TUNER_MODE_MONO:
1742 case V4L2_TUNER_MODE_STEREO:
1743 case V4L2_TUNER_MODE_LANG1:
1744 case V4L2_TUNER_MODE_LANG2:
1745 mode = vt->audmode;
1746 break;
1747 case V4L2_TUNER_MODE_LANG1_LANG2:
1748 mode = V4L2_TUNER_MODE_STEREO;
1749 break;
1750 default:
1751 return -EINVAL;
1752 }
1753 chip->audmode = vt->audmode;
1754
1755 if (desc->setmode && mode) {
1756 chip->watch_stereo = 0;
1757 /* del_timer(&chip->wt); */
1758 chip->mode = mode;
1759 desc->setmode(chip, mode);
1760 }
1761 break;
1762 }
1763 case VIDIOC_G_TUNER:
1764 {
1765 struct v4l2_tuner *vt = arg;
1766 int mode = V4L2_TUNER_MODE_MONO;
1767
1768 if (chip->radio)
1769 break;
1770 vt->audmode = chip->audmode;
1771 vt->rxsubchans = 0;
1772 vt->capability = V4L2_TUNER_CAP_STEREO |
1773 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1774
1775 if (desc->getmode)
1776 mode = desc->getmode(chip);
1777
1778 if (mode & V4L2_TUNER_MODE_MONO)
1779 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1780 if (mode & V4L2_TUNER_MODE_STEREO)
1781 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1782 /* Note: for SAP it should be mono/lang2 or stereo/lang2.
1783 When this module is converted fully to v4l2, then this
1784 should change for those chips that can detect SAP. */
1785 if (mode & V4L2_TUNER_MODE_LANG1)
1786 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1787 V4L2_TUNER_SUB_LANG2;
1788 break;
1789 }
1790 case VIDIOC_S_STD:
1791 chip->radio = 0;
1792 break;
1793 case VIDIOC_S_FREQUENCY:
1794 chip->mode = 0; /* automatic */
1795 if (desc->checkmode) {
1796 desc->setmode(chip,V4L2_TUNER_MODE_MONO);
1797 if (chip->prevmode != V4L2_TUNER_MODE_MONO)
1798 chip->prevmode = -1; /* reset previous mode */
1799 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1800 /* the thread will call checkmode() later */
1801 }
1802 break;
1803
1804 case VIDIOC_G_CHIP_IDENT:
1805 return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_TVAUDIO, 0);
1806 }
1807 return 0;
1808 }
1809
1810 static int chip_legacy_probe(struct i2c_adapter *adap)
1811 {
1812 /* don't attach on saa7146 based cards,
1813 because dedicated drivers are used */
1814 if ((adap->id == I2C_HW_SAA7146))
1815 return 0;
1816 if (adap->class & I2C_CLASS_TV_ANALOG)
1817 return 1;
1818 return 0;
1819 }
1820
1821 /* This driver supports many devices and the idea is to let the driver
1822 detect which device is present. So rather than listing all supported
1823 devices here, we pretend to support a single, fake device type. */
1824 static const struct i2c_device_id chip_id[] = {
1825 { "tvaudio", 0 },
1826 { }
1827 };
1828 MODULE_DEVICE_TABLE(i2c, chip_id);
1829
1830 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
1831 .name = "tvaudio",
1832 .driverid = I2C_DRIVERID_TVAUDIO,
1833 .command = chip_command,
1834 .probe = chip_probe,
1835 .remove = chip_remove,
1836 .legacy_probe = chip_legacy_probe,
1837 .id_table = chip_id,
1838 };
1839
1840 /*
1841 * Local variables:
1842 * c-basic-offset: 8
1843 * End:
1844 */
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