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[PATCH] bcm43xx: reduce the size of bcm43xx_private by removing unneeded members.
[linux-2.6/linux-2.6-openrd.git] / drivers / net / wireless / bcm43xx / bcm43xx_phy.c
blob1ce9a45999037fa3084665aba68ce0070b187c35
1 /*
2
3 Broadcom BCM43xx wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
13
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
18
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
23
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
28
29 */
30
31 #include <linux/delay.h>
32 #include <linux/pci.h>
33 #include <linux/types.h>
34
35 #include "bcm43xx.h"
36 #include "bcm43xx_phy.h"
37 #include "bcm43xx_main.h"
38 #include "bcm43xx_radio.h"
39 #include "bcm43xx_ilt.h"
40 #include "bcm43xx_power.h"
41
42
43 static const s8 bcm43xx_tssi2dbm_b_table[] = {
44 0x4D, 0x4C, 0x4B, 0x4A,
45 0x4A, 0x49, 0x48, 0x47,
46 0x47, 0x46, 0x45, 0x45,
47 0x44, 0x43, 0x42, 0x42,
48 0x41, 0x40, 0x3F, 0x3E,
49 0x3D, 0x3C, 0x3B, 0x3A,
50 0x39, 0x38, 0x37, 0x36,
51 0x35, 0x34, 0x32, 0x31,
52 0x30, 0x2F, 0x2D, 0x2C,
53 0x2B, 0x29, 0x28, 0x26,
54 0x25, 0x23, 0x21, 0x1F,
55 0x1D, 0x1A, 0x17, 0x14,
56 0x10, 0x0C, 0x06, 0x00,
57 -7, -7, -7, -7,
58 -7, -7, -7, -7,
59 -7, -7, -7, -7,
60 };
61
62 static const s8 bcm43xx_tssi2dbm_g_table[] = {
63 77, 77, 77, 76,
64 76, 76, 75, 75,
65 74, 74, 73, 73,
66 73, 72, 72, 71,
67 71, 70, 70, 69,
68 68, 68, 67, 67,
69 66, 65, 65, 64,
70 63, 63, 62, 61,
71 60, 59, 58, 57,
72 56, 55, 54, 53,
73 52, 50, 49, 47,
74 45, 43, 40, 37,
75 33, 28, 22, 14,
76 5, -7, -20, -20,
77 -20, -20, -20, -20,
78 -20, -20, -20, -20,
79 };
80
81 static void bcm43xx_phy_initg(struct bcm43xx_private *bcm);
82
83
84 void bcm43xx_raw_phy_lock(struct bcm43xx_private *bcm)
85 {
86 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
87
88 assert(irqs_disabled());
89 if (bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD) == 0x00000000) {
90 phy->is_locked = 0;
91 return;
92 }
93 if (bcm->current_core->rev < 3) {
94 bcm43xx_mac_suspend(bcm);
95 spin_lock(&phy->lock);
96 } else {
97 if (bcm->ieee->iw_mode != IW_MODE_MASTER)
98 bcm43xx_power_saving_ctl_bits(bcm, -1, 1);
99 }
100 phy->is_locked = 1;
101 }
102
103 void bcm43xx_raw_phy_unlock(struct bcm43xx_private *bcm)
104 {
105 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
106
107 assert(irqs_disabled());
108 if (bcm->current_core->rev < 3) {
109 if (phy->is_locked) {
110 spin_unlock(&phy->lock);
111 bcm43xx_mac_enable(bcm);
112 }
113 } else {
114 if (bcm->ieee->iw_mode != IW_MODE_MASTER)
115 bcm43xx_power_saving_ctl_bits(bcm, -1, -1);
116 }
117 phy->is_locked = 0;
118 }
119
120 u16 bcm43xx_phy_read(struct bcm43xx_private *bcm, u16 offset)
121 {
122 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
123 return bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_DATA);
124 }
125
126 void bcm43xx_phy_write(struct bcm43xx_private *bcm, u16 offset, u16 val)
127 {
128 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
129 mmiowb();
130 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_DATA, val);
131 }
132
133 void bcm43xx_phy_calibrate(struct bcm43xx_private *bcm)
134 {
135 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
136 unsigned long flags;
137
138 bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); /* Dummy read. */
139 if (phy->calibrated)
140 return;
141 if (phy->type == BCM43xx_PHYTYPE_G && phy->rev == 1) {
142 /* We do not want to be preempted while calibrating
143 * the hardware.
144 */
145 local_irq_save(flags);
146
147 bcm43xx_wireless_core_reset(bcm, 0);
148 bcm43xx_phy_initg(bcm);
149 bcm43xx_wireless_core_reset(bcm, 1);
150
151 local_irq_restore(flags);
152 }
153 phy->calibrated = 1;
154 }
155
156 /* Connect the PHY
157 * http://bcm-specs.sipsolutions.net/SetPHY
158 */
159 int bcm43xx_phy_connect(struct bcm43xx_private *bcm, int connect)
160 {
161 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
162 u32 flags;
163
164 if (bcm->current_core->rev < 5)
165 goto out;
166
167 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATEHIGH);
168 if (connect) {
169 if (!(flags & 0x00010000))
170 return -ENODEV;
171 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
172 flags |= (0x800 << 18);
173 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
174 } else {
175 if (!(flags & 0x00020000))
176 return -ENODEV;
177 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
178 flags &= ~(0x800 << 18);
179 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
180 }
181 out:
182 phy->connected = connect;
183 if (connect)
184 dprintk(KERN_INFO PFX "PHY connected\n");
185 else
186 dprintk(KERN_INFO PFX "PHY disconnected\n");
187
188 return 0;
189 }
190
191 /* intialize B PHY power control
192 * as described in http://bcm-specs.sipsolutions.net/InitPowerControl
193 */
194 static void bcm43xx_phy_init_pctl(struct bcm43xx_private *bcm)
195 {
196 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
197 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
198 u16 saved_batt = 0, saved_ratt = 0, saved_txctl1 = 0;
199 int must_reset_txpower = 0;
200
201 assert(phy->type != BCM43xx_PHYTYPE_A);
202 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
203 (bcm->board_type == 0x0416))
204 return;
205
206 bcm43xx_write16(bcm, 0x03E6, bcm43xx_read16(bcm, 0x03E6) & 0xFFDF);
207 bcm43xx_phy_write(bcm, 0x0028, 0x8018);
208
209 if (phy->type == BCM43xx_PHYTYPE_G) {
210 if (!phy->connected)
211 return;
212 bcm43xx_phy_write(bcm, 0x047A, 0xC111);
213 }
214 if (phy->savedpctlreg != 0xFFFF)
215 return;
216
217 if (phy->type == BCM43xx_PHYTYPE_B &&
218 phy->rev >= 2 &&
219 radio->version == 0x2050) {
220 bcm43xx_radio_write16(bcm, 0x0076,
221 bcm43xx_radio_read16(bcm, 0x0076) | 0x0084);
222 } else {
223 saved_batt = radio->txpower[0];
224 saved_ratt = radio->txpower[1];
225 saved_txctl1 = radio->txpower[2];
226 if ((radio->revision >= 6) && (radio->revision <= 8)
227 && /*FIXME: incomplete specs for 5 < revision < 9 */ 0)
228 bcm43xx_radio_set_txpower_bg(bcm, 0xB, 0x1F, 0);
229 else
230 bcm43xx_radio_set_txpower_bg(bcm, 0xB, 9, 0);
231 must_reset_txpower = 1;
232 }
233 bcm43xx_dummy_transmission(bcm);
234
235 phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_PCTL);
236
237 if (must_reset_txpower)
238 bcm43xx_radio_set_txpower_bg(bcm, saved_batt, saved_ratt, saved_txctl1);
239 else
240 bcm43xx_radio_write16(bcm, 0x0076, bcm43xx_radio_read16(bcm, 0x0076) & 0xFF7B);
241 bcm43xx_radio_clear_tssi(bcm);
242 }
243
244 static void bcm43xx_phy_agcsetup(struct bcm43xx_private *bcm)
245 {
246 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
247 u16 offset = 0x0000;
248
249 if (phy->rev == 1)
250 offset = 0x4C00;
251
252 bcm43xx_ilt_write(bcm, offset, 0x00FE);
253 bcm43xx_ilt_write(bcm, offset + 1, 0x000D);
254 bcm43xx_ilt_write(bcm, offset + 2, 0x0013);
255 bcm43xx_ilt_write(bcm, offset + 3, 0x0019);
256
257 if (phy->rev == 1) {
258 bcm43xx_ilt_write(bcm, 0x1800, 0x2710);
259 bcm43xx_ilt_write(bcm, 0x1801, 0x9B83);
260 bcm43xx_ilt_write(bcm, 0x1802, 0x9B83);
261 bcm43xx_ilt_write(bcm, 0x1803, 0x0F8D);
262 bcm43xx_phy_write(bcm, 0x0455, 0x0004);
263 }
264
265 bcm43xx_phy_write(bcm, 0x04A5, (bcm43xx_phy_read(bcm, 0x04A5) & 0x00FF) | 0x5700);
266 bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xFF80) | 0x000F);
267 bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xC07F) | 0x2B80);
268 bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xF0FF) | 0x0300);
269
270 bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0008);
271
272 bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xFFF0) | 0x0008);
273 bcm43xx_phy_write(bcm, 0x04A1, (bcm43xx_phy_read(bcm, 0x04A1) & 0xF0FF) | 0x0600);
274 bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xF0FF) | 0x0700);
275 bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xF0FF) | 0x0100);
276
277 if (phy->rev == 1)
278 bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xFFF0) | 0x0007);
279
280 bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xFF00) | 0x001C);
281 bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xC0FF) | 0x0200);
282 bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0xFF00) | 0x001C);
283 bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xFF00) | 0x0020);
284 bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xC0FF) | 0x0200);
285 bcm43xx_phy_write(bcm, 0x0482, (bcm43xx_phy_read(bcm, 0x0482) & 0xFF00) | 0x002E);
286 bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0x00FF) | 0x1A00);
287 bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0xFF00) | 0x0028);
288 bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0x00FF) | 0x2C00);
289
290 if (phy->rev == 1) {
291 bcm43xx_phy_write(bcm, 0x0430, 0x092B);
292 bcm43xx_phy_write(bcm, 0x041B, (bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1) | 0x0002);
293 } else {
294 bcm43xx_phy_write(bcm, 0x041B, bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1);
295 bcm43xx_phy_write(bcm, 0x041F, 0x287A);
296 bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0xFFF0) | 0x0004);
297 }
298
299 if (phy->rev > 2) {
300 bcm43xx_phy_write(bcm, 0x0422, 0x287A);
301 bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0x0FFF) | 0x3000);
302 }
303
304 bcm43xx_phy_write(bcm, 0x04A8, (bcm43xx_phy_read(bcm, 0x04A8) & 0x8080) | 0x7874);
305 bcm43xx_phy_write(bcm, 0x048E, 0x1C00);
306
307 if (phy->rev == 1) {
308 bcm43xx_phy_write(bcm, 0x04AB, (bcm43xx_phy_read(bcm, 0x04AB) & 0xF0FF) | 0x0600);
309 bcm43xx_phy_write(bcm, 0x048B, 0x005E);
310 bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xFF00) | 0x001E);
311 bcm43xx_phy_write(bcm, 0x048D, 0x0002);
312 }
313
314 bcm43xx_ilt_write(bcm, offset + 0x0800, 0);
315 bcm43xx_ilt_write(bcm, offset + 0x0801, 7);
316 bcm43xx_ilt_write(bcm, offset + 0x0802, 16);
317 bcm43xx_ilt_write(bcm, offset + 0x0803, 28);
318 }
319
320 static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm)
321 {
322 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
323 u16 i;
324
325 assert(phy->type == BCM43xx_PHYTYPE_G);
326 if (phy->rev == 1) {
327 bcm43xx_phy_write(bcm, 0x0406, 0x4F19);
328 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
329 (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0xFC3F) | 0x0340);
330 bcm43xx_phy_write(bcm, 0x042C, 0x005A);
331 bcm43xx_phy_write(bcm, 0x0427, 0x001A);
332
333 for (i = 0; i < BCM43xx_ILT_FINEFREQG_SIZE; i++)
334 bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqg[i]);
335 for (i = 0; i < BCM43xx_ILT_NOISEG1_SIZE; i++)
336 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg1[i]);
337 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
338 bcm43xx_ilt_write(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
339 } else {
340 /* nrssi values are signed 6-bit values. Not sure why we write 0x7654 here... */
341 bcm43xx_nrssi_hw_write(bcm, 0xBA98, (s16)0x7654);
342
343 if (phy->rev == 2) {
344 bcm43xx_phy_write(bcm, 0x04C0, 0x1861);
345 bcm43xx_phy_write(bcm, 0x04C1, 0x0271);
346 } else if (phy->rev > 2) {
347 bcm43xx_phy_write(bcm, 0x04C0, 0x0098);
348 bcm43xx_phy_write(bcm, 0x04C1, 0x0070);
349 bcm43xx_phy_write(bcm, 0x04C9, 0x0080);
350 }
351 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x800);
352
353 for (i = 0; i < 64; i++)
354 bcm43xx_ilt_write(bcm, 0x4000 + i, i);
355 for (i = 0; i < BCM43xx_ILT_NOISEG2_SIZE; i++)
356 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg2[i]);
357 }
358
359 if (phy->rev <= 2)
360 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
361 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg1[i]);
362 else if ((phy->rev == 7) && (bcm43xx_phy_read(bcm, 0x0449) & 0x0200))
363 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
364 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg3[i]);
365 else
366 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
367 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg2[i]);
368
369 if (phy->rev == 2)
370 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
371 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
372 else if ((phy->rev > 2) && (phy->rev <= 7))
373 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
374 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr2[i]);
375
376 if (phy->rev == 1) {
377 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
378 bcm43xx_ilt_write(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
379 for (i = 0; i < 4; i++) {
380 bcm43xx_ilt_write(bcm, 0x5404 + i, 0x0020);
381 bcm43xx_ilt_write(bcm, 0x5408 + i, 0x0020);
382 bcm43xx_ilt_write(bcm, 0x540C + i, 0x0020);
383 bcm43xx_ilt_write(bcm, 0x5410 + i, 0x0020);
384 }
385 bcm43xx_phy_agcsetup(bcm);
386
387 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
388 (bcm->board_type == 0x0416) &&
389 (bcm->board_revision == 0x0017))
390 return;
391
392 bcm43xx_ilt_write(bcm, 0x5001, 0x0002);
393 bcm43xx_ilt_write(bcm, 0x5002, 0x0001);
394 } else {
395 for (i = 0; i <= 0x2F; i++)
396 bcm43xx_ilt_write(bcm, 0x1000 + i, 0x0820);
397 bcm43xx_phy_agcsetup(bcm);
398 bcm43xx_phy_read(bcm, 0x0400); /* dummy read */
399 bcm43xx_phy_write(bcm, 0x0403, 0x1000);
400 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
401 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
402
403 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
404 (bcm->board_type == 0x0416) &&
405 (bcm->board_revision == 0x0017))
406 return;
407
408 bcm43xx_ilt_write(bcm, 0x0401, 0x0002);
409 bcm43xx_ilt_write(bcm, 0x0402, 0x0001);
410 }
411 }
412
413 /* Initialize the noisescaletable for APHY */
414 static void bcm43xx_phy_init_noisescaletbl(struct bcm43xx_private *bcm)
415 {
416 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
417 int i;
418
419 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, 0x1400);
420 for (i = 0; i < 12; i++) {
421 if (phy->rev == 2)
422 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
423 else
424 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
425 }
426 if (phy->rev == 2)
427 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6700);
428 else
429 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2300);
430 for (i = 0; i < 11; i++) {
431 if (phy->rev == 2)
432 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
433 else
434 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
435 }
436 if (phy->rev == 2)
437 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0067);
438 else
439 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0023);
440 }
441
442 static void bcm43xx_phy_setupa(struct bcm43xx_private *bcm)
443 {
444 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
445 u16 i;
446
447 assert(phy->type == BCM43xx_PHYTYPE_A);
448 switch (phy->rev) {
449 case 2:
450 bcm43xx_phy_write(bcm, 0x008E, 0x3800);
451 bcm43xx_phy_write(bcm, 0x0035, 0x03FF);
452 bcm43xx_phy_write(bcm, 0x0036, 0x0400);
453
454 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
455
456 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
457 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
458 bcm43xx_ilt_write(bcm, 0x3C0C, 0x07BF);
459 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
460
461 bcm43xx_phy_write(bcm, 0x0024, 0x4680);
462 bcm43xx_phy_write(bcm, 0x0020, 0x0003);
463 bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
464 bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
465
466 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
467 bcm43xx_phy_write(bcm, 0x002B, bcm43xx_phy_read(bcm, 0x002B) & 0xFBFF);
468 bcm43xx_phy_write(bcm, 0x008E, 0x58C1);
469
470 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
471 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
472 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
473 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
474 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
475
476 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
477 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
478 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
479 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
480 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
481 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
482 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
483
484 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
485 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
486 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
487
488 for (i = 0; i < 16; i++)
489 bcm43xx_ilt_write(bcm, 0x4000 + i, (0x8 + i) & 0x000F);
490
491 bcm43xx_ilt_write(bcm, 0x3003, 0x1044);
492 bcm43xx_ilt_write(bcm, 0x3004, 0x7201);
493 bcm43xx_ilt_write(bcm, 0x3006, 0x0040);
494 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
495
496 for (i = 0; i < BCM43xx_ILT_FINEFREQA_SIZE; i++)
497 bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqa[i]);
498 for (i = 0; i < BCM43xx_ILT_NOISEA2_SIZE; i++)
499 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea2[i]);
500 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
501 bcm43xx_ilt_write(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
502 bcm43xx_phy_init_noisescaletbl(bcm);
503 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
504 bcm43xx_ilt_write(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
505 break;
506 case 3:
507 for (i = 0; i < 64; i++)
508 bcm43xx_ilt_write(bcm, 0x4000 + i, i);
509
510 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
511
512 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
513 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
514 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
515
516 bcm43xx_phy_write(bcm, 0x0024, 0x4680);
517 bcm43xx_phy_write(bcm, 0x0020, 0x0003);
518 bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
519 bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
520 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
521
522 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
523 for (i = 0; i < BCM43xx_ILT_NOISEA3_SIZE; i++)
524 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea3[i]);
525 bcm43xx_phy_init_noisescaletbl(bcm);
526 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
527 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
528
529 bcm43xx_phy_write(bcm, 0x0003, 0x1808);
530
531 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
532 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
533 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
534 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
535 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
536
537 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
538 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
539 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
540 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
541 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
542 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
543 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
544
545 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
546 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
547 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
548
549 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
550 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
551 break;
552 default:
553 assert(0);
554 }
555 }
556
557 /* Initialize APHY. This is also called for the GPHY in some cases. */
558 static void bcm43xx_phy_inita(struct bcm43xx_private *bcm)
559 {
560 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
561 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
562 u16 tval;
563
564 if (phy->type == BCM43xx_PHYTYPE_A) {
565 bcm43xx_phy_setupa(bcm);
566 } else {
567 bcm43xx_phy_setupg(bcm);
568 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
569 bcm43xx_phy_write(bcm, 0x046E, 0x03CF);
570 return;
571 }
572
573 bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
574 (bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) & 0xF83C) | 0x0340);
575 bcm43xx_phy_write(bcm, 0x0034, 0x0001);
576
577 TODO();//TODO: RSSI AGC
578 bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
579 bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) | (1 << 14));
580 bcm43xx_radio_init2060(bcm);
581
582 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM)
583 && ((bcm->board_type == 0x0416) || (bcm->board_type == 0x040A))) {
584 if (radio->lofcal == 0xFFFF) {
585 TODO();//TODO: LOF Cal
586 bcm43xx_radio_set_tx_iq(bcm);
587 } else
588 bcm43xx_radio_write16(bcm, 0x001E, radio->lofcal);
589 }
590
591 bcm43xx_phy_write(bcm, 0x007A, 0xF111);
592
593 if (phy->savedpctlreg == 0xFFFF) {
594 bcm43xx_radio_write16(bcm, 0x0019, 0x0000);
595 bcm43xx_radio_write16(bcm, 0x0017, 0x0020);
596
597 tval = bcm43xx_ilt_read(bcm, 0x3001);
598 if (phy->rev == 1) {
599 bcm43xx_ilt_write(bcm, 0x3001,
600 (bcm43xx_ilt_read(bcm, 0x3001) & 0xFF87)
601 | 0x0058);
602 } else {
603 bcm43xx_ilt_write(bcm, 0x3001,
604 (bcm43xx_ilt_read(bcm, 0x3001) & 0xFFC3)
605 | 0x002C);
606 }
607 bcm43xx_dummy_transmission(bcm);
608 phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_A_PCTL);
609 bcm43xx_ilt_write(bcm, 0x3001, tval);
610
611 bcm43xx_radio_set_txpower_a(bcm, 0x0018);
612 }
613 bcm43xx_radio_clear_tssi(bcm);
614 }
615
616 static void bcm43xx_phy_initb2(struct bcm43xx_private *bcm)
617 {
618 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
619 u16 offset, val;
620
621 bcm43xx_write16(bcm, 0x03EC, 0x3F22);
622 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
623 bcm43xx_phy_write(bcm, 0x0026, 0x0000);
624 bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
625 bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
626 val = 0x3C3D;
627 for (offset = 0x0089; offset < 0x00A7; offset++) {
628 bcm43xx_phy_write(bcm, offset, val);
629 val -= 0x0202;
630 }
631 bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
632 if (radio->channel == 0xFF)
633 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
634 else
635 bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
636 if (radio->version != 0x2050) {
637 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
638 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
639 }
640 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
641 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
642 if (radio->version == 0x2050) {
643 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
644 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
645 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
646 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
647 bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
648 bcm43xx_phy_write(bcm, 0x0038, 0x0677);
649 bcm43xx_radio_init2050(bcm);
650 }
651 bcm43xx_phy_write(bcm, 0x0014, 0x0080);
652 bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
653 bcm43xx_phy_write(bcm, 0x0032, 0x00CC);
654 bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
655 bcm43xx_phy_lo_b_measure(bcm);
656 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
657 if (radio->version != 0x2050)
658 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
659 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1000);
660 bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
661 if (radio->version != 0x2050)
662 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
663 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
664 bcm43xx_phy_init_pctl(bcm);
665 }
666
667 static void bcm43xx_phy_initb4(struct bcm43xx_private *bcm)
668 {
669 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
670 u16 offset, val;
671
672 bcm43xx_write16(bcm, 0x03EC, 0x3F22);
673 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
674 bcm43xx_phy_write(bcm, 0x0026, 0x0000);
675 bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
676 bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
677 val = 0x3C3D;
678 for (offset = 0x0089; offset < 0x00A7; offset++) {
679 bcm43xx_phy_write(bcm, offset, val);
680 val -= 0x0202;
681 }
682 bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
683 if (radio->channel == 0xFF)
684 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
685 else
686 bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
687 if (radio->version != 0x2050) {
688 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
689 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
690 }
691 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
692 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
693 if (radio->version == 0x2050) {
694 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
695 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
696 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
697 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
698 bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
699 bcm43xx_phy_write(bcm, 0x0038, 0x0677);
700 bcm43xx_radio_init2050(bcm);
701 }
702 bcm43xx_phy_write(bcm, 0x0014, 0x0080);
703 bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
704 if (radio->version == 0x2050)
705 bcm43xx_phy_write(bcm, 0x0032, 0x00E0);
706 bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
707
708 bcm43xx_phy_lo_b_measure(bcm);
709
710 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
711 if (radio->version == 0x2050)
712 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
713 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1100);
714 bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
715 if (radio->version == 0x2050)
716 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
717 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
718 if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
719 bcm43xx_calc_nrssi_slope(bcm);
720 bcm43xx_calc_nrssi_threshold(bcm);
721 }
722 bcm43xx_phy_init_pctl(bcm);
723 }
724
725 static void bcm43xx_phy_initb5(struct bcm43xx_private *bcm)
726 {
727 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
728 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
729 u16 offset;
730
731 if (phy->version == 1 &&
732 radio->version == 0x2050) {
733 bcm43xx_radio_write16(bcm, 0x007A,
734 bcm43xx_radio_read16(bcm, 0x007A)
735 | 0x0050);
736 }
737 if ((bcm->board_vendor != PCI_VENDOR_ID_BROADCOM) &&
738 (bcm->board_type != 0x0416)) {
739 for (offset = 0x00A8 ; offset < 0x00C7; offset++) {
740 bcm43xx_phy_write(bcm, offset,
741 (bcm43xx_phy_read(bcm, offset) + 0x2020)
742 & 0x3F3F);
743 }
744 }
745 bcm43xx_phy_write(bcm, 0x0035,
746 (bcm43xx_phy_read(bcm, 0x0035) & 0xF0FF)
747 | 0x0700);
748 if (radio->version == 0x2050)
749 bcm43xx_phy_write(bcm, 0x0038, 0x0667);
750
751 if (phy->connected) {
752 if (radio->version == 0x2050) {
753 bcm43xx_radio_write16(bcm, 0x007A,
754 bcm43xx_radio_read16(bcm, 0x007A)
755 | 0x0020);
756 bcm43xx_radio_write16(bcm, 0x0051,
757 bcm43xx_radio_read16(bcm, 0x0051)
758 | 0x0004);
759 }
760 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO, 0x0000);
761
762 bcm43xx_phy_write(bcm, 0x0802, bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
763 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
764
765 bcm43xx_phy_write(bcm, 0x001C, 0x186A);
766
767 bcm43xx_phy_write(bcm, 0x0013, (bcm43xx_phy_read(bcm, 0x0013) & 0x00FF) | 0x1900);
768 bcm43xx_phy_write(bcm, 0x0035, (bcm43xx_phy_read(bcm, 0x0035) & 0xFFC0) | 0x0064);
769 bcm43xx_phy_write(bcm, 0x005D, (bcm43xx_phy_read(bcm, 0x005D) & 0xFF80) | 0x000A);
770 }
771
772 if (bcm->bad_frames_preempt) {
773 bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
774 bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) | (1 << 11));
775 }
776
777 if (phy->version == 1 && radio->version == 0x2050) {
778 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
779 bcm43xx_phy_write(bcm, 0x0021, 0x3763);
780 bcm43xx_phy_write(bcm, 0x0022, 0x1BC3);
781 bcm43xx_phy_write(bcm, 0x0023, 0x06F9);
782 bcm43xx_phy_write(bcm, 0x0024, 0x037E);
783 } else
784 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
785 bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
786 bcm43xx_write16(bcm, 0x03EC, 0x3F22);
787
788 if (phy->version == 1 && radio->version == 0x2050)
789 bcm43xx_phy_write(bcm, 0x0020, 0x3E1C);
790 else
791 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
792
793 if (phy->version == 0)
794 bcm43xx_write16(bcm, 0x03E4, 0x3000);
795
796 /* Force to channel 7, even if not supported. */
797 bcm43xx_radio_selectchannel(bcm, 7, 0);
798
799 if (radio->version != 0x2050) {
800 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
801 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
802 }
803
804 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
805 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
806
807 if (radio->version == 0x2050) {
808 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
809 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
810 }
811
812 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
813 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
814
815 bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0007);
816
817 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
818
819 bcm43xx_phy_write(bcm, 0x0014, 0x0080);
820 bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
821 bcm43xx_phy_write(bcm, 0x88A3, 0x002A);
822
823 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
824
825 if (radio->version == 0x2050)
826 bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
827
828 bcm43xx_write16(bcm, 0x03E4, (bcm43xx_read16(bcm, 0x03E4) & 0xFFC0) | 0x0004);
829 }
830
831 static void bcm43xx_phy_initb6(struct bcm43xx_private *bcm)
832 {
833 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
834 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
835 u16 offset, val;
836
837 bcm43xx_phy_write(bcm, 0x003E, 0x817A);
838 bcm43xx_radio_write16(bcm, 0x007A,
839 (bcm43xx_radio_read16(bcm, 0x007A) | 0x0058));
840 if ((radio->manufact == 0x17F) &&
841 (radio->version == 0x2050) &&
842 (radio->revision == 3 ||
843 radio->revision == 4 ||
844 radio->revision == 5)) {
845 bcm43xx_radio_write16(bcm, 0x0051, 0x001F);
846 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
847 bcm43xx_radio_write16(bcm, 0x0053, 0x005B);
848 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
849 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
850 bcm43xx_radio_write16(bcm, 0x005B, 0x0088);
851 bcm43xx_radio_write16(bcm, 0x005D, 0x0088);
852 bcm43xx_radio_write16(bcm, 0x005E, 0x0088);
853 bcm43xx_radio_write16(bcm, 0x007D, 0x0088);
854 }
855 if ((radio->manufact == 0x17F) &&
856 (radio->version == 0x2050) &&
857 (radio->revision == 6)) {
858 bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
859 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
860 bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
861 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
862 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
863 bcm43xx_radio_write16(bcm, 0x005B, 0x008B);
864 bcm43xx_radio_write16(bcm, 0x005C, 0x00B5);
865 bcm43xx_radio_write16(bcm, 0x005D, 0x0088);
866 bcm43xx_radio_write16(bcm, 0x005E, 0x0088);
867 bcm43xx_radio_write16(bcm, 0x007D, 0x0088);
868 bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
869 bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
870 }
871 if ((radio->manufact == 0x17F) &&
872 (radio->version == 0x2050) &&
873 (radio->revision == 7)) {
874 bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
875 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
876 bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
877 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
878 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
879 bcm43xx_radio_write16(bcm, 0x005B, 0x00A8);
880 bcm43xx_radio_write16(bcm, 0x005C, 0x0075);
881 bcm43xx_radio_write16(bcm, 0x005D, 0x00F5);
882 bcm43xx_radio_write16(bcm, 0x005E, 0x00B8);
883 bcm43xx_radio_write16(bcm, 0x007D, 0x00E8);
884 bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
885 bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
886 bcm43xx_radio_write16(bcm, 0x007B, 0x0000);
887 }
888 if ((radio->manufact == 0x17F) &&
889 (radio->version == 0x2050) &&
890 (radio->revision == 8)) {
891 bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
892 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
893 bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
894 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
895 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
896 bcm43xx_radio_write16(bcm, 0x005B, 0x006B);
897 bcm43xx_radio_write16(bcm, 0x005C, 0x000F);
898 if (bcm->sprom.boardflags & 0x8000) {
899 bcm43xx_radio_write16(bcm, 0x005D, 0x00FA);
900 bcm43xx_radio_write16(bcm, 0x005E, 0x00D8);
901 } else {
902 bcm43xx_radio_write16(bcm, 0x005D, 0x00F5);
903 bcm43xx_radio_write16(bcm, 0x005E, 0x00B8);
904 }
905 bcm43xx_radio_write16(bcm, 0x0073, 0x0003);
906 bcm43xx_radio_write16(bcm, 0x007D, 0x00A8);
907 bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
908 bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
909 }
910 val = 0x1E1F;
911 for (offset = 0x0088; offset < 0x0098; offset++) {
912 bcm43xx_phy_write(bcm, offset, val);
913 val -= 0x0202;
914 }
915 val = 0x3E3F;
916 for (offset = 0x0098; offset < 0x00A8; offset++) {
917 bcm43xx_phy_write(bcm, offset, val);
918 val -= 0x0202;
919 }
920 val = 0x2120;
921 for (offset = 0x00A8; offset < 0x00C8; offset++) {
922 bcm43xx_phy_write(bcm, offset, (val & 0x3F3F));
923 val += 0x0202;
924 }
925 if (phy->type == BCM43xx_PHYTYPE_G) {
926 bcm43xx_radio_write16(bcm, 0x007A,
927 bcm43xx_radio_read16(bcm, 0x007A) | 0x0020);
928 bcm43xx_radio_write16(bcm, 0x0051,
929 bcm43xx_radio_read16(bcm, 0x0051) | 0x0004);
930 bcm43xx_phy_write(bcm, 0x0802,
931 bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
932 bcm43xx_phy_write(bcm, 0x042B,
933 bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
934 }
935
936 /* Force to channel 7, even if not supported. */
937 bcm43xx_radio_selectchannel(bcm, 7, 0);
938
939 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
940 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
941 udelay(40);
942 bcm43xx_radio_write16(bcm, 0x007C, (bcm43xx_radio_read16(bcm, 0x007C) | 0x0002));
943 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
944 if (radio->manufact == 0x17F &&
945 radio->version == 0x2050 &&
946 radio->revision <= 2) {
947 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
948 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
949 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
950 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
951 }
952 bcm43xx_radio_write16(bcm, 0x007A,
953 (bcm43xx_radio_read16(bcm, 0x007A) & 0x00F8) | 0x0007);
954
955 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
956
957 bcm43xx_phy_write(bcm, 0x0014, 0x0200);
958 if (radio->version == 0x2050){
959 if (radio->revision == 3 ||
960 radio->revision == 4 ||
961 radio->revision == 5)
962 bcm43xx_phy_write(bcm, 0x002A, 0x8AC0);
963 else
964 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
965 }
966 bcm43xx_phy_write(bcm, 0x0038, 0x0668);
967 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
968 if (radio->version == 0x2050) {
969 if (radio->revision == 3 ||
970 radio->revision == 4 ||
971 radio->revision == 5)
972 bcm43xx_phy_write(bcm, 0x005D, bcm43xx_phy_read(bcm, 0x005D) | 0x0003);
973 else if (radio->revision <= 2)
974 bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
975 }
976
977 if (phy->rev == 4)
978 bcm43xx_phy_write(bcm, 0x0002, (bcm43xx_phy_read(bcm, 0x0002) & 0xFFC0) | 0x0004);
979 else
980 bcm43xx_write16(bcm, 0x03E4, 0x0009);
981 if (phy->type == BCM43xx_PHYTYPE_B) {
982 bcm43xx_write16(bcm, 0x03E6, 0x8140);
983 bcm43xx_phy_write(bcm, 0x0016, 0x0410);
984 bcm43xx_phy_write(bcm, 0x0017, 0x0820);
985 bcm43xx_phy_write(bcm, 0x0062, 0x0007);
986 (void) bcm43xx_radio_calibrationvalue(bcm);
987 bcm43xx_phy_lo_b_measure(bcm);
988 if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
989 bcm43xx_calc_nrssi_slope(bcm);
990 bcm43xx_calc_nrssi_threshold(bcm);
991 }
992 bcm43xx_phy_init_pctl(bcm);
993 } else
994 bcm43xx_write16(bcm, 0x03E6, 0x0);
995 }
996
997 static void bcm43xx_phy_initg(struct bcm43xx_private *bcm)
998 {
999 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1000 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1001 u16 tmp;
1002
1003 if (phy->rev == 1)
1004 bcm43xx_phy_initb5(bcm);
1005 else if (phy->rev >= 2 && phy->rev <= 7)
1006 bcm43xx_phy_initb6(bcm);
1007 if (phy->rev >= 2 || phy->connected)
1008 bcm43xx_phy_inita(bcm);
1009
1010 if (phy->rev >= 2) {
1011 bcm43xx_phy_write(bcm, 0x0814, 0x0000);
1012 bcm43xx_phy_write(bcm, 0x0815, 0x0000);
1013 if (phy->rev == 2)
1014 bcm43xx_phy_write(bcm, 0x0811, 0x0000);
1015 else if (phy->rev >= 3)
1016 bcm43xx_phy_write(bcm, 0x0811, 0x0400);
1017 bcm43xx_phy_write(bcm, 0x0015, 0x00C0);
1018 tmp = bcm43xx_phy_read(bcm, 0x0400) & 0xFF;
1019 if (tmp == 3) {
1020 bcm43xx_phy_write(bcm, 0x04C2, 0x1816);
1021 bcm43xx_phy_write(bcm, 0x04C3, 0x8606);
1022 } else if (tmp == 4 || tmp == 5) {
1023 bcm43xx_phy_write(bcm, 0x04C2, 0x1816);
1024 bcm43xx_phy_write(bcm, 0x04C3, 0x8006);
1025 bcm43xx_phy_write(bcm, 0x04CC, (bcm43xx_phy_read(bcm, 0x04CC)
1026 & 0x00FF) | 0x1F00);
1027 }
1028 }
1029 if (radio->revision <= 3 && phy->connected)
1030 bcm43xx_phy_write(bcm, 0x047E, 0x0078);
1031 if (radio->revision >= 6 && radio->revision <= 8) {
1032 bcm43xx_phy_write(bcm, 0x0801, bcm43xx_phy_read(bcm, 0x0801) | 0x0080);
1033 bcm43xx_phy_write(bcm, 0x043E, bcm43xx_phy_read(bcm, 0x043E) | 0x0004);
1034 }
1035 if (radio->initval == 0xFFFF) {
1036 radio->initval = bcm43xx_radio_init2050(bcm);
1037 bcm43xx_phy_lo_g_measure(bcm);
1038 } else {
1039 bcm43xx_radio_write16(bcm, 0x0078, radio->initval);
1040 bcm43xx_radio_write16(bcm, 0x0052,
1041 (bcm43xx_radio_read16(bcm, 0x0052) & 0xFFF0)
1042 | radio->txpower[3]);
1043 }
1044
1045 if (phy->connected) {
1046 bcm43xx_phy_lo_adjust(bcm, 0);
1047 bcm43xx_phy_write(bcm, 0x080F, 0x8078);
1048
1049 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
1050 bcm43xx_phy_write(bcm, 0x002E, 0x807F);
1051 else
1052 bcm43xx_phy_write(bcm, 0x002E, 0x8075);
1053
1054 if (phy->rev < 2)
1055 bcm43xx_phy_write(bcm, 0x002F, 0x0101);
1056 else
1057 bcm43xx_phy_write(bcm, 0x002F, 0x0202);
1058 }
1059
1060 if ((bcm->sprom.boardflags & BCM43xx_BFL_RSSI) == 0) {
1061 FIXME();//FIXME: 0x7FFFFFFF should be 16-bit !
1062 bcm43xx_nrssi_hw_update(bcm, (u16)0x7FFFFFFF);
1063 bcm43xx_calc_nrssi_threshold(bcm);
1064 } else if (phy->connected) {
1065 if (radio->nrssi[0] == -1000) {
1066 assert(radio->nrssi[1] == -1000);
1067 bcm43xx_calc_nrssi_slope(bcm);
1068 } else
1069 bcm43xx_calc_nrssi_threshold(bcm);
1070 }
1071 bcm43xx_phy_init_pctl(bcm);
1072 }
1073
1074 static u16 bcm43xx_phy_lo_b_r15_loop(struct bcm43xx_private *bcm)
1075 {
1076 int i;
1077 u16 ret = 0;
1078
1079 for (i = 0; i < 10; i++){
1080 bcm43xx_phy_write(bcm, 0x0015, 0xAFA0);
1081 udelay(1);
1082 bcm43xx_phy_write(bcm, 0x0015, 0xEFA0);
1083 udelay(10);
1084 bcm43xx_phy_write(bcm, 0x0015, 0xFFA0);
1085 udelay(40);
1086 ret += bcm43xx_phy_read(bcm, 0x002C);
1087 }
1088
1089 return ret;
1090 }
1091
1092 void bcm43xx_phy_lo_b_measure(struct bcm43xx_private *bcm)
1093 {
1094 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1095 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1096 u16 regstack[12] = { 0 };
1097 u16 mls;
1098 u16 fval;
1099 int i, j;
1100
1101 regstack[0] = bcm43xx_phy_read(bcm, 0x0015);
1102 regstack[1] = bcm43xx_radio_read16(bcm, 0x0052) & 0xFFF0;
1103
1104 if (radio->version == 0x2053) {
1105 regstack[2] = bcm43xx_phy_read(bcm, 0x000A);
1106 regstack[3] = bcm43xx_phy_read(bcm, 0x002A);
1107 regstack[4] = bcm43xx_phy_read(bcm, 0x0035);
1108 regstack[5] = bcm43xx_phy_read(bcm, 0x0003);
1109 regstack[6] = bcm43xx_phy_read(bcm, 0x0001);
1110 regstack[7] = bcm43xx_phy_read(bcm, 0x0030);
1111
1112 regstack[8] = bcm43xx_radio_read16(bcm, 0x0043);
1113 regstack[9] = bcm43xx_radio_read16(bcm, 0x007A);
1114 regstack[10] = bcm43xx_read16(bcm, 0x03EC);
1115 regstack[11] = bcm43xx_radio_read16(bcm, 0x0052) & 0x00F0;
1116
1117 bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
1118 bcm43xx_write16(bcm, 0x03EC, 0x3F3F);
1119 bcm43xx_phy_write(bcm, 0x0035, regstack[4] & 0xFF7F);
1120 bcm43xx_radio_write16(bcm, 0x007A, regstack[9] & 0xFFF0);
1121 }
1122 bcm43xx_phy_write(bcm, 0x0015, 0xB000);
1123 bcm43xx_phy_write(bcm, 0x002B, 0x0004);
1124
1125 if (radio->version == 0x2053) {
1126 bcm43xx_phy_write(bcm, 0x002B, 0x0203);
1127 bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
1128 }
1129
1130 phy->minlowsig[0] = 0xFFFF;
1131
1132 for (i = 0; i < 4; i++) {
1133 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
1134 bcm43xx_phy_lo_b_r15_loop(bcm);
1135 }
1136 for (i = 0; i < 10; i++) {
1137 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
1138 mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
1139 if (mls < phy->minlowsig[0]) {
1140 phy->minlowsig[0] = mls;
1141 phy->minlowsigpos[0] = i;
1142 }
1143 }
1144 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | phy->minlowsigpos[0]);
1145
1146 phy->minlowsig[1] = 0xFFFF;
1147
1148 for (i = -4; i < 5; i += 2) {
1149 for (j = -4; j < 5; j += 2) {
1150 if (j < 0)
1151 fval = (0x0100 * i) + j + 0x0100;
1152 else
1153 fval = (0x0100 * i) + j;
1154 bcm43xx_phy_write(bcm, 0x002F, fval);
1155 mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
1156 if (mls < phy->minlowsig[1]) {
1157 phy->minlowsig[1] = mls;
1158 phy->minlowsigpos[1] = fval;
1159 }
1160 }
1161 }
1162 phy->minlowsigpos[1] += 0x0101;
1163
1164 bcm43xx_phy_write(bcm, 0x002F, phy->minlowsigpos[1]);
1165 if (radio->version == 0x2053) {
1166 bcm43xx_phy_write(bcm, 0x000A, regstack[2]);
1167 bcm43xx_phy_write(bcm, 0x002A, regstack[3]);
1168 bcm43xx_phy_write(bcm, 0x0035, regstack[4]);
1169 bcm43xx_phy_write(bcm, 0x0003, regstack[5]);
1170 bcm43xx_phy_write(bcm, 0x0001, regstack[6]);
1171 bcm43xx_phy_write(bcm, 0x0030, regstack[7]);
1172
1173 bcm43xx_radio_write16(bcm, 0x0043, regstack[8]);
1174 bcm43xx_radio_write16(bcm, 0x007A, regstack[9]);
1175
1176 bcm43xx_radio_write16(bcm, 0x0052,
1177 (bcm43xx_radio_read16(bcm, 0x0052) & 0x000F)
1178 | regstack[11]);
1179
1180 bcm43xx_write16(bcm, 0x03EC, regstack[10]);
1181 }
1182 bcm43xx_phy_write(bcm, 0x0015, regstack[0]);
1183 }
1184
1185 static inline
1186 u16 bcm43xx_phy_lo_g_deviation_subval(struct bcm43xx_private *bcm, u16 control)
1187 {
1188 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1189
1190 if (phy->connected) {
1191 bcm43xx_phy_write(bcm, 0x15, 0xE300);
1192 control <<= 8;
1193 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B0);
1194 udelay(5);
1195 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B2);
1196 udelay(2);
1197 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B3);
1198 udelay(4);
1199 bcm43xx_phy_write(bcm, 0x0015, 0xF300);
1200 udelay(8);
1201 } else {
1202 bcm43xx_phy_write(bcm, 0x0015, control | 0xEFA0);
1203 udelay(2);
1204 bcm43xx_phy_write(bcm, 0x0015, control | 0xEFE0);
1205 udelay(4);
1206 bcm43xx_phy_write(bcm, 0x0015, control | 0xFFE0);
1207 udelay(8);
1208 }
1209
1210 return bcm43xx_phy_read(bcm, 0x002D);
1211 }
1212
1213 static u32 bcm43xx_phy_lo_g_singledeviation(struct bcm43xx_private *bcm, u16 control)
1214 {
1215 int i;
1216 u32 ret = 0;
1217
1218 for (i = 0; i < 8; i++)
1219 ret += bcm43xx_phy_lo_g_deviation_subval(bcm, control);
1220
1221 return ret;
1222 }
1223
1224 /* Write the LocalOscillator CONTROL */
1225 static inline
1226 void bcm43xx_lo_write(struct bcm43xx_private *bcm,
1227 struct bcm43xx_lopair *pair)
1228 {
1229 u16 value;
1230
1231 value = (u8)(pair->low);
1232 value |= ((u8)(pair->high)) << 8;
1233
1234 #ifdef CONFIG_BCM43XX_DEBUG
1235 /* Sanity check. */
1236 if (pair->low < -8 || pair->low > 8 ||
1237 pair->high < -8 || pair->high > 8) {
1238 printk(KERN_WARNING PFX
1239 "WARNING: Writing invalid LOpair "
1240 "(low: %d, high: %d, index: %lu)\n",
1241 pair->low, pair->high,
1242 (unsigned long)(pair - bcm43xx_current_phy(bcm)->_lo_pairs));
1243 dump_stack();
1244 }
1245 #endif
1246
1247 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, value);
1248 }
1249
1250 static inline
1251 struct bcm43xx_lopair * bcm43xx_find_lopair(struct bcm43xx_private *bcm,
1252 u16 baseband_attenuation,
1253 u16 radio_attenuation,
1254 u16 tx)
1255 {
1256 static const u8 dict[10] = { 11, 10, 11, 12, 13, 12, 13, 12, 13, 12 };
1257 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1258
1259 if (baseband_attenuation > 6)
1260 baseband_attenuation = 6;
1261 assert(radio_attenuation < 10);
1262 assert(tx == 0 || tx == 3);
1263
1264 if (tx == 3) {
1265 return bcm43xx_get_lopair(phy,
1266 radio_attenuation,
1267 baseband_attenuation);
1268 }
1269 return bcm43xx_get_lopair(phy, dict[radio_attenuation], baseband_attenuation);
1270 }
1271
1272 static inline
1273 struct bcm43xx_lopair * bcm43xx_current_lopair(struct bcm43xx_private *bcm)
1274 {
1275 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1276
1277 return bcm43xx_find_lopair(bcm,
1278 radio->txpower[0],
1279 radio->txpower[1],
1280 radio->txpower[2]);
1281 }
1282
1283 /* Adjust B/G LO */
1284 void bcm43xx_phy_lo_adjust(struct bcm43xx_private *bcm, int fixed)
1285 {
1286 struct bcm43xx_lopair *pair;
1287
1288 if (fixed) {
1289 /* Use fixed values. Only for initialization. */
1290 pair = bcm43xx_find_lopair(bcm, 2, 3, 0);
1291 } else
1292 pair = bcm43xx_current_lopair(bcm);
1293 bcm43xx_lo_write(bcm, pair);
1294 }
1295
1296 static void bcm43xx_phy_lo_g_measure_txctl2(struct bcm43xx_private *bcm)
1297 {
1298 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1299 u16 txctl2 = 0, i;
1300 u32 smallest, tmp;
1301
1302 bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
1303 udelay(10);
1304 smallest = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
1305 for (i = 0; i < 16; i++) {
1306 bcm43xx_radio_write16(bcm, 0x0052, i);
1307 udelay(10);
1308 tmp = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
1309 if (tmp < smallest) {
1310 smallest = tmp;
1311 txctl2 = i;
1312 }
1313 }
1314 radio->txpower[3] = txctl2;
1315 }
1316
1317 static
1318 void bcm43xx_phy_lo_g_state(struct bcm43xx_private *bcm,
1319 const struct bcm43xx_lopair *in_pair,
1320 struct bcm43xx_lopair *out_pair,
1321 u16 r27)
1322 {
1323 static const struct bcm43xx_lopair transitions[8] = {
1324 { .high = 1, .low = 1, },
1325 { .high = 1, .low = 0, },
1326 { .high = 1, .low = -1, },
1327 { .high = 0, .low = -1, },
1328 { .high = -1, .low = -1, },
1329 { .high = -1, .low = 0, },
1330 { .high = -1, .low = 1, },
1331 { .high = 0, .low = 1, },
1332 };
1333 struct bcm43xx_lopair lowest_transition = {
1334 .high = in_pair->high,
1335 .low = in_pair->low,
1336 };
1337 struct bcm43xx_lopair tmp_pair;
1338 struct bcm43xx_lopair transition;
1339 int i = 12;
1340 int state = 0;
1341 int found_lower;
1342 int j, begin, end;
1343 u32 lowest_deviation;
1344 u32 tmp;
1345
1346 /* Note that in_pair and out_pair can point to the same pair. Be careful. */
1347
1348 bcm43xx_lo_write(bcm, &lowest_transition);
1349 lowest_deviation = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
1350 do {
1351 found_lower = 0;
1352 assert(state >= 0 && state <= 8);
1353 if (state == 0) {
1354 begin = 1;
1355 end = 8;
1356 } else if (state % 2 == 0) {
1357 begin = state - 1;
1358 end = state + 1;
1359 } else {
1360 begin = state - 2;
1361 end = state + 2;
1362 }
1363 if (begin < 1)
1364 begin += 8;
1365 if (end > 8)
1366 end -= 8;
1367
1368 j = begin;
1369 tmp_pair.high = lowest_transition.high;
1370 tmp_pair.low = lowest_transition.low;
1371 while (1) {
1372 assert(j >= 1 && j <= 8);
1373 transition.high = tmp_pair.high + transitions[j - 1].high;
1374 transition.low = tmp_pair.low + transitions[j - 1].low;
1375 if ((abs(transition.low) < 9) && (abs(transition.high) < 9)) {
1376 bcm43xx_lo_write(bcm, &transition);
1377 tmp = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
1378 if (tmp < lowest_deviation) {
1379 lowest_deviation = tmp;
1380 state = j;
1381 found_lower = 1;
1382
1383 lowest_transition.high = transition.high;
1384 lowest_transition.low = transition.low;
1385 }
1386 }
1387 if (j == end)
1388 break;
1389 if (j == 8)
1390 j = 1;
1391 else
1392 j++;
1393 }
1394 } while (i-- && found_lower);
1395
1396 out_pair->high = lowest_transition.high;
1397 out_pair->low = lowest_transition.low;
1398 }
1399
1400 /* Set the baseband attenuation value on chip. */
1401 void bcm43xx_phy_set_baseband_attenuation(struct bcm43xx_private *bcm,
1402 u16 baseband_attenuation)
1403 {
1404 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1405 u16 value;
1406
1407 if (phy->version == 0) {
1408 value = (bcm43xx_read16(bcm, 0x03E6) & 0xFFF0);
1409 value |= (baseband_attenuation & 0x000F);
1410 bcm43xx_write16(bcm, 0x03E6, value);
1411 return;
1412 }
1413
1414 if (phy->version > 1) {
1415 value = bcm43xx_phy_read(bcm, 0x0060) & ~0x003C;
1416 value |= (baseband_attenuation << 2) & 0x003C;
1417 } else {
1418 value = bcm43xx_phy_read(bcm, 0x0060) & ~0x0078;
1419 value |= (baseband_attenuation << 3) & 0x0078;
1420 }
1421 bcm43xx_phy_write(bcm, 0x0060, value);
1422 }
1423
1424 /* http://bcm-specs.sipsolutions.net/LocalOscillator/Measure */
1425 void bcm43xx_phy_lo_g_measure(struct bcm43xx_private *bcm)
1426 {
1427 static const u8 pairorder[10] = { 3, 1, 5, 7, 9, 2, 0, 4, 6, 8 };
1428 const int is_initializing = bcm43xx_is_initializing(bcm);
1429 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1430 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1431 u16 h, i, oldi = 0, j;
1432 struct bcm43xx_lopair control;
1433 struct bcm43xx_lopair *tmp_control;
1434 u16 tmp;
1435 u16 regstack[16] = { 0 };
1436 u8 oldchannel;
1437
1438 //XXX: What are these?
1439 u8 r27 = 0, r31;
1440
1441 oldchannel = radio->channel;
1442 /* Setup */
1443 if (phy->connected) {
1444 regstack[0] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS);
1445 regstack[1] = bcm43xx_phy_read(bcm, 0x0802);
1446 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
1447 bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
1448 }
1449 regstack[3] = bcm43xx_read16(bcm, 0x03E2);
1450 bcm43xx_write16(bcm, 0x03E2, regstack[3] | 0x8000);
1451 regstack[4] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
1452 regstack[5] = bcm43xx_phy_read(bcm, 0x15);
1453 regstack[6] = bcm43xx_phy_read(bcm, 0x2A);
1454 regstack[7] = bcm43xx_phy_read(bcm, 0x35);
1455 regstack[8] = bcm43xx_phy_read(bcm, 0x60);
1456 regstack[9] = bcm43xx_radio_read16(bcm, 0x43);
1457 regstack[10] = bcm43xx_radio_read16(bcm, 0x7A);
1458 regstack[11] = bcm43xx_radio_read16(bcm, 0x52);
1459 if (phy->connected) {
1460 regstack[12] = bcm43xx_phy_read(bcm, 0x0811);
1461 regstack[13] = bcm43xx_phy_read(bcm, 0x0812);
1462 regstack[14] = bcm43xx_phy_read(bcm, 0x0814);
1463 regstack[15] = bcm43xx_phy_read(bcm, 0x0815);
1464 }
1465 bcm43xx_radio_selectchannel(bcm, 6, 0);
1466 if (phy->connected) {
1467 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
1468 bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
1469 bcm43xx_dummy_transmission(bcm);
1470 }
1471 bcm43xx_radio_write16(bcm, 0x0043, 0x0006);
1472
1473 bcm43xx_phy_set_baseband_attenuation(bcm, 2);
1474
1475 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x0000);
1476 bcm43xx_phy_write(bcm, 0x002E, 0x007F);
1477 bcm43xx_phy_write(bcm, 0x080F, 0x0078);
1478 bcm43xx_phy_write(bcm, 0x0035, regstack[7] & ~(1 << 7));
1479 bcm43xx_radio_write16(bcm, 0x007A, regstack[10] & 0xFFF0);
1480 bcm43xx_phy_write(bcm, 0x002B, 0x0203);
1481 bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
1482 if (phy->connected) {
1483 bcm43xx_phy_write(bcm, 0x0814, regstack[14] | 0x0003);
1484 bcm43xx_phy_write(bcm, 0x0815, regstack[15] & 0xFFFC);
1485 bcm43xx_phy_write(bcm, 0x0811, 0x01B3);
1486 bcm43xx_phy_write(bcm, 0x0812, 0x00B2);
1487 }
1488 if (is_initializing)
1489 bcm43xx_phy_lo_g_measure_txctl2(bcm);
1490 bcm43xx_phy_write(bcm, 0x080F, 0x8078);
1491
1492 /* Measure */
1493 control.low = 0;
1494 control.high = 0;
1495 for (h = 0; h < 10; h++) {
1496 /* Loop over each possible RadioAttenuation (0-9) */
1497 i = pairorder[h];
1498 if (is_initializing) {
1499 if (i == 3) {
1500 control.low = 0;
1501 control.high = 0;
1502 } else if (((i % 2 == 1) && (oldi % 2 == 1)) ||
1503 ((i % 2 == 0) && (oldi % 2 == 0))) {
1504 tmp_control = bcm43xx_get_lopair(phy, oldi, 0);
1505 memcpy(&control, tmp_control, sizeof(control));
1506 } else {
1507 tmp_control = bcm43xx_get_lopair(phy, 3, 0);
1508 memcpy(&control, tmp_control, sizeof(control));
1509 }
1510 }
1511 /* Loop over each possible BasebandAttenuation/2 */
1512 for (j = 0; j < 4; j++) {
1513 if (is_initializing) {
1514 tmp = i * 2 + j;
1515 r27 = 0;
1516 r31 = 0;
1517 if (tmp > 14) {
1518 r31 = 1;
1519 if (tmp > 17)
1520 r27 = 1;
1521 if (tmp > 19)
1522 r27 = 2;
1523 }
1524 } else {
1525 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1526 if (!tmp_control->used)
1527 continue;
1528 memcpy(&control, tmp_control, sizeof(control));
1529 r27 = 3;
1530 r31 = 0;
1531 }
1532 bcm43xx_radio_write16(bcm, 0x43, i);
1533 bcm43xx_radio_write16(bcm, 0x52,
1534 radio->txpower[3]);
1535 udelay(10);
1536
1537 bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
1538
1539 tmp = (regstack[10] & 0xFFF0);
1540 if (r31)
1541 tmp |= 0x0008;
1542 bcm43xx_radio_write16(bcm, 0x007A, tmp);
1543
1544 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1545 bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
1546 }
1547 oldi = i;
1548 }
1549 /* Loop over each possible RadioAttenuation (10-13) */
1550 for (i = 10; i < 14; i++) {
1551 /* Loop over each possible BasebandAttenuation/2 */
1552 for (j = 0; j < 4; j++) {
1553 if (is_initializing) {
1554 tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
1555 memcpy(&control, tmp_control, sizeof(control));
1556 tmp = (i - 9) * 2 + j - 5;//FIXME: This is wrong, as the following if statement can never trigger.
1557 r27 = 0;
1558 r31 = 0;
1559 if (tmp > 14) {
1560 r31 = 1;
1561 if (tmp > 17)
1562 r27 = 1;
1563 if (tmp > 19)
1564 r27 = 2;
1565 }
1566 } else {
1567 tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
1568 if (!tmp_control->used)
1569 continue;
1570 memcpy(&control, tmp_control, sizeof(control));
1571 r27 = 3;
1572 r31 = 0;
1573 }
1574 bcm43xx_radio_write16(bcm, 0x43, i - 9);
1575 bcm43xx_radio_write16(bcm, 0x52,
1576 radio->txpower[3]
1577 | (3/*txctl1*/ << 4));//FIXME: shouldn't txctl1 be zero here and 3 in the loop above?
1578 udelay(10);
1579
1580 bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
1581
1582 tmp = (regstack[10] & 0xFFF0);
1583 if (r31)
1584 tmp |= 0x0008;
1585 bcm43xx_radio_write16(bcm, 0x7A, tmp);
1586
1587 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1588 bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
1589 }
1590 }
1591
1592 /* Restoration */
1593 if (phy->connected) {
1594 bcm43xx_phy_write(bcm, 0x0015, 0xE300);
1595 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA0);
1596 udelay(5);
1597 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA2);
1598 udelay(2);
1599 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA3);
1600 } else
1601 bcm43xx_phy_write(bcm, 0x0015, r27 | 0xEFA0);
1602 bcm43xx_phy_lo_adjust(bcm, is_initializing);
1603 bcm43xx_phy_write(bcm, 0x002E, 0x807F);
1604 if (phy->connected)
1605 bcm43xx_phy_write(bcm, 0x002F, 0x0202);
1606 else
1607 bcm43xx_phy_write(bcm, 0x002F, 0x0101);
1608 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, regstack[4]);
1609 bcm43xx_phy_write(bcm, 0x0015, regstack[5]);
1610 bcm43xx_phy_write(bcm, 0x002A, regstack[6]);
1611 bcm43xx_phy_write(bcm, 0x0035, regstack[7]);
1612 bcm43xx_phy_write(bcm, 0x0060, regstack[8]);
1613 bcm43xx_radio_write16(bcm, 0x0043, regstack[9]);
1614 bcm43xx_radio_write16(bcm, 0x007A, regstack[10]);
1615 regstack[11] &= 0x00F0;
1616 regstack[11] |= (bcm43xx_radio_read16(bcm, 0x52) & 0x000F);
1617 bcm43xx_radio_write16(bcm, 0x52, regstack[11]);
1618 bcm43xx_write16(bcm, 0x03E2, regstack[3]);
1619 if (phy->connected) {
1620 bcm43xx_phy_write(bcm, 0x0811, regstack[12]);
1621 bcm43xx_phy_write(bcm, 0x0812, regstack[13]);
1622 bcm43xx_phy_write(bcm, 0x0814, regstack[14]);
1623 bcm43xx_phy_write(bcm, 0x0815, regstack[15]);
1624 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0]);
1625 bcm43xx_phy_write(bcm, 0x0802, regstack[1]);
1626 }
1627 bcm43xx_radio_selectchannel(bcm, oldchannel, 1);
1628
1629 #ifdef CONFIG_BCM43XX_DEBUG
1630 {
1631 /* Sanity check for all lopairs. */
1632 for (i = 0; i < BCM43xx_LO_COUNT; i++) {
1633 tmp_control = phy->_lo_pairs + i;
1634 if (tmp_control->low < -8 || tmp_control->low > 8 ||
1635 tmp_control->high < -8 || tmp_control->high > 8) {
1636 printk(KERN_WARNING PFX
1637 "WARNING: Invalid LOpair (low: %d, high: %d, index: %d)\n",
1638 tmp_control->low, tmp_control->high, i);
1639 }
1640 }
1641 }
1642 #endif /* CONFIG_BCM43XX_DEBUG */
1643 }
1644
1645 static
1646 void bcm43xx_phy_lo_mark_current_used(struct bcm43xx_private *bcm)
1647 {
1648 struct bcm43xx_lopair *pair;
1649
1650 pair = bcm43xx_current_lopair(bcm);
1651 pair->used = 1;
1652 }
1653
1654 void bcm43xx_phy_lo_mark_all_unused(struct bcm43xx_private *bcm)
1655 {
1656 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1657 struct bcm43xx_lopair *pair;
1658 int i;
1659
1660 for (i = 0; i < BCM43xx_LO_COUNT; i++) {
1661 pair = phy->_lo_pairs + i;
1662 pair->used = 0;
1663 }
1664 }
1665
1666 /* http://bcm-specs.sipsolutions.net/EstimatePowerOut
1667 * This function converts a TSSI value to dBm in Q5.2
1668 */
1669 static s8 bcm43xx_phy_estimate_power_out(struct bcm43xx_private *bcm, s8 tssi)
1670 {
1671 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1672 s8 dbm = 0;
1673 s32 tmp;
1674
1675 tmp = phy->idle_tssi;
1676 tmp += tssi;
1677 tmp -= phy->savedpctlreg;
1678
1679 switch (phy->type) {
1680 case BCM43xx_PHYTYPE_A:
1681 tmp += 0x80;
1682 tmp = limit_value(tmp, 0x00, 0xFF);
1683 dbm = phy->tssi2dbm[tmp];
1684 TODO(); //TODO: There's a FIXME on the specs
1685 break;
1686 case BCM43xx_PHYTYPE_B:
1687 case BCM43xx_PHYTYPE_G:
1688 tmp = limit_value(tmp, 0x00, 0x3F);
1689 dbm = phy->tssi2dbm[tmp];
1690 break;
1691 default:
1692 assert(0);
1693 }
1694
1695 return dbm;
1696 }
1697
1698 /* http://bcm-specs.sipsolutions.net/RecalculateTransmissionPower */
1699 void bcm43xx_phy_xmitpower(struct bcm43xx_private *bcm)
1700 {
1701 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1702 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1703
1704 if (phy->savedpctlreg == 0xFFFF)
1705 return;
1706 if ((bcm->board_type == 0x0416) &&
1707 (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM))
1708 return;
1709
1710 switch (phy->type) {
1711 case BCM43xx_PHYTYPE_A: {
1712
1713 TODO(); //TODO: Nothing for A PHYs yet :-/
1714
1715 break;
1716 }
1717 case BCM43xx_PHYTYPE_B:
1718 case BCM43xx_PHYTYPE_G: {
1719 u16 tmp;
1720 u16 txpower;
1721 s8 v0, v1, v2, v3;
1722 s8 average;
1723 u8 max_pwr;
1724 s16 desired_pwr, estimated_pwr, pwr_adjust;
1725 s16 radio_att_delta, baseband_att_delta;
1726 s16 radio_attenuation, baseband_attenuation;
1727 unsigned long phylock_flags;
1728
1729 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0058);
1730 v0 = (s8)(tmp & 0x00FF);
1731 v1 = (s8)((tmp & 0xFF00) >> 8);
1732 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005A);
1733 v2 = (s8)(tmp & 0x00FF);
1734 v3 = (s8)((tmp & 0xFF00) >> 8);
1735 tmp = 0;
1736
1737 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) {
1738 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0070);
1739 v0 = (s8)(tmp & 0x00FF);
1740 v1 = (s8)((tmp & 0xFF00) >> 8);
1741 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0072);
1742 v2 = (s8)(tmp & 0x00FF);
1743 v3 = (s8)((tmp & 0xFF00) >> 8);
1744 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F)
1745 return;
1746 v0 = (v0 + 0x20) & 0x3F;
1747 v1 = (v1 + 0x20) & 0x3F;
1748 v2 = (v2 + 0x20) & 0x3F;
1749 v3 = (v3 + 0x20) & 0x3F;
1750 tmp = 1;
1751 }
1752 bcm43xx_radio_clear_tssi(bcm);
1753
1754 average = (v0 + v1 + v2 + v3 + 2) / 4;
1755
1756 if (tmp && (bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005E) & 0x8))
1757 average -= 13;
1758
1759 estimated_pwr = bcm43xx_phy_estimate_power_out(bcm, average);
1760
1761 max_pwr = bcm->sprom.maxpower_bgphy;
1762
1763 if ((bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) &&
1764 (phy->type == BCM43xx_PHYTYPE_G))
1765 max_pwr -= 0x3;
1766
1767 /*TODO:
1768 max_pwr = min(REG - bcm->sprom.antennagain_bgphy - 0x6, max_pwr)
1769 where REG is the max power as per the regulatory domain
1770 */
1771
1772 desired_pwr = limit_value(radio->txpower_desired, 0, max_pwr);
1773 /* Check if we need to adjust the current power. */
1774 pwr_adjust = desired_pwr - estimated_pwr;
1775 radio_att_delta = -(pwr_adjust + 7) >> 3;
1776 baseband_att_delta = -(pwr_adjust >> 1) - (4 * radio_att_delta);
1777 if ((radio_att_delta == 0) && (baseband_att_delta == 0)) {
1778 bcm43xx_phy_lo_mark_current_used(bcm);
1779 return;
1780 }
1781
1782 /* Calculate the new attenuation values. */
1783 baseband_attenuation = radio->txpower[0];
1784 baseband_attenuation += baseband_att_delta;
1785 radio_attenuation = radio->txpower[1];
1786 radio_attenuation += radio_att_delta;
1787
1788 /* Get baseband and radio attenuation values into their permitted ranges.
1789 * baseband 0-11, radio 0-9.
1790 * Radio attenuation affects power level 4 times as much as baseband.
1791 */
1792 if (radio_attenuation < 0) {
1793 baseband_attenuation -= (4 * -radio_attenuation);
1794 radio_attenuation = 0;
1795 } else if (radio_attenuation > 9) {
1796 baseband_attenuation += (4 * (radio_attenuation - 9));
1797 radio_attenuation = 9;
1798 } else {
1799 while (baseband_attenuation < 0 && radio_attenuation > 0) {
1800 baseband_attenuation += 4;
1801 radio_attenuation--;
1802 }
1803 while (baseband_attenuation > 11 && radio_attenuation < 9) {
1804 baseband_attenuation -= 4;
1805 radio_attenuation++;
1806 }
1807 }
1808 baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
1809
1810 txpower = radio->txpower[2];
1811 if ((radio->version == 0x2050) && (radio->revision == 2)) {
1812 if (radio_attenuation <= 1) {
1813 if (txpower == 0) {
1814 txpower = 3;
1815 radio_attenuation += 2;
1816 baseband_attenuation += 2;
1817 } else if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) {
1818 baseband_attenuation += 4 * (radio_attenuation - 2);
1819 radio_attenuation = 2;
1820 }
1821 } else if (radio_attenuation > 4 && txpower != 0) {
1822 txpower = 0;
1823 if (baseband_attenuation < 3) {
1824 radio_attenuation -= 3;
1825 baseband_attenuation += 2;
1826 } else {
1827 radio_attenuation -= 2;
1828 baseband_attenuation -= 2;
1829 }
1830 }
1831 }
1832 radio->txpower[2] = txpower;
1833 baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
1834 radio_attenuation = limit_value(radio_attenuation, 0, 9);
1835
1836 bcm43xx_phy_lock(bcm, phylock_flags);
1837 bcm43xx_radio_lock(bcm);
1838 bcm43xx_radio_set_txpower_bg(bcm, baseband_attenuation,
1839 radio_attenuation, txpower);
1840 bcm43xx_phy_lo_mark_current_used(bcm);
1841 bcm43xx_radio_unlock(bcm);
1842 bcm43xx_phy_unlock(bcm, phylock_flags);
1843 break;
1844 }
1845 default:
1846 assert(0);
1847 }
1848 }
1849
1850 static inline
1851 s32 bcm43xx_tssi2dbm_ad(s32 num, s32 den)
1852 {
1853 if (num < 0)
1854 return num/den;
1855 else
1856 return (num+den/2)/den;
1857 }
1858
1859 static inline
1860 s8 bcm43xx_tssi2dbm_entry(s8 entry [], u8 index, s16 pab0, s16 pab1, s16 pab2)
1861 {
1862 s32 m1, m2, f = 256, q, delta;
1863 s8 i = 0;
1864
1865 m1 = bcm43xx_tssi2dbm_ad(16 * pab0 + index * pab1, 32);
1866 m2 = max(bcm43xx_tssi2dbm_ad(32768 + index * pab2, 256), 1);
1867 do {
1868 if (i > 15)
1869 return -EINVAL;
1870 q = bcm43xx_tssi2dbm_ad(f * 4096 -
1871 bcm43xx_tssi2dbm_ad(m2 * f, 16) * f, 2048);
1872 delta = abs(q - f);
1873 f = q;
1874 i++;
1875 } while (delta >= 2);
1876 entry[index] = limit_value(bcm43xx_tssi2dbm_ad(m1 * f, 8192), -127, 128);
1877 return 0;
1878 }
1879
1880 /* http://bcm-specs.sipsolutions.net/TSSI_to_DBM_Table */
1881 int bcm43xx_phy_init_tssi2dbm_table(struct bcm43xx_private *bcm)
1882 {
1883 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1884 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1885 s16 pab0, pab1, pab2;
1886 u8 idx;
1887 s8 *dyn_tssi2dbm;
1888
1889 if (phy->type == BCM43xx_PHYTYPE_A) {
1890 pab0 = (s16)(bcm->sprom.pa1b0);
1891 pab1 = (s16)(bcm->sprom.pa1b1);
1892 pab2 = (s16)(bcm->sprom.pa1b2);
1893 } else {
1894 pab0 = (s16)(bcm->sprom.pa0b0);
1895 pab1 = (s16)(bcm->sprom.pa0b1);
1896 pab2 = (s16)(bcm->sprom.pa0b2);
1897 }
1898
1899 if ((bcm->chip_id == 0x4301) && (radio->version != 0x2050)) {
1900 phy->idle_tssi = 0x34;
1901 phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
1902 return 0;
1903 }
1904
1905 if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
1906 pab0 != -1 && pab1 != -1 && pab2 != -1) {
1907 /* The pabX values are set in SPROM. Use them. */
1908 if (phy->type == BCM43xx_PHYTYPE_A) {
1909 if ((s8)bcm->sprom.idle_tssi_tgt_aphy != 0 &&
1910 (s8)bcm->sprom.idle_tssi_tgt_aphy != -1)
1911 phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_aphy);
1912 else
1913 phy->idle_tssi = 62;
1914 } else {
1915 if ((s8)bcm->sprom.idle_tssi_tgt_bgphy != 0 &&
1916 (s8)bcm->sprom.idle_tssi_tgt_bgphy != -1)
1917 phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_bgphy);
1918 else
1919 phy->idle_tssi = 62;
1920 }
1921 dyn_tssi2dbm = kmalloc(64, GFP_KERNEL);
1922 if (dyn_tssi2dbm == NULL) {
1923 printk(KERN_ERR PFX "Could not allocate memory"
1924 "for tssi2dbm table\n");
1925 return -ENOMEM;
1926 }
1927 for (idx = 0; idx < 64; idx++)
1928 if (bcm43xx_tssi2dbm_entry(dyn_tssi2dbm, idx, pab0, pab1, pab2)) {
1929 phy->tssi2dbm = NULL;
1930 printk(KERN_ERR PFX "Could not generate "
1931 "tssi2dBm table\n");
1932 return -ENODEV;
1933 }
1934 phy->tssi2dbm = dyn_tssi2dbm;
1935 phy->dyn_tssi_tbl = 1;
1936 } else {
1937 /* pabX values not set in SPROM. */
1938 switch (phy->type) {
1939 case BCM43xx_PHYTYPE_A:
1940 /* APHY needs a generated table. */
1941 phy->tssi2dbm = NULL;
1942 printk(KERN_ERR PFX "Could not generate tssi2dBm "
1943 "table (wrong SPROM info)!\n");
1944 return -ENODEV;
1945 case BCM43xx_PHYTYPE_B:
1946 phy->idle_tssi = 0x34;
1947 phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
1948 break;
1949 case BCM43xx_PHYTYPE_G:
1950 phy->idle_tssi = 0x34;
1951 phy->tssi2dbm = bcm43xx_tssi2dbm_g_table;
1952 break;
1953 }
1954 }
1955
1956 return 0;
1957 }
1958
1959 int bcm43xx_phy_init(struct bcm43xx_private *bcm)
1960 {
1961 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1962 int err = -ENODEV;
1963 unsigned long flags;
1964
1965 /* We do not want to be preempted while calibrating
1966 * the hardware.
1967 */
1968 local_irq_save(flags);
1969
1970 switch (phy->type) {
1971 case BCM43xx_PHYTYPE_A:
1972 if (phy->rev == 2 || phy->rev == 3) {
1973 bcm43xx_phy_inita(bcm);
1974 err = 0;
1975 }
1976 break;
1977 case BCM43xx_PHYTYPE_B:
1978 switch (phy->rev) {
1979 case 2:
1980 bcm43xx_phy_initb2(bcm);
1981 err = 0;
1982 break;
1983 case 4:
1984 bcm43xx_phy_initb4(bcm);
1985 err = 0;
1986 break;
1987 case 5:
1988 bcm43xx_phy_initb5(bcm);
1989 err = 0;
1990 break;
1991 case 6:
1992 bcm43xx_phy_initb6(bcm);
1993 err = 0;
1994 break;
1995 }
1996 break;
1997 case BCM43xx_PHYTYPE_G:
1998 bcm43xx_phy_initg(bcm);
1999 err = 0;
2000 break;
2001 }
2002 local_irq_restore(flags);
2003 if (err)
2004 printk(KERN_WARNING PFX "Unknown PHYTYPE found!\n");
2005
2006 return err;
2007 }
2008
2009 void bcm43xx_phy_set_antenna_diversity(struct bcm43xx_private *bcm)
2010 {
2011 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2012 u16 antennadiv;
2013 u16 offset;
2014 u16 value;
2015 u32 ucodeflags;
2016
2017 antennadiv = phy->antenna_diversity;
2018
2019 if (antennadiv == 0xFFFF)
2020 antennadiv = 3;
2021 assert(antennadiv <= 3);
2022
2023 ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
2024 BCM43xx_UCODEFLAGS_OFFSET);
2025 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
2026 BCM43xx_UCODEFLAGS_OFFSET,
2027 ucodeflags & ~BCM43xx_UCODEFLAG_AUTODIV);
2028
2029 switch (phy->type) {
2030 case BCM43xx_PHYTYPE_A:
2031 case BCM43xx_PHYTYPE_G:
2032 if (phy->type == BCM43xx_PHYTYPE_A)
2033 offset = 0x0000;
2034 else
2035 offset = 0x0400;
2036
2037 if (antennadiv == 2)
2038 value = (3/*automatic*/ << 7);
2039 else
2040 value = (antennadiv << 7);
2041 bcm43xx_phy_write(bcm, offset + 1,
2042 (bcm43xx_phy_read(bcm, offset + 1)
2043 & 0x7E7F) | value);
2044
2045 if (antennadiv >= 2) {
2046 if (antennadiv == 2)
2047 value = (antennadiv << 7);
2048 else
2049 value = (0/*force0*/ << 7);
2050 bcm43xx_phy_write(bcm, offset + 0x2B,
2051 (bcm43xx_phy_read(bcm, offset + 0x2B)
2052 & 0xFEFF) | value);
2053 }
2054
2055 if (phy->type == BCM43xx_PHYTYPE_G) {
2056 if (antennadiv >= 2)
2057 bcm43xx_phy_write(bcm, 0x048C,
2058 bcm43xx_phy_read(bcm, 0x048C)
2059 | 0x2000);
2060 else
2061 bcm43xx_phy_write(bcm, 0x048C,
2062 bcm43xx_phy_read(bcm, 0x048C)
2063 & ~0x2000);
2064 if (phy->rev >= 2) {
2065 bcm43xx_phy_write(bcm, 0x0461,
2066 bcm43xx_phy_read(bcm, 0x0461)
2067 | 0x0010);
2068 bcm43xx_phy_write(bcm, 0x04AD,
2069 (bcm43xx_phy_read(bcm, 0x04AD)
2070 & 0x00FF) | 0x0015);
2071 if (phy->rev == 2)
2072 bcm43xx_phy_write(bcm, 0x0427, 0x0008);
2073 else
2074 bcm43xx_phy_write(bcm, 0x0427,
2075 (bcm43xx_phy_read(bcm, 0x0427)
2076 & 0x00FF) | 0x0008);
2077 }
2078 else if (phy->rev >= 6)
2079 bcm43xx_phy_write(bcm, 0x049B, 0x00DC);
2080 } else {
2081 if (phy->rev < 3)
2082 bcm43xx_phy_write(bcm, 0x002B,
2083 (bcm43xx_phy_read(bcm, 0x002B)
2084 & 0x00FF) | 0x0024);
2085 else {
2086 bcm43xx_phy_write(bcm, 0x0061,
2087 bcm43xx_phy_read(bcm, 0x0061)
2088 | 0x0010);
2089 if (phy->rev == 3) {
2090 bcm43xx_phy_write(bcm, 0x0093, 0x001D);
2091 bcm43xx_phy_write(bcm, 0x0027, 0x0008);
2092 } else {
2093 bcm43xx_phy_write(bcm, 0x0093, 0x003A);
2094 bcm43xx_phy_write(bcm, 0x0027,
2095 (bcm43xx_phy_read(bcm, 0x0027)
2096 & 0x00FF) | 0x0008);
2097 }
2098 }
2099 }
2100 break;
2101 case BCM43xx_PHYTYPE_B:
2102 if (bcm->current_core->rev == 2)
2103 value = (3/*automatic*/ << 7);
2104 else
2105 value = (antennadiv << 7);
2106 bcm43xx_phy_write(bcm, 0x03E2,
2107 (bcm43xx_phy_read(bcm, 0x03E2)
2108 & 0xFE7F) | value);
2109 break;
2110 default:
2111 assert(0);
2112 }
2113
2114 if (antennadiv >= 2) {
2115 ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
2116 BCM43xx_UCODEFLAGS_OFFSET);
2117 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
2118 BCM43xx_UCODEFLAGS_OFFSET,
2119 ucodeflags | BCM43xx_UCODEFLAG_AUTODIV);
2120 }
2121
2122 phy->antenna_diversity = antennadiv;
2123 }
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