| blob | 980be8136276d7abca4a847829a31ad937bbf618 |
1 /*
2 * MPC8379E MDS Device Tree Source
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
12 /dts-v1/;
14 / {
15 model = "fsl,mpc8379emds";
16 compatible = "fsl,mpc8379emds","fsl,mpc837xmds";
17 #address-cells = <1>;
18 #size-cells = <1>;
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
32 PowerPC,8379@0 {
33 device_type = "cpu";
34 reg = <0x0>;
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <32768>;
38 i-cache-size = <32768>;
39 timebase-frequency = <0>;
40 bus-frequency = <0>;
41 clock-frequency = <0>;
42 };
43 };
45 memory {
46 device_type = "memory";
47 reg = <0x00000000 0x20000000>; // 512MB at 0
48 };
50 localbus@e0005000 {
51 #address-cells = <2>;
52 #size-cells = <1>;
53 compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
54 reg = <0xe0005000 0x1000>;
55 interrupts = <77 0x8>;
56 interrupt-parent = <&ipic>;
58 // booting from NOR flash
59 ranges = <0 0x0 0xfe000000 0x02000000
60 1 0x0 0xf8000000 0x00008000
61 3 0x0 0xe0600000 0x00008000>;
63 flash@0,0 {
64 #address-cells = <1>;
65 #size-cells = <1>;
66 compatible = "cfi-flash";
67 reg = <0 0x0 0x2000000>;
68 bank-width = <2>;
69 device-width = <1>;
71 u-boot@0 {
72 reg = <0x0 0x100000>;
73 read-only;
74 };
76 fs@100000 {
77 reg = <0x100000 0x800000>;
78 };
80 kernel@1d00000 {
81 reg = <0x1d00000 0x200000>;
82 };
84 dtb@1f00000 {
85 reg = <0x1f00000 0x100000>;
86 };
87 };
89 bcsr@1,0 {
90 reg = <1 0x0 0x8000>;
91 compatible = "fsl,mpc837xmds-bcsr";
92 };
94 nand@3,0 {
95 #address-cells = <1>;
96 #size-cells = <1>;
97 compatible = "fsl,mpc8379-fcm-nand",
98 "fsl,elbc-fcm-nand";
99 reg = <3 0x0 0x8000>;
101 u-boot@0 {
102 reg = <0x0 0x100000>;
103 read-only;
104 };
106 kernel@100000 {
107 reg = <0x100000 0x300000>;
108 };
110 fs@400000 {
111 reg = <0x400000 0x1c00000>;
112 };
113 };
114 };
116 soc@e0000000 {
117 #address-cells = <1>;
118 #size-cells = <1>;
119 device_type = "soc";
120 ranges = <0x0 0xe0000000 0x00100000>;
121 reg = <0xe0000000 0x00000200>;
122 bus-frequency = <0>;
124 wdt@200 {
125 compatible = "mpc83xx_wdt";
126 reg = <0x200 0x100>;
127 };
129 i2c@3000 {
130 #address-cells = <1>;
131 #size-cells = <0>;
132 cell-index = <0>;
133 compatible = "fsl-i2c";
134 reg = <0x3000 0x100>;
135 interrupts = <14 0x8>;
136 interrupt-parent = <&ipic>;
137 dfsrr;
138 };
140 i2c@3100 {
141 #address-cells = <1>;
142 #size-cells = <0>;
143 cell-index = <1>;
144 compatible = "fsl-i2c";
145 reg = <0x3100 0x100>;
146 interrupts = <15 0x8>;
147 interrupt-parent = <&ipic>;
148 dfsrr;
149 };
151 spi@7000 {
152 cell-index = <0>;
153 compatible = "fsl,spi";
154 reg = <0x7000 0x1000>;
155 interrupts = <16 0x8>;
156 interrupt-parent = <&ipic>;
157 mode = "cpu";
158 };
160 dma@82a8 {
161 #address-cells = <1>;
162 #size-cells = <1>;
163 compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
164 reg = <0x82a8 4>;
165 ranges = <0 0x8100 0x1a8>;
166 interrupt-parent = <&ipic>;
167 interrupts = <71 8>;
168 cell-index = <0>;
169 dma-channel@0 {
170 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
171 reg = <0 0x80>;
172 interrupt-parent = <&ipic>;
173 interrupts = <71 8>;
174 };
175 dma-channel@80 {
176 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
177 reg = <0x80 0x80>;
178 interrupt-parent = <&ipic>;
179 interrupts = <71 8>;
180 };
181 dma-channel@100 {
182 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
183 reg = <0x100 0x80>;
184 interrupt-parent = <&ipic>;
185 interrupts = <71 8>;
186 };
187 dma-channel@180 {
188 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
189 reg = <0x180 0x28>;
190 interrupt-parent = <&ipic>;
191 interrupts = <71 8>;
192 };
193 };
195 usb@23000 {
196 compatible = "fsl-usb2-dr";
197 reg = <0x23000 0x1000>;
198 #address-cells = <1>;
199 #size-cells = <0>;
200 interrupt-parent = <&ipic>;
201 interrupts = <38 0x8>;
202 dr_mode = "host";
203 phy_type = "ulpi";
204 };
206 mdio@24520 {
207 #address-cells = <1>;
208 #size-cells = <0>;
209 compatible = "fsl,gianfar-mdio";
210 reg = <0x24520 0x20>;
211 phy2: ethernet-phy@2 {
212 interrupt-parent = <&ipic>;
213 interrupts = <17 0x8>;
214 reg = <0x2>;
215 device_type = "ethernet-phy";
216 };
217 phy3: ethernet-phy@3 {
218 interrupt-parent = <&ipic>;
219 interrupts = <18 0x8>;
220 reg = <0x3>;
221 device_type = "ethernet-phy";
222 };
223 };
225 enet0: ethernet@24000 {
226 cell-index = <0>;
227 device_type = "network";
228 model = "eTSEC";
229 compatible = "gianfar";
230 reg = <0x24000 0x1000>;
231 local-mac-address = [ 00 00 00 00 00 00 ];
232 interrupts = <32 0x8 33 0x8 34 0x8>;
233 phy-connection-type = "mii";
234 interrupt-parent = <&ipic>;
235 phy-handle = <&phy2>;
236 };
238 enet1: ethernet@25000 {
239 cell-index = <1>;
240 device_type = "network";
241 model = "eTSEC";
242 compatible = "gianfar";
243 reg = <0x25000 0x1000>;
244 local-mac-address = [ 00 00 00 00 00 00 ];
245 interrupts = <35 0x8 36 0x8 37 0x8>;
246 phy-connection-type = "mii";
247 interrupt-parent = <&ipic>;
248 phy-handle = <&phy3>;
249 };
251 serial0: serial@4500 {
252 cell-index = <0>;
253 device_type = "serial";
254 compatible = "ns16550";
255 reg = <0x4500 0x100>;
256 clock-frequency = <0>;
257 interrupts = <9 0x8>;
258 interrupt-parent = <&ipic>;
259 };
261 serial1: serial@4600 {
262 cell-index = <1>;
263 device_type = "serial";
264 compatible = "ns16550";
265 reg = <0x4600 0x100>;
266 clock-frequency = <0>;
267 interrupts = <10 0x8>;
268 interrupt-parent = <&ipic>;
269 };
271 crypto@30000 {
272 model = "SEC3";
273 compatible = "talitos";
274 reg = <0x30000 0x10000>;
275 interrupts = <11 0x8>;
276 interrupt-parent = <&ipic>;
277 /* Rev. 3.0 geometry */
278 num-channels = <4>;
279 channel-fifo-len = <24>;
280 exec-units-mask = <0x000001fe>;
281 descriptor-types-mask = <0x03ab0ebf>;
282 };
284 sdhc@2e000 {
285 model = "eSDHC";
286 compatible = "fsl,esdhc";
287 reg = <0x2e000 0x1000>;
288 interrupts = <42 0x8>;
289 interrupt-parent = <&ipic>;
290 };
292 sata@18000 {
293 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
294 reg = <0x18000 0x1000>;
295 interrupts = <44 0x8>;
296 interrupt-parent = <&ipic>;
297 };
299 sata@19000 {
300 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
301 reg = <0x19000 0x1000>;
302 interrupts = <45 0x8>;
303 interrupt-parent = <&ipic>;
304 };
306 sata@1a000 {
307 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
308 reg = <0x1a000 0x1000>;
309 interrupts = <46 0x8>;
310 interrupt-parent = <&ipic>;
311 };
313 sata@1b000 {
314 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
315 reg = <0x1b000 0x1000>;
316 interrupts = <47 0x8>;
317 interrupt-parent = <&ipic>;
318 };
320 /* IPIC
321 * interrupts cell = <intr #, sense>
322 * sense values match linux IORESOURCE_IRQ_* defines:
323 * sense == 8: Level, low assertion
324 * sense == 2: Edge, high-to-low change
325 */
326 ipic: pic@700 {
327 compatible = "fsl,ipic";
328 interrupt-controller;
329 #address-cells = <0>;
330 #interrupt-cells = <2>;
331 reg = <0x700 0x100>;
332 };
333 };
335 pci0: pci@e0008500 {
336 cell-index = <0>;
337 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
338 interrupt-map = <
340 /* IDSEL 0x11 */
341 0x8800 0x0 0x0 0x1 &ipic 20 0x8
342 0x8800 0x0 0x0 0x2 &ipic 21 0x8
343 0x8800 0x0 0x0 0x3 &ipic 22 0x8
344 0x8800 0x0 0x0 0x4 &ipic 23 0x8
346 /* IDSEL 0x12 */
347 0x9000 0x0 0x0 0x1 &ipic 22 0x8
348 0x9000 0x0 0x0 0x2 &ipic 23 0x8
349 0x9000 0x0 0x0 0x3 &ipic 20 0x8
350 0x9000 0x0 0x0 0x4 &ipic 21 0x8
352 /* IDSEL 0x13 */
353 0x9800 0x0 0x0 0x1 &ipic 23 0x8
354 0x9800 0x0 0x0 0x2 &ipic 20 0x8
355 0x9800 0x0 0x0 0x3 &ipic 21 0x8
356 0x9800 0x0 0x0 0x4 &ipic 22 0x8
358 /* IDSEL 0x15 */
359 0xa800 0x0 0x0 0x1 &ipic 20 0x8
360 0xa800 0x0 0x0 0x2 &ipic 21 0x8
361 0xa800 0x0 0x0 0x3 &ipic 22 0x8
362 0xa800 0x0 0x0 0x4 &ipic 23 0x8
364 /* IDSEL 0x16 */
365 0xb000 0x0 0x0 0x1 &ipic 23 0x8
366 0xb000 0x0 0x0 0x2 &ipic 20 0x8
367 0xb000 0x0 0x0 0x3 &ipic 21 0x8
368 0xb000 0x0 0x0 0x4 &ipic 22 0x8
370 /* IDSEL 0x17 */
371 0xb800 0x0 0x0 0x1 &ipic 22 0x8
372 0xb800 0x0 0x0 0x2 &ipic 23 0x8
373 0xb800 0x0 0x0 0x3 &ipic 20 0x8
374 0xb800 0x0 0x0 0x4 &ipic 21 0x8
376 /* IDSEL 0x18 */
377 0xc000 0x0 0x0 0x1 &ipic 21 0x8
378 0xc000 0x0 0x0 0x2 &ipic 22 0x8
379 0xc000 0x0 0x0 0x3 &ipic 23 0x8
380 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
381 interrupt-parent = <&ipic>;
382 interrupts = <66 0x8>;
383 bus-range = <0x0 0x0>;
384 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
385 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
386 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
387 clock-frequency = <0>;
388 #interrupt-cells = <1>;
389 #size-cells = <2>;
390 #address-cells = <3>;
391 reg = <0xe0008500 0x100>;
392 compatible = "fsl,mpc8349-pci";
393 device_type = "pci";
394 };
395 };