drivers/video/chipsfb.c

   1 /*
   2  *  drivers/video/chipsfb.c -- frame buffer device for
   3  *  Chips & Technologies 65550 chip.
   4  *
   5  *  Copyright (C) 1998-2002 Paul Mackerras
   6  *
   7  *  This file is derived from the Powermac "chips" driver:
   8  *  Copyright (C) 1997 Fabio Riccardi.
   9  *  And from the frame buffer device for Open Firmware-initialized devices:
  10  *  Copyright (C) 1997 Geert Uytterhoeven.
  11  *
  12  *  This file is subject to the terms and conditions of the GNU General Public
  13  *  License. See the file COPYING in the main directory of this archive for
  14  *  more details.
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/errno.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/tty.h>
  23 #include <linux/slab.h>
  24 #include <linux/vmalloc.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/fb.h>
  28 #include <linux/init.h>
  29 #include <linux/pci.h>
  30 #include <linux/console.h>
  31 #include <asm/io.h>
  32
  33 #ifdef CONFIG_PMAC_BACKLIGHT
  34 #include <asm/backlight.h>
  35 #endif
  36
  37 /*
  38  * Since we access the display with inb/outb to fixed port numbers,
  39  * we can only handle one 6555x chip.  -- paulus
  40  */
  41 #define write_ind(num, val, ap, dp)     do { \
  42         outb((num), (ap)); outb((val), (dp)); \
  43 } while (0)
  44 #define read_ind(num, var, ap, dp)      do { \
  45         outb((num), (ap)); var = inb((dp)); \
  46 } while (0)
  47
  48 /* extension registers */
  49 #define write_xr(num, val)      write_ind(num, val, 0x3d6, 0x3d7)
  50 #define read_xr(num, var)       read_ind(num, var, 0x3d6, 0x3d7)
  51 /* flat panel registers */
  52 #define write_fr(num, val)      write_ind(num, val, 0x3d0, 0x3d1)
  53 #define read_fr(num, var)       read_ind(num, var, 0x3d0, 0x3d1)
  54 /* CRTC registers */
  55 #define write_cr(num, val)      write_ind(num, val, 0x3d4, 0x3d5)
  56 #define read_cr(num, var)       read_ind(num, var, 0x3d4, 0x3d5)
  57 /* graphics registers */
  58 #define write_gr(num, val)      write_ind(num, val, 0x3ce, 0x3cf)
  59 #define read_gr(num, var)       read_ind(num, var, 0x3ce, 0x3cf)
  60 /* sequencer registers */
  61 #define write_sr(num, val)      write_ind(num, val, 0x3c4, 0x3c5)
  62 #define read_sr(num, var)       read_ind(num, var, 0x3c4, 0x3c5)
  63 /* attribute registers - slightly strange */
  64 #define write_ar(num, val)      do { \
  65         inb(0x3da); write_ind(num, val, 0x3c0, 0x3c0); \
  66 } while (0)
  67 #define read_ar(num, var)       do { \
  68         inb(0x3da); read_ind(num, var, 0x3c0, 0x3c1); \
  69 } while (0)
  70
  71 /*
  72  * Exported functions
  73  */
  74 int chips_init(void);
  75
  76 static int chipsfb_pci_init(struct pci_dev *dp, const struct pci_device_id *);
  77 static int chipsfb_check_var(struct fb_var_screeninfo *var,
  78                              struct fb_info *info);
  79 static int chipsfb_set_par(struct fb_info *info);
  80 static int chipsfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
  81                              u_int transp, struct fb_info *info);
  82 static int chipsfb_blank(int blank, struct fb_info *info);
  83
  84 static struct fb_ops chipsfb_ops = {
  85         .owner          = THIS_MODULE,
  86         .fb_check_var   = chipsfb_check_var,
  87         .fb_set_par     = chipsfb_set_par,
  88         .fb_setcolreg   = chipsfb_setcolreg,
  89         .fb_blank       = chipsfb_blank,
  90         .fb_fillrect    = cfb_fillrect,
  91         .fb_copyarea    = cfb_copyarea,
  92         .fb_imageblit   = cfb_imageblit,
  93 };
  94
  95 static int chipsfb_check_var(struct fb_var_screeninfo *var,
  96                              struct fb_info *info)
  97 {
  98         if (var->xres > 800 || var->yres > 600
  99             || var->xres_virtual > 800 || var->yres_virtual > 600
 100             || (var->bits_per_pixel != 8 && var->bits_per_pixel != 16)
 101             || var->nonstd
 102             || (var->vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
 103                 return -EINVAL;
 104
 105         var->xres = var->xres_virtual = 800;
 106         var->yres = var->yres_virtual = 600;
 107
 108         return 0;
 109 }
 110
 111 static int chipsfb_set_par(struct fb_info *info)
 112 {
 113         if (info->var.bits_per_pixel == 16) {
 114                 write_cr(0x13, 200);            // Set line length (doublewords)
 115                 write_xr(0x81, 0x14);           // 15 bit (555) color mode
 116                 write_xr(0x82, 0x00);           // Disable palettes
 117                 write_xr(0x20, 0x10);           // 16 bit blitter mode
 118
 119                 info->fix.line_length = 800*2;
 120                 info->fix.visual = FB_VISUAL_TRUECOLOR;
 121
 122                 info->var.red.offset = 10;
 123                 info->var.green.offset = 5;
 124                 info->var.blue.offset = 0;
 125                 info->var.red.length = info->var.green.length =
 126                         info->var.blue.length = 5;
 127
 128         } else {
 129                 /* p->var.bits_per_pixel == 8 */
 130                 write_cr(0x13, 100);            // Set line length (doublewords)
 131                 write_xr(0x81, 0x12);           // 8 bit color mode
 132                 write_xr(0x82, 0x08);           // Graphics gamma enable
 133                 write_xr(0x20, 0x00);           // 8 bit blitter mode
 134
 135                 info->fix.line_length = 800;
 136                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 137
 138                 info->var.red.offset = info->var.green.offset =
 139                         info->var.blue.offset = 0;
 140                 info->var.red.length = info->var.green.length =
 141                         info->var.blue.length = 8;
 142
 143         }
 144         return 0;
 145 }
 146
 147 static int chipsfb_blank(int blank, struct fb_info *info)
 148 {
 149 #ifdef CONFIG_PMAC_BACKLIGHT
 150         mutex_lock(&pmac_backlight_mutex);
 151
 152         if (pmac_backlight) {
 153                 down(&pmac_backlight->sem);
 154
 155                 /* used to disable backlight only for blank > 1, but it seems
 156                  * useful at blank = 1 too (saves battery, extends backlight
 157                  * life)
 158                  */
 159                 if (blank)
 160                         pmac_backlight->props->power = FB_BLANK_POWERDOWN;
 161                 else
 162                         pmac_backlight->props->power = FB_BLANK_UNBLANK;
 163                 pmac_backlight->props->update_status(pmac_backlight);
 164                 up(&pmac_backlight->sem);
 165         }
 166
 167         mutex_unlock(&pmac_backlight_mutex);
 168 #endif /* CONFIG_PMAC_BACKLIGHT */
 169
 170         return 1;       /* get fb_blank to set the colormap to all black */
 171 }
 172
 173 static int chipsfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 174                              u_int transp, struct fb_info *info)
 175 {
 176         if (regno > 255)
 177                 return 1;
 178         red >>= 8;
 179         green >>= 8;
 180         blue >>= 8;
 181         outb(regno, 0x3c8);
 182         udelay(1);
 183         outb(red, 0x3c9);
 184         outb(green, 0x3c9);
 185         outb(blue, 0x3c9);
 186
 187         return 0;
 188 }
 189
 190 struct chips_init_reg {
 191         unsigned char addr;
 192         unsigned char data;
 193 };
 194
 195 static struct chips_init_reg chips_init_sr[] = {
 196         { 0x00, 0x03 },
 197         { 0x01, 0x01 },
 198         { 0x02, 0x0f },
 199         { 0x04, 0x0e }
 200 };
 201
 202 static struct chips_init_reg chips_init_gr[] = {
 203         { 0x05, 0x00 },
 204         { 0x06, 0x0d },
 205         { 0x08, 0xff }
 206 };
 207
 208 static struct chips_init_reg chips_init_ar[] = {
 209         { 0x10, 0x01 },
 210         { 0x12, 0x0f },
 211         { 0x13, 0x00 }
 212 };
 213
 214 static struct chips_init_reg chips_init_cr[] = {
 215         { 0x00, 0x7f },
 216         { 0x01, 0x63 },
 217         { 0x02, 0x63 },
 218         { 0x03, 0x83 },
 219         { 0x04, 0x66 },
 220         { 0x05, 0x10 },
 221         { 0x06, 0x72 },
 222         { 0x07, 0x3e },
 223         { 0x08, 0x00 },
 224         { 0x09, 0x40 },
 225         { 0x0c, 0x00 },
 226         { 0x0d, 0x00 },
 227         { 0x10, 0x59 },
 228         { 0x11, 0x0d },
 229         { 0x12, 0x57 },
 230         { 0x13, 0x64 },
 231         { 0x14, 0x00 },
 232         { 0x15, 0x57 },
 233         { 0x16, 0x73 },
 234         { 0x17, 0xe3 },
 235         { 0x18, 0xff },
 236         { 0x30, 0x02 },
 237         { 0x31, 0x02 },
 238         { 0x32, 0x02 },
 239         { 0x33, 0x02 },
 240         { 0x40, 0x00 },
 241         { 0x41, 0x00 },
 242         { 0x40, 0x80 }
 243 };
 244
 245 static struct chips_init_reg chips_init_fr[] = {
 246         { 0x01, 0x02 },
 247         { 0x03, 0x08 },
 248         { 0x04, 0x81 },
 249         { 0x05, 0x21 },
 250         { 0x08, 0x0c },
 251         { 0x0a, 0x74 },
 252         { 0x0b, 0x11 },
 253         { 0x10, 0x0c },
 254         { 0x11, 0xe0 },
 255         /* { 0x12, 0x40 }, -- 3400 needs 40, 2400 needs 48, no way to tell */
 256         { 0x20, 0x63 },
 257         { 0x21, 0x68 },
 258         { 0x22, 0x19 },
 259         { 0x23, 0x7f },
 260         { 0x24, 0x68 },
 261         { 0x26, 0x00 },
 262         { 0x27, 0x0f },
 263         { 0x30, 0x57 },
 264         { 0x31, 0x58 },
 265         { 0x32, 0x0d },
 266         { 0x33, 0x72 },
 267         { 0x34, 0x02 },
 268         { 0x35, 0x22 },
 269         { 0x36, 0x02 },
 270         { 0x37, 0x00 }
 271 };
 272
 273 static struct chips_init_reg chips_init_xr[] = {
 274         { 0xce, 0x00 },         /* set default memory clock */
 275         { 0xcc, 0x43 },         /* memory clock ratio */
 276         { 0xcd, 0x18 },
 277         { 0xce, 0xa1 },
 278         { 0xc8, 0x84 },
 279         { 0xc9, 0x0a },
 280         { 0xca, 0x00 },
 281         { 0xcb, 0x20 },
 282         { 0xcf, 0x06 },
 283         { 0xd0, 0x0e },
 284         { 0x09, 0x01 },
 285         { 0x0a, 0x02 },
 286         { 0x0b, 0x01 },
 287         { 0x20, 0x00 },
 288         { 0x40, 0x03 },
 289         { 0x41, 0x01 },
 290         { 0x42, 0x00 },
 291         { 0x80, 0x82 },
 292         { 0x81, 0x12 },
 293         { 0x82, 0x08 },
 294         { 0xa0, 0x00 },
 295         { 0xa8, 0x00 }
 296 };
 297
 298 static void __init chips_hw_init(void)
 299 {
 300         int i;
 301
 302         for (i = 0; i < ARRAY_SIZE(chips_init_xr); ++i)
 303                 write_xr(chips_init_xr[i].addr, chips_init_xr[i].data);
 304         outb(0x29, 0x3c2); /* set misc output reg */
 305         for (i = 0; i < ARRAY_SIZE(chips_init_sr); ++i)
 306                 write_sr(chips_init_sr[i].addr, chips_init_sr[i].data);
 307         for (i = 0; i < ARRAY_SIZE(chips_init_gr); ++i)
 308                 write_gr(chips_init_gr[i].addr, chips_init_gr[i].data);
 309         for (i = 0; i < ARRAY_SIZE(chips_init_ar); ++i)
 310                 write_ar(chips_init_ar[i].addr, chips_init_ar[i].data);
 311         for (i = 0; i < ARRAY_SIZE(chips_init_cr); ++i)
 312                 write_cr(chips_init_cr[i].addr, chips_init_cr[i].data);
 313         for (i = 0; i < ARRAY_SIZE(chips_init_fr); ++i)
 314                 write_fr(chips_init_fr[i].addr, chips_init_fr[i].data);
 315 }
 316
 317 static struct fb_fix_screeninfo chipsfb_fix __initdata = {
 318         .id =           "C&T 65550",
 319         .type =         FB_TYPE_PACKED_PIXELS,
 320         .visual =       FB_VISUAL_PSEUDOCOLOR,
 321         .accel =        FB_ACCEL_NONE,
 322         .line_length =  800,
 323
 324 // FIXME: Assumes 1MB frame buffer, but 65550 supports 1MB or 2MB.
 325 // * "3500" PowerBook G3 (the original PB G3) has 2MB.
 326 // * 2400 has 1MB composed of 2 Mitsubishi M5M4V4265CTP DRAM chips.
 327 //   Motherboard actually supports 2MB -- there are two blank locations
 328 //   for a second pair of DRAMs.  (Thanks, Apple!)
 329 // * 3400 has 1MB (I think).  Don't know if it's expandable.
 330 // -- Tim Seufert
 331         .smem_len =     0x100000,       /* 1MB */
 332 };
 333
 334 static struct fb_var_screeninfo chipsfb_var __initdata = {
 335         .xres = 800,
 336         .yres = 600,
 337         .xres_virtual = 800,
 338         .yres_virtual = 600,
 339         .bits_per_pixel = 8,
 340         .red = { .length = 8 },
 341         .green = { .length = 8 },
 342         .blue = { .length = 8 },
 343         .height = -1,
 344         .width = -1,
 345         .vmode = FB_VMODE_NONINTERLACED,
 346         .pixclock = 10000,
 347         .left_margin = 16,
 348         .right_margin = 16,
 349         .upper_margin = 16,
 350         .lower_margin = 16,
 351         .hsync_len = 8,
 352         .vsync_len = 8,
 353 };
 354
 355 static void __init init_chips(struct fb_info *p, unsigned long addr)
 356 {
 357         memset(p->screen_base, 0, 0x100000);
 358
 359         p->fix = chipsfb_fix;
 360         p->fix.smem_start = addr;
 361
 362         p->var = chipsfb_var;
 363
 364         p->fbops = &chipsfb_ops;
 365         p->flags = FBINFO_DEFAULT;
 366
 367         fb_alloc_cmap(&p->cmap, 256, 0);
 368
 369         chips_hw_init();
 370 }
 371
 372 static int __devinit
 373 chipsfb_pci_init(struct pci_dev *dp, const struct pci_device_id *ent)
 374 {
 375         struct fb_info *p;
 376         unsigned long addr, size;
 377         unsigned short cmd;
 378         int rc = -ENODEV;
 379
 380         if (pci_enable_device(dp) < 0) {
 381                 dev_err(&dp->dev, "Cannot enable PCI device\n");
 382                 goto err_out;
 383         }
 384
 385         if ((dp->resource[0].flags & IORESOURCE_MEM) == 0)
 386                 goto err_disable;
 387         addr = pci_resource_start(dp, 0);
 388         size = pci_resource_len(dp, 0);
 389         if (addr == 0)
 390                 goto err_disable;
 391
 392         p = framebuffer_alloc(0, &dp->dev);
 393         if (p == NULL) {
 394                 dev_err(&dp->dev, "Cannot allocate framebuffer structure\n");
 395                 rc = -ENOMEM;
 396                 goto err_disable;
 397         }
 398
 399         if (pci_request_region(dp, 0, "chipsfb") != 0) {
 400                 dev_err(&dp->dev, "Cannot request framebuffer\n");
 401                 rc = -EBUSY;
 402                 goto err_release_fb;
 403         }
 404
 405 #ifdef __BIG_ENDIAN
 406         addr += 0x800000;       // Use big-endian aperture
 407 #endif
 408
 409         /* we should use pci_enable_device here, but,
 410            the device doesn't declare its I/O ports in its BARs
 411            so pci_enable_device won't turn on I/O responses */
 412         pci_read_config_word(dp, PCI_COMMAND, &cmd);
 413         cmd |= 3;       /* enable memory and IO space */
 414         pci_write_config_word(dp, PCI_COMMAND, cmd);
 415
 416 #ifdef CONFIG_PMAC_BACKLIGHT
 417         /* turn on the backlight */
 418         mutex_lock(&pmac_backlight_mutex);
 419         if (pmac_backlight) {
 420                 down(&pmac_backlight->sem);
 421                 pmac_backlight->props->power = FB_BLANK_UNBLANK;
 422                 pmac_backlight->props->update_status(pmac_backlight);
 423                 up(&pmac_backlight->sem);
 424         }
 425         mutex_unlock(&pmac_backlight_mutex);
 426 #endif /* CONFIG_PMAC_BACKLIGHT */
 427
 428 #ifdef CONFIG_PPC
 429         p->screen_base = __ioremap(addr, 0x200000, _PAGE_NO_CACHE);
 430 #else
 431         p->screen_base = ioremap(addr, 0x200000);
 432 #endif
 433         if (p->screen_base == NULL) {
 434                 dev_err(&dp->dev, "Cannot map framebuffer\n");
 435                 rc = -ENOMEM;
 436                 goto err_release_pci;
 437         }
 438
 439         pci_set_drvdata(dp, p);
 440         p->device = &dp->dev;
 441
 442         init_chips(p, addr);
 443
 444         if (register_framebuffer(p) < 0) {
 445                 dev_err(&dp->dev,"C&T 65550 framebuffer failed to register\n");
 446                 goto err_unmap;
 447         }
 448
 449         dev_info(&dp->dev,"fb%d: Chips 65550 frame buffer"
 450                  " (%dK RAM detected)\n",
 451                  p->node, p->fix.smem_len / 1024);
 452
 453         return 0;
 454
 455  err_unmap:
 456         iounmap(p->screen_base);
 457  err_release_pci:
 458         pci_release_region(dp, 0);
 459  err_release_fb:
 460         framebuffer_release(p);
 461  err_disable:
 462  err_out:
 463         return rc;
 464 }
 465
 466 static void __devexit chipsfb_remove(struct pci_dev *dp)
 467 {
 468         struct fb_info *p = pci_get_drvdata(dp);
 469
 470         if (p->screen_base == NULL)
 471                 return;
 472         unregister_framebuffer(p);
 473         iounmap(p->screen_base);
 474         p->screen_base = NULL;
 475         pci_release_region(dp, 0);
 476 }
 477
 478 #ifdef CONFIG_PM
 479 static int chipsfb_pci_suspend(struct pci_dev *pdev, pm_message_t state)
 480 {
 481         struct fb_info *p = pci_get_drvdata(pdev);
 482
 483         if (state.event == pdev->dev.power.power_state.event)
 484                 return 0;
 485         if (state.event != PM_SUSPEND_MEM)
 486                 goto done;
 487
 488         acquire_console_sem();
 489         chipsfb_blank(1, p);
 490         fb_set_suspend(p, 1);
 491         release_console_sem();
 492  done:
 493         pdev->dev.power.power_state = state;
 494         return 0;
 495 }
 496
 497 static int chipsfb_pci_resume(struct pci_dev *pdev)
 498 {
 499         struct fb_info *p = pci_get_drvdata(pdev);
 500
 501         acquire_console_sem();
 502         fb_set_suspend(p, 0);
 503         chipsfb_blank(0, p);
 504         release_console_sem();
 505
 506         pdev->dev.power.power_state = PMSG_ON;
 507         return 0;
 508 }
 509 #endif /* CONFIG_PM */
 510
 511
 512 static struct pci_device_id chipsfb_pci_tbl[] = {
 513         { PCI_VENDOR_ID_CT, PCI_DEVICE_ID_CT_65550, PCI_ANY_ID, PCI_ANY_ID },
 514         { 0 }
 515 };
 516
 517 MODULE_DEVICE_TABLE(pci, chipsfb_pci_tbl);
 518
 519 static struct pci_driver chipsfb_driver = {
 520         .name =         "chipsfb",
 521         .id_table =     chipsfb_pci_tbl,
 522         .probe =        chipsfb_pci_init,
 523         .remove =       __devexit_p(chipsfb_remove),
 524 #ifdef CONFIG_PM
 525         .suspend =      chipsfb_pci_suspend,
 526         .resume =       chipsfb_pci_resume,
 527 #endif
 528 };
 529
 530 int __init chips_init(void)
 531 {
 532         if (fb_get_options("chipsfb", NULL))
 533                 return -ENODEV;
 534
 535         return pci_register_driver(&chipsfb_driver);
 536 }
 537
 538 module_init(chips_init);
 539
 540 static void __exit chipsfb_exit(void)
 541 {
 542         pci_unregister_driver(&chipsfb_driver);
 543 }
 544
 545 MODULE_LICENSE("GPL");