2 * I2O kernel space accessible structures/APIs
4 * (c) Copyright 1999, 2000 Red Hat Software
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
11 *************************************************************************
13 * This header file defined the I2O APIs/structures for use by
14 * the I2O kernel modules.
21 #ifdef __KERNEL__ /* This file to be included by kernel only */
23 #include <linux/i2o-dev.h>
25 /* How many different OSM's are we allowing */
26 #define I2O_MAX_DRIVERS 8
29 #include <asm/semaphore.h> /* Needed for MUTEX init macros */
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
33 /* message queue empty */
34 #define I2O_QUEUE_EMPTY 0xffffffff
48 u32 icntxt
; /* initiator context */
49 u32 tcntxt
; /* transaction context */
58 * Each I2O device entity has one of these. There is one per device.
61 i2o_lct_entry lct_data
; /* Device LCT information */
63 struct i2o_controller
*iop
; /* Controlling IOP */
64 struct list_head list
; /* node in IOP devices list */
68 struct semaphore lock
; /* device lock */
70 struct class_device classdev
; /* i2o device class */
74 * Event structure provided to the event handling function
77 struct work_struct work
;
78 struct i2o_device
*i2o_dev
; /* I2O device pointer from which the
79 event reply was initiated */
80 u16 size
; /* Size of data in 32-bit words */
81 u32 tcntxt
; /* Transaction context used at
83 u32 event_indicator
; /* Event indicator from reply */
84 u32 data
[0]; /* Event data from reply */
88 * I2O classes which could be handled by the OSM
95 * I2O driver structure for OSMs
98 char *name
; /* OSM name */
99 int context
; /* Low 8 bits of the transaction info */
100 struct i2o_class_id
*classes
; /* I2O classes that this OSM handles */
102 /* Message reply handler */
103 int (*reply
) (struct i2o_controller
*, u32
, struct i2o_message
*);
106 void (*event
) (struct i2o_event
*);
108 struct workqueue_struct
*event_queue
; /* Event queue */
110 struct device_driver driver
;
112 /* notification of changes */
113 void (*notify_controller_add
) (struct i2o_controller
*);
114 void (*notify_controller_remove
) (struct i2o_controller
*);
115 void (*notify_device_add
) (struct i2o_device
*);
116 void (*notify_device_remove
) (struct i2o_device
*);
118 struct semaphore lock
;
122 * Contains all information which are necessary for DMA operations
131 * Context queue entry, used for 32-bit context on 64-bit systems
133 struct i2o_context_list_element
{
134 struct list_head list
;
137 unsigned long timestamp
;
141 * Each I2O controller has one of these objects
143 struct i2o_controller
{
148 struct pci_dev
*pdev
; /* PCI device */
150 unsigned int promise
:1; /* Promise controller */
151 unsigned int adaptec
:1; /* DPT / Adaptec controller */
152 unsigned int raptor
:1; /* split bar */
153 unsigned int no_quiesce
:1; /* dont quiesce before reset */
154 unsigned int short_req
:1; /* use small block sizes */
155 unsigned int limit_sectors
:1; /* limit number of sectors / request */
156 unsigned int pae_support
:1; /* controller has 64-bit SGL support */
158 struct list_head devices
; /* list of I2O devices */
159 struct list_head list
; /* Controller list */
161 void __iomem
*in_port
; /* Inbout port address */
162 void __iomem
*out_port
; /* Outbound port address */
163 void __iomem
*irq_status
; /* Interrupt status register address */
164 void __iomem
*irq_mask
; /* Interrupt mask register address */
166 /* Dynamic LCT related data */
168 struct i2o_dma status
; /* status of IOP */
170 struct i2o_dma hrt
; /* HW Resource Table */
171 i2o_lct
*lct
; /* Logical Config Table */
172 struct i2o_dma dlct
; /* Temp LCT */
173 struct semaphore lct_lock
; /* Lock for LCT updates */
174 struct i2o_dma status_block
; /* IOP status block */
176 struct i2o_dma base
; /* controller messaging unit */
177 struct i2o_dma in_queue
; /* inbound message queue Host->IOP */
178 struct i2o_dma out_queue
; /* outbound message queue IOP->Host */
180 unsigned int battery
:1; /* Has a battery backup */
181 unsigned int io_alloc
:1; /* An I/O resource was allocated */
182 unsigned int mem_alloc
:1; /* A memory resource was allocated */
184 struct resource io_resource
; /* I/O resource allocated to the IOP */
185 struct resource mem_resource
; /* Mem resource allocated to the IOP */
187 struct device device
;
188 struct i2o_device
*exec
; /* Executive */
189 #if BITS_PER_LONG == 64
190 spinlock_t context_list_lock
; /* lock for context_list */
191 atomic_t context_list_counter
; /* needed for unique contexts */
192 struct list_head context_list
; /* list of context id's
195 spinlock_t lock
; /* lock for controller
198 void *driver_data
[I2O_MAX_DRIVERS
]; /* storage for drivers */
202 * I2O System table entry
204 * The system table contains information about all the IOPs in the
205 * system. It is sent to all IOPs so that they can create peer2peer
206 * connections between them.
208 struct i2o_sys_tbl_entry
{
220 u32 iop_capabilities
;
232 struct i2o_sys_tbl_entry iops
[0];
235 extern struct list_head i2o_controllers
;
237 /* Message functions */
238 static inline u32
i2o_msg_get(struct i2o_controller
*, struct i2o_message __iomem
**);
239 extern u32
i2o_msg_get_wait(struct i2o_controller
*, struct i2o_message __iomem
**,
241 static inline void i2o_msg_post(struct i2o_controller
*, u32
);
242 static inline int i2o_msg_post_wait(struct i2o_controller
*, u32
,
244 extern int i2o_msg_post_wait_mem(struct i2o_controller
*, u32
, unsigned long,
246 extern void i2o_msg_nop(struct i2o_controller
*, u32
);
247 static inline void i2o_flush_reply(struct i2o_controller
*, u32
);
250 extern int i2o_status_get(struct i2o_controller
*);
252 extern int i2o_event_register(struct i2o_device
*, struct i2o_driver
*, int,
254 extern struct i2o_device
*i2o_iop_find_device(struct i2o_controller
*, u16
);
255 extern struct i2o_controller
*i2o_find_iop(int);
257 /* Functions needed for handling 64-bit pointers in 32-bit context */
258 #if BITS_PER_LONG == 64
259 extern u32
i2o_cntxt_list_add(struct i2o_controller
*, void *);
260 extern void *i2o_cntxt_list_get(struct i2o_controller
*, u32
);
261 extern u32
i2o_cntxt_list_remove(struct i2o_controller
*, void *);
262 extern u32
i2o_cntxt_list_get_ptr(struct i2o_controller
*, void *);
264 static inline u32
i2o_ptr_low(void *ptr
)
266 return (u32
) (u64
) ptr
;
269 static inline u32
i2o_ptr_high(void *ptr
)
271 return (u32
) ((u64
) ptr
>> 32);
274 static inline u32
i2o_dma_low(dma_addr_t dma_addr
)
276 return (u32
) (u64
) dma_addr
;
279 static inline u32
i2o_dma_high(dma_addr_t dma_addr
)
281 return (u32
) ((u64
) dma_addr
>> 32);
284 static inline u32
i2o_cntxt_list_add(struct i2o_controller
*c
, void *ptr
)
289 static inline void *i2o_cntxt_list_get(struct i2o_controller
*c
, u32 context
)
291 return (void *)context
;
294 static inline u32
i2o_cntxt_list_remove(struct i2o_controller
*c
, void *ptr
)
299 static inline u32
i2o_cntxt_list_get_ptr(struct i2o_controller
*c
, void *ptr
)
304 static inline u32
i2o_ptr_low(void *ptr
)
309 static inline u32
i2o_ptr_high(void *ptr
)
314 static inline u32
i2o_dma_low(dma_addr_t dma_addr
)
316 return (u32
) dma_addr
;
319 static inline u32
i2o_dma_high(dma_addr_t dma_addr
)
326 * i2o_sg_tablesize - Calculate the maximum number of elements in a SGL
327 * @c: I2O controller for which the calculation should be done
328 * @body_size: maximum body size used for message in 32-bit words.
330 * Return the maximum number of SG elements in a SG list.
332 static inline u16
i2o_sg_tablesize(struct i2o_controller
*c
, u16 body_size
)
334 i2o_status_block
*sb
= c
->status_block
.virt
;
336 (sb
->inbound_frame_size
- sizeof(struct i2o_message
) / 4) -
339 if (c
->pae_support
) {
341 * for 64-bit a SG attribute element must be added and each
342 * SG element needs 12 bytes instead of 8.
349 if (c
->short_req
&& (sg_count
> 8))
356 * i2o_dma_map_single - Map pointer to controller and fill in I2O message.
358 * @ptr: pointer to the data which should be mapped
359 * @size: size of data in bytes
360 * @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE
361 * @sg_ptr: pointer to the SG list inside the I2O message
363 * This function does all necessary DMA handling and also writes the I2O
364 * SGL elements into the I2O message. For details on DMA handling see also
365 * dma_map_single(). The pointer sg_ptr will only be set to the end of the
366 * SG list if the allocation was successful.
368 * Returns DMA address which must be checked for failures using
369 * dma_mapping_error().
371 static inline dma_addr_t
i2o_dma_map_single(struct i2o_controller
*c
, void *ptr
,
373 enum dma_data_direction direction
,
374 u32 __iomem
** sg_ptr
)
377 u32 __iomem
*mptr
= *sg_ptr
;
382 sg_flags
= 0xd4000000;
384 case DMA_FROM_DEVICE
:
385 sg_flags
= 0xd0000000;
391 dma_addr
= dma_map_single(&c
->pdev
->dev
, ptr
, size
, direction
);
392 if (!dma_mapping_error(dma_addr
)) {
393 #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
394 if ((sizeof(dma_addr_t
) > 4) && c
->pae_support
) {
395 writel(0x7C020002, mptr
++);
396 writel(PAGE_SIZE
, mptr
++);
400 writel(sg_flags
| size
, mptr
++);
401 writel(i2o_dma_low(dma_addr
), mptr
++);
402 #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
403 if ((sizeof(dma_addr_t
) > 4) && c
->pae_support
)
404 writel(i2o_dma_high(dma_addr
), mptr
++);
412 * i2o_dma_map_sg - Map a SG List to controller and fill in I2O message.
414 * @sg: SG list to be mapped
415 * @sg_count: number of elements in the SG list
416 * @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE
417 * @sg_ptr: pointer to the SG list inside the I2O message
419 * This function does all necessary DMA handling and also writes the I2O
420 * SGL elements into the I2O message. For details on DMA handling see also
421 * dma_map_sg(). The pointer sg_ptr will only be set to the end of the SG
422 * list if the allocation was successful.
424 * Returns 0 on failure or 1 on success.
426 static inline int i2o_dma_map_sg(struct i2o_controller
*c
,
427 struct scatterlist
*sg
, int sg_count
,
428 enum dma_data_direction direction
,
429 u32 __iomem
** sg_ptr
)
432 u32 __iomem
*mptr
= *sg_ptr
;
436 sg_flags
= 0x14000000;
438 case DMA_FROM_DEVICE
:
439 sg_flags
= 0x10000000;
445 sg_count
= dma_map_sg(&c
->pdev
->dev
, sg
, sg_count
, direction
);
449 #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
450 if ((sizeof(dma_addr_t
) > 4) && c
->pae_support
) {
451 writel(0x7C020002, mptr
++);
452 writel(PAGE_SIZE
, mptr
++);
456 while (sg_count
-- > 0) {
458 sg_flags
|= 0xC0000000;
459 writel(sg_flags
| sg_dma_len(sg
), mptr
++);
460 writel(i2o_dma_low(sg_dma_address(sg
)), mptr
++);
461 #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
462 if ((sizeof(dma_addr_t
) > 4) && c
->pae_support
)
463 writel(i2o_dma_high(sg_dma_address(sg
)), mptr
++);
473 * i2o_dma_alloc - Allocate DMA memory
474 * @dev: struct device pointer to the PCI device of the I2O controller
475 * @addr: i2o_dma struct which should get the DMA buffer
476 * @len: length of the new DMA memory
477 * @gfp_mask: GFP mask
479 * Allocate a coherent DMA memory and write the pointers into addr.
481 * Returns 0 on success or -ENOMEM on failure.
483 static inline int i2o_dma_alloc(struct device
*dev
, struct i2o_dma
*addr
,
484 size_t len
, unsigned int gfp_mask
)
486 struct pci_dev
*pdev
= to_pci_dev(dev
);
489 if ((sizeof(dma_addr_t
) > 4) && (pdev
->dma_mask
== DMA_64BIT_MASK
)) {
491 if (pci_set_dma_mask(pdev
, DMA_32BIT_MASK
))
495 addr
->virt
= dma_alloc_coherent(dev
, len
, &addr
->phys
, gfp_mask
);
497 if ((sizeof(dma_addr_t
) > 4) && dma_64
)
498 if (pci_set_dma_mask(pdev
, DMA_64BIT_MASK
))
499 printk(KERN_WARNING
"i2o: unable to set 64-bit DMA");
504 memset(addr
->virt
, 0, len
);
511 * i2o_dma_free - Free DMA memory
512 * @dev: struct device pointer to the PCI device of the I2O controller
513 * @addr: i2o_dma struct which contains the DMA buffer
515 * Free a coherent DMA memory and set virtual address of addr to NULL.
517 static inline void i2o_dma_free(struct device
*dev
, struct i2o_dma
*addr
)
521 dma_free_coherent(dev
, addr
->len
, addr
->virt
,
530 * i2o_dma_realloc - Realloc DMA memory
531 * @dev: struct device pointer to the PCI device of the I2O controller
532 * @addr: pointer to a i2o_dma struct DMA buffer
533 * @len: new length of memory
534 * @gfp_mask: GFP mask
536 * If there was something allocated in the addr, free it first. If len > 0
537 * than try to allocate it and write the addresses back to the addr
538 * structure. If len == 0 set the virtual address to NULL.
540 * Returns the 0 on success or negative error code on failure.
542 static inline int i2o_dma_realloc(struct device
*dev
, struct i2o_dma
*addr
,
543 size_t len
, unsigned int gfp_mask
)
545 i2o_dma_free(dev
, addr
);
548 return i2o_dma_alloc(dev
, addr
, len
, gfp_mask
);
553 /* I2O driver (OSM) functions */
554 extern int i2o_driver_register(struct i2o_driver
*);
555 extern void i2o_driver_unregister(struct i2o_driver
*);
558 * i2o_driver_notify_controller_add - Send notification of added controller
559 * to a single I2O driver
561 * Send notification of added controller to a single registered driver.
563 static inline void i2o_driver_notify_controller_add(struct i2o_driver
*drv
,
564 struct i2o_controller
*c
)
566 if (drv
->notify_controller_add
)
567 drv
->notify_controller_add(c
);
571 * i2o_driver_notify_controller_remove - Send notification of removed
572 * controller to a single I2O driver
574 * Send notification of removed controller to a single registered driver.
576 static inline void i2o_driver_notify_controller_remove(struct i2o_driver
*drv
,
577 struct i2o_controller
*c
)
579 if (drv
->notify_controller_remove
)
580 drv
->notify_controller_remove(c
);
584 * i2o_driver_notify_device_add - Send notification of added device to a
587 * Send notification of added device to a single registered driver.
589 static inline void i2o_driver_notify_device_add(struct i2o_driver
*drv
,
590 struct i2o_device
*i2o_dev
)
592 if (drv
->notify_device_add
)
593 drv
->notify_device_add(i2o_dev
);
597 * i2o_driver_notify_device_remove - Send notification of removed device
598 * to a single I2O driver
600 * Send notification of removed device to a single registered driver.
602 static inline void i2o_driver_notify_device_remove(struct i2o_driver
*drv
,
603 struct i2o_device
*i2o_dev
)
605 if (drv
->notify_device_remove
)
606 drv
->notify_device_remove(i2o_dev
);
609 extern void i2o_driver_notify_controller_add_all(struct i2o_controller
*);
610 extern void i2o_driver_notify_controller_remove_all(struct i2o_controller
*);
611 extern void i2o_driver_notify_device_add_all(struct i2o_device
*);
612 extern void i2o_driver_notify_device_remove_all(struct i2o_device
*);
614 /* I2O device functions */
615 extern int i2o_device_claim(struct i2o_device
*);
616 extern int i2o_device_claim_release(struct i2o_device
*);
618 /* Exec OSM functions */
619 extern int i2o_exec_lct_get(struct i2o_controller
*);
621 /* device / driver / kobject conversion functions */
622 #define to_i2o_driver(drv) container_of(drv,struct i2o_driver, driver)
623 #define to_i2o_device(dev) container_of(dev, struct i2o_device, device)
624 #define to_i2o_controller(dev) container_of(dev, struct i2o_controller, device)
625 #define kobj_to_i2o_device(kobj) to_i2o_device(container_of(kobj, struct device, kobj))
628 * i2o_msg_get - obtain an I2O message from the IOP
630 * @msg: pointer to a I2O message pointer
632 * This function tries to get a message slot. If no message slot is
633 * available do not wait until one is availabe (see also i2o_msg_get_wait).
635 * On a success the message is returned and the pointer to the message is
636 * set in msg. The returned message is the physical page frame offset
637 * address from the read port (see the i2o spec). If no message is
638 * available returns I2O_QUEUE_EMPTY and msg is leaved untouched.
640 static inline u32
i2o_msg_get(struct i2o_controller
*c
,
641 struct i2o_message __iomem
**msg
)
643 u32 m
= readl(c
->in_port
);
645 if (m
!= I2O_QUEUE_EMPTY
) {
646 *msg
= c
->in_queue
.virt
+ m
;
654 * i2o_msg_post - Post I2O message to I2O controller
655 * @c: I2O controller to which the message should be send
656 * @m: the message identifier
658 * Post the message to the I2O controller.
660 static inline void i2o_msg_post(struct i2o_controller
*c
, u32 m
)
663 writel(m
, c
->in_port
);
667 * i2o_msg_post_wait - Post and wait a message and wait until return
669 * @m: message to post
670 * @timeout: time in seconds to wait
672 * This API allows an OSM to post a message and then be told whether or
673 * not the system received a successful reply. If the message times out
674 * then the value '-ETIMEDOUT' is returned.
676 * Returns 0 on success or negative error code on failure.
678 static inline int i2o_msg_post_wait(struct i2o_controller
*c
, u32 m
,
679 unsigned long timeout
)
681 return i2o_msg_post_wait_mem(c
, m
, timeout
, NULL
);
685 * i2o_flush_reply - Flush reply from I2O controller
687 * @m: the message identifier
689 * The I2O controller must be informed that the reply message is not needed
690 * anymore. If you forget to flush the reply, the message frame can't be
691 * used by the controller anymore and is therefore lost.
693 static inline void i2o_flush_reply(struct i2o_controller
*c
, u32 m
)
695 writel(m
, c
->out_port
);
699 * i2o_out_to_virt - Turn an I2O message to a virtual address
701 * @m: message engine value
703 * Turn a receive message from an I2O controller bus address into
704 * a Linux virtual address. The shared page frame is a linear block
705 * so we simply have to shift the offset. This function does not
706 * work for sender side messages as they are ioremap objects
707 * provided by the I2O controller.
709 static inline struct i2o_message __iomem
*i2o_msg_out_to_virt(struct
714 (m
< c
->out_queue
.phys
715 || m
>= c
->out_queue
.phys
+ c
->out_queue
.len
))
718 return c
->out_queue
.virt
+ (m
- c
->out_queue
.phys
);
722 * i2o_msg_in_to_virt - Turn an I2O message to a virtual address
724 * @m: message engine value
726 * Turn a send message from an I2O controller bus address into
727 * a Linux virtual address. The shared page frame is a linear block
728 * so we simply have to shift the offset. This function does not
729 * work for receive side messages as they are kmalloc objects
730 * in a different pool.
732 static inline struct i2o_message __iomem
*i2o_msg_in_to_virt(struct i2o_controller
*c
,
735 return c
->in_queue
.virt
+ m
;
739 * i2o_dma_alloc - Allocate DMA memory
740 * @dev: struct device pointer to the PCI device of the I2O controller
741 * @addr: i2o_dma struct which should get the DMA buffer
742 * @len: length of the new DMA memory
743 * @gfp_mask: GFP mask
745 * Allocate a coherent DMA memory and write the pointers into addr.
747 * Returns 0 on success or -ENOMEM on failure.
749 static inline int i2o_dma_alloc(struct device
*dev
, struct i2o_dma
*addr
,
750 size_t len
, unsigned int gfp_mask
)
752 struct pci_dev
*pdev
= to_pci_dev(dev
);
755 if ((sizeof(dma_addr_t
) > 4) && (pdev
->dma_mask
== DMA_64BIT_MASK
)) {
757 if(pci_set_dma_mask(pdev
, DMA_32BIT_MASK
))
761 addr
->virt
= dma_alloc_coherent(dev
, len
, &addr
->phys
, gfp_mask
);
763 if ((sizeof(dma_addr_t
) > 4) && dma_64
)
764 if(pci_set_dma_mask(pdev
, DMA_64BIT_MASK
))
765 printk(KERN_WARNING
"i2o: unable to set 64-bit DMA");
770 memset(addr
->virt
, 0, len
);
777 * i2o_dma_free - Free DMA memory
778 * @dev: struct device pointer to the PCI device of the I2O controller
779 * @addr: i2o_dma struct which contains the DMA buffer
781 * Free a coherent DMA memory and set virtual address of addr to NULL.
783 static inline void i2o_dma_free(struct device
*dev
, struct i2o_dma
*addr
)
787 dma_free_coherent(dev
, addr
->len
, addr
->virt
,
796 * Endian handling wrapped into the macro - keeps the core code
800 #define i2o_raw_writel(val, mem) __raw_writel(cpu_to_le32(val), mem)
802 extern int i2o_parm_field_get(struct i2o_device
*, int, int, void *, int);
803 extern int i2o_parm_table_get(struct i2o_device
*, int, int, int, void *, int,
806 /* debugging and troubleshooting/diagnostic helpers. */
807 #define osm_printk(level, format, arg...) \
808 printk(level "%s: " format, OSM_NAME , ## arg)
811 #define osm_debug(format, arg...) \
812 osm_printk(KERN_DEBUG, format , ## arg)
814 #define osm_debug(format, arg...) \
818 #define osm_err(format, arg...) \
819 osm_printk(KERN_ERR, format , ## arg)
820 #define osm_info(format, arg...) \
821 osm_printk(KERN_INFO, format , ## arg)
822 #define osm_warn(format, arg...) \
823 osm_printk(KERN_WARNING, format , ## arg)
825 /* debugging functions */
826 extern void i2o_report_status(const char *, const char *, struct i2o_message
*);
827 extern void i2o_dump_message(struct i2o_message
*);
828 extern void i2o_dump_hrt(struct i2o_controller
*c
);
829 extern void i2o_debug_state(struct i2o_controller
*c
);
835 /* The NULL strategy leaves everything up to the controller. This tends to be a
836 * pessimal but functional choice.
839 /* Prefetch data when reading. We continually attempt to load the next 32 sectors
840 * into the controller cache.
842 #define CACHE_PREFETCH 1
843 /* Prefetch data when reading. We sometimes attempt to load the next 32 sectors
844 * into the controller cache. When an I/O is less <= 8K we assume its probably
845 * not sequential and don't prefetch (default)
847 #define CACHE_SMARTFETCH 2
848 /* Data is written to the cache and then out on to the disk. The I/O must be
849 * physically on the medium before the write is acknowledged (default without
852 #define CACHE_WRITETHROUGH 17
853 /* Data is written to the cache and then out on to the disk. The controller
854 * is permitted to write back the cache any way it wants. (default if battery
855 * backed NVRAM is present). It can be useful to set this for swap regardless of
858 #define CACHE_WRITEBACK 18
859 /* Optimise for under powered controllers, especially on RAID1 and RAID0. We
860 * write large I/O's directly to disk bypassing the cache to avoid the extra
861 * memory copy hits. Small writes are writeback cached
863 #define CACHE_SMARTBACK 19
864 /* Optimise for under powered controllers, especially on RAID1 and RAID0. We
865 * write large I/O's directly to disk bypassing the cache to avoid the extra
866 * memory copy hits. Small writes are writethrough cached. Suitable for devices
867 * lacking battery backup
869 #define CACHE_SMARTTHROUGH 20
875 #define BLKI2OGRSTRAT _IOR('2', 1, int)
876 #define BLKI2OGWSTRAT _IOR('2', 2, int)
877 #define BLKI2OSRSTRAT _IOW('2', 3, int)
878 #define BLKI2OSWSTRAT _IOW('2', 4, int)
887 #define I2O_CMD_ADAPTER_ASSIGN 0xB3
888 #define I2O_CMD_ADAPTER_READ 0xB2
889 #define I2O_CMD_ADAPTER_RELEASE 0xB5
890 #define I2O_CMD_BIOS_INFO_SET 0xA5
891 #define I2O_CMD_BOOT_DEVICE_SET 0xA7
892 #define I2O_CMD_CONFIG_VALIDATE 0xBB
893 #define I2O_CMD_CONN_SETUP 0xCA
894 #define I2O_CMD_DDM_DESTROY 0xB1
895 #define I2O_CMD_DDM_ENABLE 0xD5
896 #define I2O_CMD_DDM_QUIESCE 0xC7
897 #define I2O_CMD_DDM_RESET 0xD9
898 #define I2O_CMD_DDM_SUSPEND 0xAF
899 #define I2O_CMD_DEVICE_ASSIGN 0xB7
900 #define I2O_CMD_DEVICE_RELEASE 0xB9
901 #define I2O_CMD_HRT_GET 0xA8
902 #define I2O_CMD_ADAPTER_CLEAR 0xBE
903 #define I2O_CMD_ADAPTER_CONNECT 0xC9
904 #define I2O_CMD_ADAPTER_RESET 0xBD
905 #define I2O_CMD_LCT_NOTIFY 0xA2
906 #define I2O_CMD_OUTBOUND_INIT 0xA1
907 #define I2O_CMD_PATH_ENABLE 0xD3
908 #define I2O_CMD_PATH_QUIESCE 0xC5
909 #define I2O_CMD_PATH_RESET 0xD7
910 #define I2O_CMD_STATIC_MF_CREATE 0xDD
911 #define I2O_CMD_STATIC_MF_RELEASE 0xDF
912 #define I2O_CMD_STATUS_GET 0xA0
913 #define I2O_CMD_SW_DOWNLOAD 0xA9
914 #define I2O_CMD_SW_UPLOAD 0xAB
915 #define I2O_CMD_SW_REMOVE 0xAD
916 #define I2O_CMD_SYS_ENABLE 0xD1
917 #define I2O_CMD_SYS_MODIFY 0xC1
918 #define I2O_CMD_SYS_QUIESCE 0xC3
919 #define I2O_CMD_SYS_TAB_SET 0xA3
924 #define I2O_CMD_UTIL_NOP 0x00
925 #define I2O_CMD_UTIL_ABORT 0x01
926 #define I2O_CMD_UTIL_CLAIM 0x09
927 #define I2O_CMD_UTIL_RELEASE 0x0B
928 #define I2O_CMD_UTIL_PARAMS_GET 0x06
929 #define I2O_CMD_UTIL_PARAMS_SET 0x05
930 #define I2O_CMD_UTIL_EVT_REGISTER 0x13
931 #define I2O_CMD_UTIL_EVT_ACK 0x14
932 #define I2O_CMD_UTIL_CONFIG_DIALOG 0x10
933 #define I2O_CMD_UTIL_DEVICE_RESERVE 0x0D
934 #define I2O_CMD_UTIL_DEVICE_RELEASE 0x0F
935 #define I2O_CMD_UTIL_LOCK 0x17
936 #define I2O_CMD_UTIL_LOCK_RELEASE 0x19
937 #define I2O_CMD_UTIL_REPLY_FAULT_NOTIFY 0x15
940 * SCSI Host Bus Adapter Class
942 #define I2O_CMD_SCSI_EXEC 0x81
943 #define I2O_CMD_SCSI_ABORT 0x83
944 #define I2O_CMD_SCSI_BUSRESET 0x27
949 #define I2O_CMD_BUS_ADAPTER_RESET 0x85
950 #define I2O_CMD_BUS_RESET 0x87
951 #define I2O_CMD_BUS_SCAN 0x89
952 #define I2O_CMD_BUS_QUIESCE 0x8b
955 * Random Block Storage Class
957 #define I2O_CMD_BLOCK_READ 0x30
958 #define I2O_CMD_BLOCK_WRITE 0x31
959 #define I2O_CMD_BLOCK_CFLUSH 0x37
960 #define I2O_CMD_BLOCK_MLOCK 0x49
961 #define I2O_CMD_BLOCK_MUNLOCK 0x4B
962 #define I2O_CMD_BLOCK_MMOUNT 0x41
963 #define I2O_CMD_BLOCK_MEJECT 0x43
964 #define I2O_CMD_BLOCK_POWER 0x70
966 #define I2O_CMD_PRIVATE 0xFF
968 /* Command status values */
970 #define I2O_CMD_IN_PROGRESS 0x01
971 #define I2O_CMD_REJECTED 0x02
972 #define I2O_CMD_FAILED 0x03
973 #define I2O_CMD_COMPLETED 0x04
975 /* I2O API function return values */
977 #define I2O_RTN_NO_ERROR 0
978 #define I2O_RTN_NOT_INIT 1
979 #define I2O_RTN_FREE_Q_EMPTY 2
980 #define I2O_RTN_TCB_ERROR 3
981 #define I2O_RTN_TRANSACTION_ERROR 4
982 #define I2O_RTN_ADAPTER_ALREADY_INIT 5
983 #define I2O_RTN_MALLOC_ERROR 6
984 #define I2O_RTN_ADPTR_NOT_REGISTERED 7
985 #define I2O_RTN_MSG_REPLY_TIMEOUT 8
986 #define I2O_RTN_NO_STATUS 9
987 #define I2O_RTN_NO_FIRM_VER 10
988 #define I2O_RTN_NO_LINK_SPEED 11
990 /* Reply message status defines for all messages */
992 #define I2O_REPLY_STATUS_SUCCESS 0x00
993 #define I2O_REPLY_STATUS_ABORT_DIRTY 0x01
994 #define I2O_REPLY_STATUS_ABORT_NO_DATA_TRANSFER 0x02
995 #define I2O_REPLY_STATUS_ABORT_PARTIAL_TRANSFER 0x03
996 #define I2O_REPLY_STATUS_ERROR_DIRTY 0x04
997 #define I2O_REPLY_STATUS_ERROR_NO_DATA_TRANSFER 0x05
998 #define I2O_REPLY_STATUS_ERROR_PARTIAL_TRANSFER 0x06
999 #define I2O_REPLY_STATUS_PROCESS_ABORT_DIRTY 0x08
1000 #define I2O_REPLY_STATUS_PROCESS_ABORT_NO_DATA_TRANSFER 0x09
1001 #define I2O_REPLY_STATUS_PROCESS_ABORT_PARTIAL_TRANSFER 0x0A
1002 #define I2O_REPLY_STATUS_TRANSACTION_ERROR 0x0B
1003 #define I2O_REPLY_STATUS_PROGRESS_REPORT 0x80
1005 /* Status codes and Error Information for Parameter functions */
1007 #define I2O_PARAMS_STATUS_SUCCESS 0x00
1008 #define I2O_PARAMS_STATUS_BAD_KEY_ABORT 0x01
1009 #define I2O_PARAMS_STATUS_BAD_KEY_CONTINUE 0x02
1010 #define I2O_PARAMS_STATUS_BUFFER_FULL 0x03
1011 #define I2O_PARAMS_STATUS_BUFFER_TOO_SMALL 0x04
1012 #define I2O_PARAMS_STATUS_FIELD_UNREADABLE 0x05
1013 #define I2O_PARAMS_STATUS_FIELD_UNWRITEABLE 0x06
1014 #define I2O_PARAMS_STATUS_INSUFFICIENT_FIELDS 0x07
1015 #define I2O_PARAMS_STATUS_INVALID_GROUP_ID 0x08
1016 #define I2O_PARAMS_STATUS_INVALID_OPERATION 0x09
1017 #define I2O_PARAMS_STATUS_NO_KEY_FIELD 0x0A
1018 #define I2O_PARAMS_STATUS_NO_SUCH_FIELD 0x0B
1019 #define I2O_PARAMS_STATUS_NON_DYNAMIC_GROUP 0x0C
1020 #define I2O_PARAMS_STATUS_OPERATION_ERROR 0x0D
1021 #define I2O_PARAMS_STATUS_SCALAR_ERROR 0x0E
1022 #define I2O_PARAMS_STATUS_TABLE_ERROR 0x0F
1023 #define I2O_PARAMS_STATUS_WRONG_GROUP_TYPE 0x10
1025 /* DetailedStatusCode defines for Executive, DDM, Util and Transaction error
1026 * messages: Table 3-2 Detailed Status Codes.*/
1028 #define I2O_DSC_SUCCESS 0x0000
1029 #define I2O_DSC_BAD_KEY 0x0002
1030 #define I2O_DSC_TCL_ERROR 0x0003
1031 #define I2O_DSC_REPLY_BUFFER_FULL 0x0004
1032 #define I2O_DSC_NO_SUCH_PAGE 0x0005
1033 #define I2O_DSC_INSUFFICIENT_RESOURCE_SOFT 0x0006
1034 #define I2O_DSC_INSUFFICIENT_RESOURCE_HARD 0x0007
1035 #define I2O_DSC_CHAIN_BUFFER_TOO_LARGE 0x0009
1036 #define I2O_DSC_UNSUPPORTED_FUNCTION 0x000A
1037 #define I2O_DSC_DEVICE_LOCKED 0x000B
1038 #define I2O_DSC_DEVICE_RESET 0x000C
1039 #define I2O_DSC_INAPPROPRIATE_FUNCTION 0x000D
1040 #define I2O_DSC_INVALID_INITIATOR_ADDRESS 0x000E
1041 #define I2O_DSC_INVALID_MESSAGE_FLAGS 0x000F
1042 #define I2O_DSC_INVALID_OFFSET 0x0010
1043 #define I2O_DSC_INVALID_PARAMETER 0x0011
1044 #define I2O_DSC_INVALID_REQUEST 0x0012
1045 #define I2O_DSC_INVALID_TARGET_ADDRESS 0x0013
1046 #define I2O_DSC_MESSAGE_TOO_LARGE 0x0014
1047 #define I2O_DSC_MESSAGE_TOO_SMALL 0x0015
1048 #define I2O_DSC_MISSING_PARAMETER 0x0016
1049 #define I2O_DSC_TIMEOUT 0x0017
1050 #define I2O_DSC_UNKNOWN_ERROR 0x0018
1051 #define I2O_DSC_UNKNOWN_FUNCTION 0x0019
1052 #define I2O_DSC_UNSUPPORTED_VERSION 0x001A
1053 #define I2O_DSC_DEVICE_BUSY 0x001B
1054 #define I2O_DSC_DEVICE_NOT_AVAILABLE 0x001C
1056 /* DetailedStatusCode defines for Block Storage Operation: Table 6-7 Detailed
1059 #define I2O_BSA_DSC_SUCCESS 0x0000
1060 #define I2O_BSA_DSC_MEDIA_ERROR 0x0001
1061 #define I2O_BSA_DSC_ACCESS_ERROR 0x0002
1062 #define I2O_BSA_DSC_DEVICE_FAILURE 0x0003
1063 #define I2O_BSA_DSC_DEVICE_NOT_READY 0x0004
1064 #define I2O_BSA_DSC_MEDIA_NOT_PRESENT 0x0005
1065 #define I2O_BSA_DSC_MEDIA_LOCKED 0x0006
1066 #define I2O_BSA_DSC_MEDIA_FAILURE 0x0007
1067 #define I2O_BSA_DSC_PROTOCOL_FAILURE 0x0008
1068 #define I2O_BSA_DSC_BUS_FAILURE 0x0009
1069 #define I2O_BSA_DSC_ACCESS_VIOLATION 0x000A
1070 #define I2O_BSA_DSC_WRITE_PROTECTED 0x000B
1071 #define I2O_BSA_DSC_DEVICE_RESET 0x000C
1072 #define I2O_BSA_DSC_VOLUME_CHANGED 0x000D
1073 #define I2O_BSA_DSC_TIMEOUT 0x000E
1075 /* FailureStatusCodes, Table 3-3 Message Failure Codes */
1077 #define I2O_FSC_TRANSPORT_SERVICE_SUSPENDED 0x81
1078 #define I2O_FSC_TRANSPORT_SERVICE_TERMINATED 0x82
1079 #define I2O_FSC_TRANSPORT_CONGESTION 0x83
1080 #define I2O_FSC_TRANSPORT_FAILURE 0x84
1081 #define I2O_FSC_TRANSPORT_STATE_ERROR 0x85
1082 #define I2O_FSC_TRANSPORT_TIME_OUT 0x86
1083 #define I2O_FSC_TRANSPORT_ROUTING_FAILURE 0x87
1084 #define I2O_FSC_TRANSPORT_INVALID_VERSION 0x88
1085 #define I2O_FSC_TRANSPORT_INVALID_OFFSET 0x89
1086 #define I2O_FSC_TRANSPORT_INVALID_MSG_FLAGS 0x8A
1087 #define I2O_FSC_TRANSPORT_FRAME_TOO_SMALL 0x8B
1088 #define I2O_FSC_TRANSPORT_FRAME_TOO_LARGE 0x8C
1089 #define I2O_FSC_TRANSPORT_INVALID_TARGET_ID 0x8D
1090 #define I2O_FSC_TRANSPORT_INVALID_INITIATOR_ID 0x8E
1091 #define I2O_FSC_TRANSPORT_INVALID_INITIATOR_CONTEXT 0x8F
1092 #define I2O_FSC_TRANSPORT_UNKNOWN_FAILURE 0xFF
1094 /* Device Claim Types */
1095 #define I2O_CLAIM_PRIMARY 0x01000000
1096 #define I2O_CLAIM_MANAGEMENT 0x02000000
1097 #define I2O_CLAIM_AUTHORIZED 0x03000000
1098 #define I2O_CLAIM_SECONDARY 0x04000000
1100 /* Message header defines for VersionOffset */
1101 #define I2OVER15 0x0001
1102 #define I2OVER20 0x0002
1104 /* Default is 1.5 */
1105 #define I2OVERSION I2OVER15
1107 #define SGL_OFFSET_0 I2OVERSION
1108 #define SGL_OFFSET_4 (0x0040 | I2OVERSION)
1109 #define SGL_OFFSET_5 (0x0050 | I2OVERSION)
1110 #define SGL_OFFSET_6 (0x0060 | I2OVERSION)
1111 #define SGL_OFFSET_7 (0x0070 | I2OVERSION)
1112 #define SGL_OFFSET_8 (0x0080 | I2OVERSION)
1113 #define SGL_OFFSET_9 (0x0090 | I2OVERSION)
1114 #define SGL_OFFSET_10 (0x00A0 | I2OVERSION)
1115 #define SGL_OFFSET_11 (0x00B0 | I2OVERSION)
1116 #define SGL_OFFSET_12 (0x00C0 | I2OVERSION)
1117 #define SGL_OFFSET(x) (((x)<<4) | I2OVERSION)
1119 /* Transaction Reply Lists (TRL) Control Word structure */
1120 #define TRL_SINGLE_FIXED_LENGTH 0x00
1121 #define TRL_SINGLE_VARIABLE_LENGTH 0x40
1122 #define TRL_MULTIPLE_FIXED_LENGTH 0x80
1124 /* msg header defines for MsgFlags */
1125 #define MSG_STATIC 0x0100
1126 #define MSG_64BIT_CNTXT 0x0200
1127 #define MSG_MULTI_TRANS 0x1000
1128 #define MSG_FAIL 0x2000
1129 #define MSG_FINAL 0x4000
1130 #define MSG_REPLY 0x8000
1132 /* minimum size msg */
1133 #define THREE_WORD_MSG_SIZE 0x00030000
1134 #define FOUR_WORD_MSG_SIZE 0x00040000
1135 #define FIVE_WORD_MSG_SIZE 0x00050000
1136 #define SIX_WORD_MSG_SIZE 0x00060000
1137 #define SEVEN_WORD_MSG_SIZE 0x00070000
1138 #define EIGHT_WORD_MSG_SIZE 0x00080000
1139 #define NINE_WORD_MSG_SIZE 0x00090000
1140 #define TEN_WORD_MSG_SIZE 0x000A0000
1141 #define ELEVEN_WORD_MSG_SIZE 0x000B0000
1142 #define I2O_MESSAGE_SIZE(x) ((x)<<16)
1144 /* Special TID Assignments */
1146 #define ADAPTER_TID 0
1149 #define MSG_FRAME_SIZE 128 /* i2o_scsi assumes >= 32 */
1150 #define SG_TABLESIZE 30
1151 #define NMBR_MSG_FRAMES 128
1153 #define MSG_POOL_SIZE (MSG_FRAME_SIZE*NMBR_MSG_FRAMES*sizeof(u32))
1155 #define I2O_POST_WAIT_OK 0
1156 #define I2O_POST_WAIT_TIMEOUT -ETIMEDOUT
1158 #define I2O_CONTEXT_LIST_MIN_LENGTH 15
1159 #define I2O_CONTEXT_LIST_USED 0x01
1160 #define I2O_CONTEXT_LIST_DELETED 0x02
1163 #define I2O_TIMEOUT_INIT_OUTBOUND_QUEUE 15
1164 #define I2O_TIMEOUT_MESSAGE_GET 5
1165 #define I2O_TIMEOUT_RESET 30
1166 #define I2O_TIMEOUT_STATUS_GET 5
1167 #define I2O_TIMEOUT_LCT_GET 360
1168 #define I2O_TIMEOUT_SCSI_SCB_ABORT 240
1171 #define I2O_HRT_GET_TRIES 3
1172 #define I2O_LCT_GET_TRIES 3
1174 /* defines for max_sectors and max_phys_segments */
1175 #define I2O_MAX_SECTORS 1024
1176 #define I2O_MAX_SECTORS_LIMITED 256
1177 #define I2O_MAX_PHYS_SEGMENTS MAX_PHYS_SEGMENTS
1179 #endif /* __KERNEL__ */