arch/avr32/mach-at32ap/intc.c

   1 /*
   2  * Copyright (C) 2006, 2008 Atmel Corporation
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/clk.h>
  10 #include <linux/err.h>
  11 #include <linux/init.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/irq.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/sysdev.h>
  16
  17 #include <asm/io.h>
  18
  19 #include "intc.h"
  20
  21 struct intc {
  22         void __iomem            *regs;
  23         struct irq_chip         chip;
  24         struct sys_device       sysdev;
  25 };
  26
  27 extern struct platform_device at32_intc0_device;
  28
  29 /*
  30  * TODO: We may be able to implement mask/unmask by setting IxM flags
  31  * in the status register.
  32  */
  33 static void intc_mask_irq(unsigned int irq)
  34 {
  35
  36 }
  37
  38 static void intc_unmask_irq(unsigned int irq)
  39 {
  40
  41 }
  42
  43 static struct intc intc0 = {
  44         .chip = {
  45                 .name           = "intc",
  46                 .mask           = intc_mask_irq,
  47                 .unmask         = intc_unmask_irq,
  48         },
  49 };
  50
  51 /*
  52  * All interrupts go via intc at some point.
  53  */
  54 asmlinkage void do_IRQ(int level, struct pt_regs *regs)
  55 {
  56         struct irq_desc *desc;
  57         struct pt_regs *old_regs;
  58         unsigned int irq;
  59         unsigned long status_reg;
  60
  61         local_irq_disable();
  62
  63         old_regs = set_irq_regs(regs);
  64
  65         irq_enter();
  66
  67         irq = intc_readl(&intc0, INTCAUSE0 - 4 * level);
  68         desc = irq_desc + irq;
  69         desc->handle_irq(irq, desc);
  70
  71         /*
  72          * Clear all interrupt level masks so that we may handle
  73          * interrupts during softirq processing.  If this is a nested
  74          * interrupt, interrupts must stay globally disabled until we
  75          * return.
  76          */
  77         status_reg = sysreg_read(SR);
  78         status_reg &= ~(SYSREG_BIT(I0M) | SYSREG_BIT(I1M)
  79                         | SYSREG_BIT(I2M) | SYSREG_BIT(I3M));
  80         sysreg_write(SR, status_reg);
  81
  82         irq_exit();
  83
  84         set_irq_regs(old_regs);
  85 }
  86
  87 void __init init_IRQ(void)
  88 {
  89         extern void _evba(void);
  90         extern void irq_level0(void);
  91         struct resource *regs;
  92         struct clk *pclk;
  93         unsigned int i;
  94         u32 offset, readback;
  95
  96         regs = platform_get_resource(&at32_intc0_device, IORESOURCE_MEM, 0);
  97         if (!regs) {
  98                 printk(KERN_EMERG "intc: no mmio resource defined\n");
  99                 goto fail;
 100         }
 101         pclk = clk_get(&at32_intc0_device.dev, "pclk");
 102         if (IS_ERR(pclk)) {
 103                 printk(KERN_EMERG "intc: no clock defined\n");
 104                 goto fail;
 105         }
 106
 107         clk_enable(pclk);
 108
 109         intc0.regs = ioremap(regs->start, regs->end - regs->start + 1);
 110         if (!intc0.regs) {
 111                 printk(KERN_EMERG "intc: failed to map registers (0x%08lx)\n",
 112                        (unsigned long)regs->start);
 113                 goto fail;
 114         }
 115
 116         /*
 117          * Initialize all interrupts to level 0 (lowest priority). The
 118          * priority level may be changed by calling
 119          * irq_set_priority().
 120          *
 121          */
 122         offset = (unsigned long)&irq_level0 - (unsigned long)&_evba;
 123         for (i = 0; i < NR_INTERNAL_IRQS; i++) {
 124                 intc_writel(&intc0, INTPR0 + 4 * i, offset);
 125                 readback = intc_readl(&intc0, INTPR0 + 4 * i);
 126                 if (readback == offset)
 127                         set_irq_chip_and_handler(i, &intc0.chip,
 128                                                  handle_simple_irq);
 129         }
 130
 131         /* Unmask all interrupt levels */
 132         sysreg_write(SR, (sysreg_read(SR)
 133                           & ~(SR_I3M | SR_I2M | SR_I1M | SR_I0M)));
 134
 135         return;
 136
 137 fail:
 138         panic("Interrupt controller initialization failed!\n");
 139 }
 140
 141 static struct sysdev_class intc_class = {
 142         .name   = "intc",
 143 };
 144
 145 static int __init intc_init_sysdev(void)
 146 {
 147         int ret;
 148
 149         ret = sysdev_class_register(&intc_class);
 150         if (ret)
 151                 return ret;
 152
 153         intc0.sysdev.id = 0;
 154         intc0.sysdev.cls = &intc_class;
 155         ret = sysdev_register(&intc0.sysdev);
 156
 157         return ret;
 158 }
 159 device_initcall(intc_init_sysdev);
 160
 161 unsigned long intc_get_pending(unsigned int group)
 162 {
 163         return intc_readl(&intc0, INTREQ0 + 4 * group);
 164 }
 165 EXPORT_SYMBOL_GPL(intc_get_pending);