2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
5 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * OpenIB.org BSD license below:
13 * Redistribution and use in source and binary forms, with or
14 * without modification, are permitted provided that the following
17 * - Redistributions of source code must retain the above
18 * copyright notice, this list of conditions and the following
21 * - Redistributions in binary form must reproduce the above
22 * copyright notice, this list of conditions and the following
23 * disclaimer in the documentation and/or other materials
24 * provided with the distribution.
26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/errno.h>
39 #include <linux/pci.h>
40 #include <linux/dma-mapping.h>
42 #include <linux/mlx4/device.h>
43 #include <linux/mlx4/doorbell.h>
49 MODULE_AUTHOR("Roland Dreier");
50 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
51 MODULE_LICENSE("Dual BSD/GPL");
52 MODULE_VERSION(DRV_VERSION
);
54 struct workqueue_struct
*mlx4_wq
;
56 #ifdef CONFIG_MLX4_DEBUG
58 int mlx4_debug_level
= 0;
59 module_param_named(debug_level
, mlx4_debug_level
, int, 0644);
60 MODULE_PARM_DESC(debug_level
, "Enable debug tracing if > 0");
62 #endif /* CONFIG_MLX4_DEBUG */
67 module_param(msi_x
, int, 0444);
68 MODULE_PARM_DESC(msi_x
, "attempt to use MSI-X if nonzero");
70 #else /* CONFIG_PCI_MSI */
74 #endif /* CONFIG_PCI_MSI */
76 static char mlx4_version
[] __devinitdata
=
77 DRV_NAME
": Mellanox ConnectX core driver v"
78 DRV_VERSION
" (" DRV_RELDATE
")\n";
80 static struct mlx4_profile default_profile
= {
83 .rdmarc_per_qp
= 1 << 4,
90 static int log_num_mac
= 2;
91 module_param_named(log_num_mac
, log_num_mac
, int, 0444);
92 MODULE_PARM_DESC(log_num_mac
, "Log2 max number of MACs per ETH port (1-7)");
94 static int log_num_vlan
;
95 module_param_named(log_num_vlan
, log_num_vlan
, int, 0444);
96 MODULE_PARM_DESC(log_num_vlan
, "Log2 max number of VLANs per ETH port (0-7)");
99 module_param_named(use_prio
, use_prio
, bool, 0444);
100 MODULE_PARM_DESC(use_prio
, "Enable steering by VLAN priority on ETH ports "
103 static int log_mtts_per_seg
= ilog2(MLX4_MTT_ENTRY_PER_SEG
);
104 module_param_named(log_mtts_per_seg
, log_mtts_per_seg
, int, 0444);
105 MODULE_PARM_DESC(log_mtts_per_seg
, "Log2 number of MTT entries per segment (1-5)");
107 int mlx4_check_port_params(struct mlx4_dev
*dev
,
108 enum mlx4_port_type
*port_type
)
112 for (i
= 0; i
< dev
->caps
.num_ports
- 1; i
++) {
113 if (port_type
[i
] != port_type
[i
+ 1]) {
114 if (!(dev
->caps
.flags
& MLX4_DEV_CAP_FLAG_DPDP
)) {
115 mlx4_err(dev
, "Only same port types supported "
116 "on this HCA, aborting.\n");
119 if (port_type
[i
] == MLX4_PORT_TYPE_ETH
&&
120 port_type
[i
+ 1] == MLX4_PORT_TYPE_IB
)
125 for (i
= 0; i
< dev
->caps
.num_ports
; i
++) {
126 if (!(port_type
[i
] & dev
->caps
.supported_type
[i
+1])) {
127 mlx4_err(dev
, "Requested port type for port %d is not "
128 "supported on this HCA\n", i
+ 1);
135 static void mlx4_set_port_mask(struct mlx4_dev
*dev
)
139 dev
->caps
.port_mask
= 0;
140 for (i
= 1; i
<= dev
->caps
.num_ports
; ++i
)
141 if (dev
->caps
.port_type
[i
] == MLX4_PORT_TYPE_IB
)
142 dev
->caps
.port_mask
|= 1 << (i
- 1);
144 static int mlx4_dev_cap(struct mlx4_dev
*dev
, struct mlx4_dev_cap
*dev_cap
)
149 err
= mlx4_QUERY_DEV_CAP(dev
, dev_cap
);
151 mlx4_err(dev
, "QUERY_DEV_CAP command failed, aborting.\n");
155 if (dev_cap
->min_page_sz
> PAGE_SIZE
) {
156 mlx4_err(dev
, "HCA minimum page size of %d bigger than "
157 "kernel PAGE_SIZE of %ld, aborting.\n",
158 dev_cap
->min_page_sz
, PAGE_SIZE
);
161 if (dev_cap
->num_ports
> MLX4_MAX_PORTS
) {
162 mlx4_err(dev
, "HCA has %d ports, but we only support %d, "
164 dev_cap
->num_ports
, MLX4_MAX_PORTS
);
168 if (dev_cap
->uar_size
> pci_resource_len(dev
->pdev
, 2)) {
169 mlx4_err(dev
, "HCA reported UAR size of 0x%x bigger than "
170 "PCI resource 2 size of 0x%llx, aborting.\n",
172 (unsigned long long) pci_resource_len(dev
->pdev
, 2));
176 dev
->caps
.num_ports
= dev_cap
->num_ports
;
177 for (i
= 1; i
<= dev
->caps
.num_ports
; ++i
) {
178 dev
->caps
.vl_cap
[i
] = dev_cap
->max_vl
[i
];
179 dev
->caps
.ib_mtu_cap
[i
] = dev_cap
->ib_mtu
[i
];
180 dev
->caps
.gid_table_len
[i
] = dev_cap
->max_gids
[i
];
181 dev
->caps
.pkey_table_len
[i
] = dev_cap
->max_pkeys
[i
];
182 dev
->caps
.port_width_cap
[i
] = dev_cap
->max_port_width
[i
];
183 dev
->caps
.eth_mtu_cap
[i
] = dev_cap
->eth_mtu
[i
];
184 dev
->caps
.def_mac
[i
] = dev_cap
->def_mac
[i
];
185 dev
->caps
.supported_type
[i
] = dev_cap
->supported_port_types
[i
];
188 dev
->caps
.num_uars
= dev_cap
->uar_size
/ PAGE_SIZE
;
189 dev
->caps
.local_ca_ack_delay
= dev_cap
->local_ca_ack_delay
;
190 dev
->caps
.bf_reg_size
= dev_cap
->bf_reg_size
;
191 dev
->caps
.bf_regs_per_page
= dev_cap
->bf_regs_per_page
;
192 dev
->caps
.max_sq_sg
= dev_cap
->max_sq_sg
;
193 dev
->caps
.max_rq_sg
= dev_cap
->max_rq_sg
;
194 dev
->caps
.max_wqes
= dev_cap
->max_qp_sz
;
195 dev
->caps
.max_qp_init_rdma
= dev_cap
->max_requester_per_qp
;
196 dev
->caps
.max_srq_wqes
= dev_cap
->max_srq_sz
;
197 dev
->caps
.max_srq_sge
= dev_cap
->max_rq_sg
- 1;
198 dev
->caps
.reserved_srqs
= dev_cap
->reserved_srqs
;
199 dev
->caps
.max_sq_desc_sz
= dev_cap
->max_sq_desc_sz
;
200 dev
->caps
.max_rq_desc_sz
= dev_cap
->max_rq_desc_sz
;
201 dev
->caps
.num_qp_per_mgm
= MLX4_QP_PER_MGM
;
203 * Subtract 1 from the limit because we need to allocate a
204 * spare CQE so the HCA HW can tell the difference between an
205 * empty CQ and a full CQ.
207 dev
->caps
.max_cqes
= dev_cap
->max_cq_sz
- 1;
208 dev
->caps
.reserved_cqs
= dev_cap
->reserved_cqs
;
209 dev
->caps
.reserved_eqs
= dev_cap
->reserved_eqs
;
210 dev
->caps
.mtts_per_seg
= 1 << log_mtts_per_seg
;
211 dev
->caps
.reserved_mtts
= DIV_ROUND_UP(dev_cap
->reserved_mtts
,
212 dev
->caps
.mtts_per_seg
);
213 dev
->caps
.reserved_mrws
= dev_cap
->reserved_mrws
;
214 dev
->caps
.reserved_uars
= dev_cap
->reserved_uars
;
215 dev
->caps
.reserved_pds
= dev_cap
->reserved_pds
;
216 dev
->caps
.mtt_entry_sz
= dev
->caps
.mtts_per_seg
* dev_cap
->mtt_entry_sz
;
217 dev
->caps
.max_msg_sz
= dev_cap
->max_msg_sz
;
218 dev
->caps
.page_size_cap
= ~(u32
) (dev_cap
->min_page_sz
- 1);
219 dev
->caps
.flags
= dev_cap
->flags
;
220 dev
->caps
.bmme_flags
= dev_cap
->bmme_flags
;
221 dev
->caps
.reserved_lkey
= dev_cap
->reserved_lkey
;
222 dev
->caps
.stat_rate_support
= dev_cap
->stat_rate_support
;
223 dev
->caps
.max_gso_sz
= dev_cap
->max_gso_sz
;
225 dev
->caps
.log_num_macs
= log_num_mac
;
226 dev
->caps
.log_num_vlans
= log_num_vlan
;
227 dev
->caps
.log_num_prios
= use_prio
? 3 : 0;
229 for (i
= 1; i
<= dev
->caps
.num_ports
; ++i
) {
230 if (dev
->caps
.supported_type
[i
] != MLX4_PORT_TYPE_ETH
)
231 dev
->caps
.port_type
[i
] = MLX4_PORT_TYPE_IB
;
233 dev
->caps
.port_type
[i
] = MLX4_PORT_TYPE_ETH
;
234 dev
->caps
.possible_type
[i
] = dev
->caps
.port_type
[i
];
235 mlx4_priv(dev
)->sense
.sense_allowed
[i
] =
236 dev
->caps
.supported_type
[i
] == MLX4_PORT_TYPE_AUTO
;
238 if (dev
->caps
.log_num_macs
> dev_cap
->log_max_macs
[i
]) {
239 dev
->caps
.log_num_macs
= dev_cap
->log_max_macs
[i
];
240 mlx4_warn(dev
, "Requested number of MACs is too much "
241 "for port %d, reducing to %d.\n",
242 i
, 1 << dev
->caps
.log_num_macs
);
244 if (dev
->caps
.log_num_vlans
> dev_cap
->log_max_vlans
[i
]) {
245 dev
->caps
.log_num_vlans
= dev_cap
->log_max_vlans
[i
];
246 mlx4_warn(dev
, "Requested number of VLANs is too much "
247 "for port %d, reducing to %d.\n",
248 i
, 1 << dev
->caps
.log_num_vlans
);
252 mlx4_set_port_mask(dev
);
254 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
] = dev_cap
->reserved_qps
;
255 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_ETH_ADDR
] =
256 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_ADDR
] =
257 (1 << dev
->caps
.log_num_macs
) *
258 (1 << dev
->caps
.log_num_vlans
) *
259 (1 << dev
->caps
.log_num_prios
) *
261 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_EXCH
] = MLX4_NUM_FEXCH
;
263 dev
->caps
.reserved_qps
= dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
] +
264 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_ETH_ADDR
] +
265 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_ADDR
] +
266 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_EXCH
];
272 * Change the port configuration of the device.
273 * Every user of this function must hold the port mutex.
275 int mlx4_change_port_types(struct mlx4_dev
*dev
,
276 enum mlx4_port_type
*port_types
)
282 for (port
= 0; port
< dev
->caps
.num_ports
; port
++) {
283 /* Change the port type only if the new type is different
284 * from the current, and not set to Auto */
285 if (port_types
[port
] != dev
->caps
.port_type
[port
+ 1]) {
287 dev
->caps
.port_type
[port
+ 1] = port_types
[port
];
291 mlx4_unregister_device(dev
);
292 for (port
= 1; port
<= dev
->caps
.num_ports
; port
++) {
293 mlx4_CLOSE_PORT(dev
, port
);
294 err
= mlx4_SET_PORT(dev
, port
);
296 mlx4_err(dev
, "Failed to set port %d, "
301 mlx4_set_port_mask(dev
);
302 err
= mlx4_register_device(dev
);
309 static ssize_t
show_port_type(struct device
*dev
,
310 struct device_attribute
*attr
,
313 struct mlx4_port_info
*info
= container_of(attr
, struct mlx4_port_info
,
315 struct mlx4_dev
*mdev
= info
->dev
;
319 (mdev
->caps
.port_type
[info
->port
] == MLX4_PORT_TYPE_IB
) ?
321 if (mdev
->caps
.possible_type
[info
->port
] == MLX4_PORT_TYPE_AUTO
)
322 sprintf(buf
, "auto (%s)\n", type
);
324 sprintf(buf
, "%s\n", type
);
329 static ssize_t
set_port_type(struct device
*dev
,
330 struct device_attribute
*attr
,
331 const char *buf
, size_t count
)
333 struct mlx4_port_info
*info
= container_of(attr
, struct mlx4_port_info
,
335 struct mlx4_dev
*mdev
= info
->dev
;
336 struct mlx4_priv
*priv
= mlx4_priv(mdev
);
337 enum mlx4_port_type types
[MLX4_MAX_PORTS
];
338 enum mlx4_port_type new_types
[MLX4_MAX_PORTS
];
342 if (!strcmp(buf
, "ib\n"))
343 info
->tmp_type
= MLX4_PORT_TYPE_IB
;
344 else if (!strcmp(buf
, "eth\n"))
345 info
->tmp_type
= MLX4_PORT_TYPE_ETH
;
346 else if (!strcmp(buf
, "auto\n"))
347 info
->tmp_type
= MLX4_PORT_TYPE_AUTO
;
349 mlx4_err(mdev
, "%s is not supported port type\n", buf
);
353 mlx4_stop_sense(mdev
);
354 mutex_lock(&priv
->port_mutex
);
355 /* Possible type is always the one that was delivered */
356 mdev
->caps
.possible_type
[info
->port
] = info
->tmp_type
;
358 for (i
= 0; i
< mdev
->caps
.num_ports
; i
++) {
359 types
[i
] = priv
->port
[i
+1].tmp_type
? priv
->port
[i
+1].tmp_type
:
360 mdev
->caps
.possible_type
[i
+1];
361 if (types
[i
] == MLX4_PORT_TYPE_AUTO
)
362 types
[i
] = mdev
->caps
.port_type
[i
+1];
365 if (!(mdev
->caps
.flags
& MLX4_DEV_CAP_FLAG_DPDP
)) {
366 for (i
= 1; i
<= mdev
->caps
.num_ports
; i
++) {
367 if (mdev
->caps
.possible_type
[i
] == MLX4_PORT_TYPE_AUTO
) {
368 mdev
->caps
.possible_type
[i
] = mdev
->caps
.port_type
[i
];
374 mlx4_err(mdev
, "Auto sensing is not supported on this HCA. "
375 "Set only 'eth' or 'ib' for both ports "
376 "(should be the same)\n");
380 mlx4_do_sense_ports(mdev
, new_types
, types
);
382 err
= mlx4_check_port_params(mdev
, new_types
);
386 /* We are about to apply the changes after the configuration
387 * was verified, no need to remember the temporary types
389 for (i
= 0; i
< mdev
->caps
.num_ports
; i
++)
390 priv
->port
[i
+ 1].tmp_type
= 0;
392 err
= mlx4_change_port_types(mdev
, new_types
);
395 mlx4_start_sense(mdev
);
396 mutex_unlock(&priv
->port_mutex
);
397 return err
? err
: count
;
400 static int mlx4_load_fw(struct mlx4_dev
*dev
)
402 struct mlx4_priv
*priv
= mlx4_priv(dev
);
405 priv
->fw
.fw_icm
= mlx4_alloc_icm(dev
, priv
->fw
.fw_pages
,
406 GFP_HIGHUSER
| __GFP_NOWARN
, 0);
407 if (!priv
->fw
.fw_icm
) {
408 mlx4_err(dev
, "Couldn't allocate FW area, aborting.\n");
412 err
= mlx4_MAP_FA(dev
, priv
->fw
.fw_icm
);
414 mlx4_err(dev
, "MAP_FA command failed, aborting.\n");
418 err
= mlx4_RUN_FW(dev
);
420 mlx4_err(dev
, "RUN_FW command failed, aborting.\n");
430 mlx4_free_icm(dev
, priv
->fw
.fw_icm
, 0);
434 static int mlx4_init_cmpt_table(struct mlx4_dev
*dev
, u64 cmpt_base
,
437 struct mlx4_priv
*priv
= mlx4_priv(dev
);
440 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.cmpt_table
,
442 ((u64
) (MLX4_CMPT_TYPE_QP
*
443 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
444 cmpt_entry_sz
, dev
->caps
.num_qps
,
445 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
450 err
= mlx4_init_icm_table(dev
, &priv
->srq_table
.cmpt_table
,
452 ((u64
) (MLX4_CMPT_TYPE_SRQ
*
453 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
454 cmpt_entry_sz
, dev
->caps
.num_srqs
,
455 dev
->caps
.reserved_srqs
, 0, 0);
459 err
= mlx4_init_icm_table(dev
, &priv
->cq_table
.cmpt_table
,
461 ((u64
) (MLX4_CMPT_TYPE_CQ
*
462 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
463 cmpt_entry_sz
, dev
->caps
.num_cqs
,
464 dev
->caps
.reserved_cqs
, 0, 0);
468 err
= mlx4_init_icm_table(dev
, &priv
->eq_table
.cmpt_table
,
470 ((u64
) (MLX4_CMPT_TYPE_EQ
*
471 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
473 dev
->caps
.num_eqs
, dev
->caps
.num_eqs
, 0, 0);
480 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.cmpt_table
);
483 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.cmpt_table
);
486 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.cmpt_table
);
492 static int mlx4_init_icm(struct mlx4_dev
*dev
, struct mlx4_dev_cap
*dev_cap
,
493 struct mlx4_init_hca_param
*init_hca
, u64 icm_size
)
495 struct mlx4_priv
*priv
= mlx4_priv(dev
);
499 err
= mlx4_SET_ICM_SIZE(dev
, icm_size
, &aux_pages
);
501 mlx4_err(dev
, "SET_ICM_SIZE command failed, aborting.\n");
505 mlx4_dbg(dev
, "%lld KB of HCA context requires %lld KB aux memory.\n",
506 (unsigned long long) icm_size
>> 10,
507 (unsigned long long) aux_pages
<< 2);
509 priv
->fw
.aux_icm
= mlx4_alloc_icm(dev
, aux_pages
,
510 GFP_HIGHUSER
| __GFP_NOWARN
, 0);
511 if (!priv
->fw
.aux_icm
) {
512 mlx4_err(dev
, "Couldn't allocate aux memory, aborting.\n");
516 err
= mlx4_MAP_ICM_AUX(dev
, priv
->fw
.aux_icm
);
518 mlx4_err(dev
, "MAP_ICM_AUX command failed, aborting.\n");
522 err
= mlx4_init_cmpt_table(dev
, init_hca
->cmpt_base
, dev_cap
->cmpt_entry_sz
);
524 mlx4_err(dev
, "Failed to map cMPT context memory, aborting.\n");
528 err
= mlx4_map_eq_icm(dev
, init_hca
->eqc_base
);
530 mlx4_err(dev
, "Failed to map EQ context memory, aborting.\n");
535 * Reserved MTT entries must be aligned up to a cacheline
536 * boundary, since the FW will write to them, while the driver
537 * writes to all other MTT entries. (The variable
538 * dev->caps.mtt_entry_sz below is really the MTT segment
539 * size, not the raw entry size)
541 dev
->caps
.reserved_mtts
=
542 ALIGN(dev
->caps
.reserved_mtts
* dev
->caps
.mtt_entry_sz
,
543 dma_get_cache_alignment()) / dev
->caps
.mtt_entry_sz
;
545 err
= mlx4_init_icm_table(dev
, &priv
->mr_table
.mtt_table
,
547 dev
->caps
.mtt_entry_sz
,
548 dev
->caps
.num_mtt_segs
,
549 dev
->caps
.reserved_mtts
, 1, 0);
551 mlx4_err(dev
, "Failed to map MTT context memory, aborting.\n");
555 err
= mlx4_init_icm_table(dev
, &priv
->mr_table
.dmpt_table
,
557 dev_cap
->dmpt_entry_sz
,
559 dev
->caps
.reserved_mrws
, 1, 1);
561 mlx4_err(dev
, "Failed to map dMPT context memory, aborting.\n");
565 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.qp_table
,
567 dev_cap
->qpc_entry_sz
,
569 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
572 mlx4_err(dev
, "Failed to map QP context memory, aborting.\n");
576 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.auxc_table
,
578 dev_cap
->aux_entry_sz
,
580 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
583 mlx4_err(dev
, "Failed to map AUXC context memory, aborting.\n");
587 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.altc_table
,
589 dev_cap
->altc_entry_sz
,
591 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
594 mlx4_err(dev
, "Failed to map ALTC context memory, aborting.\n");
598 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.rdmarc_table
,
599 init_hca
->rdmarc_base
,
600 dev_cap
->rdmarc_entry_sz
<< priv
->qp_table
.rdmarc_shift
,
602 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
605 mlx4_err(dev
, "Failed to map RDMARC context memory, aborting\n");
609 err
= mlx4_init_icm_table(dev
, &priv
->cq_table
.table
,
611 dev_cap
->cqc_entry_sz
,
613 dev
->caps
.reserved_cqs
, 0, 0);
615 mlx4_err(dev
, "Failed to map CQ context memory, aborting.\n");
616 goto err_unmap_rdmarc
;
619 err
= mlx4_init_icm_table(dev
, &priv
->srq_table
.table
,
621 dev_cap
->srq_entry_sz
,
623 dev
->caps
.reserved_srqs
, 0, 0);
625 mlx4_err(dev
, "Failed to map SRQ context memory, aborting.\n");
630 * It's not strictly required, but for simplicity just map the
631 * whole multicast group table now. The table isn't very big
632 * and it's a lot easier than trying to track ref counts.
634 err
= mlx4_init_icm_table(dev
, &priv
->mcg_table
.table
,
635 init_hca
->mc_base
, MLX4_MGM_ENTRY_SIZE
,
636 dev
->caps
.num_mgms
+ dev
->caps
.num_amgms
,
637 dev
->caps
.num_mgms
+ dev
->caps
.num_amgms
,
640 mlx4_err(dev
, "Failed to map MCG context memory, aborting.\n");
647 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.table
);
650 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.table
);
653 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.rdmarc_table
);
656 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.altc_table
);
659 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.auxc_table
);
662 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.qp_table
);
665 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.dmpt_table
);
668 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.mtt_table
);
671 mlx4_unmap_eq_icm(dev
);
674 mlx4_cleanup_icm_table(dev
, &priv
->eq_table
.cmpt_table
);
675 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.cmpt_table
);
676 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.cmpt_table
);
677 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.cmpt_table
);
680 mlx4_UNMAP_ICM_AUX(dev
);
683 mlx4_free_icm(dev
, priv
->fw
.aux_icm
, 0);
688 static void mlx4_free_icms(struct mlx4_dev
*dev
)
690 struct mlx4_priv
*priv
= mlx4_priv(dev
);
692 mlx4_cleanup_icm_table(dev
, &priv
->mcg_table
.table
);
693 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.table
);
694 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.table
);
695 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.rdmarc_table
);
696 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.altc_table
);
697 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.auxc_table
);
698 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.qp_table
);
699 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.dmpt_table
);
700 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.mtt_table
);
701 mlx4_cleanup_icm_table(dev
, &priv
->eq_table
.cmpt_table
);
702 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.cmpt_table
);
703 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.cmpt_table
);
704 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.cmpt_table
);
705 mlx4_unmap_eq_icm(dev
);
707 mlx4_UNMAP_ICM_AUX(dev
);
708 mlx4_free_icm(dev
, priv
->fw
.aux_icm
, 0);
711 static void mlx4_close_hca(struct mlx4_dev
*dev
)
713 mlx4_CLOSE_HCA(dev
, 0);
716 mlx4_free_icm(dev
, mlx4_priv(dev
)->fw
.fw_icm
, 0);
719 static int mlx4_init_hca(struct mlx4_dev
*dev
)
721 struct mlx4_priv
*priv
= mlx4_priv(dev
);
722 struct mlx4_adapter adapter
;
723 struct mlx4_dev_cap dev_cap
;
724 struct mlx4_mod_stat_cfg mlx4_cfg
;
725 struct mlx4_profile profile
;
726 struct mlx4_init_hca_param init_hca
;
730 err
= mlx4_QUERY_FW(dev
);
733 mlx4_info(dev
, "non-primary physical function, skipping.\n");
735 mlx4_err(dev
, "QUERY_FW command failed, aborting.\n");
739 err
= mlx4_load_fw(dev
);
741 mlx4_err(dev
, "Failed to start FW, aborting.\n");
745 mlx4_cfg
.log_pg_sz_m
= 1;
746 mlx4_cfg
.log_pg_sz
= 0;
747 err
= mlx4_MOD_STAT_CFG(dev
, &mlx4_cfg
);
749 mlx4_warn(dev
, "Failed to override log_pg_sz parameter\n");
751 err
= mlx4_dev_cap(dev
, &dev_cap
);
753 mlx4_err(dev
, "QUERY_DEV_CAP command failed, aborting.\n");
757 profile
= default_profile
;
759 icm_size
= mlx4_make_profile(dev
, &profile
, &dev_cap
, &init_hca
);
760 if ((long long) icm_size
< 0) {
765 init_hca
.log_uar_sz
= ilog2(dev
->caps
.num_uars
);
767 err
= mlx4_init_icm(dev
, &dev_cap
, &init_hca
, icm_size
);
771 err
= mlx4_INIT_HCA(dev
, &init_hca
);
773 mlx4_err(dev
, "INIT_HCA command failed, aborting.\n");
777 err
= mlx4_QUERY_ADAPTER(dev
, &adapter
);
779 mlx4_err(dev
, "QUERY_ADAPTER command failed, aborting.\n");
783 priv
->eq_table
.inta_pin
= adapter
.inta_pin
;
784 memcpy(dev
->board_id
, adapter
.board_id
, sizeof dev
->board_id
);
796 mlx4_free_icm(dev
, priv
->fw
.fw_icm
, 0);
801 static int mlx4_setup_hca(struct mlx4_dev
*dev
)
803 struct mlx4_priv
*priv
= mlx4_priv(dev
);
806 __be32 ib_port_default_caps
;
808 err
= mlx4_init_uar_table(dev
);
810 mlx4_err(dev
, "Failed to initialize "
811 "user access region table, aborting.\n");
815 err
= mlx4_uar_alloc(dev
, &priv
->driver_uar
);
817 mlx4_err(dev
, "Failed to allocate driver access region, "
819 goto err_uar_table_free
;
822 priv
->kar
= ioremap(priv
->driver_uar
.pfn
<< PAGE_SHIFT
, PAGE_SIZE
);
824 mlx4_err(dev
, "Couldn't map kernel access region, "
830 err
= mlx4_init_pd_table(dev
);
832 mlx4_err(dev
, "Failed to initialize "
833 "protection domain table, aborting.\n");
837 err
= mlx4_init_mr_table(dev
);
839 mlx4_err(dev
, "Failed to initialize "
840 "memory region table, aborting.\n");
841 goto err_pd_table_free
;
844 err
= mlx4_init_eq_table(dev
);
846 mlx4_err(dev
, "Failed to initialize "
847 "event queue table, aborting.\n");
848 goto err_mr_table_free
;
851 err
= mlx4_cmd_use_events(dev
);
853 mlx4_err(dev
, "Failed to switch to event-driven "
854 "firmware commands, aborting.\n");
855 goto err_eq_table_free
;
860 if (dev
->flags
& MLX4_FLAG_MSI_X
) {
861 mlx4_warn(dev
, "NOP command failed to generate MSI-X "
862 "interrupt IRQ %d).\n",
863 priv
->eq_table
.eq
[dev
->caps
.num_comp_vectors
].irq
);
864 mlx4_warn(dev
, "Trying again without MSI-X.\n");
866 mlx4_err(dev
, "NOP command failed to generate interrupt "
867 "(IRQ %d), aborting.\n",
868 priv
->eq_table
.eq
[dev
->caps
.num_comp_vectors
].irq
);
869 mlx4_err(dev
, "BIOS or ACPI interrupt routing problem?\n");
875 mlx4_dbg(dev
, "NOP command IRQ test passed\n");
877 err
= mlx4_init_cq_table(dev
);
879 mlx4_err(dev
, "Failed to initialize "
880 "completion queue table, aborting.\n");
884 err
= mlx4_init_srq_table(dev
);
886 mlx4_err(dev
, "Failed to initialize "
887 "shared receive queue table, aborting.\n");
888 goto err_cq_table_free
;
891 err
= mlx4_init_qp_table(dev
);
893 mlx4_err(dev
, "Failed to initialize "
894 "queue pair table, aborting.\n");
895 goto err_srq_table_free
;
898 err
= mlx4_init_mcg_table(dev
);
900 mlx4_err(dev
, "Failed to initialize "
901 "multicast group table, aborting.\n");
902 goto err_qp_table_free
;
905 for (port
= 1; port
<= dev
->caps
.num_ports
; port
++) {
906 ib_port_default_caps
= 0;
907 err
= mlx4_get_port_ib_caps(dev
, port
, &ib_port_default_caps
);
909 mlx4_warn(dev
, "failed to get port %d default "
910 "ib capabilities (%d). Continuing with "
911 "caps = 0\n", port
, err
);
912 dev
->caps
.ib_port_def_cap
[port
] = ib_port_default_caps
;
913 err
= mlx4_SET_PORT(dev
, port
);
915 mlx4_err(dev
, "Failed to set port %d, aborting\n",
917 goto err_mcg_table_free
;
924 mlx4_cleanup_mcg_table(dev
);
927 mlx4_cleanup_qp_table(dev
);
930 mlx4_cleanup_srq_table(dev
);
933 mlx4_cleanup_cq_table(dev
);
936 mlx4_cmd_use_polling(dev
);
939 mlx4_cleanup_eq_table(dev
);
942 mlx4_cleanup_mr_table(dev
);
945 mlx4_cleanup_pd_table(dev
);
951 mlx4_uar_free(dev
, &priv
->driver_uar
);
954 mlx4_cleanup_uar_table(dev
);
958 static void mlx4_enable_msi_x(struct mlx4_dev
*dev
)
960 struct mlx4_priv
*priv
= mlx4_priv(dev
);
961 struct msix_entry
*entries
;
967 nreq
= min_t(int, dev
->caps
.num_eqs
- dev
->caps
.reserved_eqs
,
968 num_possible_cpus() + 1);
969 entries
= kcalloc(nreq
, sizeof *entries
, GFP_KERNEL
);
973 for (i
= 0; i
< nreq
; ++i
)
974 entries
[i
].entry
= i
;
977 err
= pci_enable_msix(dev
->pdev
, entries
, nreq
);
979 /* Try again if at least 2 vectors are available */
981 mlx4_info(dev
, "Requested %d vectors, "
982 "but only %d MSI-X vectors available, "
983 "trying again\n", nreq
, err
);
991 dev
->caps
.num_comp_vectors
= nreq
- 1;
992 for (i
= 0; i
< nreq
; ++i
)
993 priv
->eq_table
.eq
[i
].irq
= entries
[i
].vector
;
995 dev
->flags
|= MLX4_FLAG_MSI_X
;
1002 dev
->caps
.num_comp_vectors
= 1;
1004 for (i
= 0; i
< 2; ++i
)
1005 priv
->eq_table
.eq
[i
].irq
= dev
->pdev
->irq
;
1008 static int mlx4_init_port_info(struct mlx4_dev
*dev
, int port
)
1010 struct mlx4_port_info
*info
= &mlx4_priv(dev
)->port
[port
];
1015 mlx4_init_mac_table(dev
, &info
->mac_table
);
1016 mlx4_init_vlan_table(dev
, &info
->vlan_table
);
1018 sprintf(info
->dev_name
, "mlx4_port%d", port
);
1019 info
->port_attr
.attr
.name
= info
->dev_name
;
1020 info
->port_attr
.attr
.mode
= S_IRUGO
| S_IWUSR
;
1021 info
->port_attr
.show
= show_port_type
;
1022 info
->port_attr
.store
= set_port_type
;
1024 err
= device_create_file(&dev
->pdev
->dev
, &info
->port_attr
);
1026 mlx4_err(dev
, "Failed to create file for port %d\n", port
);
1033 static void mlx4_cleanup_port_info(struct mlx4_port_info
*info
)
1038 device_remove_file(&info
->dev
->pdev
->dev
, &info
->port_attr
);
1041 static int __mlx4_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
1043 struct mlx4_priv
*priv
;
1044 struct mlx4_dev
*dev
;
1048 printk(KERN_INFO PFX
"Initializing %s\n",
1051 err
= pci_enable_device(pdev
);
1053 dev_err(&pdev
->dev
, "Cannot enable PCI device, "
1059 * Check for BARs. We expect 0: 1MB
1061 if (!(pci_resource_flags(pdev
, 0) & IORESOURCE_MEM
) ||
1062 pci_resource_len(pdev
, 0) != 1 << 20) {
1063 dev_err(&pdev
->dev
, "Missing DCS, aborting.\n");
1065 goto err_disable_pdev
;
1067 if (!(pci_resource_flags(pdev
, 2) & IORESOURCE_MEM
)) {
1068 dev_err(&pdev
->dev
, "Missing UAR, aborting.\n");
1070 goto err_disable_pdev
;
1073 err
= pci_request_regions(pdev
, DRV_NAME
);
1075 dev_err(&pdev
->dev
, "Couldn't get PCI resources, aborting\n");
1076 goto err_disable_pdev
;
1079 pci_set_master(pdev
);
1081 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(64));
1083 dev_warn(&pdev
->dev
, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1084 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
1086 dev_err(&pdev
->dev
, "Can't set PCI DMA mask, aborting.\n");
1087 goto err_release_regions
;
1090 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64));
1092 dev_warn(&pdev
->dev
, "Warning: couldn't set 64-bit "
1093 "consistent PCI DMA mask.\n");
1094 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32));
1096 dev_err(&pdev
->dev
, "Can't set consistent PCI DMA mask, "
1098 goto err_release_regions
;
1102 priv
= kzalloc(sizeof *priv
, GFP_KERNEL
);
1104 dev_err(&pdev
->dev
, "Device struct alloc failed, "
1107 goto err_release_regions
;
1112 INIT_LIST_HEAD(&priv
->ctx_list
);
1113 spin_lock_init(&priv
->ctx_lock
);
1115 mutex_init(&priv
->port_mutex
);
1117 INIT_LIST_HEAD(&priv
->pgdir_list
);
1118 mutex_init(&priv
->pgdir_mutex
);
1121 * Now reset the HCA before we touch the PCI capabilities or
1122 * attempt a firmware command, since a boot ROM may have left
1123 * the HCA in an undefined state.
1125 err
= mlx4_reset(dev
);
1127 mlx4_err(dev
, "Failed to reset HCA, aborting.\n");
1131 if (mlx4_cmd_init(dev
)) {
1132 mlx4_err(dev
, "Failed to init command interface, aborting.\n");
1136 err
= mlx4_init_hca(dev
);
1140 err
= mlx4_alloc_eq_table(dev
);
1144 mlx4_enable_msi_x(dev
);
1146 err
= mlx4_setup_hca(dev
);
1147 if (err
== -EBUSY
&& (dev
->flags
& MLX4_FLAG_MSI_X
)) {
1148 dev
->flags
&= ~MLX4_FLAG_MSI_X
;
1149 pci_disable_msix(pdev
);
1150 err
= mlx4_setup_hca(dev
);
1156 for (port
= 1; port
<= dev
->caps
.num_ports
; port
++) {
1157 err
= mlx4_init_port_info(dev
, port
);
1162 err
= mlx4_register_device(dev
);
1166 mlx4_sense_init(dev
);
1167 mlx4_start_sense(dev
);
1169 pci_set_drvdata(pdev
, dev
);
1174 for (port
= 1; port
<= dev
->caps
.num_ports
; port
++)
1175 mlx4_cleanup_port_info(&priv
->port
[port
]);
1177 mlx4_cleanup_mcg_table(dev
);
1178 mlx4_cleanup_qp_table(dev
);
1179 mlx4_cleanup_srq_table(dev
);
1180 mlx4_cleanup_cq_table(dev
);
1181 mlx4_cmd_use_polling(dev
);
1182 mlx4_cleanup_eq_table(dev
);
1183 mlx4_cleanup_mr_table(dev
);
1184 mlx4_cleanup_pd_table(dev
);
1185 mlx4_cleanup_uar_table(dev
);
1188 mlx4_free_eq_table(dev
);
1191 if (dev
->flags
& MLX4_FLAG_MSI_X
)
1192 pci_disable_msix(pdev
);
1194 mlx4_close_hca(dev
);
1197 mlx4_cmd_cleanup(dev
);
1202 err_release_regions
:
1203 pci_release_regions(pdev
);
1206 pci_disable_device(pdev
);
1207 pci_set_drvdata(pdev
, NULL
);
1211 static int __devinit
mlx4_init_one(struct pci_dev
*pdev
,
1212 const struct pci_device_id
*id
)
1214 static int mlx4_version_printed
;
1216 if (!mlx4_version_printed
) {
1217 printk(KERN_INFO
"%s", mlx4_version
);
1218 ++mlx4_version_printed
;
1221 return __mlx4_init_one(pdev
, id
);
1224 static void mlx4_remove_one(struct pci_dev
*pdev
)
1226 struct mlx4_dev
*dev
= pci_get_drvdata(pdev
);
1227 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1231 mlx4_stop_sense(dev
);
1232 mlx4_unregister_device(dev
);
1234 for (p
= 1; p
<= dev
->caps
.num_ports
; p
++) {
1235 mlx4_cleanup_port_info(&priv
->port
[p
]);
1236 mlx4_CLOSE_PORT(dev
, p
);
1239 mlx4_cleanup_mcg_table(dev
);
1240 mlx4_cleanup_qp_table(dev
);
1241 mlx4_cleanup_srq_table(dev
);
1242 mlx4_cleanup_cq_table(dev
);
1243 mlx4_cmd_use_polling(dev
);
1244 mlx4_cleanup_eq_table(dev
);
1245 mlx4_cleanup_mr_table(dev
);
1246 mlx4_cleanup_pd_table(dev
);
1249 mlx4_uar_free(dev
, &priv
->driver_uar
);
1250 mlx4_cleanup_uar_table(dev
);
1251 mlx4_free_eq_table(dev
);
1252 mlx4_close_hca(dev
);
1253 mlx4_cmd_cleanup(dev
);
1255 if (dev
->flags
& MLX4_FLAG_MSI_X
)
1256 pci_disable_msix(pdev
);
1259 pci_release_regions(pdev
);
1260 pci_disable_device(pdev
);
1261 pci_set_drvdata(pdev
, NULL
);
1265 int mlx4_restart_one(struct pci_dev
*pdev
)
1267 mlx4_remove_one(pdev
);
1268 return __mlx4_init_one(pdev
, NULL
);
1271 static struct pci_device_id mlx4_pci_table
[] = {
1272 { PCI_VDEVICE(MELLANOX
, 0x6340) }, /* MT25408 "Hermon" SDR */
1273 { PCI_VDEVICE(MELLANOX
, 0x634a) }, /* MT25408 "Hermon" DDR */
1274 { PCI_VDEVICE(MELLANOX
, 0x6354) }, /* MT25408 "Hermon" QDR */
1275 { PCI_VDEVICE(MELLANOX
, 0x6732) }, /* MT25408 "Hermon" DDR PCIe gen2 */
1276 { PCI_VDEVICE(MELLANOX
, 0x673c) }, /* MT25408 "Hermon" QDR PCIe gen2 */
1277 { PCI_VDEVICE(MELLANOX
, 0x6368) }, /* MT25408 "Hermon" EN 10GigE */
1278 { PCI_VDEVICE(MELLANOX
, 0x6750) }, /* MT25408 "Hermon" EN 10GigE PCIe gen2 */
1279 { PCI_VDEVICE(MELLANOX
, 0x6372) }, /* MT25458 ConnectX EN 10GBASE-T 10GigE */
1280 { PCI_VDEVICE(MELLANOX
, 0x675a) }, /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */
1281 { PCI_VDEVICE(MELLANOX
, 0x6764) }, /* MT26468 ConnectX EN 10GigE PCIe gen2*/
1285 MODULE_DEVICE_TABLE(pci
, mlx4_pci_table
);
1287 static struct pci_driver mlx4_driver
= {
1289 .id_table
= mlx4_pci_table
,
1290 .probe
= mlx4_init_one
,
1291 .remove
= __devexit_p(mlx4_remove_one
)
1294 static int __init
mlx4_verify_params(void)
1296 if ((log_num_mac
< 0) || (log_num_mac
> 7)) {
1297 printk(KERN_WARNING
"mlx4_core: bad num_mac: %d\n", log_num_mac
);
1301 if ((log_num_vlan
< 0) || (log_num_vlan
> 7)) {
1302 printk(KERN_WARNING
"mlx4_core: bad num_vlan: %d\n", log_num_vlan
);
1306 if ((log_mtts_per_seg
< 1) || (log_mtts_per_seg
> 5)) {
1307 printk(KERN_WARNING
"mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg
);
1314 static int __init
mlx4_init(void)
1318 if (mlx4_verify_params())
1323 mlx4_wq
= create_singlethread_workqueue("mlx4");
1327 ret
= pci_register_driver(&mlx4_driver
);
1328 return ret
< 0 ? ret
: 0;
1331 static void __exit
mlx4_cleanup(void)
1333 pci_unregister_driver(&mlx4_driver
);
1334 destroy_workqueue(mlx4_wq
);
1337 module_init(mlx4_init
);
1338 module_exit(mlx4_cleanup
);