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tty/serial: lay the foundations for the next set of reworks
[linux-2.6/linux-2.6-openrd.git] / drivers / char / pcmcia / synclink_cs.c
blob45d8eb5de69f770418e6d1440867a2fde79c4189
1 /*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30 #if defined(__i386__)
31 # define BREAKPOINT() asm(" int $3");
32 #else
33 # define BREAKPOINT() { }
34 #endif
35
36 #define MAX_DEVICE_COUNT 4
37
38 #include <linux/module.h>
39 #include <linux/errno.h>
40 #include <linux/signal.h>
41 #include <linux/sched.h>
42 #include <linux/timer.h>
43 #include <linux/time.h>
44 #include <linux/interrupt.h>
45 #include <linux/tty.h>
46 #include <linux/tty_flip.h>
47 #include <linux/serial.h>
48 #include <linux/major.h>
49 #include <linux/string.h>
50 #include <linux/fcntl.h>
51 #include <linux/ptrace.h>
52 #include <linux/ioport.h>
53 #include <linux/mm.h>
54 #include <linux/slab.h>
55 #include <linux/netdevice.h>
56 #include <linux/vmalloc.h>
57 #include <linux/init.h>
58 #include <linux/delay.h>
59 #include <linux/ioctl.h>
60 #include <linux/synclink.h>
61
62 #include <asm/system.h>
63 #include <asm/io.h>
64 #include <asm/irq.h>
65 #include <asm/dma.h>
66 #include <linux/bitops.h>
67 #include <asm/types.h>
68 #include <linux/termios.h>
69 #include <linux/workqueue.h>
70 #include <linux/hdlc.h>
71
72 #include <pcmcia/cs_types.h>
73 #include <pcmcia/cs.h>
74 #include <pcmcia/cistpl.h>
75 #include <pcmcia/cisreg.h>
76 #include <pcmcia/ds.h>
77
78 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
79 #define SYNCLINK_GENERIC_HDLC 1
80 #else
81 #define SYNCLINK_GENERIC_HDLC 0
82 #endif
83
84 #define GET_USER(error,value,addr) error = get_user(value,addr)
85 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
86 #define PUT_USER(error,value,addr) error = put_user(value,addr)
87 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
88
89 #include <asm/uaccess.h>
90
91 static MGSL_PARAMS default_params = {
92 MGSL_MODE_HDLC, /* unsigned long mode */
93 0, /* unsigned char loopback; */
94 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
95 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
96 0, /* unsigned long clock_speed; */
97 0xff, /* unsigned char addr_filter; */
98 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
99 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
100 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
101 9600, /* unsigned long data_rate; */
102 8, /* unsigned char data_bits; */
103 1, /* unsigned char stop_bits; */
104 ASYNC_PARITY_NONE /* unsigned char parity; */
105 };
106
107 typedef struct
108 {
109 int count;
110 unsigned char status;
111 char data[1];
112 } RXBUF;
113
114 /* The queue of BH actions to be performed */
115
116 #define BH_RECEIVE 1
117 #define BH_TRANSMIT 2
118 #define BH_STATUS 4
119
120 #define IO_PIN_SHUTDOWN_LIMIT 100
121
122 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
123
124 struct _input_signal_events {
125 int ri_up;
126 int ri_down;
127 int dsr_up;
128 int dsr_down;
129 int dcd_up;
130 int dcd_down;
131 int cts_up;
132 int cts_down;
133 };
134
135
136 /*
137 * Device instance data structure
138 */
139
140 typedef struct _mgslpc_info {
141 void *if_ptr; /* General purpose pointer (used by SPPP) */
142 int magic;
143 int flags;
144 int count; /* count of opens */
145 int line;
146 unsigned short close_delay;
147 unsigned short closing_wait; /* time to wait before closing */
148
149 struct mgsl_icount icount;
150
151 struct tty_struct *tty;
152 int timeout;
153 int x_char; /* xon/xoff character */
154 int blocked_open; /* # of blocked opens */
155 unsigned char read_status_mask;
156 unsigned char ignore_status_mask;
157
158 unsigned char *tx_buf;
159 int tx_put;
160 int tx_get;
161 int tx_count;
162
163 /* circular list of fixed length rx buffers */
164
165 unsigned char *rx_buf; /* memory allocated for all rx buffers */
166 int rx_buf_total_size; /* size of memory allocated for rx buffers */
167 int rx_put; /* index of next empty rx buffer */
168 int rx_get; /* index of next full rx buffer */
169 int rx_buf_size; /* size in bytes of single rx buffer */
170 int rx_buf_count; /* total number of rx buffers */
171 int rx_frame_count; /* number of full rx buffers */
172
173 wait_queue_head_t open_wait;
174 wait_queue_head_t close_wait;
175
176 wait_queue_head_t status_event_wait_q;
177 wait_queue_head_t event_wait_q;
178 struct timer_list tx_timer; /* HDLC transmit timeout timer */
179 struct _mgslpc_info *next_device; /* device list link */
180
181 unsigned short imra_value;
182 unsigned short imrb_value;
183 unsigned char pim_value;
184
185 spinlock_t lock;
186 struct work_struct task; /* task structure for scheduling bh */
187
188 u32 max_frame_size;
189
190 u32 pending_bh;
191
192 bool bh_running;
193 bool bh_requested;
194
195 int dcd_chkcount; /* check counts to prevent */
196 int cts_chkcount; /* too many IRQs if a signal */
197 int dsr_chkcount; /* is floating */
198 int ri_chkcount;
199
200 bool rx_enabled;
201 bool rx_overflow;
202
203 bool tx_enabled;
204 bool tx_active;
205 bool tx_aborting;
206 u32 idle_mode;
207
208 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
209
210 char device_name[25]; /* device instance name */
211
212 unsigned int io_base; /* base I/O address of adapter */
213 unsigned int irq_level;
214
215 MGSL_PARAMS params; /* communications parameters */
216
217 unsigned char serial_signals; /* current serial signal states */
218
219 bool irq_occurred; /* for diagnostics use */
220 char testing_irq;
221 unsigned int init_error; /* startup error (DIAGS) */
222
223 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
224 bool drop_rts_on_tx_done;
225
226 struct _input_signal_events input_signal_events;
227
228 /* PCMCIA support */
229 struct pcmcia_device *p_dev;
230 dev_node_t node;
231 int stop;
232
233 /* SPPP/Cisco HDLC device parts */
234 int netcount;
235 int dosyncppp;
236 spinlock_t netlock;
237
238 #if SYNCLINK_GENERIC_HDLC
239 struct net_device *netdev;
240 #endif
241
242 } MGSLPC_INFO;
243
244 #define MGSLPC_MAGIC 0x5402
245
246 /*
247 * The size of the serial xmit buffer is 1 page, or 4096 bytes
248 */
249 #define TXBUFSIZE 4096
250
251
252 #define CHA 0x00 /* channel A offset */
253 #define CHB 0x40 /* channel B offset */
254
255 /*
256 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
257 */
258 #undef PVR
259
260 #define RXFIFO 0
261 #define TXFIFO 0
262 #define STAR 0x20
263 #define CMDR 0x20
264 #define RSTA 0x21
265 #define PRE 0x21
266 #define MODE 0x22
267 #define TIMR 0x23
268 #define XAD1 0x24
269 #define XAD2 0x25
270 #define RAH1 0x26
271 #define RAH2 0x27
272 #define DAFO 0x27
273 #define RAL1 0x28
274 #define RFC 0x28
275 #define RHCR 0x29
276 #define RAL2 0x29
277 #define RBCL 0x2a
278 #define XBCL 0x2a
279 #define RBCH 0x2b
280 #define XBCH 0x2b
281 #define CCR0 0x2c
282 #define CCR1 0x2d
283 #define CCR2 0x2e
284 #define CCR3 0x2f
285 #define VSTR 0x34
286 #define BGR 0x34
287 #define RLCR 0x35
288 #define AML 0x36
289 #define AMH 0x37
290 #define GIS 0x38
291 #define IVA 0x38
292 #define IPC 0x39
293 #define ISR 0x3a
294 #define IMR 0x3a
295 #define PVR 0x3c
296 #define PIS 0x3d
297 #define PIM 0x3d
298 #define PCR 0x3e
299 #define CCR4 0x3f
300
301 // IMR/ISR
302
303 #define IRQ_BREAK_ON BIT15 // rx break detected
304 #define IRQ_DATAOVERRUN BIT14 // receive data overflow
305 #define IRQ_ALLSENT BIT13 // all sent
306 #define IRQ_UNDERRUN BIT12 // transmit data underrun
307 #define IRQ_TIMER BIT11 // timer interrupt
308 #define IRQ_CTS BIT10 // CTS status change
309 #define IRQ_TXREPEAT BIT9 // tx message repeat
310 #define IRQ_TXFIFO BIT8 // transmit pool ready
311 #define IRQ_RXEOM BIT7 // receive message end
312 #define IRQ_EXITHUNT BIT6 // receive frame start
313 #define IRQ_RXTIME BIT6 // rx char timeout
314 #define IRQ_DCD BIT2 // carrier detect status change
315 #define IRQ_OVERRUN BIT1 // receive frame overflow
316 #define IRQ_RXFIFO BIT0 // receive pool full
317
318 // STAR
319
320 #define XFW BIT6 // transmit FIFO write enable
321 #define CEC BIT2 // command executing
322 #define CTS BIT1 // CTS state
323
324 #define PVR_DTR BIT0
325 #define PVR_DSR BIT1
326 #define PVR_RI BIT2
327 #define PVR_AUTOCTS BIT3
328 #define PVR_RS232 0x20 /* 0010b */
329 #define PVR_V35 0xe0 /* 1110b */
330 #define PVR_RS422 0x40 /* 0100b */
331
332 /* Register access functions */
333
334 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
335 #define read_reg(info, reg) inb((info)->io_base + (reg))
336
337 #define read_reg16(info, reg) inw((info)->io_base + (reg))
338 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
339
340 #define set_reg_bits(info, reg, mask) \
341 write_reg(info, (reg), \
342 (unsigned char) (read_reg(info, (reg)) | (mask)))
343 #define clear_reg_bits(info, reg, mask) \
344 write_reg(info, (reg), \
345 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
346 /*
347 * interrupt enable/disable routines
348 */
349 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
350 {
351 if (channel == CHA) {
352 info->imra_value |= mask;
353 write_reg16(info, CHA + IMR, info->imra_value);
354 } else {
355 info->imrb_value |= mask;
356 write_reg16(info, CHB + IMR, info->imrb_value);
357 }
358 }
359 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
360 {
361 if (channel == CHA) {
362 info->imra_value &= ~mask;
363 write_reg16(info, CHA + IMR, info->imra_value);
364 } else {
365 info->imrb_value &= ~mask;
366 write_reg16(info, CHB + IMR, info->imrb_value);
367 }
368 }
369
370 #define port_irq_disable(info, mask) \
371 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
372
373 #define port_irq_enable(info, mask) \
374 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
375
376 static void rx_start(MGSLPC_INFO *info);
377 static void rx_stop(MGSLPC_INFO *info);
378
379 static void tx_start(MGSLPC_INFO *info);
380 static void tx_stop(MGSLPC_INFO *info);
381 static void tx_set_idle(MGSLPC_INFO *info);
382
383 static void get_signals(MGSLPC_INFO *info);
384 static void set_signals(MGSLPC_INFO *info);
385
386 static void reset_device(MGSLPC_INFO *info);
387
388 static void hdlc_mode(MGSLPC_INFO *info);
389 static void async_mode(MGSLPC_INFO *info);
390
391 static void tx_timeout(unsigned long context);
392
393 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
394
395 #if SYNCLINK_GENERIC_HDLC
396 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
397 static void hdlcdev_tx_done(MGSLPC_INFO *info);
398 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
399 static int hdlcdev_init(MGSLPC_INFO *info);
400 static void hdlcdev_exit(MGSLPC_INFO *info);
401 #endif
402
403 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
404
405 static bool register_test(MGSLPC_INFO *info);
406 static bool irq_test(MGSLPC_INFO *info);
407 static int adapter_test(MGSLPC_INFO *info);
408
409 static int claim_resources(MGSLPC_INFO *info);
410 static void release_resources(MGSLPC_INFO *info);
411 static void mgslpc_add_device(MGSLPC_INFO *info);
412 static void mgslpc_remove_device(MGSLPC_INFO *info);
413
414 static bool rx_get_frame(MGSLPC_INFO *info);
415 static void rx_reset_buffers(MGSLPC_INFO *info);
416 static int rx_alloc_buffers(MGSLPC_INFO *info);
417 static void rx_free_buffers(MGSLPC_INFO *info);
418
419 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
420
421 /*
422 * Bottom half interrupt handlers
423 */
424 static void bh_handler(struct work_struct *work);
425 static void bh_transmit(MGSLPC_INFO *info);
426 static void bh_status(MGSLPC_INFO *info);
427
428 /*
429 * ioctl handlers
430 */
431 static int tiocmget(struct tty_struct *tty, struct file *file);
432 static int tiocmset(struct tty_struct *tty, struct file *file,
433 unsigned int set, unsigned int clear);
434 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
435 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
436 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
437 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
438 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
439 static int set_txenable(MGSLPC_INFO *info, int enable);
440 static int tx_abort(MGSLPC_INFO *info);
441 static int set_rxenable(MGSLPC_INFO *info, int enable);
442 static int wait_events(MGSLPC_INFO *info, int __user *mask);
443
444 static MGSLPC_INFO *mgslpc_device_list = NULL;
445 static int mgslpc_device_count = 0;
446
447 /*
448 * Set this param to non-zero to load eax with the
449 * .text section address and breakpoint on module load.
450 * This is useful for use with gdb and add-symbol-file command.
451 */
452 static int break_on_load=0;
453
454 /*
455 * Driver major number, defaults to zero to get auto
456 * assigned major number. May be forced as module parameter.
457 */
458 static int ttymajor=0;
459
460 static int debug_level = 0;
461 static int maxframe[MAX_DEVICE_COUNT] = {0,};
462 static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
463
464 module_param(break_on_load, bool, 0);
465 module_param(ttymajor, int, 0);
466 module_param(debug_level, int, 0);
467 module_param_array(maxframe, int, NULL, 0);
468 module_param_array(dosyncppp, int, NULL, 0);
469
470 MODULE_LICENSE("GPL");
471
472 static char *driver_name = "SyncLink PC Card driver";
473 static char *driver_version = "$Revision: 4.34 $";
474
475 static struct tty_driver *serial_driver;
476
477 /* number of characters left in xmit buffer before we ask for more */
478 #define WAKEUP_CHARS 256
479
480 static void mgslpc_change_params(MGSLPC_INFO *info);
481 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
482
483 /* PCMCIA prototypes */
484
485 static int mgslpc_config(struct pcmcia_device *link);
486 static void mgslpc_release(u_long arg);
487 static void mgslpc_detach(struct pcmcia_device *p_dev);
488
489 /*
490 * 1st function defined in .text section. Calling this function in
491 * init_module() followed by a breakpoint allows a remote debugger
492 * (gdb) to get the .text address for the add-symbol-file command.
493 * This allows remote debugging of dynamically loadable modules.
494 */
495 static void* mgslpc_get_text_ptr(void)
496 {
497 return mgslpc_get_text_ptr;
498 }
499
500 /**
501 * line discipline callback wrappers
502 *
503 * The wrappers maintain line discipline references
504 * while calling into the line discipline.
505 *
506 * ldisc_receive_buf - pass receive data to line discipline
507 */
508
509 static void ldisc_receive_buf(struct tty_struct *tty,
510 const __u8 *data, char *flags, int count)
511 {
512 struct tty_ldisc *ld;
513 if (!tty)
514 return;
515 ld = tty_ldisc_ref(tty);
516 if (ld) {
517 if (ld->receive_buf)
518 ld->receive_buf(tty, data, flags, count);
519 tty_ldisc_deref(ld);
520 }
521 }
522
523 static int mgslpc_probe(struct pcmcia_device *link)
524 {
525 MGSLPC_INFO *info;
526 int ret;
527
528 if (debug_level >= DEBUG_LEVEL_INFO)
529 printk("mgslpc_attach\n");
530
531 info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
532 if (!info) {
533 printk("Error can't allocate device instance data\n");
534 return -ENOMEM;
535 }
536
537 info->magic = MGSLPC_MAGIC;
538 INIT_WORK(&info->task, bh_handler);
539 info->max_frame_size = 4096;
540 info->close_delay = 5*HZ/10;
541 info->closing_wait = 30*HZ;
542 init_waitqueue_head(&info->open_wait);
543 init_waitqueue_head(&info->close_wait);
544 init_waitqueue_head(&info->status_event_wait_q);
545 init_waitqueue_head(&info->event_wait_q);
546 spin_lock_init(&info->lock);
547 spin_lock_init(&info->netlock);
548 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
549 info->idle_mode = HDLC_TXIDLE_FLAGS;
550 info->imra_value = 0xffff;
551 info->imrb_value = 0xffff;
552 info->pim_value = 0xff;
553
554 info->p_dev = link;
555 link->priv = info;
556
557 /* Initialize the struct pcmcia_device structure */
558
559 /* Interrupt setup */
560 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
561 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
562 link->irq.Handler = NULL;
563
564 link->conf.Attributes = 0;
565 link->conf.IntType = INT_MEMORY_AND_IO;
566
567 ret = mgslpc_config(link);
568 if (ret)
569 return ret;
570
571 mgslpc_add_device(info);
572
573 return 0;
574 }
575
576 /* Card has been inserted.
577 */
578
579 #define CS_CHECK(fn, ret) \
580 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
581
582 static int mgslpc_config(struct pcmcia_device *link)
583 {
584 MGSLPC_INFO *info = link->priv;
585 tuple_t tuple;
586 cisparse_t parse;
587 int last_fn, last_ret;
588 u_char buf[64];
589 cistpl_cftable_entry_t dflt = { 0 };
590 cistpl_cftable_entry_t *cfg;
591
592 if (debug_level >= DEBUG_LEVEL_INFO)
593 printk("mgslpc_config(0x%p)\n", link);
594
595 tuple.Attributes = 0;
596 tuple.TupleData = buf;
597 tuple.TupleDataMax = sizeof(buf);
598 tuple.TupleOffset = 0;
599
600 /* get CIS configuration entry */
601
602 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
603 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
604
605 cfg = &(parse.cftable_entry);
606 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
607 CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
608
609 if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
610 if (cfg->index == 0)
611 goto cs_failed;
612
613 link->conf.ConfigIndex = cfg->index;
614 link->conf.Attributes |= CONF_ENABLE_IRQ;
615
616 /* IO window settings */
617 link->io.NumPorts1 = 0;
618 if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
619 cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
620 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
621 if (!(io->flags & CISTPL_IO_8BIT))
622 link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
623 if (!(io->flags & CISTPL_IO_16BIT))
624 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
625 link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
626 link->io.BasePort1 = io->win[0].base;
627 link->io.NumPorts1 = io->win[0].len;
628 CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
629 }
630
631 link->conf.Attributes = CONF_ENABLE_IRQ;
632 link->conf.IntType = INT_MEMORY_AND_IO;
633 link->conf.ConfigIndex = 8;
634 link->conf.Present = PRESENT_OPTION;
635
636 link->irq.Attributes |= IRQ_HANDLE_PRESENT;
637 link->irq.Handler = mgslpc_isr;
638 link->irq.Instance = info;
639 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
640
641 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
642
643 info->io_base = link->io.BasePort1;
644 info->irq_level = link->irq.AssignedIRQ;
645
646 /* add to linked list of devices */
647 sprintf(info->node.dev_name, "mgslpc0");
648 info->node.major = info->node.minor = 0;
649 link->dev_node = &info->node;
650
651 printk(KERN_INFO "%s: index 0x%02x:",
652 info->node.dev_name, link->conf.ConfigIndex);
653 if (link->conf.Attributes & CONF_ENABLE_IRQ)
654 printk(", irq %d", link->irq.AssignedIRQ);
655 if (link->io.NumPorts1)
656 printk(", io 0x%04x-0x%04x", link->io.BasePort1,
657 link->io.BasePort1+link->io.NumPorts1-1);
658 printk("\n");
659 return 0;
660
661 cs_failed:
662 cs_error(link, last_fn, last_ret);
663 mgslpc_release((u_long)link);
664 return -ENODEV;
665 }
666
667 /* Card has been removed.
668 * Unregister device and release PCMCIA configuration.
669 * If device is open, postpone until it is closed.
670 */
671 static void mgslpc_release(u_long arg)
672 {
673 struct pcmcia_device *link = (struct pcmcia_device *)arg;
674
675 if (debug_level >= DEBUG_LEVEL_INFO)
676 printk("mgslpc_release(0x%p)\n", link);
677
678 pcmcia_disable_device(link);
679 }
680
681 static void mgslpc_detach(struct pcmcia_device *link)
682 {
683 if (debug_level >= DEBUG_LEVEL_INFO)
684 printk("mgslpc_detach(0x%p)\n", link);
685
686 ((MGSLPC_INFO *)link->priv)->stop = 1;
687 mgslpc_release((u_long)link);
688
689 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
690 }
691
692 static int mgslpc_suspend(struct pcmcia_device *link)
693 {
694 MGSLPC_INFO *info = link->priv;
695
696 info->stop = 1;
697
698 return 0;
699 }
700
701 static int mgslpc_resume(struct pcmcia_device *link)
702 {
703 MGSLPC_INFO *info = link->priv;
704
705 info->stop = 0;
706
707 return 0;
708 }
709
710
711 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
712 char *name, const char *routine)
713 {
714 #ifdef MGSLPC_PARANOIA_CHECK
715 static const char *badmagic =
716 "Warning: bad magic number for mgsl struct (%s) in %s\n";
717 static const char *badinfo =
718 "Warning: null mgslpc_info for (%s) in %s\n";
719
720 if (!info) {
721 printk(badinfo, name, routine);
722 return true;
723 }
724 if (info->magic != MGSLPC_MAGIC) {
725 printk(badmagic, name, routine);
726 return true;
727 }
728 #else
729 if (!info)
730 return true;
731 #endif
732 return false;
733 }
734
735
736 #define CMD_RXFIFO BIT7 // release current rx FIFO
737 #define CMD_RXRESET BIT6 // receiver reset
738 #define CMD_RXFIFO_READ BIT5
739 #define CMD_START_TIMER BIT4
740 #define CMD_TXFIFO BIT3 // release current tx FIFO
741 #define CMD_TXEOM BIT1 // transmit end message
742 #define CMD_TXRESET BIT0 // transmit reset
743
744 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
745 {
746 int i = 0;
747 /* wait for command completion */
748 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
749 udelay(1);
750 if (i++ == 1000)
751 return false;
752 }
753 return true;
754 }
755
756 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
757 {
758 wait_command_complete(info, channel);
759 write_reg(info, (unsigned char) (channel + CMDR), cmd);
760 }
761
762 static void tx_pause(struct tty_struct *tty)
763 {
764 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
765 unsigned long flags;
766
767 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
768 return;
769 if (debug_level >= DEBUG_LEVEL_INFO)
770 printk("tx_pause(%s)\n",info->device_name);
771
772 spin_lock_irqsave(&info->lock,flags);
773 if (info->tx_enabled)
774 tx_stop(info);
775 spin_unlock_irqrestore(&info->lock,flags);
776 }
777
778 static void tx_release(struct tty_struct *tty)
779 {
780 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
781 unsigned long flags;
782
783 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
784 return;
785 if (debug_level >= DEBUG_LEVEL_INFO)
786 printk("tx_release(%s)\n",info->device_name);
787
788 spin_lock_irqsave(&info->lock,flags);
789 if (!info->tx_enabled)
790 tx_start(info);
791 spin_unlock_irqrestore(&info->lock,flags);
792 }
793
794 /* Return next bottom half action to perform.
795 * or 0 if nothing to do.
796 */
797 static int bh_action(MGSLPC_INFO *info)
798 {
799 unsigned long flags;
800 int rc = 0;
801
802 spin_lock_irqsave(&info->lock,flags);
803
804 if (info->pending_bh & BH_RECEIVE) {
805 info->pending_bh &= ~BH_RECEIVE;
806 rc = BH_RECEIVE;
807 } else if (info->pending_bh & BH_TRANSMIT) {
808 info->pending_bh &= ~BH_TRANSMIT;
809 rc = BH_TRANSMIT;
810 } else if (info->pending_bh & BH_STATUS) {
811 info->pending_bh &= ~BH_STATUS;
812 rc = BH_STATUS;
813 }
814
815 if (!rc) {
816 /* Mark BH routine as complete */
817 info->bh_running = false;
818 info->bh_requested = false;
819 }
820
821 spin_unlock_irqrestore(&info->lock,flags);
822
823 return rc;
824 }
825
826 static void bh_handler(struct work_struct *work)
827 {
828 MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
829 int action;
830
831 if (!info)
832 return;
833
834 if (debug_level >= DEBUG_LEVEL_BH)
835 printk( "%s(%d):bh_handler(%s) entry\n",
836 __FILE__,__LINE__,info->device_name);
837
838 info->bh_running = true;
839
840 while((action = bh_action(info)) != 0) {
841
842 /* Process work item */
843 if ( debug_level >= DEBUG_LEVEL_BH )
844 printk( "%s(%d):bh_handler() work item action=%d\n",
845 __FILE__,__LINE__,action);
846
847 switch (action) {
848
849 case BH_RECEIVE:
850 while(rx_get_frame(info));
851 break;
852 case BH_TRANSMIT:
853 bh_transmit(info);
854 break;
855 case BH_STATUS:
856 bh_status(info);
857 break;
858 default:
859 /* unknown work item ID */
860 printk("Unknown work item ID=%08X!\n", action);
861 break;
862 }
863 }
864
865 if (debug_level >= DEBUG_LEVEL_BH)
866 printk( "%s(%d):bh_handler(%s) exit\n",
867 __FILE__,__LINE__,info->device_name);
868 }
869
870 static void bh_transmit(MGSLPC_INFO *info)
871 {
872 struct tty_struct *tty = info->tty;
873 if (debug_level >= DEBUG_LEVEL_BH)
874 printk("bh_transmit() entry on %s\n", info->device_name);
875
876 if (tty)
877 tty_wakeup(tty);
878 }
879
880 static void bh_status(MGSLPC_INFO *info)
881 {
882 info->ri_chkcount = 0;
883 info->dsr_chkcount = 0;
884 info->dcd_chkcount = 0;
885 info->cts_chkcount = 0;
886 }
887
888 /* eom: non-zero = end of frame */
889 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
890 {
891 unsigned char data[2];
892 unsigned char fifo_count, read_count, i;
893 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
894
895 if (debug_level >= DEBUG_LEVEL_ISR)
896 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
897
898 if (!info->rx_enabled)
899 return;
900
901 if (info->rx_frame_count >= info->rx_buf_count) {
902 /* no more free buffers */
903 issue_command(info, CHA, CMD_RXRESET);
904 info->pending_bh |= BH_RECEIVE;
905 info->rx_overflow = true;
906 info->icount.buf_overrun++;
907 return;
908 }
909
910 if (eom) {
911 /* end of frame, get FIFO count from RBCL register */
912 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
913 fifo_count = 32;
914 } else
915 fifo_count = 32;
916
917 do {
918 if (fifo_count == 1) {
919 read_count = 1;
920 data[0] = read_reg(info, CHA + RXFIFO);
921 } else {
922 read_count = 2;
923 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
924 }
925 fifo_count -= read_count;
926 if (!fifo_count && eom)
927 buf->status = data[--read_count];
928
929 for (i = 0; i < read_count; i++) {
930 if (buf->count >= info->max_frame_size) {
931 /* frame too large, reset receiver and reset current buffer */
932 issue_command(info, CHA, CMD_RXRESET);
933 buf->count = 0;
934 return;
935 }
936 *(buf->data + buf->count) = data[i];
937 buf->count++;
938 }
939 } while (fifo_count);
940
941 if (eom) {
942 info->pending_bh |= BH_RECEIVE;
943 info->rx_frame_count++;
944 info->rx_put++;
945 if (info->rx_put >= info->rx_buf_count)
946 info->rx_put = 0;
947 }
948 issue_command(info, CHA, CMD_RXFIFO);
949 }
950
951 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
952 {
953 unsigned char data, status, flag;
954 int fifo_count;
955 int work = 0;
956 struct tty_struct *tty = info->tty;
957 struct mgsl_icount *icount = &info->icount;
958
959 if (tcd) {
960 /* early termination, get FIFO count from RBCL register */
961 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
962
963 /* Zero fifo count could mean 0 or 32 bytes available.
964 * If BIT5 of STAR is set then at least 1 byte is available.
965 */
966 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
967 fifo_count = 32;
968 } else
969 fifo_count = 32;
970
971 tty_buffer_request_room(tty, fifo_count);
972 /* Flush received async data to receive data buffer. */
973 while (fifo_count) {
974 data = read_reg(info, CHA + RXFIFO);
975 status = read_reg(info, CHA + RXFIFO);
976 fifo_count -= 2;
977
978 icount->rx++;
979 flag = TTY_NORMAL;
980
981 // if no frameing/crc error then save data
982 // BIT7:parity error
983 // BIT6:framing error
984
985 if (status & (BIT7 + BIT6)) {
986 if (status & BIT7)
987 icount->parity++;
988 else
989 icount->frame++;
990
991 /* discard char if tty control flags say so */
992 if (status & info->ignore_status_mask)
993 continue;
994
995 status &= info->read_status_mask;
996
997 if (status & BIT7)
998 flag = TTY_PARITY;
999 else if (status & BIT6)
1000 flag = TTY_FRAME;
1001 }
1002 work += tty_insert_flip_char(tty, data, flag);
1003 }
1004 issue_command(info, CHA, CMD_RXFIFO);
1005
1006 if (debug_level >= DEBUG_LEVEL_ISR) {
1007 printk("%s(%d):rx_ready_async",
1008 __FILE__,__LINE__);
1009 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1010 __FILE__,__LINE__,icount->rx,icount->brk,
1011 icount->parity,icount->frame,icount->overrun);
1012 }
1013
1014 if (work)
1015 tty_flip_buffer_push(tty);
1016 }
1017
1018
1019 static void tx_done(MGSLPC_INFO *info)
1020 {
1021 if (!info->tx_active)
1022 return;
1023
1024 info->tx_active = false;
1025 info->tx_aborting = false;
1026
1027 if (info->params.mode == MGSL_MODE_ASYNC)
1028 return;
1029
1030 info->tx_count = info->tx_put = info->tx_get = 0;
1031 del_timer(&info->tx_timer);
1032
1033 if (info->drop_rts_on_tx_done) {
1034 get_signals(info);
1035 if (info->serial_signals & SerialSignal_RTS) {
1036 info->serial_signals &= ~SerialSignal_RTS;
1037 set_signals(info);
1038 }
1039 info->drop_rts_on_tx_done = false;
1040 }
1041
1042 #if SYNCLINK_GENERIC_HDLC
1043 if (info->netcount)
1044 hdlcdev_tx_done(info);
1045 else
1046 #endif
1047 {
1048 if (info->tty->stopped || info->tty->hw_stopped) {
1049 tx_stop(info);
1050 return;
1051 }
1052 info->pending_bh |= BH_TRANSMIT;
1053 }
1054 }
1055
1056 static void tx_ready(MGSLPC_INFO *info)
1057 {
1058 unsigned char fifo_count = 32;
1059 int c;
1060
1061 if (debug_level >= DEBUG_LEVEL_ISR)
1062 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1063
1064 if (info->params.mode == MGSL_MODE_HDLC) {
1065 if (!info->tx_active)
1066 return;
1067 } else {
1068 if (info->tty->stopped || info->tty->hw_stopped) {
1069 tx_stop(info);
1070 return;
1071 }
1072 if (!info->tx_count)
1073 info->tx_active = false;
1074 }
1075
1076 if (!info->tx_count)
1077 return;
1078
1079 while (info->tx_count && fifo_count) {
1080 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1081
1082 if (c == 1) {
1083 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1084 } else {
1085 write_reg16(info, CHA + TXFIFO,
1086 *((unsigned short*)(info->tx_buf + info->tx_get)));
1087 }
1088 info->tx_count -= c;
1089 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1090 fifo_count -= c;
1091 }
1092
1093 if (info->params.mode == MGSL_MODE_ASYNC) {
1094 if (info->tx_count < WAKEUP_CHARS)
1095 info->pending_bh |= BH_TRANSMIT;
1096 issue_command(info, CHA, CMD_TXFIFO);
1097 } else {
1098 if (info->tx_count)
1099 issue_command(info, CHA, CMD_TXFIFO);
1100 else
1101 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1102 }
1103 }
1104
1105 static void cts_change(MGSLPC_INFO *info)
1106 {
1107 get_signals(info);
1108 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1109 irq_disable(info, CHB, IRQ_CTS);
1110 info->icount.cts++;
1111 if (info->serial_signals & SerialSignal_CTS)
1112 info->input_signal_events.cts_up++;
1113 else
1114 info->input_signal_events.cts_down++;
1115 wake_up_interruptible(&info->status_event_wait_q);
1116 wake_up_interruptible(&info->event_wait_q);
1117
1118 if (info->flags & ASYNC_CTS_FLOW) {
1119 if (info->tty->hw_stopped) {
1120 if (info->serial_signals & SerialSignal_CTS) {
1121 if (debug_level >= DEBUG_LEVEL_ISR)
1122 printk("CTS tx start...");
1123 if (info->tty)
1124 info->tty->hw_stopped = 0;
1125 tx_start(info);
1126 info->pending_bh |= BH_TRANSMIT;
1127 return;
1128 }
1129 } else {
1130 if (!(info->serial_signals & SerialSignal_CTS)) {
1131 if (debug_level >= DEBUG_LEVEL_ISR)
1132 printk("CTS tx stop...");
1133 if (info->tty)
1134 info->tty->hw_stopped = 1;
1135 tx_stop(info);
1136 }
1137 }
1138 }
1139 info->pending_bh |= BH_STATUS;
1140 }
1141
1142 static void dcd_change(MGSLPC_INFO *info)
1143 {
1144 get_signals(info);
1145 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1146 irq_disable(info, CHB, IRQ_DCD);
1147 info->icount.dcd++;
1148 if (info->serial_signals & SerialSignal_DCD) {
1149 info->input_signal_events.dcd_up++;
1150 }
1151 else
1152 info->input_signal_events.dcd_down++;
1153 #if SYNCLINK_GENERIC_HDLC
1154 if (info->netcount) {
1155 if (info->serial_signals & SerialSignal_DCD)
1156 netif_carrier_on(info->netdev);
1157 else
1158 netif_carrier_off(info->netdev);
1159 }
1160 #endif
1161 wake_up_interruptible(&info->status_event_wait_q);
1162 wake_up_interruptible(&info->event_wait_q);
1163
1164 if (info->flags & ASYNC_CHECK_CD) {
1165 if (debug_level >= DEBUG_LEVEL_ISR)
1166 printk("%s CD now %s...", info->device_name,
1167 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1168 if (info->serial_signals & SerialSignal_DCD)
1169 wake_up_interruptible(&info->open_wait);
1170 else {
1171 if (debug_level >= DEBUG_LEVEL_ISR)
1172 printk("doing serial hangup...");
1173 if (info->tty)
1174 tty_hangup(info->tty);
1175 }
1176 }
1177 info->pending_bh |= BH_STATUS;
1178 }
1179
1180 static void dsr_change(MGSLPC_INFO *info)
1181 {
1182 get_signals(info);
1183 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1184 port_irq_disable(info, PVR_DSR);
1185 info->icount.dsr++;
1186 if (info->serial_signals & SerialSignal_DSR)
1187 info->input_signal_events.dsr_up++;
1188 else
1189 info->input_signal_events.dsr_down++;
1190 wake_up_interruptible(&info->status_event_wait_q);
1191 wake_up_interruptible(&info->event_wait_q);
1192 info->pending_bh |= BH_STATUS;
1193 }
1194
1195 static void ri_change(MGSLPC_INFO *info)
1196 {
1197 get_signals(info);
1198 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1199 port_irq_disable(info, PVR_RI);
1200 info->icount.rng++;
1201 if (info->serial_signals & SerialSignal_RI)
1202 info->input_signal_events.ri_up++;
1203 else
1204 info->input_signal_events.ri_down++;
1205 wake_up_interruptible(&info->status_event_wait_q);
1206 wake_up_interruptible(&info->event_wait_q);
1207 info->pending_bh |= BH_STATUS;
1208 }
1209
1210 /* Interrupt service routine entry point.
1211 *
1212 * Arguments:
1213 *
1214 * irq interrupt number that caused interrupt
1215 * dev_id device ID supplied during interrupt registration
1216 */
1217 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1218 {
1219 MGSLPC_INFO *info = dev_id;
1220 unsigned short isr;
1221 unsigned char gis, pis;
1222 int count=0;
1223
1224 if (debug_level >= DEBUG_LEVEL_ISR)
1225 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1226
1227 if (!(info->p_dev->_locked))
1228 return IRQ_HANDLED;
1229
1230 spin_lock(&info->lock);
1231
1232 while ((gis = read_reg(info, CHA + GIS))) {
1233 if (debug_level >= DEBUG_LEVEL_ISR)
1234 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1235
1236 if ((gis & 0x70) || count > 1000) {
1237 printk("synclink_cs:hardware failed or ejected\n");
1238 break;
1239 }
1240 count++;
1241
1242 if (gis & (BIT1 + BIT0)) {
1243 isr = read_reg16(info, CHB + ISR);
1244 if (isr & IRQ_DCD)
1245 dcd_change(info);
1246 if (isr & IRQ_CTS)
1247 cts_change(info);
1248 }
1249 if (gis & (BIT3 + BIT2))
1250 {
1251 isr = read_reg16(info, CHA + ISR);
1252 if (isr & IRQ_TIMER) {
1253 info->irq_occurred = true;
1254 irq_disable(info, CHA, IRQ_TIMER);
1255 }
1256
1257 /* receive IRQs */
1258 if (isr & IRQ_EXITHUNT) {
1259 info->icount.exithunt++;
1260 wake_up_interruptible(&info->event_wait_q);
1261 }
1262 if (isr & IRQ_BREAK_ON) {
1263 info->icount.brk++;
1264 if (info->flags & ASYNC_SAK)
1265 do_SAK(info->tty);
1266 }
1267 if (isr & IRQ_RXTIME) {
1268 issue_command(info, CHA, CMD_RXFIFO_READ);
1269 }
1270 if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1271 if (info->params.mode == MGSL_MODE_HDLC)
1272 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1273 else
1274 rx_ready_async(info, isr & IRQ_RXEOM);
1275 }
1276
1277 /* transmit IRQs */
1278 if (isr & IRQ_UNDERRUN) {
1279 if (info->tx_aborting)
1280 info->icount.txabort++;
1281 else
1282 info->icount.txunder++;
1283 tx_done(info);
1284 }
1285 else if (isr & IRQ_ALLSENT) {
1286 info->icount.txok++;
1287 tx_done(info);
1288 }
1289 else if (isr & IRQ_TXFIFO)
1290 tx_ready(info);
1291 }
1292 if (gis & BIT7) {
1293 pis = read_reg(info, CHA + PIS);
1294 if (pis & BIT1)
1295 dsr_change(info);
1296 if (pis & BIT2)
1297 ri_change(info);
1298 }
1299 }
1300
1301 /* Request bottom half processing if there's something
1302 * for it to do and the bh is not already running
1303 */
1304
1305 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1306 if ( debug_level >= DEBUG_LEVEL_ISR )
1307 printk("%s(%d):%s queueing bh task.\n",
1308 __FILE__,__LINE__,info->device_name);
1309 schedule_work(&info->task);
1310 info->bh_requested = true;
1311 }
1312
1313 spin_unlock(&info->lock);
1314
1315 if (debug_level >= DEBUG_LEVEL_ISR)
1316 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1317 __FILE__, __LINE__, info->irq_level);
1318
1319 return IRQ_HANDLED;
1320 }
1321
1322 /* Initialize and start device.
1323 */
1324 static int startup(MGSLPC_INFO * info)
1325 {
1326 int retval = 0;
1327
1328 if (debug_level >= DEBUG_LEVEL_INFO)
1329 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1330
1331 if (info->flags & ASYNC_INITIALIZED)
1332 return 0;
1333
1334 if (!info->tx_buf) {
1335 /* allocate a page of memory for a transmit buffer */
1336 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1337 if (!info->tx_buf) {
1338 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1339 __FILE__,__LINE__,info->device_name);
1340 return -ENOMEM;
1341 }
1342 }
1343
1344 info->pending_bh = 0;
1345
1346 memset(&info->icount, 0, sizeof(info->icount));
1347
1348 setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1349
1350 /* Allocate and claim adapter resources */
1351 retval = claim_resources(info);
1352
1353 /* perform existance check and diagnostics */
1354 if ( !retval )
1355 retval = adapter_test(info);
1356
1357 if ( retval ) {
1358 if (capable(CAP_SYS_ADMIN) && info->tty)
1359 set_bit(TTY_IO_ERROR, &info->tty->flags);
1360 release_resources(info);
1361 return retval;
1362 }
1363
1364 /* program hardware for current parameters */
1365 mgslpc_change_params(info);
1366
1367 if (info->tty)
1368 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1369
1370 info->flags |= ASYNC_INITIALIZED;
1371
1372 return 0;
1373 }
1374
1375 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1376 */
1377 static void shutdown(MGSLPC_INFO * info)
1378 {
1379 unsigned long flags;
1380
1381 if (!(info->flags & ASYNC_INITIALIZED))
1382 return;
1383
1384 if (debug_level >= DEBUG_LEVEL_INFO)
1385 printk("%s(%d):mgslpc_shutdown(%s)\n",
1386 __FILE__,__LINE__, info->device_name );
1387
1388 /* clear status wait queue because status changes */
1389 /* can't happen after shutting down the hardware */
1390 wake_up_interruptible(&info->status_event_wait_q);
1391 wake_up_interruptible(&info->event_wait_q);
1392
1393 del_timer_sync(&info->tx_timer);
1394
1395 if (info->tx_buf) {
1396 free_page((unsigned long) info->tx_buf);
1397 info->tx_buf = NULL;
1398 }
1399
1400 spin_lock_irqsave(&info->lock,flags);
1401
1402 rx_stop(info);
1403 tx_stop(info);
1404
1405 /* TODO:disable interrupts instead of reset to preserve signal states */
1406 reset_device(info);
1407
1408 if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1409 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1410 set_signals(info);
1411 }
1412
1413 spin_unlock_irqrestore(&info->lock,flags);
1414
1415 release_resources(info);
1416
1417 if (info->tty)
1418 set_bit(TTY_IO_ERROR, &info->tty->flags);
1419
1420 info->flags &= ~ASYNC_INITIALIZED;
1421 }
1422
1423 static void mgslpc_program_hw(MGSLPC_INFO *info)
1424 {
1425 unsigned long flags;
1426
1427 spin_lock_irqsave(&info->lock,flags);
1428
1429 rx_stop(info);
1430 tx_stop(info);
1431 info->tx_count = info->tx_put = info->tx_get = 0;
1432
1433 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1434 hdlc_mode(info);
1435 else
1436 async_mode(info);
1437
1438 set_signals(info);
1439
1440 info->dcd_chkcount = 0;
1441 info->cts_chkcount = 0;
1442 info->ri_chkcount = 0;
1443 info->dsr_chkcount = 0;
1444
1445 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1446 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1447 get_signals(info);
1448
1449 if (info->netcount || info->tty->termios->c_cflag & CREAD)
1450 rx_start(info);
1451
1452 spin_unlock_irqrestore(&info->lock,flags);
1453 }
1454
1455 /* Reconfigure adapter based on new parameters
1456 */
1457 static void mgslpc_change_params(MGSLPC_INFO *info)
1458 {
1459 unsigned cflag;
1460 int bits_per_char;
1461
1462 if (!info->tty || !info->tty->termios)
1463 return;
1464
1465 if (debug_level >= DEBUG_LEVEL_INFO)
1466 printk("%s(%d):mgslpc_change_params(%s)\n",
1467 __FILE__,__LINE__, info->device_name );
1468
1469 cflag = info->tty->termios->c_cflag;
1470
1471 /* if B0 rate (hangup) specified then negate DTR and RTS */
1472 /* otherwise assert DTR and RTS */
1473 if (cflag & CBAUD)
1474 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1475 else
1476 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1477
1478 /* byte size and parity */
1479
1480 switch (cflag & CSIZE) {
1481 case CS5: info->params.data_bits = 5; break;
1482 case CS6: info->params.data_bits = 6; break;
1483 case CS7: info->params.data_bits = 7; break;
1484 case CS8: info->params.data_bits = 8; break;
1485 default: info->params.data_bits = 7; break;
1486 }
1487
1488 if (cflag & CSTOPB)
1489 info->params.stop_bits = 2;
1490 else
1491 info->params.stop_bits = 1;
1492
1493 info->params.parity = ASYNC_PARITY_NONE;
1494 if (cflag & PARENB) {
1495 if (cflag & PARODD)
1496 info->params.parity = ASYNC_PARITY_ODD;
1497 else
1498 info->params.parity = ASYNC_PARITY_EVEN;
1499 #ifdef CMSPAR
1500 if (cflag & CMSPAR)
1501 info->params.parity = ASYNC_PARITY_SPACE;
1502 #endif
1503 }
1504
1505 /* calculate number of jiffies to transmit a full
1506 * FIFO (32 bytes) at specified data rate
1507 */
1508 bits_per_char = info->params.data_bits +
1509 info->params.stop_bits + 1;
1510
1511 /* if port data rate is set to 460800 or less then
1512 * allow tty settings to override, otherwise keep the
1513 * current data rate.
1514 */
1515 if (info->params.data_rate <= 460800) {
1516 info->params.data_rate = tty_get_baud_rate(info->tty);
1517 }
1518
1519 if ( info->params.data_rate ) {
1520 info->timeout = (32*HZ*bits_per_char) /
1521 info->params.data_rate;
1522 }
1523 info->timeout += HZ/50; /* Add .02 seconds of slop */
1524
1525 if (cflag & CRTSCTS)
1526 info->flags |= ASYNC_CTS_FLOW;
1527 else
1528 info->flags &= ~ASYNC_CTS_FLOW;
1529
1530 if (cflag & CLOCAL)
1531 info->flags &= ~ASYNC_CHECK_CD;
1532 else
1533 info->flags |= ASYNC_CHECK_CD;
1534
1535 /* process tty input control flags */
1536
1537 info->read_status_mask = 0;
1538 if (I_INPCK(info->tty))
1539 info->read_status_mask |= BIT7 | BIT6;
1540 if (I_IGNPAR(info->tty))
1541 info->ignore_status_mask |= BIT7 | BIT6;
1542
1543 mgslpc_program_hw(info);
1544 }
1545
1546 /* Add a character to the transmit buffer
1547 */
1548 static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1549 {
1550 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1551 unsigned long flags;
1552
1553 if (debug_level >= DEBUG_LEVEL_INFO) {
1554 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1555 __FILE__,__LINE__,ch,info->device_name);
1556 }
1557
1558 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1559 return;
1560
1561 if (!info->tx_buf)
1562 return;
1563
1564 spin_lock_irqsave(&info->lock,flags);
1565
1566 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1567 if (info->tx_count < TXBUFSIZE - 1) {
1568 info->tx_buf[info->tx_put++] = ch;
1569 info->tx_put &= TXBUFSIZE-1;
1570 info->tx_count++;
1571 }
1572 }
1573
1574 spin_unlock_irqrestore(&info->lock,flags);
1575 }
1576
1577 /* Enable transmitter so remaining characters in the
1578 * transmit buffer are sent.
1579 */
1580 static void mgslpc_flush_chars(struct tty_struct *tty)
1581 {
1582 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1583 unsigned long flags;
1584
1585 if (debug_level >= DEBUG_LEVEL_INFO)
1586 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1587 __FILE__,__LINE__,info->device_name,info->tx_count);
1588
1589 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1590 return;
1591
1592 if (info->tx_count <= 0 || tty->stopped ||
1593 tty->hw_stopped || !info->tx_buf)
1594 return;
1595
1596 if (debug_level >= DEBUG_LEVEL_INFO)
1597 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1598 __FILE__,__LINE__,info->device_name);
1599
1600 spin_lock_irqsave(&info->lock,flags);
1601 if (!info->tx_active)
1602 tx_start(info);
1603 spin_unlock_irqrestore(&info->lock,flags);
1604 }
1605
1606 /* Send a block of data
1607 *
1608 * Arguments:
1609 *
1610 * tty pointer to tty information structure
1611 * buf pointer to buffer containing send data
1612 * count size of send data in bytes
1613 *
1614 * Returns: number of characters written
1615 */
1616 static int mgslpc_write(struct tty_struct * tty,
1617 const unsigned char *buf, int count)
1618 {
1619 int c, ret = 0;
1620 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1621 unsigned long flags;
1622
1623 if (debug_level >= DEBUG_LEVEL_INFO)
1624 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1625 __FILE__,__LINE__,info->device_name,count);
1626
1627 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1628 !info->tx_buf)
1629 goto cleanup;
1630
1631 if (info->params.mode == MGSL_MODE_HDLC) {
1632 if (count > TXBUFSIZE) {
1633 ret = -EIO;
1634 goto cleanup;
1635 }
1636 if (info->tx_active)
1637 goto cleanup;
1638 else if (info->tx_count)
1639 goto start;
1640 }
1641
1642 for (;;) {
1643 c = min(count,
1644 min(TXBUFSIZE - info->tx_count - 1,
1645 TXBUFSIZE - info->tx_put));
1646 if (c <= 0)
1647 break;
1648
1649 memcpy(info->tx_buf + info->tx_put, buf, c);
1650
1651 spin_lock_irqsave(&info->lock,flags);
1652 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1653 info->tx_count += c;
1654 spin_unlock_irqrestore(&info->lock,flags);
1655
1656 buf += c;
1657 count -= c;
1658 ret += c;
1659 }
1660 start:
1661 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1662 spin_lock_irqsave(&info->lock,flags);
1663 if (!info->tx_active)
1664 tx_start(info);
1665 spin_unlock_irqrestore(&info->lock,flags);
1666 }
1667 cleanup:
1668 if (debug_level >= DEBUG_LEVEL_INFO)
1669 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1670 __FILE__,__LINE__,info->device_name,ret);
1671 return ret;
1672 }
1673
1674 /* Return the count of free bytes in transmit buffer
1675 */
1676 static int mgslpc_write_room(struct tty_struct *tty)
1677 {
1678 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1679 int ret;
1680
1681 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1682 return 0;
1683
1684 if (info->params.mode == MGSL_MODE_HDLC) {
1685 /* HDLC (frame oriented) mode */
1686 if (info->tx_active)
1687 return 0;
1688 else
1689 return HDLC_MAX_FRAME_SIZE;
1690 } else {
1691 ret = TXBUFSIZE - info->tx_count - 1;
1692 if (ret < 0)
1693 ret = 0;
1694 }
1695
1696 if (debug_level >= DEBUG_LEVEL_INFO)
1697 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1698 __FILE__,__LINE__, info->device_name, ret);
1699 return ret;
1700 }
1701
1702 /* Return the count of bytes in transmit buffer
1703 */
1704 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1705 {
1706 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1707 int rc;
1708
1709 if (debug_level >= DEBUG_LEVEL_INFO)
1710 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1711 __FILE__,__LINE__, info->device_name );
1712
1713 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1714 return 0;
1715
1716 if (info->params.mode == MGSL_MODE_HDLC)
1717 rc = info->tx_active ? info->max_frame_size : 0;
1718 else
1719 rc = info->tx_count;
1720
1721 if (debug_level >= DEBUG_LEVEL_INFO)
1722 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1723 __FILE__,__LINE__, info->device_name, rc);
1724
1725 return rc;
1726 }
1727
1728 /* Discard all data in the send buffer
1729 */
1730 static void mgslpc_flush_buffer(struct tty_struct *tty)
1731 {
1732 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1733 unsigned long flags;
1734
1735 if (debug_level >= DEBUG_LEVEL_INFO)
1736 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1737 __FILE__,__LINE__, info->device_name );
1738
1739 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1740 return;
1741
1742 spin_lock_irqsave(&info->lock,flags);
1743 info->tx_count = info->tx_put = info->tx_get = 0;
1744 del_timer(&info->tx_timer);
1745 spin_unlock_irqrestore(&info->lock,flags);
1746
1747 wake_up_interruptible(&tty->write_wait);
1748 tty_wakeup(tty);
1749 }
1750
1751 /* Send a high-priority XON/XOFF character
1752 */
1753 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1754 {
1755 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1756 unsigned long flags;
1757
1758 if (debug_level >= DEBUG_LEVEL_INFO)
1759 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1760 __FILE__,__LINE__, info->device_name, ch );
1761
1762 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1763 return;
1764
1765 info->x_char = ch;
1766 if (ch) {
1767 spin_lock_irqsave(&info->lock,flags);
1768 if (!info->tx_enabled)
1769 tx_start(info);
1770 spin_unlock_irqrestore(&info->lock,flags);
1771 }
1772 }
1773
1774 /* Signal remote device to throttle send data (our receive data)
1775 */
1776 static void mgslpc_throttle(struct tty_struct * tty)
1777 {
1778 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1779 unsigned long flags;
1780
1781 if (debug_level >= DEBUG_LEVEL_INFO)
1782 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1783 __FILE__,__LINE__, info->device_name );
1784
1785 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1786 return;
1787
1788 if (I_IXOFF(tty))
1789 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1790
1791 if (tty->termios->c_cflag & CRTSCTS) {
1792 spin_lock_irqsave(&info->lock,flags);
1793 info->serial_signals &= ~SerialSignal_RTS;
1794 set_signals(info);
1795 spin_unlock_irqrestore(&info->lock,flags);
1796 }
1797 }
1798
1799 /* Signal remote device to stop throttling send data (our receive data)
1800 */
1801 static void mgslpc_unthrottle(struct tty_struct * tty)
1802 {
1803 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1804 unsigned long flags;
1805
1806 if (debug_level >= DEBUG_LEVEL_INFO)
1807 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1808 __FILE__,__LINE__, info->device_name );
1809
1810 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1811 return;
1812
1813 if (I_IXOFF(tty)) {
1814 if (info->x_char)
1815 info->x_char = 0;
1816 else
1817 mgslpc_send_xchar(tty, START_CHAR(tty));
1818 }
1819
1820 if (tty->termios->c_cflag & CRTSCTS) {
1821 spin_lock_irqsave(&info->lock,flags);
1822 info->serial_signals |= SerialSignal_RTS;
1823 set_signals(info);
1824 spin_unlock_irqrestore(&info->lock,flags);
1825 }
1826 }
1827
1828 /* get the current serial statistics
1829 */
1830 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1831 {
1832 int err;
1833 if (debug_level >= DEBUG_LEVEL_INFO)
1834 printk("get_params(%s)\n", info->device_name);
1835 if (!user_icount) {
1836 memset(&info->icount, 0, sizeof(info->icount));
1837 } else {
1838 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1839 if (err)
1840 return -EFAULT;
1841 }
1842 return 0;
1843 }
1844
1845 /* get the current serial parameters
1846 */
1847 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1848 {
1849 int err;
1850 if (debug_level >= DEBUG_LEVEL_INFO)
1851 printk("get_params(%s)\n", info->device_name);
1852 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1853 if (err)
1854 return -EFAULT;
1855 return 0;
1856 }
1857
1858 /* set the serial parameters
1859 *
1860 * Arguments:
1861 *
1862 * info pointer to device instance data
1863 * new_params user buffer containing new serial params
1864 *
1865 * Returns: 0 if success, otherwise error code
1866 */
1867 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1868 {
1869 unsigned long flags;
1870 MGSL_PARAMS tmp_params;
1871 int err;
1872
1873 if (debug_level >= DEBUG_LEVEL_INFO)
1874 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1875 info->device_name );
1876 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1877 if (err) {
1878 if ( debug_level >= DEBUG_LEVEL_INFO )
1879 printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1880 __FILE__,__LINE__,info->device_name);
1881 return -EFAULT;
1882 }
1883
1884 spin_lock_irqsave(&info->lock,flags);
1885 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1886 spin_unlock_irqrestore(&info->lock,flags);
1887
1888 mgslpc_change_params(info);
1889
1890 return 0;
1891 }
1892
1893 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1894 {
1895 int err;
1896 if (debug_level >= DEBUG_LEVEL_INFO)
1897 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1898 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1899 if (err)
1900 return -EFAULT;
1901 return 0;
1902 }
1903
1904 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1905 {
1906 unsigned long flags;
1907 if (debug_level >= DEBUG_LEVEL_INFO)
1908 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1909 spin_lock_irqsave(&info->lock,flags);
1910 info->idle_mode = idle_mode;
1911 tx_set_idle(info);
1912 spin_unlock_irqrestore(&info->lock,flags);
1913 return 0;
1914 }
1915
1916 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1917 {
1918 int err;
1919 if (debug_level >= DEBUG_LEVEL_INFO)
1920 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1921 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1922 if (err)
1923 return -EFAULT;
1924 return 0;
1925 }
1926
1927 static int set_interface(MGSLPC_INFO * info, int if_mode)
1928 {
1929 unsigned long flags;
1930 unsigned char val;
1931 if (debug_level >= DEBUG_LEVEL_INFO)
1932 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1933 spin_lock_irqsave(&info->lock,flags);
1934 info->if_mode = if_mode;
1935
1936 val = read_reg(info, PVR) & 0x0f;
1937 switch (info->if_mode)
1938 {
1939 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1940 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
1941 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1942 }
1943 write_reg(info, PVR, val);
1944
1945 spin_unlock_irqrestore(&info->lock,flags);
1946 return 0;
1947 }
1948
1949 static int set_txenable(MGSLPC_INFO * info, int enable)
1950 {
1951 unsigned long flags;
1952
1953 if (debug_level >= DEBUG_LEVEL_INFO)
1954 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1955
1956 spin_lock_irqsave(&info->lock,flags);
1957 if (enable) {
1958 if (!info->tx_enabled)
1959 tx_start(info);
1960 } else {
1961 if (info->tx_enabled)
1962 tx_stop(info);
1963 }
1964 spin_unlock_irqrestore(&info->lock,flags);
1965 return 0;
1966 }
1967
1968 static int tx_abort(MGSLPC_INFO * info)
1969 {
1970 unsigned long flags;
1971
1972 if (debug_level >= DEBUG_LEVEL_INFO)
1973 printk("tx_abort(%s)\n", info->device_name);
1974
1975 spin_lock_irqsave(&info->lock,flags);
1976 if (info->tx_active && info->tx_count &&
1977 info->params.mode == MGSL_MODE_HDLC) {
1978 /* clear data count so FIFO is not filled on next IRQ.
1979 * This results in underrun and abort transmission.
1980 */
1981 info->tx_count = info->tx_put = info->tx_get = 0;
1982 info->tx_aborting = true;
1983 }
1984 spin_unlock_irqrestore(&info->lock,flags);
1985 return 0;
1986 }
1987
1988 static int set_rxenable(MGSLPC_INFO * info, int enable)
1989 {
1990 unsigned long flags;
1991
1992 if (debug_level >= DEBUG_LEVEL_INFO)
1993 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1994
1995 spin_lock_irqsave(&info->lock,flags);
1996 if (enable) {
1997 if (!info->rx_enabled)
1998 rx_start(info);
1999 } else {
2000 if (info->rx_enabled)
2001 rx_stop(info);
2002 }
2003 spin_unlock_irqrestore(&info->lock,flags);
2004 return 0;
2005 }
2006
2007 /* wait for specified event to occur
2008 *
2009 * Arguments: info pointer to device instance data
2010 * mask pointer to bitmask of events to wait for
2011 * Return Value: 0 if successful and bit mask updated with
2012 * of events triggerred,
2013 * otherwise error code
2014 */
2015 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2016 {
2017 unsigned long flags;
2018 int s;
2019 int rc=0;
2020 struct mgsl_icount cprev, cnow;
2021 int events;
2022 int mask;
2023 struct _input_signal_events oldsigs, newsigs;
2024 DECLARE_WAITQUEUE(wait, current);
2025
2026 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2027 if (rc)
2028 return -EFAULT;
2029
2030 if (debug_level >= DEBUG_LEVEL_INFO)
2031 printk("wait_events(%s,%d)\n", info->device_name, mask);
2032
2033 spin_lock_irqsave(&info->lock,flags);
2034
2035 /* return immediately if state matches requested events */
2036 get_signals(info);
2037 s = info->serial_signals;
2038 events = mask &
2039 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2040 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2041 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2042 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2043 if (events) {
2044 spin_unlock_irqrestore(&info->lock,flags);
2045 goto exit;
2046 }
2047
2048 /* save current irq counts */
2049 cprev = info->icount;
2050 oldsigs = info->input_signal_events;
2051
2052 if ((info->params.mode == MGSL_MODE_HDLC) &&
2053 (mask & MgslEvent_ExitHuntMode))
2054 irq_enable(info, CHA, IRQ_EXITHUNT);
2055
2056 set_current_state(TASK_INTERRUPTIBLE);
2057 add_wait_queue(&info->event_wait_q, &wait);
2058
2059 spin_unlock_irqrestore(&info->lock,flags);
2060
2061
2062 for(;;) {
2063 schedule();
2064 if (signal_pending(current)) {
2065 rc = -ERESTARTSYS;
2066 break;
2067 }
2068
2069 /* get current irq counts */
2070 spin_lock_irqsave(&info->lock,flags);
2071 cnow = info->icount;
2072 newsigs = info->input_signal_events;
2073 set_current_state(TASK_INTERRUPTIBLE);
2074 spin_unlock_irqrestore(&info->lock,flags);
2075
2076 /* if no change, wait aborted for some reason */
2077 if (newsigs.dsr_up == oldsigs.dsr_up &&
2078 newsigs.dsr_down == oldsigs.dsr_down &&
2079 newsigs.dcd_up == oldsigs.dcd_up &&
2080 newsigs.dcd_down == oldsigs.dcd_down &&
2081 newsigs.cts_up == oldsigs.cts_up &&
2082 newsigs.cts_down == oldsigs.cts_down &&
2083 newsigs.ri_up == oldsigs.ri_up &&
2084 newsigs.ri_down == oldsigs.ri_down &&
2085 cnow.exithunt == cprev.exithunt &&
2086 cnow.rxidle == cprev.rxidle) {
2087 rc = -EIO;
2088 break;
2089 }
2090
2091 events = mask &
2092 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2093 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2094 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2095 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2096 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2097 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2098 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2099 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2100 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2101 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2102 if (events)
2103 break;
2104
2105 cprev = cnow;
2106 oldsigs = newsigs;
2107 }
2108
2109 remove_wait_queue(&info->event_wait_q, &wait);
2110 set_current_state(TASK_RUNNING);
2111
2112 if (mask & MgslEvent_ExitHuntMode) {
2113 spin_lock_irqsave(&info->lock,flags);
2114 if (!waitqueue_active(&info->event_wait_q))
2115 irq_disable(info, CHA, IRQ_EXITHUNT);
2116 spin_unlock_irqrestore(&info->lock,flags);
2117 }
2118 exit:
2119 if (rc == 0)
2120 PUT_USER(rc, events, mask_ptr);
2121 return rc;
2122 }
2123
2124 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2125 {
2126 unsigned long flags;
2127 int rc;
2128 struct mgsl_icount cprev, cnow;
2129 DECLARE_WAITQUEUE(wait, current);
2130
2131 /* save current irq counts */
2132 spin_lock_irqsave(&info->lock,flags);
2133 cprev = info->icount;
2134 add_wait_queue(&info->status_event_wait_q, &wait);
2135 set_current_state(TASK_INTERRUPTIBLE);
2136 spin_unlock_irqrestore(&info->lock,flags);
2137
2138 for(;;) {
2139 schedule();
2140 if (signal_pending(current)) {
2141 rc = -ERESTARTSYS;
2142 break;
2143 }
2144
2145 /* get new irq counts */
2146 spin_lock_irqsave(&info->lock,flags);
2147 cnow = info->icount;
2148 set_current_state(TASK_INTERRUPTIBLE);
2149 spin_unlock_irqrestore(&info->lock,flags);
2150
2151 /* if no change, wait aborted for some reason */
2152 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2153 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2154 rc = -EIO;
2155 break;
2156 }
2157
2158 /* check for change in caller specified modem input */
2159 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2160 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2161 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2162 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2163 rc = 0;
2164 break;
2165 }
2166
2167 cprev = cnow;
2168 }
2169 remove_wait_queue(&info->status_event_wait_q, &wait);
2170 set_current_state(TASK_RUNNING);
2171 return rc;
2172 }
2173
2174 /* return the state of the serial control and status signals
2175 */
2176 static int tiocmget(struct tty_struct *tty, struct file *file)
2177 {
2178 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2179 unsigned int result;
2180 unsigned long flags;
2181
2182 spin_lock_irqsave(&info->lock,flags);
2183 get_signals(info);
2184 spin_unlock_irqrestore(&info->lock,flags);
2185
2186 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2187 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2188 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2189 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2190 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2191 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2192
2193 if (debug_level >= DEBUG_LEVEL_INFO)
2194 printk("%s(%d):%s tiocmget() value=%08X\n",
2195 __FILE__,__LINE__, info->device_name, result );
2196 return result;
2197 }
2198
2199 /* set modem control signals (DTR/RTS)
2200 */
2201 static int tiocmset(struct tty_struct *tty, struct file *file,
2202 unsigned int set, unsigned int clear)
2203 {
2204 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2205 unsigned long flags;
2206
2207 if (debug_level >= DEBUG_LEVEL_INFO)
2208 printk("%s(%d):%s tiocmset(%x,%x)\n",
2209 __FILE__,__LINE__,info->device_name, set, clear);
2210
2211 if (set & TIOCM_RTS)
2212 info->serial_signals |= SerialSignal_RTS;
2213 if (set & TIOCM_DTR)
2214 info->serial_signals |= SerialSignal_DTR;
2215 if (clear & TIOCM_RTS)
2216 info->serial_signals &= ~SerialSignal_RTS;
2217 if (clear & TIOCM_DTR)
2218 info->serial_signals &= ~SerialSignal_DTR;
2219
2220 spin_lock_irqsave(&info->lock,flags);
2221 set_signals(info);
2222 spin_unlock_irqrestore(&info->lock,flags);
2223
2224 return 0;
2225 }
2226
2227 /* Set or clear transmit break condition
2228 *
2229 * Arguments: tty pointer to tty instance data
2230 * break_state -1=set break condition, 0=clear
2231 */
2232 static void mgslpc_break(struct tty_struct *tty, int break_state)
2233 {
2234 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2235 unsigned long flags;
2236
2237 if (debug_level >= DEBUG_LEVEL_INFO)
2238 printk("%s(%d):mgslpc_break(%s,%d)\n",
2239 __FILE__,__LINE__, info->device_name, break_state);
2240
2241 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2242 return;
2243
2244 spin_lock_irqsave(&info->lock,flags);
2245 if (break_state == -1)
2246 set_reg_bits(info, CHA+DAFO, BIT6);
2247 else
2248 clear_reg_bits(info, CHA+DAFO, BIT6);
2249 spin_unlock_irqrestore(&info->lock,flags);
2250 }
2251
2252 /* Service an IOCTL request
2253 *
2254 * Arguments:
2255 *
2256 * tty pointer to tty instance data
2257 * file pointer to associated file object for device
2258 * cmd IOCTL command code
2259 * arg command argument/context
2260 *
2261 * Return Value: 0 if success, otherwise error code
2262 */
2263 static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2264 unsigned int cmd, unsigned long arg)
2265 {
2266 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2267
2268 if (debug_level >= DEBUG_LEVEL_INFO)
2269 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2270 info->device_name, cmd );
2271
2272 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2273 return -ENODEV;
2274
2275 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2276 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2277 if (tty->flags & (1 << TTY_IO_ERROR))
2278 return -EIO;
2279 }
2280
2281 return ioctl_common(info, cmd, arg);
2282 }
2283
2284 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
2285 {
2286 int error;
2287 struct mgsl_icount cnow; /* kernel counter temps */
2288 struct serial_icounter_struct __user *p_cuser; /* user space */
2289 void __user *argp = (void __user *)arg;
2290 unsigned long flags;
2291
2292 switch (cmd) {
2293 case MGSL_IOCGPARAMS:
2294 return get_params(info, argp);
2295 case MGSL_IOCSPARAMS:
2296 return set_params(info, argp);
2297 case MGSL_IOCGTXIDLE:
2298 return get_txidle(info, argp);
2299 case MGSL_IOCSTXIDLE:
2300 return set_txidle(info, (int)arg);
2301 case MGSL_IOCGIF:
2302 return get_interface(info, argp);
2303 case MGSL_IOCSIF:
2304 return set_interface(info,(int)arg);
2305 case MGSL_IOCTXENABLE:
2306 return set_txenable(info,(int)arg);
2307 case MGSL_IOCRXENABLE:
2308 return set_rxenable(info,(int)arg);
2309 case MGSL_IOCTXABORT:
2310 return tx_abort(info);
2311 case MGSL_IOCGSTATS:
2312 return get_stats(info, argp);
2313 case MGSL_IOCWAITEVENT:
2314 return wait_events(info, argp);
2315 case TIOCMIWAIT:
2316 return modem_input_wait(info,(int)arg);
2317 case TIOCGICOUNT:
2318 spin_lock_irqsave(&info->lock,flags);
2319 cnow = info->icount;
2320 spin_unlock_irqrestore(&info->lock,flags);
2321 p_cuser = argp;
2322 PUT_USER(error,cnow.cts, &p_cuser->cts);
2323 if (error) return error;
2324 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2325 if (error) return error;
2326 PUT_USER(error,cnow.rng, &p_cuser->rng);
2327 if (error) return error;
2328 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2329 if (error) return error;
2330 PUT_USER(error,cnow.rx, &p_cuser->rx);
2331 if (error) return error;
2332 PUT_USER(error,cnow.tx, &p_cuser->tx);
2333 if (error) return error;
2334 PUT_USER(error,cnow.frame, &p_cuser->frame);
2335 if (error) return error;
2336 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2337 if (error) return error;
2338 PUT_USER(error,cnow.parity, &p_cuser->parity);
2339 if (error) return error;
2340 PUT_USER(error,cnow.brk, &p_cuser->brk);
2341 if (error) return error;
2342 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2343 if (error) return error;
2344 return 0;
2345 default:
2346 return -ENOIOCTLCMD;
2347 }
2348 return 0;
2349 }
2350
2351 /* Set new termios settings
2352 *
2353 * Arguments:
2354 *
2355 * tty pointer to tty structure
2356 * termios pointer to buffer to hold returned old termios
2357 */
2358 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2359 {
2360 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2361 unsigned long flags;
2362
2363 if (debug_level >= DEBUG_LEVEL_INFO)
2364 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2365 tty->driver->name );
2366
2367 /* just return if nothing has changed */
2368 if ((tty->termios->c_cflag == old_termios->c_cflag)
2369 && (RELEVANT_IFLAG(tty->termios->c_iflag)
2370 == RELEVANT_IFLAG(old_termios->c_iflag)))
2371 return;
2372
2373 mgslpc_change_params(info);
2374
2375 /* Handle transition to B0 status */
2376 if (old_termios->c_cflag & CBAUD &&
2377 !(tty->termios->c_cflag & CBAUD)) {
2378 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2379 spin_lock_irqsave(&info->lock,flags);
2380 set_signals(info);
2381 spin_unlock_irqrestore(&info->lock,flags);
2382 }
2383
2384 /* Handle transition away from B0 status */
2385 if (!(old_termios->c_cflag & CBAUD) &&
2386 tty->termios->c_cflag & CBAUD) {
2387 info->serial_signals |= SerialSignal_DTR;
2388 if (!(tty->termios->c_cflag & CRTSCTS) ||
2389 !test_bit(TTY_THROTTLED, &tty->flags)) {
2390 info->serial_signals |= SerialSignal_RTS;
2391 }
2392 spin_lock_irqsave(&info->lock,flags);
2393 set_signals(info);
2394 spin_unlock_irqrestore(&info->lock,flags);
2395 }
2396
2397 /* Handle turning off CRTSCTS */
2398 if (old_termios->c_cflag & CRTSCTS &&
2399 !(tty->termios->c_cflag & CRTSCTS)) {
2400 tty->hw_stopped = 0;
2401 tx_release(tty);
2402 }
2403 }
2404
2405 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2406 {
2407 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2408
2409 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2410 return;
2411
2412 if (debug_level >= DEBUG_LEVEL_INFO)
2413 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2414 __FILE__,__LINE__, info->device_name, info->count);
2415
2416 if (!info->count)
2417 return;
2418
2419 if (tty_hung_up_p(filp))
2420 goto cleanup;
2421
2422 if ((tty->count == 1) && (info->count != 1)) {
2423 /*
2424 * tty->count is 1 and the tty structure will be freed.
2425 * info->count should be one in this case.
2426 * if it's not, correct it so that the port is shutdown.
2427 */
2428 printk("mgslpc_close: bad refcount; tty->count is 1, "
2429 "info->count is %d\n", info->count);
2430 info->count = 1;
2431 }
2432
2433 info->count--;
2434
2435 /* if at least one open remaining, leave hardware active */
2436 if (info->count)
2437 goto cleanup;
2438
2439 info->flags |= ASYNC_CLOSING;
2440
2441 /* set tty->closing to notify line discipline to
2442 * only process XON/XOFF characters. Only the N_TTY
2443 * discipline appears to use this (ppp does not).
2444 */
2445 tty->closing = 1;
2446
2447 /* wait for transmit data to clear all layers */
2448
2449 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2450 if (debug_level >= DEBUG_LEVEL_INFO)
2451 printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2452 __FILE__,__LINE__, info->device_name );
2453 tty_wait_until_sent(tty, info->closing_wait);
2454 }
2455
2456 if (info->flags & ASYNC_INITIALIZED)
2457 mgslpc_wait_until_sent(tty, info->timeout);
2458
2459 mgslpc_flush_buffer(tty);
2460
2461 tty_ldisc_flush(tty);
2462
2463 shutdown(info);
2464
2465 tty->closing = 0;
2466 info->tty = NULL;
2467
2468 if (info->blocked_open) {
2469 if (info->close_delay) {
2470 msleep_interruptible(jiffies_to_msecs(info->close_delay));
2471 }
2472 wake_up_interruptible(&info->open_wait);
2473 }
2474
2475 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
2476
2477 wake_up_interruptible(&info->close_wait);
2478
2479 cleanup:
2480 if (debug_level >= DEBUG_LEVEL_INFO)
2481 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2482 tty->driver->name, info->count);
2483 }
2484
2485 /* Wait until the transmitter is empty.
2486 */
2487 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2488 {
2489 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2490 unsigned long orig_jiffies, char_time;
2491
2492 if (!info )
2493 return;
2494
2495 if (debug_level >= DEBUG_LEVEL_INFO)
2496 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2497 __FILE__,__LINE__, info->device_name );
2498
2499 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2500 return;
2501
2502 if (!(info->flags & ASYNC_INITIALIZED))
2503 goto exit;
2504
2505 orig_jiffies = jiffies;
2506
2507 /* Set check interval to 1/5 of estimated time to
2508 * send a character, and make it at least 1. The check
2509 * interval should also be less than the timeout.
2510 * Note: use tight timings here to satisfy the NIST-PCTS.
2511 */
2512
2513 if ( info->params.data_rate ) {
2514 char_time = info->timeout/(32 * 5);
2515 if (!char_time)
2516 char_time++;
2517 } else
2518 char_time = 1;
2519
2520 if (timeout)
2521 char_time = min_t(unsigned long, char_time, timeout);
2522
2523 if (info->params.mode == MGSL_MODE_HDLC) {
2524 while (info->tx_active) {
2525 msleep_interruptible(jiffies_to_msecs(char_time));
2526 if (signal_pending(current))
2527 break;
2528 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2529 break;
2530 }
2531 } else {
2532 while ((info->tx_count || info->tx_active) &&
2533 info->tx_enabled) {
2534 msleep_interruptible(jiffies_to_msecs(char_time));
2535 if (signal_pending(current))
2536 break;
2537 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2538 break;
2539 }
2540 }
2541
2542 exit:
2543 if (debug_level >= DEBUG_LEVEL_INFO)
2544 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2545 __FILE__,__LINE__, info->device_name );
2546 }
2547
2548 /* Called by tty_hangup() when a hangup is signaled.
2549 * This is the same as closing all open files for the port.
2550 */
2551 static void mgslpc_hangup(struct tty_struct *tty)
2552 {
2553 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2554
2555 if (debug_level >= DEBUG_LEVEL_INFO)
2556 printk("%s(%d):mgslpc_hangup(%s)\n",
2557 __FILE__,__LINE__, info->device_name );
2558
2559 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2560 return;
2561
2562 mgslpc_flush_buffer(tty);
2563 shutdown(info);
2564
2565 info->count = 0;
2566 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2567 info->tty = NULL;
2568
2569 wake_up_interruptible(&info->open_wait);
2570 }
2571
2572 /* Block the current process until the specified port
2573 * is ready to be opened.
2574 */
2575 static int block_til_ready(struct tty_struct *tty, struct file *filp,
2576 MGSLPC_INFO *info)
2577 {
2578 DECLARE_WAITQUEUE(wait, current);
2579 int retval;
2580 bool do_clocal = false;
2581 bool extra_count = false;
2582 unsigned long flags;
2583
2584 if (debug_level >= DEBUG_LEVEL_INFO)
2585 printk("%s(%d):block_til_ready on %s\n",
2586 __FILE__,__LINE__, tty->driver->name );
2587
2588 if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2589 /* nonblock mode is set or port is not enabled */
2590 /* just verify that callout device is not active */
2591 info->flags |= ASYNC_NORMAL_ACTIVE;
2592 return 0;
2593 }
2594
2595 if (tty->termios->c_cflag & CLOCAL)
2596 do_clocal = true;
2597
2598 /* Wait for carrier detect and the line to become
2599 * free (i.e., not in use by the callout). While we are in
2600 * this loop, info->count is dropped by one, so that
2601 * mgslpc_close() knows when to free things. We restore it upon
2602 * exit, either normal or abnormal.
2603 */
2604
2605 retval = 0;
2606 add_wait_queue(&info->open_wait, &wait);
2607
2608 if (debug_level >= DEBUG_LEVEL_INFO)
2609 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2610 __FILE__,__LINE__, tty->driver->name, info->count );
2611
2612 spin_lock_irqsave(&info->lock, flags);
2613 if (!tty_hung_up_p(filp)) {
2614 extra_count = true;
2615 info->count--;
2616 }
2617 spin_unlock_irqrestore(&info->lock, flags);
2618 info->blocked_open++;
2619
2620 while (1) {
2621 if ((tty->termios->c_cflag & CBAUD)) {
2622 spin_lock_irqsave(&info->lock,flags);
2623 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2624 set_signals(info);
2625 spin_unlock_irqrestore(&info->lock,flags);
2626 }
2627
2628 set_current_state(TASK_INTERRUPTIBLE);
2629
2630 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2631 retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2632 -EAGAIN : -ERESTARTSYS;
2633 break;
2634 }
2635
2636 spin_lock_irqsave(&info->lock,flags);
2637 get_signals(info);
2638 spin_unlock_irqrestore(&info->lock,flags);
2639
2640 if (!(info->flags & ASYNC_CLOSING) &&
2641 (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2642 break;
2643 }
2644
2645 if (signal_pending(current)) {
2646 retval = -ERESTARTSYS;
2647 break;
2648 }
2649
2650 if (debug_level >= DEBUG_LEVEL_INFO)
2651 printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2652 __FILE__,__LINE__, tty->driver->name, info->count );
2653
2654 schedule();
2655 }
2656
2657 set_current_state(TASK_RUNNING);
2658 remove_wait_queue(&info->open_wait, &wait);
2659
2660 if (extra_count)
2661 info->count++;
2662 info->blocked_open--;
2663
2664 if (debug_level >= DEBUG_LEVEL_INFO)
2665 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2666 __FILE__,__LINE__, tty->driver->name, info->count );
2667
2668 if (!retval)
2669 info->flags |= ASYNC_NORMAL_ACTIVE;
2670
2671 return retval;
2672 }
2673
2674 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2675 {
2676 MGSLPC_INFO *info;
2677 int retval, line;
2678 unsigned long flags;
2679
2680 /* verify range of specified line number */
2681 line = tty->index;
2682 if ((line < 0) || (line >= mgslpc_device_count)) {
2683 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2684 __FILE__,__LINE__,line);
2685 return -ENODEV;
2686 }
2687
2688 /* find the info structure for the specified line */
2689 info = mgslpc_device_list;
2690 while(info && info->line != line)
2691 info = info->next_device;
2692 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2693 return -ENODEV;
2694
2695 tty->driver_data = info;
2696 info->tty = tty;
2697
2698 if (debug_level >= DEBUG_LEVEL_INFO)
2699 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2700 __FILE__,__LINE__,tty->driver->name, info->count);
2701
2702 /* If port is closing, signal caller to try again */
2703 if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2704 if (info->flags & ASYNC_CLOSING)
2705 interruptible_sleep_on(&info->close_wait);
2706 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2707 -EAGAIN : -ERESTARTSYS);
2708 goto cleanup;
2709 }
2710
2711 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2712
2713 spin_lock_irqsave(&info->netlock, flags);
2714 if (info->netcount) {
2715 retval = -EBUSY;
2716 spin_unlock_irqrestore(&info->netlock, flags);
2717 goto cleanup;
2718 }
2719 info->count++;
2720 spin_unlock_irqrestore(&info->netlock, flags);
2721
2722 if (info->count == 1) {
2723 /* 1st open on this device, init hardware */
2724 retval = startup(info);
2725 if (retval < 0)
2726 goto cleanup;
2727 }
2728
2729 retval = block_til_ready(tty, filp, info);
2730 if (retval) {
2731 if (debug_level >= DEBUG_LEVEL_INFO)
2732 printk("%s(%d):block_til_ready(%s) returned %d\n",
2733 __FILE__,__LINE__, info->device_name, retval);
2734 goto cleanup;
2735 }
2736
2737 if (debug_level >= DEBUG_LEVEL_INFO)
2738 printk("%s(%d):mgslpc_open(%s) success\n",
2739 __FILE__,__LINE__, info->device_name);
2740 retval = 0;
2741
2742 cleanup:
2743 if (retval) {
2744 if (tty->count == 1)
2745 info->tty = NULL; /* tty layer will release tty struct */
2746 if(info->count)
2747 info->count--;
2748 }
2749
2750 return retval;
2751 }
2752
2753 /*
2754 * /proc fs routines....
2755 */
2756
2757 static inline int line_info(char *buf, MGSLPC_INFO *info)
2758 {
2759 char stat_buf[30];
2760 int ret;
2761 unsigned long flags;
2762
2763 ret = sprintf(buf, "%s:io:%04X irq:%d",
2764 info->device_name, info->io_base, info->irq_level);
2765
2766 /* output current serial signal states */
2767 spin_lock_irqsave(&info->lock,flags);
2768 get_signals(info);
2769 spin_unlock_irqrestore(&info->lock,flags);
2770
2771 stat_buf[0] = 0;
2772 stat_buf[1] = 0;
2773 if (info->serial_signals & SerialSignal_RTS)
2774 strcat(stat_buf, "|RTS");
2775 if (info->serial_signals & SerialSignal_CTS)
2776 strcat(stat_buf, "|CTS");
2777 if (info->serial_signals & SerialSignal_DTR)
2778 strcat(stat_buf, "|DTR");
2779 if (info->serial_signals & SerialSignal_DSR)
2780 strcat(stat_buf, "|DSR");
2781 if (info->serial_signals & SerialSignal_DCD)
2782 strcat(stat_buf, "|CD");
2783 if (info->serial_signals & SerialSignal_RI)
2784 strcat(stat_buf, "|RI");
2785
2786 if (info->params.mode == MGSL_MODE_HDLC) {
2787 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2788 info->icount.txok, info->icount.rxok);
2789 if (info->icount.txunder)
2790 ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2791 if (info->icount.txabort)
2792 ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2793 if (info->icount.rxshort)
2794 ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
2795 if (info->icount.rxlong)
2796 ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2797 if (info->icount.rxover)
2798 ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2799 if (info->icount.rxcrc)
2800 ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2801 } else {
2802 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2803 info->icount.tx, info->icount.rx);
2804 if (info->icount.frame)
2805 ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2806 if (info->icount.parity)
2807 ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2808 if (info->icount.brk)
2809 ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
2810 if (info->icount.overrun)
2811 ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2812 }
2813
2814 /* Append serial signal status to end */
2815 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2816
2817 ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2818 info->tx_active,info->bh_requested,info->bh_running,
2819 info->pending_bh);
2820
2821 return ret;
2822 }
2823
2824 /* Called to print information about devices
2825 */
2826 static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2827 int *eof, void *data)
2828 {
2829 int len = 0, l;
2830 off_t begin = 0;
2831 MGSLPC_INFO *info;
2832
2833 len += sprintf(page, "synclink driver:%s\n", driver_version);
2834
2835 info = mgslpc_device_list;
2836 while( info ) {
2837 l = line_info(page + len, info);
2838 len += l;
2839 if (len+begin > off+count)
2840 goto done;
2841 if (len+begin < off) {
2842 begin += len;
2843 len = 0;
2844 }
2845 info = info->next_device;
2846 }
2847
2848 *eof = 1;
2849 done:
2850 if (off >= len+begin)
2851 return 0;
2852 *start = page + (off-begin);
2853 return ((count < begin+len-off) ? count : begin+len-off);
2854 }
2855
2856 static int rx_alloc_buffers(MGSLPC_INFO *info)
2857 {
2858 /* each buffer has header and data */
2859 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2860
2861 /* calculate total allocation size for 8 buffers */
2862 info->rx_buf_total_size = info->rx_buf_size * 8;
2863
2864 /* limit total allocated memory */
2865 if (info->rx_buf_total_size > 0x10000)
2866 info->rx_buf_total_size = 0x10000;
2867
2868 /* calculate number of buffers */
2869 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2870
2871 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2872 if (info->rx_buf == NULL)
2873 return -ENOMEM;
2874
2875 rx_reset_buffers(info);
2876 return 0;
2877 }
2878
2879 static void rx_free_buffers(MGSLPC_INFO *info)
2880 {
2881 kfree(info->rx_buf);
2882 info->rx_buf = NULL;
2883 }
2884
2885 static int claim_resources(MGSLPC_INFO *info)
2886 {
2887 if (rx_alloc_buffers(info) < 0 ) {
2888 printk( "Cant allocate rx buffer %s\n", info->device_name);
2889 release_resources(info);
2890 return -ENODEV;
2891 }
2892 return 0;
2893 }
2894
2895 static void release_resources(MGSLPC_INFO *info)
2896 {
2897 if (debug_level >= DEBUG_LEVEL_INFO)
2898 printk("release_resources(%s)\n", info->device_name);
2899 rx_free_buffers(info);
2900 }
2901
2902 /* Add the specified device instance data structure to the
2903 * global linked list of devices and increment the device count.
2904 *
2905 * Arguments: info pointer to device instance data
2906 */
2907 static void mgslpc_add_device(MGSLPC_INFO *info)
2908 {
2909 info->next_device = NULL;
2910 info->line = mgslpc_device_count;
2911 sprintf(info->device_name,"ttySLP%d",info->line);
2912
2913 if (info->line < MAX_DEVICE_COUNT) {
2914 if (maxframe[info->line])
2915 info->max_frame_size = maxframe[info->line];
2916 info->dosyncppp = dosyncppp[info->line];
2917 }
2918
2919 mgslpc_device_count++;
2920
2921 if (!mgslpc_device_list)
2922 mgslpc_device_list = info;
2923 else {
2924 MGSLPC_INFO *current_dev = mgslpc_device_list;
2925 while( current_dev->next_device )
2926 current_dev = current_dev->next_device;
2927 current_dev->next_device = info;
2928 }
2929
2930 if (info->max_frame_size < 4096)
2931 info->max_frame_size = 4096;
2932 else if (info->max_frame_size > 65535)
2933 info->max_frame_size = 65535;
2934
2935 printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2936 info->device_name, info->io_base, info->irq_level);
2937
2938 #if SYNCLINK_GENERIC_HDLC
2939 hdlcdev_init(info);
2940 #endif
2941 }
2942
2943 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2944 {
2945 MGSLPC_INFO *info = mgslpc_device_list;
2946 MGSLPC_INFO *last = NULL;
2947
2948 while(info) {
2949 if (info == remove_info) {
2950 if (last)
2951 last->next_device = info->next_device;
2952 else
2953 mgslpc_device_list = info->next_device;
2954 #if SYNCLINK_GENERIC_HDLC
2955 hdlcdev_exit(info);
2956 #endif
2957 release_resources(info);
2958 kfree(info);
2959 mgslpc_device_count--;
2960 return;
2961 }
2962 last = info;
2963 info = info->next_device;
2964 }
2965 }
2966
2967 static struct pcmcia_device_id mgslpc_ids[] = {
2968 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2969 PCMCIA_DEVICE_NULL
2970 };
2971 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2972
2973 static struct pcmcia_driver mgslpc_driver = {
2974 .owner = THIS_MODULE,
2975 .drv = {
2976 .name = "synclink_cs",
2977 },
2978 .probe = mgslpc_probe,
2979 .remove = mgslpc_detach,
2980 .id_table = mgslpc_ids,
2981 .suspend = mgslpc_suspend,
2982 .resume = mgslpc_resume,
2983 };
2984
2985 static const struct tty_operations mgslpc_ops = {
2986 .open = mgslpc_open,
2987 .close = mgslpc_close,
2988 .write = mgslpc_write,
2989 .put_char = mgslpc_put_char,
2990 .flush_chars = mgslpc_flush_chars,
2991 .write_room = mgslpc_write_room,
2992 .chars_in_buffer = mgslpc_chars_in_buffer,
2993 .flush_buffer = mgslpc_flush_buffer,
2994 .ioctl = mgslpc_ioctl,
2995 .throttle = mgslpc_throttle,
2996 .unthrottle = mgslpc_unthrottle,
2997 .send_xchar = mgslpc_send_xchar,
2998 .break_ctl = mgslpc_break,
2999 .wait_until_sent = mgslpc_wait_until_sent,
3000 .read_proc = mgslpc_read_proc,
3001 .set_termios = mgslpc_set_termios,
3002 .stop = tx_pause,
3003 .start = tx_release,
3004 .hangup = mgslpc_hangup,
3005 .tiocmget = tiocmget,
3006 .tiocmset = tiocmset,
3007 };
3008
3009 static void synclink_cs_cleanup(void)
3010 {
3011 int rc;
3012
3013 printk("Unloading %s: version %s\n", driver_name, driver_version);
3014
3015 while(mgslpc_device_list)
3016 mgslpc_remove_device(mgslpc_device_list);
3017
3018 if (serial_driver) {
3019 if ((rc = tty_unregister_driver(serial_driver)))
3020 printk("%s(%d) failed to unregister tty driver err=%d\n",
3021 __FILE__,__LINE__,rc);
3022 put_tty_driver(serial_driver);
3023 }
3024
3025 pcmcia_unregister_driver(&mgslpc_driver);
3026 }
3027
3028 static int __init synclink_cs_init(void)
3029 {
3030 int rc;
3031
3032 if (break_on_load) {
3033 mgslpc_get_text_ptr();
3034 BREAKPOINT();
3035 }
3036
3037 printk("%s %s\n", driver_name, driver_version);
3038
3039 if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3040 return rc;
3041
3042 serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3043 if (!serial_driver) {
3044 rc = -ENOMEM;
3045 goto error;
3046 }
3047
3048 /* Initialize the tty_driver structure */
3049
3050 serial_driver->owner = THIS_MODULE;
3051 serial_driver->driver_name = "synclink_cs";
3052 serial_driver->name = "ttySLP";
3053 serial_driver->major = ttymajor;
3054 serial_driver->minor_start = 64;
3055 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3056 serial_driver->subtype = SERIAL_TYPE_NORMAL;
3057 serial_driver->init_termios = tty_std_termios;
3058 serial_driver->init_termios.c_cflag =
3059 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3060 serial_driver->flags = TTY_DRIVER_REAL_RAW;
3061 tty_set_operations(serial_driver, &mgslpc_ops);
3062
3063 if ((rc = tty_register_driver(serial_driver)) < 0) {
3064 printk("%s(%d):Couldn't register serial driver\n",
3065 __FILE__,__LINE__);
3066 put_tty_driver(serial_driver);
3067 serial_driver = NULL;
3068 goto error;
3069 }
3070
3071 printk("%s %s, tty major#%d\n",
3072 driver_name, driver_version,
3073 serial_driver->major);
3074
3075 return 0;
3076
3077 error:
3078 synclink_cs_cleanup();
3079 return rc;
3080 }
3081
3082 static void __exit synclink_cs_exit(void)
3083 {
3084 synclink_cs_cleanup();
3085 }
3086
3087 module_init(synclink_cs_init);
3088 module_exit(synclink_cs_exit);
3089
3090 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3091 {
3092 unsigned int M, N;
3093 unsigned char val;
3094
3095 /* note:standard BRG mode is broken in V3.2 chip
3096 * so enhanced mode is always used
3097 */
3098
3099 if (rate) {
3100 N = 3686400 / rate;
3101 if (!N)
3102 N = 1;
3103 N >>= 1;
3104 for (M = 1; N > 64 && M < 16; M++)
3105 N >>= 1;
3106 N--;
3107
3108 /* BGR[5..0] = N
3109 * BGR[9..6] = M
3110 * BGR[7..0] contained in BGR register
3111 * BGR[9..8] contained in CCR2[7..6]
3112 * divisor = (N+1)*2^M
3113 *
3114 * Note: M *must* not be zero (causes asymetric duty cycle)
3115 */
3116 write_reg(info, (unsigned char) (channel + BGR),
3117 (unsigned char) ((M << 6) + N));
3118 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3119 val |= ((M << 4) & 0xc0);
3120 write_reg(info, (unsigned char) (channel + CCR2), val);
3121 }
3122 }
3123
3124 /* Enabled the AUX clock output at the specified frequency.
3125 */
3126 static void enable_auxclk(MGSLPC_INFO *info)
3127 {
3128 unsigned char val;
3129
3130 /* MODE
3131 *
3132 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3133 * 05 ADM Address Mode, 0 = no addr recognition
3134 * 04 TMD Timer Mode, 0 = external
3135 * 03 RAC Receiver Active, 0 = inactive
3136 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3137 * 01 TRS Timer Resolution, 1=512
3138 * 00 TLP Test Loop, 0 = no loop
3139 *
3140 * 1000 0010
3141 */
3142 val = 0x82;
3143
3144 /* channel B RTS is used to enable AUXCLK driver on SP505 */
3145 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3146 val |= BIT2;
3147 write_reg(info, CHB + MODE, val);
3148
3149 /* CCR0
3150 *
3151 * 07 PU Power Up, 1=active, 0=power down
3152 * 06 MCE Master Clock Enable, 1=enabled
3153 * 05 Reserved, 0
3154 * 04..02 SC[2..0] Encoding
3155 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3156 *
3157 * 11000000
3158 */
3159 write_reg(info, CHB + CCR0, 0xc0);
3160
3161 /* CCR1
3162 *
3163 * 07 SFLG Shared Flag, 0 = disable shared flags
3164 * 06 GALP Go Active On Loop, 0 = not used
3165 * 05 GLP Go On Loop, 0 = not used
3166 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3167 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3168 * 02..00 CM[2..0] Clock Mode
3169 *
3170 * 0001 0111
3171 */
3172 write_reg(info, CHB + CCR1, 0x17);
3173
3174 /* CCR2 (Channel B)
3175 *
3176 * 07..06 BGR[9..8] Baud rate bits 9..8
3177 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3178 * 04 SSEL Clock source select, 1=submode b
3179 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
3180 * 02 RWX Read/Write Exchange 0=disabled
3181 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3182 * 00 DIV, data inversion 0=disabled, 1=enabled
3183 *
3184 * 0011 1000
3185 */
3186 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3187 write_reg(info, CHB + CCR2, 0x38);
3188 else
3189 write_reg(info, CHB + CCR2, 0x30);
3190
3191 /* CCR4
3192 *
3193 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3194 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3195 * 05 TST1 Test Pin, 0=normal operation
3196 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3197 * 03..02 Reserved, must be 0
3198 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3199 *
3200 * 0101 0000
3201 */
3202 write_reg(info, CHB + CCR4, 0x50);
3203
3204 /* if auxclk not enabled, set internal BRG so
3205 * CTS transitions can be detected (requires TxC)
3206 */
3207 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3208 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3209 else
3210 mgslpc_set_rate(info, CHB, 921600);
3211 }
3212
3213 static void loopback_enable(MGSLPC_INFO *info)
3214 {
3215 unsigned char val;
3216
3217 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3218 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3219 write_reg(info, CHA + CCR1, val);
3220
3221 /* CCR2:04 SSEL Clock source select, 1=submode b */
3222 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3223 write_reg(info, CHA + CCR2, val);
3224
3225 /* set LinkSpeed if available, otherwise default to 2Mbps */
3226 if (info->params.clock_speed)
3227 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3228 else
3229 mgslpc_set_rate(info, CHA, 1843200);
3230
3231 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3232 val = read_reg(info, CHA + MODE) | BIT0;
3233 write_reg(info, CHA + MODE, val);
3234 }
3235
3236 static void hdlc_mode(MGSLPC_INFO *info)
3237 {
3238 unsigned char val;
3239 unsigned char clkmode, clksubmode;
3240
3241 /* disable all interrupts */
3242 irq_disable(info, CHA, 0xffff);
3243 irq_disable(info, CHB, 0xffff);
3244 port_irq_disable(info, 0xff);
3245
3246 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3247 clkmode = clksubmode = 0;
3248 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3249 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3250 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3251 clkmode = 7;
3252 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3253 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3254 /* clock mode 7b, rcv = BRG, xmt = BRG */
3255 clkmode = 7;
3256 clksubmode = 1;
3257 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3258 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3259 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3260 clkmode = 6;
3261 clksubmode = 1;
3262 } else {
3263 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3264 clkmode = 6;
3265 }
3266 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3267 /* clock mode 0b, rcv = RxC, xmt = BRG */
3268 clksubmode = 1;
3269 }
3270
3271 /* MODE
3272 *
3273 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3274 * 05 ADM Address Mode, 0 = no addr recognition
3275 * 04 TMD Timer Mode, 0 = external
3276 * 03 RAC Receiver Active, 0 = inactive
3277 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3278 * 01 TRS Timer Resolution, 1=512
3279 * 00 TLP Test Loop, 0 = no loop
3280 *
3281 * 1000 0010
3282 */
3283 val = 0x82;
3284 if (info->params.loopback)
3285 val |= BIT0;
3286
3287 /* preserve RTS state */
3288 if (info->serial_signals & SerialSignal_RTS)
3289 val |= BIT2;
3290 write_reg(info, CHA + MODE, val);
3291
3292 /* CCR0
3293 *
3294 * 07 PU Power Up, 1=active, 0=power down
3295 * 06 MCE Master Clock Enable, 1=enabled
3296 * 05 Reserved, 0
3297 * 04..02 SC[2..0] Encoding
3298 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3299 *
3300 * 11000000
3301 */
3302 val = 0xc0;
3303 switch (info->params.encoding)
3304 {
3305 case HDLC_ENCODING_NRZI:
3306 val |= BIT3;
3307 break;
3308 case HDLC_ENCODING_BIPHASE_SPACE:
3309 val |= BIT4;
3310 break; // FM0
3311 case HDLC_ENCODING_BIPHASE_MARK:
3312 val |= BIT4 + BIT2;
3313 break; // FM1
3314 case HDLC_ENCODING_BIPHASE_LEVEL:
3315 val |= BIT4 + BIT3;
3316 break; // Manchester
3317 }
3318 write_reg(info, CHA + CCR0, val);
3319
3320 /* CCR1
3321 *
3322 * 07 SFLG Shared Flag, 0 = disable shared flags
3323 * 06 GALP Go Active On Loop, 0 = not used
3324 * 05 GLP Go On Loop, 0 = not used
3325 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3326 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3327 * 02..00 CM[2..0] Clock Mode
3328 *
3329 * 0001 0000
3330 */
3331 val = 0x10 + clkmode;
3332 write_reg(info, CHA + CCR1, val);
3333
3334 /* CCR2
3335 *
3336 * 07..06 BGR[9..8] Baud rate bits 9..8
3337 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3338 * 04 SSEL Clock source select, 1=submode b
3339 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3340 * 02 RWX Read/Write Exchange 0=disabled
3341 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3342 * 00 DIV, data inversion 0=disabled, 1=enabled
3343 *
3344 * 0000 0000
3345 */
3346 val = 0x00;
3347 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3348 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3349 val |= BIT5;
3350 if (clksubmode)
3351 val |= BIT4;
3352 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3353 val |= BIT1;
3354 if (info->params.encoding == HDLC_ENCODING_NRZB)
3355 val |= BIT0;
3356 write_reg(info, CHA + CCR2, val);
3357
3358 /* CCR3
3359 *
3360 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3361 * 05 EPT Enable preamble transmission, 1=enabled
3362 * 04 RADD Receive address pushed to FIFO, 0=disabled
3363 * 03 CRL CRC Reset Level, 0=FFFF
3364 * 02 RCRC Rx CRC 0=On 1=Off
3365 * 01 TCRC Tx CRC 0=On 1=Off
3366 * 00 PSD DPLL Phase Shift Disable
3367 *
3368 * 0000 0000
3369 */
3370 val = 0x00;
3371 if (info->params.crc_type == HDLC_CRC_NONE)
3372 val |= BIT2 + BIT1;
3373 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3374 val |= BIT5;
3375 switch (info->params.preamble_length)
3376 {
3377 case HDLC_PREAMBLE_LENGTH_16BITS:
3378 val |= BIT6;
3379 break;
3380 case HDLC_PREAMBLE_LENGTH_32BITS:
3381 val |= BIT6;
3382 break;
3383 case HDLC_PREAMBLE_LENGTH_64BITS:
3384 val |= BIT7 + BIT6;
3385 break;
3386 }
3387 write_reg(info, CHA + CCR3, val);
3388
3389 /* PRE - Preamble pattern */
3390 val = 0;
3391 switch (info->params.preamble)
3392 {
3393 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3394 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3395 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3396 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3397 }
3398 write_reg(info, CHA + PRE, val);
3399
3400 /* CCR4
3401 *
3402 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3403 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3404 * 05 TST1 Test Pin, 0=normal operation
3405 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3406 * 03..02 Reserved, must be 0
3407 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3408 *
3409 * 0101 0000
3410 */
3411 val = 0x50;
3412 write_reg(info, CHA + CCR4, val);
3413 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3414 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3415 else
3416 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3417
3418 /* RLCR Receive length check register
3419 *
3420 * 7 1=enable receive length check
3421 * 6..0 Max frame length = (RL + 1) * 32
3422 */
3423 write_reg(info, CHA + RLCR, 0);
3424
3425 /* XBCH Transmit Byte Count High
3426 *
3427 * 07 DMA mode, 0 = interrupt driven
3428 * 06 NRM, 0=ABM (ignored)
3429 * 05 CAS Carrier Auto Start
3430 * 04 XC Transmit Continuously (ignored)
3431 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3432 *
3433 * 0000 0000
3434 */
3435 val = 0x00;
3436 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3437 val |= BIT5;
3438 write_reg(info, CHA + XBCH, val);
3439 enable_auxclk(info);
3440 if (info->params.loopback || info->testing_irq)
3441 loopback_enable(info);
3442 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3443 {
3444 irq_enable(info, CHB, IRQ_CTS);
3445 /* PVR[3] 1=AUTO CTS active */
3446 set_reg_bits(info, CHA + PVR, BIT3);
3447 } else
3448 clear_reg_bits(info, CHA + PVR, BIT3);
3449
3450 irq_enable(info, CHA,
3451 IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3452 IRQ_UNDERRUN + IRQ_TXFIFO);
3453 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3454 wait_command_complete(info, CHA);
3455 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3456
3457 /* Master clock mode enabled above to allow reset commands
3458 * to complete even if no data clocks are present.
3459 *
3460 * Disable master clock mode for normal communications because
3461 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3462 * IRQ when in master clock mode.
3463 *
3464 * Leave master clock mode enabled for IRQ test because the
3465 * timer IRQ used by the test can only happen in master clock mode.
3466 */
3467 if (!info->testing_irq)
3468 clear_reg_bits(info, CHA + CCR0, BIT6);
3469
3470 tx_set_idle(info);
3471
3472 tx_stop(info);
3473 rx_stop(info);
3474 }
3475
3476 static void rx_stop(MGSLPC_INFO *info)
3477 {
3478 if (debug_level >= DEBUG_LEVEL_ISR)
3479 printk("%s(%d):rx_stop(%s)\n",
3480 __FILE__,__LINE__, info->device_name );
3481
3482 /* MODE:03 RAC Receiver Active, 0=inactive */
3483 clear_reg_bits(info, CHA + MODE, BIT3);
3484
3485 info->rx_enabled = false;
3486 info->rx_overflow = false;
3487 }
3488
3489 static void rx_start(MGSLPC_INFO *info)
3490 {
3491 if (debug_level >= DEBUG_LEVEL_ISR)
3492 printk("%s(%d):rx_start(%s)\n",
3493 __FILE__,__LINE__, info->device_name );
3494
3495 rx_reset_buffers(info);
3496 info->rx_enabled = false;
3497 info->rx_overflow = false;
3498
3499 /* MODE:03 RAC Receiver Active, 1=active */
3500 set_reg_bits(info, CHA + MODE, BIT3);
3501
3502 info->rx_enabled = true;
3503 }
3504
3505 static void tx_start(MGSLPC_INFO *info)
3506 {
3507 if (debug_level >= DEBUG_LEVEL_ISR)
3508 printk("%s(%d):tx_start(%s)\n",
3509 __FILE__,__LINE__, info->device_name );
3510
3511 if (info->tx_count) {
3512 /* If auto RTS enabled and RTS is inactive, then assert */
3513 /* RTS and set a flag indicating that the driver should */
3514 /* negate RTS when the transmission completes. */
3515 info->drop_rts_on_tx_done = false;
3516
3517 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3518 get_signals(info);
3519 if (!(info->serial_signals & SerialSignal_RTS)) {
3520 info->serial_signals |= SerialSignal_RTS;
3521 set_signals(info);
3522 info->drop_rts_on_tx_done = true;
3523 }
3524 }
3525
3526 if (info->params.mode == MGSL_MODE_ASYNC) {
3527 if (!info->tx_active) {
3528 info->tx_active = true;
3529 tx_ready(info);
3530 }
3531 } else {
3532 info->tx_active = true;
3533 tx_ready(info);
3534 mod_timer(&info->tx_timer, jiffies +
3535 msecs_to_jiffies(5000));
3536 }
3537 }
3538
3539 if (!info->tx_enabled)
3540 info->tx_enabled = true;
3541 }
3542
3543 static void tx_stop(MGSLPC_INFO *info)
3544 {
3545 if (debug_level >= DEBUG_LEVEL_ISR)
3546 printk("%s(%d):tx_stop(%s)\n",
3547 __FILE__,__LINE__, info->device_name );
3548
3549 del_timer(&info->tx_timer);
3550
3551 info->tx_enabled = false;
3552 info->tx_active = false;
3553 }
3554
3555 /* Reset the adapter to a known state and prepare it for further use.
3556 */
3557 static void reset_device(MGSLPC_INFO *info)
3558 {
3559 /* power up both channels (set BIT7) */
3560 write_reg(info, CHA + CCR0, 0x80);
3561 write_reg(info, CHB + CCR0, 0x80);
3562 write_reg(info, CHA + MODE, 0);
3563 write_reg(info, CHB + MODE, 0);
3564
3565 /* disable all interrupts */
3566 irq_disable(info, CHA, 0xffff);
3567 irq_disable(info, CHB, 0xffff);
3568 port_irq_disable(info, 0xff);
3569
3570 /* PCR Port Configuration Register
3571 *
3572 * 07..04 DEC[3..0] Serial I/F select outputs
3573 * 03 output, 1=AUTO CTS control enabled
3574 * 02 RI Ring Indicator input 0=active
3575 * 01 DSR input 0=active
3576 * 00 DTR output 0=active
3577 *
3578 * 0000 0110
3579 */
3580 write_reg(info, PCR, 0x06);
3581
3582 /* PVR Port Value Register
3583 *
3584 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3585 * 03 AUTO CTS output 1=enabled
3586 * 02 RI Ring Indicator input
3587 * 01 DSR input
3588 * 00 DTR output (1=inactive)
3589 *
3590 * 0000 0001
3591 */
3592 // write_reg(info, PVR, PVR_DTR);
3593
3594 /* IPC Interrupt Port Configuration
3595 *
3596 * 07 VIS 1=Masked interrupts visible
3597 * 06..05 Reserved, 0
3598 * 04..03 SLA Slave address, 00 ignored
3599 * 02 CASM Cascading Mode, 1=daisy chain
3600 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3601 *
3602 * 0000 0101
3603 */
3604 write_reg(info, IPC, 0x05);
3605 }
3606
3607 static void async_mode(MGSLPC_INFO *info)
3608 {
3609 unsigned char val;
3610
3611 /* disable all interrupts */
3612 irq_disable(info, CHA, 0xffff);
3613 irq_disable(info, CHB, 0xffff);
3614 port_irq_disable(info, 0xff);
3615
3616 /* MODE
3617 *
3618 * 07 Reserved, 0
3619 * 06 FRTS RTS State, 0=active
3620 * 05 FCTS Flow Control on CTS
3621 * 04 FLON Flow Control Enable
3622 * 03 RAC Receiver Active, 0 = inactive
3623 * 02 RTS 0=Auto RTS, 1=manual RTS
3624 * 01 TRS Timer Resolution, 1=512
3625 * 00 TLP Test Loop, 0 = no loop
3626 *
3627 * 0000 0110
3628 */
3629 val = 0x06;
3630 if (info->params.loopback)
3631 val |= BIT0;
3632
3633 /* preserve RTS state */
3634 if (!(info->serial_signals & SerialSignal_RTS))
3635 val |= BIT6;
3636 write_reg(info, CHA + MODE, val);
3637
3638 /* CCR0
3639 *
3640 * 07 PU Power Up, 1=active, 0=power down
3641 * 06 MCE Master Clock Enable, 1=enabled
3642 * 05 Reserved, 0
3643 * 04..02 SC[2..0] Encoding, 000=NRZ
3644 * 01..00 SM[1..0] Serial Mode, 11=Async
3645 *
3646 * 1000 0011
3647 */
3648 write_reg(info, CHA + CCR0, 0x83);
3649
3650 /* CCR1
3651 *
3652 * 07..05 Reserved, 0
3653 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3654 * 03 BCR Bit Clock Rate, 1=16x
3655 * 02..00 CM[2..0] Clock Mode, 111=BRG
3656 *
3657 * 0001 1111
3658 */
3659 write_reg(info, CHA + CCR1, 0x1f);
3660
3661 /* CCR2 (channel A)
3662 *
3663 * 07..06 BGR[9..8] Baud rate bits 9..8
3664 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3665 * 04 SSEL Clock source select, 1=submode b
3666 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3667 * 02 RWX Read/Write Exchange 0=disabled
3668 * 01 Reserved, 0
3669 * 00 DIV, data inversion 0=disabled, 1=enabled
3670 *
3671 * 0001 0000
3672 */
3673 write_reg(info, CHA + CCR2, 0x10);
3674
3675 /* CCR3
3676 *
3677 * 07..01 Reserved, 0
3678 * 00 PSD DPLL Phase Shift Disable
3679 *
3680 * 0000 0000
3681 */
3682 write_reg(info, CHA + CCR3, 0);
3683
3684 /* CCR4
3685 *
3686 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3687 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3688 * 05 TST1 Test Pin, 0=normal operation
3689 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3690 * 03..00 Reserved, must be 0
3691 *
3692 * 0101 0000
3693 */
3694 write_reg(info, CHA + CCR4, 0x50);
3695 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3696
3697 /* DAFO Data Format
3698 *
3699 * 07 Reserved, 0
3700 * 06 XBRK transmit break, 0=normal operation
3701 * 05 Stop bits (0=1, 1=2)
3702 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3703 * 02 PAREN Parity Enable
3704 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3705 *
3706 */
3707 val = 0x00;
3708 if (info->params.data_bits != 8)
3709 val |= BIT0; /* 7 bits */
3710 if (info->params.stop_bits != 1)
3711 val |= BIT5;
3712 if (info->params.parity != ASYNC_PARITY_NONE)
3713 {
3714 val |= BIT2; /* Parity enable */
3715 if (info->params.parity == ASYNC_PARITY_ODD)
3716 val |= BIT3;
3717 else
3718 val |= BIT4;
3719 }
3720 write_reg(info, CHA + DAFO, val);
3721
3722 /* RFC Rx FIFO Control
3723 *
3724 * 07 Reserved, 0
3725 * 06 DPS, 1=parity bit not stored in data byte
3726 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3727 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3728 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3729 * 01 Reserved, 0
3730 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3731 *
3732 * 0101 1100
3733 */
3734 write_reg(info, CHA + RFC, 0x5c);
3735
3736 /* RLCR Receive length check register
3737 *
3738 * Max frame length = (RL + 1) * 32
3739 */
3740 write_reg(info, CHA + RLCR, 0);
3741
3742 /* XBCH Transmit Byte Count High
3743 *
3744 * 07 DMA mode, 0 = interrupt driven
3745 * 06 NRM, 0=ABM (ignored)
3746 * 05 CAS Carrier Auto Start
3747 * 04 XC Transmit Continuously (ignored)
3748 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3749 *
3750 * 0000 0000
3751 */
3752 val = 0x00;
3753 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3754 val |= BIT5;
3755 write_reg(info, CHA + XBCH, val);
3756 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3757 irq_enable(info, CHA, IRQ_CTS);
3758
3759 /* MODE:03 RAC Receiver Active, 1=active */
3760 set_reg_bits(info, CHA + MODE, BIT3);
3761 enable_auxclk(info);
3762 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3763 irq_enable(info, CHB, IRQ_CTS);
3764 /* PVR[3] 1=AUTO CTS active */
3765 set_reg_bits(info, CHA + PVR, BIT3);
3766 } else
3767 clear_reg_bits(info, CHA + PVR, BIT3);
3768 irq_enable(info, CHA,
3769 IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3770 IRQ_ALLSENT + IRQ_TXFIFO);
3771 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3772 wait_command_complete(info, CHA);
3773 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3774 }
3775
3776 /* Set the HDLC idle mode for the transmitter.
3777 */
3778 static void tx_set_idle(MGSLPC_INFO *info)
3779 {
3780 /* Note: ESCC2 only supports flags and one idle modes */
3781 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3782 set_reg_bits(info, CHA + CCR1, BIT3);
3783 else
3784 clear_reg_bits(info, CHA + CCR1, BIT3);
3785 }
3786
3787 /* get state of the V24 status (input) signals.
3788 */
3789 static void get_signals(MGSLPC_INFO *info)
3790 {
3791 unsigned char status = 0;
3792
3793 /* preserve DTR and RTS */
3794 info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3795
3796 if (read_reg(info, CHB + VSTR) & BIT7)
3797 info->serial_signals |= SerialSignal_DCD;
3798 if (read_reg(info, CHB + STAR) & BIT1)
3799 info->serial_signals |= SerialSignal_CTS;
3800
3801 status = read_reg(info, CHA + PVR);
3802 if (!(status & PVR_RI))
3803 info->serial_signals |= SerialSignal_RI;
3804 if (!(status & PVR_DSR))
3805 info->serial_signals |= SerialSignal_DSR;
3806 }
3807
3808 /* Set the state of DTR and RTS based on contents of
3809 * serial_signals member of device extension.
3810 */
3811 static void set_signals(MGSLPC_INFO *info)
3812 {
3813 unsigned char val;
3814
3815 val = read_reg(info, CHA + MODE);
3816 if (info->params.mode == MGSL_MODE_ASYNC) {
3817 if (info->serial_signals & SerialSignal_RTS)
3818 val &= ~BIT6;
3819 else
3820 val |= BIT6;
3821 } else {
3822 if (info->serial_signals & SerialSignal_RTS)
3823 val |= BIT2;
3824 else
3825 val &= ~BIT2;
3826 }
3827 write_reg(info, CHA + MODE, val);
3828
3829 if (info->serial_signals & SerialSignal_DTR)
3830 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3831 else
3832 set_reg_bits(info, CHA + PVR, PVR_DTR);
3833 }
3834
3835 static void rx_reset_buffers(MGSLPC_INFO *info)
3836 {
3837 RXBUF *buf;
3838 int i;
3839
3840 info->rx_put = 0;
3841 info->rx_get = 0;
3842 info->rx_frame_count = 0;
3843 for (i=0 ; i < info->rx_buf_count ; i++) {
3844 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3845 buf->status = buf->count = 0;
3846 }
3847 }
3848
3849 /* Attempt to return a received HDLC frame
3850 * Only frames received without errors are returned.
3851 *
3852 * Returns true if frame returned, otherwise false
3853 */
3854 static bool rx_get_frame(MGSLPC_INFO *info)
3855 {
3856 unsigned short status;
3857 RXBUF *buf;
3858 unsigned int framesize = 0;
3859 unsigned long flags;
3860 struct tty_struct *tty = info->tty;
3861 bool return_frame = false;
3862
3863 if (info->rx_frame_count == 0)
3864 return false;
3865
3866 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3867
3868 status = buf->status;
3869
3870 /* 07 VFR 1=valid frame
3871 * 06 RDO 1=data overrun
3872 * 05 CRC 1=OK, 0=error
3873 * 04 RAB 1=frame aborted
3874 */
3875 if ((status & 0xf0) != 0xA0) {
3876 if (!(status & BIT7) || (status & BIT4))
3877 info->icount.rxabort++;
3878 else if (status & BIT6)
3879 info->icount.rxover++;
3880 else if (!(status & BIT5)) {
3881 info->icount.rxcrc++;
3882 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3883 return_frame = true;
3884 }
3885 framesize = 0;
3886 #if SYNCLINK_GENERIC_HDLC
3887 {
3888 struct net_device_stats *stats = hdlc_stats(info->netdev);
3889 stats->rx_errors++;
3890 stats->rx_frame_errors++;
3891 }
3892 #endif
3893 } else
3894 return_frame = true;
3895
3896 if (return_frame)
3897 framesize = buf->count;
3898
3899 if (debug_level >= DEBUG_LEVEL_BH)
3900 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3901 __FILE__,__LINE__,info->device_name,status,framesize);
3902
3903 if (debug_level >= DEBUG_LEVEL_DATA)
3904 trace_block(info, buf->data, framesize, 0);
3905
3906 if (framesize) {
3907 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3908 framesize+1 > info->max_frame_size) ||
3909 framesize > info->max_frame_size)
3910 info->icount.rxlong++;
3911 else {
3912 if (status & BIT5)
3913 info->icount.rxok++;
3914
3915 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3916 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3917 ++framesize;
3918 }
3919
3920 #if SYNCLINK_GENERIC_HDLC
3921 if (info->netcount)
3922 hdlcdev_rx(info, buf->data, framesize);
3923 else
3924 #endif
3925 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3926 }
3927 }
3928
3929 spin_lock_irqsave(&info->lock,flags);
3930 buf->status = buf->count = 0;
3931 info->rx_frame_count--;
3932 info->rx_get++;
3933 if (info->rx_get >= info->rx_buf_count)
3934 info->rx_get = 0;
3935 spin_unlock_irqrestore(&info->lock,flags);
3936
3937 return true;
3938 }
3939
3940 static bool register_test(MGSLPC_INFO *info)
3941 {
3942 static unsigned char patterns[] =
3943 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3944 static unsigned int count = ARRAY_SIZE(patterns);
3945 unsigned int i;
3946 bool rc = true;
3947 unsigned long flags;
3948
3949 spin_lock_irqsave(&info->lock,flags);
3950 reset_device(info);
3951
3952 for (i = 0; i < count; i++) {
3953 write_reg(info, XAD1, patterns[i]);
3954 write_reg(info, XAD2, patterns[(i + 1) % count]);
3955 if ((read_reg(info, XAD1) != patterns[i]) ||
3956 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3957 rc = false;
3958 break;
3959 }
3960 }
3961
3962 spin_unlock_irqrestore(&info->lock,flags);
3963 return rc;
3964 }
3965
3966 static bool irq_test(MGSLPC_INFO *info)
3967 {
3968 unsigned long end_time;
3969 unsigned long flags;
3970
3971 spin_lock_irqsave(&info->lock,flags);
3972 reset_device(info);
3973
3974 info->testing_irq = true;
3975 hdlc_mode(info);
3976
3977 info->irq_occurred = false;
3978
3979 /* init hdlc mode */
3980
3981 irq_enable(info, CHA, IRQ_TIMER);
3982 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3983 issue_command(info, CHA, CMD_START_TIMER);
3984
3985 spin_unlock_irqrestore(&info->lock,flags);
3986
3987 end_time=100;
3988 while(end_time-- && !info->irq_occurred) {
3989 msleep_interruptible(10);
3990 }
3991
3992 info->testing_irq = false;
3993
3994 spin_lock_irqsave(&info->lock,flags);
3995 reset_device(info);
3996 spin_unlock_irqrestore(&info->lock,flags);
3997
3998 return info->irq_occurred;
3999 }
4000
4001 static int adapter_test(MGSLPC_INFO *info)
4002 {
4003 if (!register_test(info)) {
4004 info->init_error = DiagStatus_AddressFailure;
4005 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4006 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4007 return -ENODEV;
4008 }
4009
4010 if (!irq_test(info)) {
4011 info->init_error = DiagStatus_IrqFailure;
4012 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4013 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4014 return -ENODEV;
4015 }
4016
4017 if (debug_level >= DEBUG_LEVEL_INFO)
4018 printk("%s(%d):device %s passed diagnostics\n",
4019 __FILE__,__LINE__,info->device_name);
4020 return 0;
4021 }
4022
4023 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
4024 {
4025 int i;
4026 int linecount;
4027 if (xmit)
4028 printk("%s tx data:\n",info->device_name);
4029 else
4030 printk("%s rx data:\n",info->device_name);
4031
4032 while(count) {
4033 if (count > 16)
4034 linecount = 16;
4035 else
4036 linecount = count;
4037
4038 for(i=0;i<linecount;i++)
4039 printk("%02X ",(unsigned char)data[i]);
4040 for(;i<17;i++)
4041 printk(" ");
4042 for(i=0;i<linecount;i++) {
4043 if (data[i]>=040 && data[i]<=0176)
4044 printk("%c",data[i]);
4045 else
4046 printk(".");
4047 }
4048 printk("\n");
4049
4050 data += linecount;
4051 count -= linecount;
4052 }
4053 }
4054
4055 /* HDLC frame time out
4056 * update stats and do tx completion processing
4057 */
4058 static void tx_timeout(unsigned long context)
4059 {
4060 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4061 unsigned long flags;
4062
4063 if ( debug_level >= DEBUG_LEVEL_INFO )
4064 printk( "%s(%d):tx_timeout(%s)\n",
4065 __FILE__,__LINE__,info->device_name);
4066 if(info->tx_active &&
4067 info->params.mode == MGSL_MODE_HDLC) {
4068 info->icount.txtimeout++;
4069 }
4070 spin_lock_irqsave(&info->lock,flags);
4071 info->tx_active = false;
4072 info->tx_count = info->tx_put = info->tx_get = 0;
4073
4074 spin_unlock_irqrestore(&info->lock,flags);
4075
4076 #if SYNCLINK_GENERIC_HDLC
4077 if (info->netcount)
4078 hdlcdev_tx_done(info);
4079 else
4080 #endif
4081 bh_transmit(info);
4082 }
4083
4084 #if SYNCLINK_GENERIC_HDLC
4085
4086 /**
4087 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4088 * set encoding and frame check sequence (FCS) options
4089 *
4090 * dev pointer to network device structure
4091 * encoding serial encoding setting
4092 * parity FCS setting
4093 *
4094 * returns 0 if success, otherwise error code
4095 */
4096 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4097 unsigned short parity)
4098 {
4099 MGSLPC_INFO *info = dev_to_port(dev);
4100 unsigned char new_encoding;
4101 unsigned short new_crctype;
4102
4103 /* return error if TTY interface open */
4104 if (info->count)
4105 return -EBUSY;
4106
4107 switch (encoding)
4108 {
4109 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
4110 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4111 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4112 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4113 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4114 default: return -EINVAL;
4115 }
4116
4117 switch (parity)
4118 {
4119 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
4120 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4121 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4122 default: return -EINVAL;
4123 }
4124
4125 info->params.encoding = new_encoding;
4126 info->params.crc_type = new_crctype;
4127
4128 /* if network interface up, reprogram hardware */
4129 if (info->netcount)
4130 mgslpc_program_hw(info);
4131
4132 return 0;
4133 }
4134
4135 /**
4136 * called by generic HDLC layer to send frame
4137 *
4138 * skb socket buffer containing HDLC frame
4139 * dev pointer to network device structure
4140 *
4141 * returns 0 if success, otherwise error code
4142 */
4143 static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4144 {
4145 MGSLPC_INFO *info = dev_to_port(dev);
4146 struct net_device_stats *stats = hdlc_stats(dev);
4147 unsigned long flags;
4148
4149 if (debug_level >= DEBUG_LEVEL_INFO)
4150 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4151
4152 /* stop sending until this frame completes */
4153 netif_stop_queue(dev);
4154
4155 /* copy data to device buffers */
4156 skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
4157 info->tx_get = 0;
4158 info->tx_put = info->tx_count = skb->len;
4159
4160 /* update network statistics */
4161 stats->tx_packets++;
4162 stats->tx_bytes += skb->len;
4163
4164 /* done with socket buffer, so free it */
4165 dev_kfree_skb(skb);
4166
4167 /* save start time for transmit timeout detection */
4168 dev->trans_start = jiffies;
4169
4170 /* start hardware transmitter if necessary */
4171 spin_lock_irqsave(&info->lock,flags);
4172 if (!info->tx_active)
4173 tx_start(info);
4174 spin_unlock_irqrestore(&info->lock,flags);
4175
4176 return 0;
4177 }
4178
4179 /**
4180 * called by network layer when interface enabled
4181 * claim resources and initialize hardware
4182 *
4183 * dev pointer to network device structure
4184 *
4185 * returns 0 if success, otherwise error code
4186 */
4187 static int hdlcdev_open(struct net_device *dev)
4188 {
4189 MGSLPC_INFO *info = dev_to_port(dev);
4190 int rc;
4191 unsigned long flags;
4192
4193 if (debug_level >= DEBUG_LEVEL_INFO)
4194 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4195
4196 /* generic HDLC layer open processing */
4197 if ((rc = hdlc_open(dev)))
4198 return rc;
4199
4200 /* arbitrate between network and tty opens */
4201 spin_lock_irqsave(&info->netlock, flags);
4202 if (info->count != 0 || info->netcount != 0) {
4203 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4204 spin_unlock_irqrestore(&info->netlock, flags);
4205 return -EBUSY;
4206 }
4207 info->netcount=1;
4208 spin_unlock_irqrestore(&info->netlock, flags);
4209
4210 /* claim resources and init adapter */
4211 if ((rc = startup(info)) != 0) {
4212 spin_lock_irqsave(&info->netlock, flags);
4213 info->netcount=0;
4214 spin_unlock_irqrestore(&info->netlock, flags);
4215 return rc;
4216 }
4217
4218 /* assert DTR and RTS, apply hardware settings */
4219 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4220 mgslpc_program_hw(info);
4221
4222 /* enable network layer transmit */
4223 dev->trans_start = jiffies;
4224 netif_start_queue(dev);
4225
4226 /* inform generic HDLC layer of current DCD status */
4227 spin_lock_irqsave(&info->lock, flags);
4228 get_signals(info);
4229 spin_unlock_irqrestore(&info->lock, flags);
4230 if (info->serial_signals & SerialSignal_DCD)
4231 netif_carrier_on(dev);
4232 else
4233 netif_carrier_off(dev);
4234 return 0;
4235 }
4236
4237 /**
4238 * called by network layer when interface is disabled
4239 * shutdown hardware and release resources
4240 *
4241 * dev pointer to network device structure
4242 *
4243 * returns 0 if success, otherwise error code
4244 */
4245 static int hdlcdev_close(struct net_device *dev)
4246 {
4247 MGSLPC_INFO *info = dev_to_port(dev);
4248 unsigned long flags;
4249
4250 if (debug_level >= DEBUG_LEVEL_INFO)
4251 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4252
4253 netif_stop_queue(dev);
4254
4255 /* shutdown adapter and release resources */
4256 shutdown(info);
4257
4258 hdlc_close(dev);
4259
4260 spin_lock_irqsave(&info->netlock, flags);
4261 info->netcount=0;
4262 spin_unlock_irqrestore(&info->netlock, flags);
4263
4264 return 0;
4265 }
4266
4267 /**
4268 * called by network layer to process IOCTL call to network device
4269 *
4270 * dev pointer to network device structure
4271 * ifr pointer to network interface request structure
4272 * cmd IOCTL command code
4273 *
4274 * returns 0 if success, otherwise error code
4275 */
4276 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4277 {
4278 const size_t size = sizeof(sync_serial_settings);
4279 sync_serial_settings new_line;
4280 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4281 MGSLPC_INFO *info = dev_to_port(dev);
4282 unsigned int flags;
4283
4284 if (debug_level >= DEBUG_LEVEL_INFO)
4285 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4286
4287 /* return error if TTY interface open */
4288 if (info->count)
4289 return -EBUSY;
4290
4291 if (cmd != SIOCWANDEV)
4292 return hdlc_ioctl(dev, ifr, cmd);
4293
4294 switch(ifr->ifr_settings.type) {
4295 case IF_GET_IFACE: /* return current sync_serial_settings */
4296
4297 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4298 if (ifr->ifr_settings.size < size) {
4299 ifr->ifr_settings.size = size; /* data size wanted */
4300 return -ENOBUFS;
4301 }
4302
4303 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4304 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4305 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4306 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4307
4308 switch (flags){
4309 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4310 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4311 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4312 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4313 default: new_line.clock_type = CLOCK_DEFAULT;
4314 }
4315
4316 new_line.clock_rate = info->params.clock_speed;
4317 new_line.loopback = info->params.loopback ? 1:0;
4318
4319 if (copy_to_user(line, &new_line, size))
4320 return -EFAULT;
4321 return 0;
4322
4323 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4324
4325 if(!capable(CAP_NET_ADMIN))
4326 return -EPERM;
4327 if (copy_from_user(&new_line, line, size))
4328 return -EFAULT;
4329
4330 switch (new_line.clock_type)
4331 {
4332 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4333 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4334 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4335 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4336 case CLOCK_DEFAULT: flags = info->params.flags &
4337 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4338 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4339 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4340 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4341 default: return -EINVAL;
4342 }
4343
4344 if (new_line.loopback != 0 && new_line.loopback != 1)
4345 return -EINVAL;
4346
4347 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4348 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4349 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4350 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4351 info->params.flags |= flags;
4352
4353 info->params.loopback = new_line.loopback;
4354
4355 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4356 info->params.clock_speed = new_line.clock_rate;
4357 else
4358 info->params.clock_speed = 0;
4359
4360 /* if network interface up, reprogram hardware */
4361 if (info->netcount)
4362 mgslpc_program_hw(info);
4363 return 0;
4364
4365 default:
4366 return hdlc_ioctl(dev, ifr, cmd);
4367 }
4368 }
4369
4370 /**
4371 * called by network layer when transmit timeout is detected
4372 *
4373 * dev pointer to network device structure
4374 */
4375 static void hdlcdev_tx_timeout(struct net_device *dev)
4376 {
4377 MGSLPC_INFO *info = dev_to_port(dev);
4378 struct net_device_stats *stats = hdlc_stats(dev);
4379 unsigned long flags;
4380
4381 if (debug_level >= DEBUG_LEVEL_INFO)
4382 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4383
4384 stats->tx_errors++;
4385 stats->tx_aborted_errors++;
4386
4387 spin_lock_irqsave(&info->lock,flags);
4388 tx_stop(info);
4389 spin_unlock_irqrestore(&info->lock,flags);
4390
4391 netif_wake_queue(dev);
4392 }
4393
4394 /**
4395 * called by device driver when transmit completes
4396 * reenable network layer transmit if stopped
4397 *
4398 * info pointer to device instance information
4399 */
4400 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4401 {
4402 if (netif_queue_stopped(info->netdev))
4403 netif_wake_queue(info->netdev);
4404 }
4405
4406 /**
4407 * called by device driver when frame received
4408 * pass frame to network layer
4409 *
4410 * info pointer to device instance information
4411 * buf pointer to buffer contianing frame data
4412 * size count of data bytes in buf
4413 */
4414 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4415 {
4416 struct sk_buff *skb = dev_alloc_skb(size);
4417 struct net_device *dev = info->netdev;
4418 struct net_device_stats *stats = hdlc_stats(dev);
4419
4420 if (debug_level >= DEBUG_LEVEL_INFO)
4421 printk("hdlcdev_rx(%s)\n",dev->name);
4422
4423 if (skb == NULL) {
4424 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4425 stats->rx_dropped++;
4426 return;
4427 }
4428
4429 memcpy(skb_put(skb, size),buf,size);
4430
4431 skb->protocol = hdlc_type_trans(skb, info->netdev);
4432
4433 stats->rx_packets++;
4434 stats->rx_bytes += size;
4435
4436 netif_rx(skb);
4437
4438 info->netdev->last_rx = jiffies;
4439 }
4440
4441 /**
4442 * called by device driver when adding device instance
4443 * do generic HDLC initialization
4444 *
4445 * info pointer to device instance information
4446 *
4447 * returns 0 if success, otherwise error code
4448 */
4449 static int hdlcdev_init(MGSLPC_INFO *info)
4450 {
4451 int rc;
4452 struct net_device *dev;
4453 hdlc_device *hdlc;
4454
4455 /* allocate and initialize network and HDLC layer objects */
4456
4457 if (!(dev = alloc_hdlcdev(info))) {
4458 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4459 return -ENOMEM;
4460 }
4461
4462 /* for network layer reporting purposes only */
4463 dev->base_addr = info->io_base;
4464 dev->irq = info->irq_level;
4465
4466 /* network layer callbacks and settings */
4467 dev->do_ioctl = hdlcdev_ioctl;
4468 dev->open = hdlcdev_open;
4469 dev->stop = hdlcdev_close;
4470 dev->tx_timeout = hdlcdev_tx_timeout;
4471 dev->watchdog_timeo = 10*HZ;
4472 dev->tx_queue_len = 50;
4473
4474 /* generic HDLC layer callbacks and settings */
4475 hdlc = dev_to_hdlc(dev);
4476 hdlc->attach = hdlcdev_attach;
4477 hdlc->xmit = hdlcdev_xmit;
4478
4479 /* register objects with HDLC layer */
4480 if ((rc = register_hdlc_device(dev))) {
4481 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4482 free_netdev(dev);
4483 return rc;
4484 }
4485
4486 info->netdev = dev;
4487 return 0;
4488 }
4489
4490 /**
4491 * called by device driver when removing device instance
4492 * do generic HDLC cleanup
4493 *
4494 * info pointer to device instance information
4495 */
4496 static void hdlcdev_exit(MGSLPC_INFO *info)
4497 {
4498 unregister_hdlc_device(info->netdev);
4499 free_netdev(info->netdev);
4500 info->netdev = NULL;
4501 }
4502
4503 #endif /* CONFIG_HDLC */
4504
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