2 * i2c-au1550.c: SMBus (i2c) adapter for Alchemy PSC interface
3 * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
5 * 2.6 port by Matt Porter <mporter@kernel.crashing.org>
7 * The documentation describes this as an SMBus controller, but it doesn't
8 * understand any of the SMBus protocol in hardware. It's really an I2C
9 * controller that could emulate most of the SMBus in software.
11 * This is just a skeleton adapter to use with the Au1550 PSC
12 * algorithm. It was developed for the Pb1550, but will work with
13 * any Au1550 board that has a similar PSC configuration.
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version 2
18 * of the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
30 #include <linux/delay.h>
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/platform_device.h>
34 #include <linux/init.h>
35 #include <linux/errno.h>
36 #include <linux/i2c.h>
37 #include <linux/slab.h>
39 #include <asm/mach-au1x00/au1xxx.h>
40 #include <asm/mach-au1x00/au1xxx_psc.h>
42 struct i2c_au1550_data
{
46 struct i2c_adapter adap
;
47 struct resource
*ioarea
;
51 wait_xfer_done(struct i2c_au1550_data
*adap
)
55 volatile psc_smb_t
*sp
;
57 sp
= (volatile psc_smb_t
*)(adap
->psc_base
);
59 /* Wait for Tx Buffer Empty
61 for (i
= 0; i
< adap
->xfer_timeout
; i
++) {
62 stat
= sp
->psc_smbstat
;
64 if ((stat
& PSC_SMBSTAT_TE
) != 0)
74 wait_ack(struct i2c_au1550_data
*adap
)
77 volatile psc_smb_t
*sp
;
79 if (wait_xfer_done(adap
))
82 sp
= (volatile psc_smb_t
*)(adap
->psc_base
);
84 stat
= sp
->psc_smbevnt
;
87 if ((stat
& (PSC_SMBEVNT_DN
| PSC_SMBEVNT_AN
| PSC_SMBEVNT_AL
)) != 0)
94 wait_master_done(struct i2c_au1550_data
*adap
)
98 volatile psc_smb_t
*sp
;
100 sp
= (volatile psc_smb_t
*)(adap
->psc_base
);
102 /* Wait for Master Done.
104 for (i
= 0; i
< adap
->xfer_timeout
; i
++) {
105 stat
= sp
->psc_smbevnt
;
107 if ((stat
& PSC_SMBEVNT_MD
) != 0)
116 do_address(struct i2c_au1550_data
*adap
, unsigned int addr
, int rd
, int q
)
118 volatile psc_smb_t
*sp
;
121 sp
= (volatile psc_smb_t
*)(adap
->psc_base
);
123 /* Reset the FIFOs, clear events.
125 stat
= sp
->psc_smbstat
;
126 sp
->psc_smbevnt
= PSC_SMBEVNT_ALLCLR
;
129 if (!(stat
& PSC_SMBSTAT_TE
) || !(stat
& PSC_SMBSTAT_RE
)) {
130 sp
->psc_smbpcr
= PSC_SMBPCR_DC
;
133 stat
= sp
->psc_smbpcr
;
135 } while ((stat
& PSC_SMBPCR_DC
) != 0);
139 /* Write out the i2c chip address and specify operation
145 /* zero-byte xfers stop immediately */
147 addr
|= PSC_SMBTXRX_STP
;
149 /* Put byte into fifo, start up master.
151 sp
->psc_smbtxrx
= addr
;
153 sp
->psc_smbpcr
= PSC_SMBPCR_MS
;
157 return (q
) ? wait_master_done(adap
) : 0;
161 wait_for_rx_byte(struct i2c_au1550_data
*adap
, u32
*ret_data
)
165 volatile psc_smb_t
*sp
;
167 if (wait_xfer_done(adap
))
170 sp
= (volatile psc_smb_t
*)(adap
->psc_base
);
172 j
= adap
->xfer_timeout
* 100;
178 stat
= sp
->psc_smbstat
;
180 if ((stat
& PSC_SMBSTAT_RE
) == 0)
185 data
= sp
->psc_smbtxrx
;
193 i2c_read(struct i2c_au1550_data
*adap
, unsigned char *buf
,
198 volatile psc_smb_t
*sp
;
203 /* A read is performed by stuffing the transmit fifo with
204 * zero bytes for timing, waiting for bytes to appear in the
205 * receive fifo, then reading the bytes.
208 sp
= (volatile psc_smb_t
*)(adap
->psc_base
);
211 while (i
< (len
-1)) {
214 if (wait_for_rx_byte(adap
, &data
))
221 /* The last byte has to indicate transfer done.
223 sp
->psc_smbtxrx
= PSC_SMBTXRX_STP
;
225 if (wait_master_done(adap
))
228 data
= sp
->psc_smbtxrx
;
235 i2c_write(struct i2c_au1550_data
*adap
, unsigned char *buf
,
240 volatile psc_smb_t
*sp
;
245 sp
= (volatile psc_smb_t
*)(adap
->psc_base
);
248 while (i
< (len
-1)) {
250 sp
->psc_smbtxrx
= data
;
257 /* The last byte has to indicate transfer done.
260 data
|= PSC_SMBTXRX_STP
;
261 sp
->psc_smbtxrx
= data
;
263 if (wait_master_done(adap
))
269 au1550_xfer(struct i2c_adapter
*i2c_adap
, struct i2c_msg
*msgs
, int num
)
271 struct i2c_au1550_data
*adap
= i2c_adap
->algo_data
;
275 for (i
= 0; !err
&& i
< num
; i
++) {
277 err
= do_address(adap
, p
->addr
, p
->flags
& I2C_M_RD
,
281 if (p
->flags
& I2C_M_RD
)
282 err
= i2c_read(adap
, p
->buf
, p
->len
);
284 err
= i2c_write(adap
, p
->buf
, p
->len
);
287 /* Return the number of messages processed, or the error code.
295 au1550_func(struct i2c_adapter
*adap
)
297 return I2C_FUNC_I2C
| I2C_FUNC_SMBUS_EMUL
;
300 static const struct i2c_algorithm au1550_algo
= {
301 .master_xfer
= au1550_xfer
,
302 .functionality
= au1550_func
,
306 * registering functions to load algorithms at runtime
307 * Prior to calling us, the 50MHz clock frequency and routing
308 * must have been set up for the PSC indicated by the adapter.
311 i2c_au1550_probe(struct platform_device
*pdev
)
313 struct i2c_au1550_data
*priv
;
314 volatile psc_smb_t
*sp
;
319 r
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
325 priv
= kzalloc(sizeof(struct i2c_au1550_data
), GFP_KERNEL
);
331 priv
->ioarea
= request_mem_region(r
->start
, r
->end
- r
->start
+ 1,
338 priv
->psc_base
= r
->start
;
339 priv
->xfer_timeout
= 200;
340 priv
->ack_timeout
= 200;
342 priv
->adap
.id
= I2C_HW_AU1550_PSC
;
343 priv
->adap
.nr
= pdev
->id
;
344 priv
->adap
.algo
= &au1550_algo
;
345 priv
->adap
.algo_data
= priv
;
346 priv
->adap
.dev
.parent
= &pdev
->dev
;
347 strlcpy(priv
->adap
.name
, "Au1xxx PSC I2C", sizeof(priv
->adap
.name
));
349 /* Now, set up the PSC for SMBus PIO mode.
351 sp
= (volatile psc_smb_t
*)priv
->psc_base
;
352 sp
->psc_ctrl
= PSC_CTRL_DISABLE
;
354 sp
->psc_sel
= PSC_SEL_PS_SMBUSMODE
;
357 sp
->psc_ctrl
= PSC_CTRL_ENABLE
;
360 stat
= sp
->psc_smbstat
;
362 } while ((stat
& PSC_SMBSTAT_SR
) == 0);
364 sp
->psc_smbcfg
= (PSC_SMBCFG_RT_FIFO8
| PSC_SMBCFG_TT_FIFO8
|
365 PSC_SMBCFG_DD_DISABLE
);
367 /* Divide by 8 to get a 6.25 MHz clock. The later protocol
368 * timings are based on this clock.
370 sp
->psc_smbcfg
|= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8
);
371 sp
->psc_smbmsk
= PSC_SMBMSK_ALLMASK
;
374 /* Set the protocol timer values. See Table 71 in the
375 * Au1550 Data Book for standard timing values.
377 sp
->psc_smbtmr
= PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \
378 PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \
379 PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \
380 PSC_SMBTMR_SET_CH(15);
383 sp
->psc_smbcfg
|= PSC_SMBCFG_DE_ENABLE
;
385 stat
= sp
->psc_smbstat
;
387 } while ((stat
& PSC_SMBSTAT_DR
) == 0);
389 ret
= i2c_add_numbered_adapter(&priv
->adap
);
391 platform_set_drvdata(pdev
, priv
);
395 /* disable the PSC */
397 sp
->psc_ctrl
= PSC_CTRL_DISABLE
;
400 release_resource(priv
->ioarea
);
409 i2c_au1550_remove(struct platform_device
*pdev
)
411 struct i2c_au1550_data
*priv
= platform_get_drvdata(pdev
);
412 volatile psc_smb_t
*sp
= (volatile psc_smb_t
*)priv
->psc_base
;
414 platform_set_drvdata(pdev
, NULL
);
415 i2c_del_adapter(&priv
->adap
);
417 sp
->psc_ctrl
= PSC_CTRL_DISABLE
;
419 release_resource(priv
->ioarea
);
426 i2c_au1550_suspend(struct platform_device
*pdev
, pm_message_t state
)
428 struct i2c_au1550_data
*priv
= platform_get_drvdata(pdev
);
429 volatile psc_smb_t
*sp
= (volatile psc_smb_t
*)priv
->psc_base
;
431 sp
->psc_ctrl
= PSC_CTRL_SUSPEND
;
437 i2c_au1550_resume(struct platform_device
*pdev
)
439 struct i2c_au1550_data
*priv
= platform_get_drvdata(pdev
);
440 volatile psc_smb_t
*sp
= (volatile psc_smb_t
*)priv
->psc_base
;
442 sp
->psc_ctrl
= PSC_CTRL_ENABLE
;
444 while (!(sp
->psc_smbstat
& PSC_SMBSTAT_SR
))
449 static struct platform_driver au1xpsc_smbus_driver
= {
451 .name
= "au1xpsc_smbus",
452 .owner
= THIS_MODULE
,
454 .probe
= i2c_au1550_probe
,
455 .remove
= __devexit_p(i2c_au1550_remove
),
456 .suspend
= i2c_au1550_suspend
,
457 .resume
= i2c_au1550_resume
,
461 i2c_au1550_init(void)
463 return platform_driver_register(&au1xpsc_smbus_driver
);
467 i2c_au1550_exit(void)
469 platform_driver_unregister(&au1xpsc_smbus_driver
);
472 MODULE_AUTHOR("Dan Malek, Embedded Edge, LLC.");
473 MODULE_DESCRIPTION("SMBus adapter Alchemy pb1550");
474 MODULE_LICENSE("GPL");
476 module_init (i2c_au1550_init
);
477 module_exit (i2c_au1550_exit
);