Merge branch 'cpus4096' into irq/threaded
[linux-2.6/linux-2.6-openrd.git] / include / linux / irq.h
blob873e4ac11b813accc72c6699265b039f62e7c575
1 #ifndef _LINUX_IRQ_H
2 #define _LINUX_IRQ_H
4 /*
5 * Please do not include this file in generic code. There is currently
6 * no requirement for any architecture to implement anything held
7 * within this file.
9 * Thanks. --rmk
12 #include <linux/smp.h>
14 #ifndef CONFIG_S390
16 #include <linux/linkage.h>
17 #include <linux/cache.h>
18 #include <linux/spinlock.h>
19 #include <linux/cpumask.h>
20 #include <linux/irqreturn.h>
21 #include <linux/irqnr.h>
22 #include <linux/errno.h>
24 #include <asm/irq.h>
25 #include <asm/ptrace.h>
26 #include <asm/irq_regs.h>
28 struct irq_desc;
29 typedef void (*irq_flow_handler_t)(unsigned int irq,
30 struct irq_desc *desc);
34 * IRQ line status.
36 * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h
38 * IRQ types
40 #define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
41 #define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
42 #define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
43 #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
44 #define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
45 #define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
46 #define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
47 #define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
49 /* Internal flags */
50 #define IRQ_INPROGRESS 0x00000100 /* IRQ handler active - do not enter! */
51 #define IRQ_DISABLED 0x00000200 /* IRQ disabled - do not enter! */
52 #define IRQ_PENDING 0x00000400 /* IRQ pending - replay on enable */
53 #define IRQ_REPLAY 0x00000800 /* IRQ has been replayed but not acked yet */
54 #define IRQ_AUTODETECT 0x00001000 /* IRQ is being autodetected */
55 #define IRQ_WAITING 0x00002000 /* IRQ not yet seen - for autodetection */
56 #define IRQ_LEVEL 0x00004000 /* IRQ level triggered */
57 #define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */
58 #define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */
59 #define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */
60 #define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */
61 #define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */
62 #define IRQ_WAKEUP 0x00100000 /* IRQ triggers system wakeup */
63 #define IRQ_MOVE_PENDING 0x00200000 /* need to re-target IRQ destination */
64 #define IRQ_NO_BALANCING 0x00400000 /* IRQ is excluded from balancing */
65 #define IRQ_SPURIOUS_DISABLED 0x00800000 /* IRQ was disabled by the spurious trap */
66 #define IRQ_MOVE_PCNTXT 0x01000000 /* IRQ migration from process context */
67 #define IRQ_AFFINITY_SET 0x02000000 /* IRQ affinity was set from userspace*/
69 #ifdef CONFIG_IRQ_PER_CPU
70 # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
71 # define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
72 #else
73 # define CHECK_IRQ_PER_CPU(var) 0
74 # define IRQ_NO_BALANCING_MASK IRQ_NO_BALANCING
75 #endif
77 struct proc_dir_entry;
78 struct msi_desc;
80 /**
81 * struct irq_chip - hardware interrupt chip descriptor
83 * @name: name for /proc/interrupts
84 * @startup: start up the interrupt (defaults to ->enable if NULL)
85 * @shutdown: shut down the interrupt (defaults to ->disable if NULL)
86 * @enable: enable the interrupt (defaults to chip->unmask if NULL)
87 * @disable: disable the interrupt (defaults to chip->mask if NULL)
88 * @ack: start of a new interrupt
89 * @mask: mask an interrupt source
90 * @mask_ack: ack and mask an interrupt source
91 * @unmask: unmask an interrupt source
92 * @eoi: end of interrupt - chip level
93 * @end: end of interrupt - flow level
94 * @set_affinity: set the CPU affinity on SMP machines
95 * @retrigger: resend an IRQ to the CPU
96 * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
97 * @set_wake: enable/disable power-management wake-on of an IRQ
99 * @release: release function solely used by UML
100 * @typename: obsoleted by name, kept as migration helper
102 struct irq_chip {
103 const char *name;
104 unsigned int (*startup)(unsigned int irq);
105 void (*shutdown)(unsigned int irq);
106 void (*enable)(unsigned int irq);
107 void (*disable)(unsigned int irq);
109 void (*ack)(unsigned int irq);
110 void (*mask)(unsigned int irq);
111 void (*mask_ack)(unsigned int irq);
112 void (*unmask)(unsigned int irq);
113 void (*eoi)(unsigned int irq);
115 void (*end)(unsigned int irq);
116 void (*set_affinity)(unsigned int irq,
117 const struct cpumask *dest);
118 int (*retrigger)(unsigned int irq);
119 int (*set_type)(unsigned int irq, unsigned int flow_type);
120 int (*set_wake)(unsigned int irq, unsigned int on);
122 /* Currently used only by UML, might disappear one day.*/
123 #ifdef CONFIG_IRQ_RELEASE_METHOD
124 void (*release)(unsigned int irq, void *dev_id);
125 #endif
127 * For compatibility, ->typename is copied into ->name.
128 * Will disappear.
130 const char *typename;
133 struct timer_rand_state;
134 struct irq_2_iommu;
136 * struct irq_desc - interrupt descriptor
137 * @irq: interrupt number for this descriptor
138 * @timer_rand_state: pointer to timer rand state struct
139 * @kstat_irqs: irq stats per cpu
140 * @irq_2_iommu: iommu with this irq
141 * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()]
142 * @chip: low level interrupt hardware access
143 * @msi_desc: MSI descriptor
144 * @handler_data: per-IRQ data for the irq_chip methods
145 * @chip_data: platform-specific per-chip private data for the chip
146 * methods, to allow shared chip implementations
147 * @action: the irq action chain
148 * @status: status information
149 * @depth: disable-depth, for nested irq_disable() calls
150 * @wake_depth: enable depth, for multiple set_irq_wake() callers
151 * @irq_count: stats field to detect stalled irqs
152 * @last_unhandled: aging timer for unhandled count
153 * @irqs_unhandled: stats field for spurious unhandled interrupts
154 * @lock: locking for SMP
155 * @affinity: IRQ affinity on SMP
156 * @cpu: cpu index useful for balancing
157 * @pending_mask: pending rebalanced interrupts
158 * @dir: /proc/irq/ procfs entry
159 * @name: flow handler name for /proc/interrupts output
161 struct irq_desc {
162 unsigned int irq;
163 struct timer_rand_state *timer_rand_state;
164 unsigned int *kstat_irqs;
165 #ifdef CONFIG_INTR_REMAP
166 struct irq_2_iommu *irq_2_iommu;
167 #endif
168 irq_flow_handler_t handle_irq;
169 struct irq_chip *chip;
170 struct msi_desc *msi_desc;
171 void *handler_data;
172 void *chip_data;
173 struct irqaction *action; /* IRQ action list */
174 unsigned int status; /* IRQ status */
176 unsigned int depth; /* nested irq disables */
177 unsigned int wake_depth; /* nested wake enables */
178 unsigned int irq_count; /* For detecting broken IRQs */
179 unsigned long last_unhandled; /* Aging timer for unhandled count */
180 unsigned int irqs_unhandled;
181 spinlock_t lock;
182 #ifdef CONFIG_SMP
183 cpumask_var_t affinity;
184 unsigned int cpu;
185 #ifdef CONFIG_GENERIC_PENDING_IRQ
186 cpumask_var_t pending_mask;
187 #endif
188 #endif
189 #ifdef CONFIG_PROC_FS
190 struct proc_dir_entry *dir;
191 #endif
192 const char *name;
193 } ____cacheline_internodealigned_in_smp;
195 extern void arch_init_copy_chip_data(struct irq_desc *old_desc,
196 struct irq_desc *desc, int cpu);
197 extern void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc);
199 #ifndef CONFIG_SPARSE_IRQ
200 extern struct irq_desc irq_desc[NR_IRQS];
201 #else /* CONFIG_SPARSE_IRQ */
202 extern struct irq_desc *move_irq_desc(struct irq_desc *old_desc, int cpu);
203 #endif /* CONFIG_SPARSE_IRQ */
205 extern struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu);
207 static inline struct irq_desc *
208 irq_remap_to_desc(unsigned int irq, struct irq_desc *desc)
210 #ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC
211 return irq_to_desc(irq);
212 #else
213 return desc;
214 #endif
218 * Migration helpers for obsolete names, they will go away:
220 #define hw_interrupt_type irq_chip
221 #define no_irq_type no_irq_chip
222 typedef struct irq_desc irq_desc_t;
225 * Pick up the arch-dependent methods:
227 #include <asm/hw_irq.h>
229 extern int setup_irq(unsigned int irq, struct irqaction *new);
230 extern void remove_irq(unsigned int irq, struct irqaction *act);
232 #ifdef CONFIG_GENERIC_HARDIRQS
234 #ifdef CONFIG_SMP
236 #ifdef CONFIG_GENERIC_PENDING_IRQ
238 void move_native_irq(int irq);
239 void move_masked_irq(int irq);
241 #else /* CONFIG_GENERIC_PENDING_IRQ */
243 static inline void move_irq(int irq)
247 static inline void move_native_irq(int irq)
251 static inline void move_masked_irq(int irq)
255 #endif /* CONFIG_GENERIC_PENDING_IRQ */
257 #else /* CONFIG_SMP */
259 #define move_native_irq(x)
260 #define move_masked_irq(x)
262 #endif /* CONFIG_SMP */
264 extern int no_irq_affinity;
266 static inline int irq_balancing_disabled(unsigned int irq)
268 struct irq_desc *desc;
270 desc = irq_to_desc(irq);
271 return desc->status & IRQ_NO_BALANCING_MASK;
274 /* Handle irq action chains: */
275 extern irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action);
278 * Built-in IRQ handlers for various IRQ types,
279 * callable via desc->chip->handle_irq()
281 extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
282 extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
283 extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
284 extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
285 extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
286 extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
289 * Monolithic do_IRQ implementation.
291 #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
292 extern unsigned int __do_IRQ(unsigned int irq);
293 #endif
296 * Architectures call this to let the generic IRQ layer
297 * handle an interrupt. If the descriptor is attached to an
298 * irqchip-style controller then we call the ->handle_irq() handler,
299 * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
301 static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *desc)
303 #ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
304 desc->handle_irq(irq, desc);
305 #else
306 if (likely(desc->handle_irq))
307 desc->handle_irq(irq, desc);
308 else
309 __do_IRQ(irq);
310 #endif
313 static inline void generic_handle_irq(unsigned int irq)
315 generic_handle_irq_desc(irq, irq_to_desc(irq));
318 /* Handling of unhandled and spurious interrupts: */
319 extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
320 irqreturn_t action_ret);
322 /* Resending of interrupts :*/
323 void check_irq_resend(struct irq_desc *desc, unsigned int irq);
325 /* Enable/disable irq debugging output: */
326 extern int noirqdebug_setup(char *str);
328 /* Checks whether the interrupt can be requested by request_irq(): */
329 extern int can_request_irq(unsigned int irq, unsigned long irqflags);
331 /* Dummy irq-chip implementations: */
332 extern struct irq_chip no_irq_chip;
333 extern struct irq_chip dummy_irq_chip;
335 extern void
336 set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
337 irq_flow_handler_t handle);
338 extern void
339 set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
340 irq_flow_handler_t handle, const char *name);
342 extern void
343 __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
344 const char *name);
346 /* caller has locked the irq_desc and both params are valid */
347 static inline void __set_irq_handler_unlocked(int irq,
348 irq_flow_handler_t handler)
350 struct irq_desc *desc;
352 desc = irq_to_desc(irq);
353 desc->handle_irq = handler;
357 * Set a highlevel flow handler for a given IRQ:
359 static inline void
360 set_irq_handler(unsigned int irq, irq_flow_handler_t handle)
362 __set_irq_handler(irq, handle, 0, NULL);
366 * Set a highlevel chained flow handler for a given IRQ.
367 * (a chained handler is automatically enabled and set to
368 * IRQ_NOREQUEST and IRQ_NOPROBE)
370 static inline void
371 set_irq_chained_handler(unsigned int irq,
372 irq_flow_handler_t handle)
374 __set_irq_handler(irq, handle, 1, NULL);
377 extern void set_irq_noprobe(unsigned int irq);
378 extern void set_irq_probe(unsigned int irq);
380 /* Handle dynamic irq creation and destruction */
381 extern unsigned int create_irq_nr(unsigned int irq_want);
382 extern int create_irq(void);
383 extern void destroy_irq(unsigned int irq);
385 /* Test to see if a driver has successfully requested an irq */
386 static inline int irq_has_action(unsigned int irq)
388 struct irq_desc *desc = irq_to_desc(irq);
389 return desc->action != NULL;
392 /* Dynamic irq helper functions */
393 extern void dynamic_irq_init(unsigned int irq);
394 extern void dynamic_irq_cleanup(unsigned int irq);
396 /* Set/get chip/data for an IRQ: */
397 extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
398 extern int set_irq_data(unsigned int irq, void *data);
399 extern int set_irq_chip_data(unsigned int irq, void *data);
400 extern int set_irq_type(unsigned int irq, unsigned int type);
401 extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
403 #define get_irq_chip(irq) (irq_to_desc(irq)->chip)
404 #define get_irq_chip_data(irq) (irq_to_desc(irq)->chip_data)
405 #define get_irq_data(irq) (irq_to_desc(irq)->handler_data)
406 #define get_irq_msi(irq) (irq_to_desc(irq)->msi_desc)
408 #define get_irq_desc_chip(desc) ((desc)->chip)
409 #define get_irq_desc_chip_data(desc) ((desc)->chip_data)
410 #define get_irq_desc_data(desc) ((desc)->handler_data)
411 #define get_irq_desc_msi(desc) ((desc)->msi_desc)
413 #endif /* CONFIG_GENERIC_HARDIRQS */
415 #endif /* !CONFIG_S390 */
417 #ifdef CONFIG_SMP
419 * init_alloc_desc_masks - allocate cpumasks for irq_desc
420 * @desc: pointer to irq_desc struct
421 * @cpu: cpu which will be handling the cpumasks
422 * @boot: true if need bootmem
424 * Allocates affinity and pending_mask cpumask if required.
425 * Returns true if successful (or not required).
426 * Side effect: affinity has all bits set, pending_mask has all bits clear.
428 static inline bool init_alloc_desc_masks(struct irq_desc *desc, int cpu,
429 bool boot)
431 int node;
433 if (boot) {
434 alloc_bootmem_cpumask_var(&desc->affinity);
435 cpumask_setall(desc->affinity);
437 #ifdef CONFIG_GENERIC_PENDING_IRQ
438 alloc_bootmem_cpumask_var(&desc->pending_mask);
439 cpumask_clear(desc->pending_mask);
440 #endif
441 return true;
444 node = cpu_to_node(cpu);
446 if (!alloc_cpumask_var_node(&desc->affinity, GFP_ATOMIC, node))
447 return false;
448 cpumask_setall(desc->affinity);
450 #ifdef CONFIG_GENERIC_PENDING_IRQ
451 if (!alloc_cpumask_var_node(&desc->pending_mask, GFP_ATOMIC, node)) {
452 free_cpumask_var(desc->affinity);
453 return false;
455 cpumask_clear(desc->pending_mask);
456 #endif
457 return true;
461 * init_copy_desc_masks - copy cpumasks for irq_desc
462 * @old_desc: pointer to old irq_desc struct
463 * @new_desc: pointer to new irq_desc struct
465 * Insures affinity and pending_masks are copied to new irq_desc.
466 * If !CONFIG_CPUMASKS_OFFSTACK the cpumasks are embedded in the
467 * irq_desc struct so the copy is redundant.
470 static inline void init_copy_desc_masks(struct irq_desc *old_desc,
471 struct irq_desc *new_desc)
473 #ifdef CONFIG_CPUMASKS_OFFSTACK
474 cpumask_copy(new_desc->affinity, old_desc->affinity);
476 #ifdef CONFIG_GENERIC_PENDING_IRQ
477 cpumask_copy(new_desc->pending_mask, old_desc->pending_mask);
478 #endif
479 #endif
482 #else /* !CONFIG_SMP */
484 static inline bool init_alloc_desc_masks(struct irq_desc *desc, int cpu,
485 bool boot)
487 return true;
490 static inline void init_copy_desc_masks(struct irq_desc *old_desc,
491 struct irq_desc *new_desc)
495 #endif /* CONFIG_SMP */
497 #endif /* _LINUX_IRQ_H */