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ide: add IDE_HFLAG_NO_{IO32_BIT,UNMASK_IRQS} host flags
[linux-2.6/linux-2.6-openrd.git] / include / linux / ide.h
blob7b24358a6f8aeeaa17e286269c5ad050180c1578
1 #ifndef _IDE_H
2 #define _IDE_H
3 /*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
9 #include <linux/init.h>
10 #include <linux/ioport.h>
11 #include <linux/hdreg.h>
12 #include <linux/blkdev.h>
13 #include <linux/proc_fs.h>
14 #include <linux/interrupt.h>
15 #include <linux/bitops.h>
16 #include <linux/bio.h>
17 #include <linux/device.h>
18 #include <linux/pci.h>
19 #include <linux/completion.h>
20 #ifdef CONFIG_BLK_DEV_IDEACPI
21 #include <acpi/acpi.h>
22 #endif
23 #include <asm/byteorder.h>
24 #include <asm/system.h>
25 #include <asm/io.h>
26 #include <asm/semaphore.h>
27 #include <asm/mutex.h>
28
29 #if defined(CRIS) || defined(FRV)
30 # define SUPPORT_VLB_SYNC 0
31 #else
32 # define SUPPORT_VLB_SYNC 1
33 #endif
34
35 /*
36 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
37 * number.
38 */
39
40 #define IDE_NO_IRQ (-1)
41
42 typedef unsigned char byte; /* used everywhere */
43
44 /*
45 * Probably not wise to fiddle with these
46 */
47 #define ERROR_MAX 8 /* Max read/write errors per sector */
48 #define ERROR_RESET 3 /* Reset controller every 4th retry */
49 #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
50
51 /*
52 * Tune flags
53 */
54 #define IDE_TUNE_NOAUTO 2
55 #define IDE_TUNE_AUTO 1
56 #define IDE_TUNE_DEFAULT 0
57
58 /*
59 * state flags
60 */
61
62 #define DMA_PIO_RETRY 1 /* retrying in PIO */
63
64 #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
65 #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
66
67 /*
68 * Definitions for accessing IDE controller registers
69 */
70 #define IDE_NR_PORTS (10)
71
72 #define IDE_DATA_OFFSET (0)
73 #define IDE_ERROR_OFFSET (1)
74 #define IDE_NSECTOR_OFFSET (2)
75 #define IDE_SECTOR_OFFSET (3)
76 #define IDE_LCYL_OFFSET (4)
77 #define IDE_HCYL_OFFSET (5)
78 #define IDE_SELECT_OFFSET (6)
79 #define IDE_STATUS_OFFSET (7)
80 #define IDE_CONTROL_OFFSET (8)
81 #define IDE_IRQ_OFFSET (9)
82
83 #define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
84 #define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
85
86 #define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
87 #define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
88 #define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
89 #define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
90 #define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
91 #define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
92 #define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
93 #define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
94 #define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
95 #define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
96
97 #define IDE_FEATURE_REG IDE_ERROR_REG
98 #define IDE_COMMAND_REG IDE_STATUS_REG
99 #define IDE_ALTSTATUS_REG IDE_CONTROL_REG
100 #define IDE_IREASON_REG IDE_NSECTOR_REG
101 #define IDE_BCOUNTL_REG IDE_LCYL_REG
102 #define IDE_BCOUNTH_REG IDE_HCYL_REG
103
104 #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
105 #define BAD_R_STAT (BUSY_STAT | ERR_STAT)
106 #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
107 #define BAD_STAT (BAD_R_STAT | DRQ_STAT)
108 #define DRIVE_READY (READY_STAT | SEEK_STAT)
109
110 #define BAD_CRC (ABRT_ERR | ICRC_ERR)
111
112 #define SATA_NR_PORTS (3) /* 16 possible ?? */
113
114 #define SATA_STATUS_OFFSET (0)
115 #define SATA_STATUS_REG (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET])
116 #define SATA_ERROR_OFFSET (1)
117 #define SATA_ERROR_REG (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET])
118 #define SATA_CONTROL_OFFSET (2)
119 #define SATA_CONTROL_REG (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET])
120
121 #define SATA_MISC_OFFSET (0)
122 #define SATA_MISC_REG (HWIF(drive)->sata_misc[SATA_MISC_OFFSET])
123 #define SATA_PHY_OFFSET (1)
124 #define SATA_PHY_REG (HWIF(drive)->sata_misc[SATA_PHY_OFFSET])
125 #define SATA_IEN_OFFSET (2)
126 #define SATA_IEN_REG (HWIF(drive)->sata_misc[SATA_IEN_OFFSET])
127
128 /*
129 * Our Physical Region Descriptor (PRD) table should be large enough
130 * to handle the biggest I/O request we are likely to see. Since requests
131 * can have no more than 256 sectors, and since the typical blocksize is
132 * two or more sectors, we could get by with a limit of 128 entries here for
133 * the usual worst case. Most requests seem to include some contiguous blocks,
134 * further reducing the number of table entries required.
135 *
136 * The driver reverts to PIO mode for individual requests that exceed
137 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
138 * 100% of all crazy scenarios here is not necessary.
139 *
140 * As it turns out though, we must allocate a full 4KB page for this,
141 * so the two PRD tables (ide0 & ide1) will each get half of that,
142 * allowing each to have about 256 entries (8 bytes each) from this.
143 */
144 #define PRD_BYTES 8
145 #define PRD_ENTRIES 256
146
147 /*
148 * Some more useful definitions
149 */
150 #define PARTN_BITS 6 /* number of minor dev bits for partitions */
151 #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
152 #define SECTOR_SIZE 512
153 #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
154 #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
155
156 /*
157 * Timeouts for various operations:
158 */
159 #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
160 #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
161 #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
162 #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
163 #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
164 #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
165
166 /*
167 * Check for an interrupt and acknowledge the interrupt status
168 */
169 struct hwif_s;
170 typedef int (ide_ack_intr_t)(struct hwif_s *);
171
172 /*
173 * hwif_chipset_t is used to keep track of the specific hardware
174 * chipset used by each IDE interface, if known.
175 */
176 enum { ide_unknown, ide_generic, ide_pci,
177 ide_cmd640, ide_dtc2278, ide_ali14xx,
178 ide_qd65xx, ide_umc8672, ide_ht6560b,
179 ide_rz1000, ide_trm290,
180 ide_cmd646, ide_cy82c693, ide_4drives,
181 ide_pmac, ide_etrax100, ide_acorn,
182 ide_au1xxx, ide_forced
183 };
184
185 typedef u8 hwif_chipset_t;
186
187 /*
188 * Structure to hold all information about the location of this port
189 */
190 typedef struct hw_regs_s {
191 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
192 int irq; /* our irq number */
193 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
194 hwif_chipset_t chipset;
195 struct device *dev;
196 } hw_regs_t;
197
198 struct hwif_s * ide_find_port(unsigned long);
199 struct hwif_s *ide_deprecated_find_port(unsigned long);
200 void ide_init_port_data(struct hwif_s *, unsigned int);
201 void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
202
203 struct ide_drive_s;
204 int ide_register_hw(hw_regs_t *, void (*)(struct ide_drive_s *),
205 struct hwif_s **);
206
207 void ide_setup_ports( hw_regs_t *hw,
208 unsigned long base,
209 int *offsets,
210 unsigned long ctrl,
211 unsigned long intr,
212 ide_ack_intr_t *ack_intr,
213 #if 0
214 ide_io_ops_t *iops,
215 #endif
216 int irq);
217
218 static inline void ide_std_init_ports(hw_regs_t *hw,
219 unsigned long io_addr,
220 unsigned long ctl_addr)
221 {
222 unsigned int i;
223
224 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
225 hw->io_ports[i] = io_addr++;
226
227 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
228 }
229
230 #include <asm/ide.h>
231
232 #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
233 #undef MAX_HWIFS
234 #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
235 #endif
236
237 /* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
238 #ifndef IDE_ARCH_OBSOLETE_DEFAULTS
239 # define ide_default_io_base(index) (0)
240 # define ide_default_irq(base) (0)
241 # define ide_init_default_irq(base) (0)
242 #endif
243
244 #ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
245 static inline void ide_init_hwif_ports(hw_regs_t *hw,
246 unsigned long io_addr,
247 unsigned long ctl_addr,
248 int *irq)
249 {
250 if (!ctl_addr)
251 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
252 else
253 ide_std_init_ports(hw, io_addr, ctl_addr);
254
255 if (irq)
256 *irq = 0;
257
258 hw->io_ports[IDE_IRQ_OFFSET] = 0;
259
260 #ifdef CONFIG_PPC32
261 if (ppc_ide_md.ide_init_hwif)
262 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
263 #endif
264 }
265 #else
266 static inline void ide_init_hwif_ports(hw_regs_t *hw,
267 unsigned long io_addr,
268 unsigned long ctl_addr,
269 int *irq)
270 {
271 if (io_addr || ctl_addr)
272 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
273 }
274 #endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
275
276 /* Currently only m68k, apus and m8xx need it */
277 #ifndef IDE_ARCH_ACK_INTR
278 # define ide_ack_intr(hwif) (1)
279 #endif
280
281 /* Currently only Atari needs it */
282 #ifndef IDE_ARCH_LOCK
283 # define ide_release_lock() do {} while (0)
284 # define ide_get_lock(hdlr, data) do {} while (0)
285 #endif /* IDE_ARCH_LOCK */
286
287 /*
288 * Now for the data we need to maintain per-drive: ide_drive_t
289 */
290
291 #define ide_scsi 0x21
292 #define ide_disk 0x20
293 #define ide_optical 0x7
294 #define ide_cdrom 0x5
295 #define ide_tape 0x1
296 #define ide_floppy 0x0
297
298 /*
299 * Special Driver Flags
300 *
301 * set_geometry : respecify drive geometry
302 * recalibrate : seek to cyl 0
303 * set_multmode : set multmode count
304 * set_tune : tune interface for drive
305 * serviced : service command
306 * reserved : unused
307 */
308 typedef union {
309 unsigned all : 8;
310 struct {
311 unsigned set_geometry : 1;
312 unsigned recalibrate : 1;
313 unsigned set_multmode : 1;
314 unsigned set_tune : 1;
315 unsigned serviced : 1;
316 unsigned reserved : 3;
317 } b;
318 } special_t;
319
320 /*
321 * ATA-IDE Select Register, aka Device-Head
322 *
323 * head : always zeros here
324 * unit : drive select number: 0/1
325 * bit5 : always 1
326 * lba : using LBA instead of CHS
327 * bit7 : always 1
328 */
329 typedef union {
330 unsigned all : 8;
331 struct {
332 #if defined(__LITTLE_ENDIAN_BITFIELD)
333 unsigned head : 4;
334 unsigned unit : 1;
335 unsigned bit5 : 1;
336 unsigned lba : 1;
337 unsigned bit7 : 1;
338 #elif defined(__BIG_ENDIAN_BITFIELD)
339 unsigned bit7 : 1;
340 unsigned lba : 1;
341 unsigned bit5 : 1;
342 unsigned unit : 1;
343 unsigned head : 4;
344 #else
345 #error "Please fix <asm/byteorder.h>"
346 #endif
347 } b;
348 } select_t, ata_select_t;
349
350 /*
351 * Status returned from various ide_ functions
352 */
353 typedef enum {
354 ide_stopped, /* no drive operation was started */
355 ide_started, /* a drive operation was started, handler was set */
356 } ide_startstop_t;
357
358 struct ide_driver_s;
359 struct ide_settings_s;
360
361 #ifdef CONFIG_BLK_DEV_IDEACPI
362 struct ide_acpi_drive_link;
363 struct ide_acpi_hwif_link;
364 #endif
365
366 typedef struct ide_drive_s {
367 char name[4]; /* drive name, such as "hda" */
368 char driver_req[10]; /* requests specific driver */
369
370 struct request_queue *queue; /* request queue */
371
372 struct request *rq; /* current request */
373 struct ide_drive_s *next; /* circular list of hwgroup drives */
374 void *driver_data; /* extra driver data */
375 struct hd_driveid *id; /* drive model identification info */
376 #ifdef CONFIG_IDE_PROC_FS
377 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
378 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
379 #endif
380 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
381
382 unsigned long sleep; /* sleep until this time */
383 unsigned long service_start; /* time we started last request */
384 unsigned long service_time; /* service time of last request */
385 unsigned long timeout; /* max time to wait for irq */
386
387 special_t special; /* special action flags */
388 select_t select; /* basic drive/head select reg value */
389
390 u8 keep_settings; /* restore settings after drive reset */
391 u8 using_dma; /* disk is using dma for read/write */
392 u8 retry_pio; /* retrying dma capable host in pio */
393 u8 state; /* retry state */
394 u8 waiting_for_dma; /* dma currently in progress */
395 u8 unmask; /* okay to unmask other irqs */
396 u8 noflush; /* don't attempt flushes */
397 u8 dsc_overlap; /* DSC overlap */
398 u8 nice1; /* give potential excess bandwidth */
399
400 unsigned present : 1; /* drive is physically present */
401 unsigned dead : 1; /* device ejected hint */
402 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
403 unsigned noprobe : 1; /* from: hdx=noprobe */
404 unsigned removable : 1; /* 1 if need to do check_media_change */
405 unsigned attach : 1; /* needed for removable devices */
406 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
407 unsigned no_unmask : 1; /* disallow setting unmask bit */
408 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
409 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
410 unsigned nice0 : 1; /* give obvious excess bandwidth */
411 unsigned nice2 : 1; /* give a share in our own bandwidth */
412 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
413 unsigned nodma : 1; /* disallow DMA */
414 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
415 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
416 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
417 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
418 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
419 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
420 unsigned post_reset : 1;
421 unsigned udma33_warned : 1;
422
423 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
424 u8 quirk_list; /* considered quirky, set for a specific host */
425 u8 init_speed; /* transfer rate set at boot */
426 u8 current_speed; /* current transfer rate set */
427 u8 desired_speed; /* desired transfer rate set */
428 u8 dn; /* now wide spread use */
429 u8 wcache; /* status of write cache */
430 u8 acoustic; /* acoustic management */
431 u8 media; /* disk, cdrom, tape, floppy, ... */
432 u8 ctl; /* "normal" value for IDE_CONTROL_REG */
433 u8 ready_stat; /* min status value for drive ready */
434 u8 mult_count; /* current multiple sector setting */
435 u8 mult_req; /* requested multiple sector setting */
436 u8 tune_req; /* requested drive tuning setting */
437 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
438 u8 bad_wstat; /* used for ignoring WRERR_STAT */
439 u8 nowerr; /* used for ignoring WRERR_STAT */
440 u8 sect0; /* offset of first sector for DM6:DDO */
441 u8 head; /* "real" number of heads */
442 u8 sect; /* "real" sectors per track */
443 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
444 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
445
446 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
447 unsigned int cyl; /* "real" number of cyls */
448 unsigned int drive_data; /* used by set_pio_mode/selectproc */
449 unsigned int failures; /* current failure count */
450 unsigned int max_failures; /* maximum allowed failure count */
451 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
452
453 u64 capacity64; /* total number of sectors */
454
455 int lun; /* logical unit */
456 int crc_count; /* crc counter to reduce drive speed */
457 #ifdef CONFIG_BLK_DEV_IDEACPI
458 struct ide_acpi_drive_link *acpidata;
459 #endif
460 struct list_head list;
461 struct device gendev;
462 struct completion gendev_rel_comp; /* to deal with device release() */
463 } ide_drive_t;
464
465 #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
466
467 #define IDE_CHIPSET_PCI_MASK \
468 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
469 #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
470
471 struct ide_port_info;
472
473 typedef struct hwif_s {
474 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
475 struct hwif_s *mate; /* other hwif from same PCI chip */
476 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
477 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
478
479 char name[6]; /* name of interface, eg. "ide0" */
480
481 /* task file registers for pata and sata */
482 unsigned long io_ports[IDE_NR_PORTS];
483 unsigned long sata_scr[SATA_NR_PORTS];
484 unsigned long sata_misc[SATA_NR_PORTS];
485
486 ide_drive_t drives[MAX_DRIVES]; /* drive info */
487
488 u8 major; /* our major number */
489 u8 index; /* 0 for ide0; 1 for ide1; ... */
490 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
491 u8 straight8; /* Alan's straight 8 check */
492 u8 bus_state; /* power state of the IDE bus */
493
494 u32 host_flags;
495
496 u8 pio_mask;
497
498 u8 ultra_mask;
499 u8 mwdma_mask;
500 u8 swdma_mask;
501
502 u8 cbl; /* cable type */
503
504 hwif_chipset_t chipset; /* sub-module for tuning.. */
505
506 struct device *dev;
507
508 const struct ide_port_info *cds; /* chipset device struct */
509
510 ide_ack_intr_t *ack_intr;
511
512 void (*rw_disk)(ide_drive_t *, struct request *);
513
514 #if 0
515 ide_hwif_ops_t *hwifops;
516 #else
517 /* routine to program host for PIO mode */
518 void (*set_pio_mode)(ide_drive_t *, const u8);
519 /* routine to program host for DMA mode */
520 void (*set_dma_mode)(ide_drive_t *, const u8);
521 /* tweaks hardware to select drive */
522 void (*selectproc)(ide_drive_t *);
523 /* chipset polling based on hba specifics */
524 int (*reset_poll)(ide_drive_t *);
525 /* chipset specific changes to default for device-hba resets */
526 void (*pre_reset)(ide_drive_t *);
527 /* routine to reset controller after a disk reset */
528 void (*resetproc)(ide_drive_t *);
529 /* special host masking for drive selection */
530 void (*maskproc)(ide_drive_t *, int);
531 /* check host's drive quirk list */
532 void (*quirkproc)(ide_drive_t *);
533 /* driver soft-power interface */
534 int (*busproc)(ide_drive_t *, int);
535 #endif
536 u8 (*mdma_filter)(ide_drive_t *);
537 u8 (*udma_filter)(ide_drive_t *);
538
539 u8 (*cable_detect)(struct hwif_s *);
540
541 void (*ata_input_data)(ide_drive_t *, void *, u32);
542 void (*ata_output_data)(ide_drive_t *, void *, u32);
543
544 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
545 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
546
547 void (*dma_host_set)(ide_drive_t *, int);
548 int (*dma_setup)(ide_drive_t *);
549 void (*dma_exec_cmd)(ide_drive_t *, u8);
550 void (*dma_start)(ide_drive_t *);
551 int (*ide_dma_end)(ide_drive_t *drive);
552 int (*ide_dma_test_irq)(ide_drive_t *drive);
553 void (*ide_dma_clear_irq)(ide_drive_t *drive);
554 void (*dma_lost_irq)(ide_drive_t *drive);
555 void (*dma_timeout)(ide_drive_t *drive);
556
557 void (*OUTB)(u8 addr, unsigned long port);
558 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
559 void (*OUTW)(u16 addr, unsigned long port);
560 void (*OUTSW)(unsigned long port, void *addr, u32 count);
561 void (*OUTSL)(unsigned long port, void *addr, u32 count);
562
563 u8 (*INB)(unsigned long port);
564 u16 (*INW)(unsigned long port);
565 void (*INSW)(unsigned long port, void *addr, u32 count);
566 void (*INSL)(unsigned long port, void *addr, u32 count);
567
568 /* dma physical region descriptor table (cpu view) */
569 unsigned int *dmatable_cpu;
570 /* dma physical region descriptor table (dma view) */
571 dma_addr_t dmatable_dma;
572 /* Scatter-gather list used to build the above */
573 struct scatterlist *sg_table;
574 int sg_max_nents; /* Maximum number of entries in it */
575 int sg_nents; /* Current number of entries in it */
576 int sg_dma_direction; /* dma transfer direction */
577
578 /* data phase of the active command (currently only valid for PIO/DMA) */
579 int data_phase;
580
581 unsigned int nsect;
582 unsigned int nleft;
583 struct scatterlist *cursg;
584 unsigned int cursg_ofs;
585
586 int rqsize; /* max sectors per request */
587 int irq; /* our irq number */
588
589 unsigned long dma_base; /* base addr for dma ports */
590 unsigned long dma_command; /* dma command register */
591 unsigned long dma_vendor1; /* dma vendor 1 register */
592 unsigned long dma_status; /* dma status register */
593 unsigned long dma_vendor3; /* dma vendor 3 register */
594 unsigned long dma_prdtable; /* actual prd table address */
595
596 unsigned long config_data; /* for use by chipset-specific code */
597 unsigned long select_data; /* for use by chipset-specific code */
598
599 unsigned long extra_base; /* extra addr for dma ports */
600 unsigned extra_ports; /* number of extra dma ports */
601
602 unsigned noprobe : 1; /* don't probe for this interface */
603 unsigned present : 1; /* this interface exists */
604 unsigned hold : 1; /* this interface is always present */
605 unsigned serialized : 1; /* serialized all channel operation */
606 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
607 unsigned reset : 1; /* reset after probe */
608 unsigned auto_poll : 1; /* supports nop auto-poll */
609 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
610 unsigned mmio : 1; /* host uses MMIO */
611
612 struct device gendev;
613 struct completion gendev_rel_comp; /* To deal with device release() */
614
615 void *hwif_data; /* extra hwif data */
616
617 unsigned dma;
618
619 #ifdef CONFIG_BLK_DEV_IDEACPI
620 struct ide_acpi_hwif_link *acpidata;
621 #endif
622 } ____cacheline_internodealigned_in_smp ide_hwif_t;
623
624 /*
625 * internal ide interrupt handler type
626 */
627 typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
628 typedef int (ide_expiry_t)(ide_drive_t *);
629
630 /* used by ide-cd, ide-floppy, etc. */
631 typedef void (xfer_func_t)(ide_drive_t *, void *, u32);
632
633 typedef struct hwgroup_s {
634 /* irq handler, if active */
635 ide_startstop_t (*handler)(ide_drive_t *);
636
637 /* BOOL: protects all fields below */
638 volatile int busy;
639 /* BOOL: wake us up on timer expiry */
640 unsigned int sleeping : 1;
641 /* BOOL: polling active & poll_timeout field valid */
642 unsigned int polling : 1;
643 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
644 unsigned int resetting : 1;
645
646 /* current drive */
647 ide_drive_t *drive;
648 /* ptr to current hwif in linked-list */
649 ide_hwif_t *hwif;
650
651 /* current request */
652 struct request *rq;
653
654 /* failsafe timer */
655 struct timer_list timer;
656 /* timeout value during long polls */
657 unsigned long poll_timeout;
658 /* queried upon timeouts */
659 int (*expiry)(ide_drive_t *);
660
661 int req_gen;
662 int req_gen_timer;
663 } ide_hwgroup_t;
664
665 typedef struct ide_driver_s ide_driver_t;
666
667 extern struct mutex ide_setting_mtx;
668
669 int set_io_32bit(ide_drive_t *, int);
670 int set_pio_mode(ide_drive_t *, int);
671 int set_using_dma(ide_drive_t *, int);
672
673 #ifdef CONFIG_IDE_PROC_FS
674 /*
675 * configurable drive settings
676 */
677
678 #define TYPE_INT 0
679 #define TYPE_BYTE 1
680 #define TYPE_SHORT 2
681
682 #define SETTING_READ (1 << 0)
683 #define SETTING_WRITE (1 << 1)
684 #define SETTING_RW (SETTING_READ | SETTING_WRITE)
685
686 typedef int (ide_procset_t)(ide_drive_t *, int);
687 typedef struct ide_settings_s {
688 char *name;
689 int rw;
690 int data_type;
691 int min;
692 int max;
693 int mul_factor;
694 int div_factor;
695 void *data;
696 ide_procset_t *set;
697 int auto_remove;
698 struct ide_settings_s *next;
699 } ide_settings_t;
700
701 int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
702
703 /*
704 * /proc/ide interface
705 */
706 typedef struct {
707 const char *name;
708 mode_t mode;
709 read_proc_t *read_proc;
710 write_proc_t *write_proc;
711 } ide_proc_entry_t;
712
713 void proc_ide_create(void);
714 void proc_ide_destroy(void);
715 void ide_proc_register_port(ide_hwif_t *);
716 void ide_proc_unregister_port(ide_hwif_t *);
717 void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
718 void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
719
720 void ide_add_generic_settings(ide_drive_t *);
721
722 read_proc_t proc_ide_read_capacity;
723 read_proc_t proc_ide_read_geometry;
724
725 #ifdef CONFIG_BLK_DEV_IDEPCI
726 void ide_pci_create_host_proc(const char *, get_info_t *);
727 #endif
728
729 /*
730 * Standard exit stuff:
731 */
732 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
733 { \
734 len -= off; \
735 if (len < count) { \
736 *eof = 1; \
737 if (len <= 0) \
738 return 0; \
739 } else \
740 len = count; \
741 *start = page + off; \
742 return len; \
743 }
744 #else
745 static inline void proc_ide_create(void) { ; }
746 static inline void proc_ide_destroy(void) { ; }
747 static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
748 static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
749 static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
750 static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
751 static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
752 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
753 #endif
754
755 /*
756 * Power Management step value (rq->pm->pm_step).
757 *
758 * The step value starts at 0 (ide_pm_state_start_suspend) for a
759 * suspend operation or 1000 (ide_pm_state_start_resume) for a
760 * resume operation.
761 *
762 * For each step, the core calls the subdriver start_power_step() first.
763 * This can return:
764 * - ide_stopped : In this case, the core calls us back again unless
765 * step have been set to ide_power_state_completed.
766 * - ide_started : In this case, the channel is left busy until an
767 * async event (interrupt) occurs.
768 * Typically, start_power_step() will issue a taskfile request with
769 * do_rw_taskfile().
770 *
771 * Upon reception of the interrupt, the core will call complete_power_step()
772 * with the error code if any. This routine should update the step value
773 * and return. It should not start a new request. The core will call
774 * start_power_step for the new step value, unless step have been set to
775 * ide_power_state_completed.
776 *
777 * Subdrivers are expected to define their own additional power
778 * steps from 1..999 for suspend and from 1001..1999 for resume,
779 * other values are reserved for future use.
780 */
781
782 enum {
783 ide_pm_state_completed = -1,
784 ide_pm_state_start_suspend = 0,
785 ide_pm_state_start_resume = 1000,
786 };
787
788 /*
789 * Subdrivers support.
790 *
791 * The gendriver.owner field should be set to the module owner of this driver.
792 * The gendriver.name field should be set to the name of this driver
793 */
794 struct ide_driver_s {
795 const char *version;
796 u8 media;
797 unsigned supports_dsc_overlap : 1;
798 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
799 int (*end_request)(ide_drive_t *, int, int);
800 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
801 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
802 struct device_driver gen_driver;
803 int (*probe)(ide_drive_t *);
804 void (*remove)(ide_drive_t *);
805 void (*resume)(ide_drive_t *);
806 void (*shutdown)(ide_drive_t *);
807 #ifdef CONFIG_IDE_PROC_FS
808 ide_proc_entry_t *proc;
809 #endif
810 };
811
812 #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
813
814 int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
815
816 /*
817 * ide_hwifs[] is the master data structure used to keep track
818 * of just about everything in ide.c. Whenever possible, routines
819 * should be using pointers to a drive (ide_drive_t *) or
820 * pointers to a hwif (ide_hwif_t *), rather than indexing this
821 * structure directly (the allocation/layout may change!).
822 *
823 */
824 #ifndef _IDE_C
825 extern ide_hwif_t ide_hwifs[]; /* master data repository */
826 #endif
827 extern int noautodma;
828
829 extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
830 int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
831 int uptodate, int nr_sectors);
832
833 extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
834
835 void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
836 ide_expiry_t *);
837
838 ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
839
840 ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
841
842 ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
843
844 extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
845
846 extern void ide_fix_driveid(struct hd_driveid *);
847
848 extern void ide_fixstring(u8 *, const int, const int);
849
850 int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
851
852 extern ide_startstop_t ide_do_reset (ide_drive_t *);
853
854 extern void ide_init_drive_cmd (struct request *rq);
855
856 /*
857 * "action" parameter type for ide_do_drive_cmd() below.
858 */
859 typedef enum {
860 ide_wait, /* insert rq at end of list, and wait for it */
861 ide_preempt, /* insert rq in front of current request */
862 ide_head_wait, /* insert rq in front of current request and wait for it */
863 ide_end /* insert rq at end of list, but don't wait for it */
864 } ide_action_t;
865
866 extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
867
868 extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
869
870 enum {
871 IDE_TFLAG_LBA48 = (1 << 0),
872 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
873 IDE_TFLAG_FLAGGED = (1 << 2),
874 IDE_TFLAG_OUT_DATA = (1 << 3),
875 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
876 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
877 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
878 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
879 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
880 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
881 IDE_TFLAG_OUT_HOB_NSECT |
882 IDE_TFLAG_OUT_HOB_LBAL |
883 IDE_TFLAG_OUT_HOB_LBAM |
884 IDE_TFLAG_OUT_HOB_LBAH,
885 IDE_TFLAG_OUT_FEATURE = (1 << 9),
886 IDE_TFLAG_OUT_NSECT = (1 << 10),
887 IDE_TFLAG_OUT_LBAL = (1 << 11),
888 IDE_TFLAG_OUT_LBAM = (1 << 12),
889 IDE_TFLAG_OUT_LBAH = (1 << 13),
890 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
891 IDE_TFLAG_OUT_NSECT |
892 IDE_TFLAG_OUT_LBAL |
893 IDE_TFLAG_OUT_LBAM |
894 IDE_TFLAG_OUT_LBAH,
895 IDE_TFLAG_OUT_DEVICE = (1 << 14),
896 IDE_TFLAG_WRITE = (1 << 15),
897 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
898 IDE_TFLAG_IN_DATA = (1 << 17),
899 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
900 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
901 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
902 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
903 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
904 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
905 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
906 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
907 IDE_TFLAG_IN_HOB_LBAM |
908 IDE_TFLAG_IN_HOB_LBAH,
909 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
910 IDE_TFLAG_IN_HOB_NSECT |
911 IDE_TFLAG_IN_HOB_LBA,
912 IDE_TFLAG_IN_NSECT = (1 << 25),
913 IDE_TFLAG_IN_LBAL = (1 << 26),
914 IDE_TFLAG_IN_LBAM = (1 << 27),
915 IDE_TFLAG_IN_LBAH = (1 << 28),
916 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
917 IDE_TFLAG_IN_LBAM |
918 IDE_TFLAG_IN_LBAH,
919 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
920 IDE_TFLAG_IN_LBA,
921 IDE_TFLAG_IN_DEVICE = (1 << 29),
922 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
923 IDE_TFLAG_IN_HOB,
924 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
925 IDE_TFLAG_IN_TF,
926 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
927 IDE_TFLAG_IN_DEVICE,
928 /* force 16-bit I/O operations */
929 IDE_TFLAG_IO_16BIT = (1 << 30),
930 };
931
932 struct ide_taskfile {
933 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
934
935 u8 hob_feature; /* 1-5: additional data to support LBA48 */
936 u8 hob_nsect;
937 u8 hob_lbal;
938 u8 hob_lbam;
939 u8 hob_lbah;
940
941 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
942
943 union { /*  7: */
944 u8 error; /* read: error */
945 u8 feature; /* write: feature */
946 };
947
948 u8 nsect; /* 8: number of sectors */
949 u8 lbal; /* 9: LBA low */
950 u8 lbam; /* 10: LBA mid */
951 u8 lbah; /* 11: LBA high */
952
953 u8 device; /* 12: device select */
954
955 union { /* 13: */
956 u8 status; /*  read: status  */
957 u8 command; /* write: command */
958 };
959 };
960
961 typedef struct ide_task_s {
962 union {
963 struct ide_taskfile tf;
964 u8 tf_array[14];
965 };
966 u32 tf_flags;
967 int data_phase;
968 struct request *rq; /* copy of request */
969 void *special; /* valid_t generally */
970 } ide_task_t;
971
972 void ide_tf_load(ide_drive_t *, ide_task_t *);
973 void ide_tf_read(ide_drive_t *, ide_task_t *);
974
975 extern void SELECT_DRIVE(ide_drive_t *);
976 extern void SELECT_MASK(ide_drive_t *, int);
977
978 extern int drive_is_ready(ide_drive_t *);
979
980 void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
981
982 ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
983
984 void task_end_request(ide_drive_t *, struct request *, u8);
985
986 int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
987 int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
988
989 int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
990 int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
991 int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
992
993 extern int system_bus_clock(void);
994
995 extern int ide_driveid_update(ide_drive_t *);
996 extern int ide_ata66_check(ide_drive_t *, ide_task_t *);
997 extern int ide_config_drive_speed(ide_drive_t *, u8);
998 extern u8 eighty_ninty_three (ide_drive_t *);
999 extern int set_transfer(ide_drive_t *, ide_task_t *);
1000 extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1001
1002 extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1003
1004 extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1005
1006 extern int ide_spin_wait_hwgroup(ide_drive_t *);
1007 extern void ide_timer_expiry(unsigned long);
1008 extern irqreturn_t ide_intr(int irq, void *dev_id);
1009 extern void do_ide_request(struct request_queue *);
1010
1011 void ide_init_disk(struct gendisk *, ide_drive_t *);
1012
1013 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1014 extern int ide_scan_direction;
1015 extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1016 #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
1017 #else
1018 #define ide_pci_register_driver(d) pci_register_driver(d)
1019 #endif
1020
1021 void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
1022 void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1023
1024 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1025 void ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
1026 #else
1027 static inline void ide_hwif_setup_dma(ide_hwif_t *hwif,
1028 const struct ide_port_info *d) { }
1029 #endif
1030
1031 extern void default_hwif_iops(ide_hwif_t *);
1032 extern void default_hwif_mmiops(ide_hwif_t *);
1033 extern void default_hwif_transport(ide_hwif_t *);
1034
1035 typedef struct ide_pci_enablebit_s {
1036 u8 reg; /* byte pci reg holding the enable-bit */
1037 u8 mask; /* mask to isolate the enable-bit */
1038 u8 val; /* value of masked reg when "enabled" */
1039 } ide_pci_enablebit_t;
1040
1041 enum {
1042 /* Uses ISA control ports not PCI ones. */
1043 IDE_HFLAG_ISA_PORTS = (1 << 0),
1044 /* single port device */
1045 IDE_HFLAG_SINGLE = (1 << 1),
1046 /* don't use legacy PIO blacklist */
1047 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1048 /* don't use conservative PIO "downgrade" */
1049 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
1050 /* use PIO8/9 for prefetch off/on */
1051 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1052 /* use PIO6/7 for fast-devsel off/on */
1053 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1054 /* use 100-102 and 200-202 PIO values to set DMA modes */
1055 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
1056 /*
1057 * keep DMA setting when programming PIO mode, may be used only
1058 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1059 */
1060 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
1061 /* program host for the transfer mode after programming device */
1062 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1063 /* don't program host/device for the transfer mode ("smart" hosts) */
1064 IDE_HFLAG_NO_SET_MODE = (1 << 9),
1065 /* trust BIOS for programming chipset/device for DMA */
1066 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1067 /* host uses VDMA (tied with IDE_HFLAG_CS5520 for now) */
1068 IDE_HFLAG_VDMA = (1 << 11),
1069 /* ATAPI DMA is unsupported */
1070 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
1071 /* set if host is a "bootable" controller */
1072 IDE_HFLAG_BOOTABLE = (1 << 13),
1073 /* host doesn't support DMA */
1074 IDE_HFLAG_NO_DMA = (1 << 14),
1075 /* check if host is PCI IDE device before allowing DMA */
1076 IDE_HFLAG_NO_AUTODMA = (1 << 15),
1077 /* don't autotune PIO */
1078 IDE_HFLAG_NO_AUTOTUNE = (1 << 16),
1079 /* host is CS5510/CS5520 */
1080 IDE_HFLAG_CS5520 = IDE_HFLAG_VDMA,
1081 /* no LBA48 */
1082 IDE_HFLAG_NO_LBA48 = (1 << 17),
1083 /* no LBA48 DMA */
1084 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
1085 /* data FIFO is cleared by an error */
1086 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1087 /* serialize ports */
1088 IDE_HFLAG_SERIALIZE = (1 << 20),
1089 /* use legacy IRQs */
1090 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
1091 /* force use of legacy IRQs */
1092 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
1093 /* limit LBA48 requests to 256 sectors */
1094 IDE_HFLAG_RQSIZE_256 = (1 << 23),
1095 /* use 32-bit I/O ops */
1096 IDE_HFLAG_IO_32BIT = (1 << 24),
1097 /* unmask IRQs */
1098 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
1099 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
1100 /* host is CY82C693 */
1101 IDE_HFLAG_CY82C693 = (1 << 27),
1102 /* force host out of "simplex" mode */
1103 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
1104 /* DSC overlap is unsupported */
1105 IDE_HFLAG_NO_DSC = (1 << 29),
1106 /* never use 32-bit I/O ops */
1107 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1108 /* never unmask IRQs */
1109 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1110 };
1111
1112 #ifdef CONFIG_BLK_DEV_OFFBOARD
1113 # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1114 #else
1115 # define IDE_HFLAG_OFF_BOARD 0
1116 #endif
1117
1118 struct ide_port_info {
1119 char *name;
1120 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1121 void (*init_iops)(ide_hwif_t *);
1122 void (*init_hwif)(ide_hwif_t *);
1123 void (*init_dma)(ide_hwif_t *, unsigned long);
1124 ide_pci_enablebit_t enablebits[2];
1125 hwif_chipset_t chipset;
1126 u8 extra;
1127 u32 host_flags;
1128 u8 pio_mask;
1129 u8 swdma_mask;
1130 u8 mwdma_mask;
1131 u8 udma_mask;
1132 };
1133
1134 int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1135 int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1136
1137 void ide_map_sg(ide_drive_t *, struct request *);
1138 void ide_init_sg_cmd(ide_drive_t *, struct request *);
1139
1140 #define BAD_DMA_DRIVE 0
1141 #define GOOD_DMA_DRIVE 1
1142
1143 struct drive_list_entry {
1144 const char *id_model;
1145 const char *id_firmware;
1146 };
1147
1148 int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
1149
1150 #ifdef CONFIG_BLK_DEV_IDEDMA
1151 int __ide_dma_bad_drive(ide_drive_t *);
1152 int ide_id_dma_bug(ide_drive_t *);
1153
1154 u8 ide_find_dma_mode(ide_drive_t *, u8);
1155
1156 static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1157 {
1158 return ide_find_dma_mode(drive, XFER_UDMA_6);
1159 }
1160
1161 void ide_dma_off_quietly(ide_drive_t *);
1162 void ide_dma_off(ide_drive_t *);
1163 void ide_dma_on(ide_drive_t *);
1164 int ide_set_dma(ide_drive_t *);
1165 ide_startstop_t ide_dma_intr(ide_drive_t *);
1166
1167 int ide_build_sglist(ide_drive_t *, struct request *);
1168 void ide_destroy_dmatable(ide_drive_t *);
1169
1170 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1171 extern int ide_build_dmatable(ide_drive_t *, struct request *);
1172 extern int ide_release_dma(ide_hwif_t *);
1173 extern void ide_setup_dma(ide_hwif_t *, unsigned long);
1174
1175 void ide_dma_host_set(ide_drive_t *, int);
1176 extern int ide_dma_setup(ide_drive_t *);
1177 extern void ide_dma_start(ide_drive_t *);
1178 extern int __ide_dma_end(ide_drive_t *);
1179 extern void ide_dma_lost_irq(ide_drive_t *);
1180 extern void ide_dma_timeout(ide_drive_t *);
1181 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
1182
1183 #else
1184 static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
1185 static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
1186 static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
1187 static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
1188 static inline void ide_dma_off(ide_drive_t *drive) { ; }
1189 static inline void ide_dma_on(ide_drive_t *drive) { ; }
1190 static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
1191 static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1192 #endif /* CONFIG_BLK_DEV_IDEDMA */
1193
1194 #ifndef CONFIG_BLK_DEV_IDEDMA_PCI
1195 static inline void ide_release_dma(ide_hwif_t *drive) {;}
1196 #endif
1197
1198 #ifdef CONFIG_BLK_DEV_IDEACPI
1199 extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1200 extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1201 extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1202 extern void ide_acpi_init(ide_hwif_t *hwif);
1203 extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
1204 #else
1205 static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1206 static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1207 static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1208 static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
1209 static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
1210 #endif
1211
1212 void ide_remove_port_from_hwgroup(ide_hwif_t *);
1213 extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1214 extern void ide_hwif_release_regions(ide_hwif_t* hwif);
1215 void ide_unregister(unsigned int, int, int);
1216
1217 void ide_register_region(struct gendisk *);
1218 void ide_unregister_region(struct gendisk *);
1219
1220 void ide_undecoded_slave(ide_drive_t *);
1221
1222 int ide_device_add_all(u8 *idx, const struct ide_port_info *);
1223 int ide_device_add(u8 idx[4], const struct ide_port_info *);
1224
1225 static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1226 {
1227 return hwif->hwif_data;
1228 }
1229
1230 static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1231 {
1232 hwif->hwif_data = data;
1233 }
1234
1235 const char *ide_xfer_verbose(u8 mode);
1236 extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1237 extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1238
1239 static inline int ide_dev_has_iordy(struct hd_driveid *id)
1240 {
1241 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1242 }
1243
1244 static inline int ide_dev_is_sata(struct hd_driveid *id)
1245 {
1246 /*
1247 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1248 * verifying that word 80 by casting it to a signed type --
1249 * this trick allows us to filter out the reserved values of
1250 * 0x0000 and 0xffff along with the earlier ATA revisions...
1251 */
1252 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1253 return 1;
1254 return 0;
1255 }
1256
1257 u64 ide_get_lba_addr(struct ide_taskfile *, int);
1258 u8 ide_dump_status(ide_drive_t *, const char *, u8);
1259
1260 typedef struct ide_pio_timings_s {
1261 int setup_time; /* Address setup (ns) minimum */
1262 int active_time; /* Active pulse (ns) minimum */
1263 int cycle_time; /* Cycle time (ns) minimum = */
1264 /* active + recovery (+ setup for some chips) */
1265 } ide_pio_timings_t;
1266
1267 unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
1268 u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1269 extern const ide_pio_timings_t ide_pio_timings[6];
1270
1271 int ide_set_pio_mode(ide_drive_t *, u8);
1272 int ide_set_dma_mode(ide_drive_t *, u8);
1273
1274 void ide_set_pio(ide_drive_t *, u8);
1275
1276 static inline void ide_set_max_pio(ide_drive_t *drive)
1277 {
1278 ide_set_pio(drive, 255);
1279 }
1280
1281 extern spinlock_t ide_lock;
1282 extern struct mutex ide_cfg_mtx;
1283 /*
1284 * Structure locking:
1285 *
1286 * ide_cfg_mtx and ide_lock together protect changes to
1287 * ide_hwif_t->{next,hwgroup}
1288 * ide_drive_t->next
1289 *
1290 * ide_hwgroup_t->busy: ide_lock
1291 * ide_hwgroup_t->hwif: ide_lock
1292 * ide_hwif_t->mate: constant, no locking
1293 * ide_drive_t->hwif: constant, no locking
1294 */
1295
1296 #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1297
1298 extern struct bus_type ide_bus_type;
1299
1300 /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1301 #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1302
1303 /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1304 #define ide_id_has_flush_cache_ext(id) \
1305 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1306
1307 static inline void ide_dump_identify(u8 *id)
1308 {
1309 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1310 }
1311
1312 static inline int hwif_to_node(ide_hwif_t *hwif)
1313 {
1314 struct pci_dev *dev = to_pci_dev(hwif->dev);
1315 return dev ? pcibus_to_node(dev->bus) : -1;
1316 }
1317
1318 static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1319 {
1320 ide_hwif_t *hwif = HWIF(drive);
1321
1322 return &hwif->drives[(drive->dn ^ 1) & 1];
1323 }
1324
1325 static inline void ide_set_irq(ide_drive_t *drive, int on)
1326 {
1327 drive->hwif->OUTB(drive->ctl | (on ? 0 : 2), IDE_CONTROL_REG);
1328 }
1329
1330 #endif /* _IDE_H */
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