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[POWERPC] cpm_uart: Be an of_platform device when CONFIG_PPC_CPM_NEW_BINDING is set.
[linux-2.6/linux-2.6-openrd.git] / drivers / serial / cpm_uart / cpm_uart_core.c
blob8564ba2f3ec2c31c701808b5a4d8d24868ea23c2
1 /*
2 * linux/drivers/serial/cpm_uart.c
3 *
4 * Driver for CPM (SCC/SMC) serial ports; core driver
5 *
6 * Based on arch/ppc/cpm2_io/uart.c by Dan Malek
7 * Based on ppc8xx.c by Thomas Gleixner
8 * Based on drivers/serial/amba.c by Russell King
9 *
10 * Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
11 * Pantelis Antoniou (panto@intracom.gr) (CPM1)
12 *
13 * Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
14 * (C) 2004 Intracom, S.A.
15 * (C) 2005-2006 MontaVista Software, Inc.
16 * Vitaly Bordug <vbordug@ru.mvista.com>
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 *
32 */
33
34 #include <linux/module.h>
35 #include <linux/tty.h>
36 #include <linux/ioport.h>
37 #include <linux/init.h>
38 #include <linux/serial.h>
39 #include <linux/console.h>
40 #include <linux/sysrq.h>
41 #include <linux/device.h>
42 #include <linux/bootmem.h>
43 #include <linux/dma-mapping.h>
44 #include <linux/fs_uart_pd.h>
45
46 #include <asm/io.h>
47 #include <asm/irq.h>
48 #include <asm/delay.h>
49 #include <asm/fs_pd.h>
50 #include <asm/udbg.h>
51
52 #ifdef CONFIG_PPC_CPM_NEW_BINDING
53 #include <linux/of_platform.h>
54 #endif
55
56 #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
57 #define SUPPORT_SYSRQ
58 #endif
59
60 #include <linux/serial_core.h>
61 #include <linux/kernel.h>
62
63 #include "cpm_uart.h"
64
65
66 /**************************************************************/
67
68 static int cpm_uart_tx_pump(struct uart_port *port);
69 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo);
70 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo);
71 static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
72
73 /**************************************************************/
74
75 #ifndef CONFIG_PPC_CPM_NEW_BINDING
76 /* Track which ports are configured as uarts */
77 int cpm_uart_port_map[UART_NR];
78 /* How many ports did we config as uarts */
79 int cpm_uart_nr;
80
81 /* Place-holder for board-specific stuff */
82 struct platform_device* __attribute__ ((weak)) __init
83 early_uart_get_pdev(int index)
84 {
85 return NULL;
86 }
87
88
89 static void cpm_uart_count(void)
90 {
91 cpm_uart_nr = 0;
92 #ifdef CONFIG_SERIAL_CPM_SMC1
93 cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1;
94 #endif
95 #ifdef CONFIG_SERIAL_CPM_SMC2
96 cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2;
97 #endif
98 #ifdef CONFIG_SERIAL_CPM_SCC1
99 cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1;
100 #endif
101 #ifdef CONFIG_SERIAL_CPM_SCC2
102 cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2;
103 #endif
104 #ifdef CONFIG_SERIAL_CPM_SCC3
105 cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3;
106 #endif
107 #ifdef CONFIG_SERIAL_CPM_SCC4
108 cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4;
109 #endif
110 }
111
112 /* Get UART number by its id */
113 static int cpm_uart_id2nr(int id)
114 {
115 int i;
116 if (id < UART_NR) {
117 for (i=0; i<UART_NR; i++) {
118 if (cpm_uart_port_map[i] == id)
119 return i;
120 }
121 }
122
123 /* not found or invalid argument */
124 return -1;
125 }
126 #endif
127
128 /*
129 * Check, if transmit buffers are processed
130 */
131 static unsigned int cpm_uart_tx_empty(struct uart_port *port)
132 {
133 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
134 volatile cbd_t *bdp = pinfo->tx_bd_base;
135 int ret = 0;
136
137 while (1) {
138 if (bdp->cbd_sc & BD_SC_READY)
139 break;
140
141 if (bdp->cbd_sc & BD_SC_WRAP) {
142 ret = TIOCSER_TEMT;
143 break;
144 }
145 bdp++;
146 }
147
148 pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret);
149
150 return ret;
151 }
152
153 static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
154 {
155 /* Whee. Do nothing. */
156 }
157
158 static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
159 {
160 /* Whee. Do nothing. */
161 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
162 }
163
164 /*
165 * Stop transmitter
166 */
167 static void cpm_uart_stop_tx(struct uart_port *port)
168 {
169 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
170 volatile smc_t *smcp = pinfo->smcp;
171 volatile scc_t *sccp = pinfo->sccp;
172
173 pr_debug("CPM uart[%d]:stop tx\n", port->line);
174
175 if (IS_SMC(pinfo))
176 smcp->smc_smcm &= ~SMCM_TX;
177 else
178 sccp->scc_sccm &= ~UART_SCCM_TX;
179 }
180
181 /*
182 * Start transmitter
183 */
184 static void cpm_uart_start_tx(struct uart_port *port)
185 {
186 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
187 volatile smc_t *smcp = pinfo->smcp;
188 volatile scc_t *sccp = pinfo->sccp;
189
190 pr_debug("CPM uart[%d]:start tx\n", port->line);
191
192 if (IS_SMC(pinfo)) {
193 if (smcp->smc_smcm & SMCM_TX)
194 return;
195 } else {
196 if (sccp->scc_sccm & UART_SCCM_TX)
197 return;
198 }
199
200 if (cpm_uart_tx_pump(port) != 0) {
201 if (IS_SMC(pinfo)) {
202 smcp->smc_smcm |= SMCM_TX;
203 } else {
204 sccp->scc_sccm |= UART_SCCM_TX;
205 }
206 }
207 }
208
209 /*
210 * Stop receiver
211 */
212 static void cpm_uart_stop_rx(struct uart_port *port)
213 {
214 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
215 volatile smc_t *smcp = pinfo->smcp;
216 volatile scc_t *sccp = pinfo->sccp;
217
218 pr_debug("CPM uart[%d]:stop rx\n", port->line);
219
220 if (IS_SMC(pinfo))
221 smcp->smc_smcm &= ~SMCM_RX;
222 else
223 sccp->scc_sccm &= ~UART_SCCM_RX;
224 }
225
226 /*
227 * Enable Modem status interrupts
228 */
229 static void cpm_uart_enable_ms(struct uart_port *port)
230 {
231 pr_debug("CPM uart[%d]:enable ms\n", port->line);
232 }
233
234 /*
235 * Generate a break.
236 */
237 static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
238 {
239 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
240
241 pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
242 break_state);
243
244 if (break_state)
245 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
246 else
247 cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
248 }
249
250 /*
251 * Transmit characters, refill buffer descriptor, if possible
252 */
253 static void cpm_uart_int_tx(struct uart_port *port)
254 {
255 pr_debug("CPM uart[%d]:TX INT\n", port->line);
256
257 cpm_uart_tx_pump(port);
258 }
259
260 /*
261 * Receive characters
262 */
263 static void cpm_uart_int_rx(struct uart_port *port)
264 {
265 int i;
266 unsigned char ch, *cp;
267 struct tty_struct *tty = port->info->tty;
268 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
269 volatile cbd_t *bdp;
270 u16 status;
271 unsigned int flg;
272
273 pr_debug("CPM uart[%d]:RX INT\n", port->line);
274
275 /* Just loop through the closed BDs and copy the characters into
276 * the buffer.
277 */
278 bdp = pinfo->rx_cur;
279 for (;;) {
280 /* get status */
281 status = bdp->cbd_sc;
282 /* If this one is empty, return happy */
283 if (status & BD_SC_EMPTY)
284 break;
285
286 /* get number of characters, and check spce in flip-buffer */
287 i = bdp->cbd_datlen;
288
289 /* If we have not enough room in tty flip buffer, then we try
290 * later, which will be the next rx-interrupt or a timeout
291 */
292 if(tty_buffer_request_room(tty, i) < i) {
293 printk(KERN_WARNING "No room in flip buffer\n");
294 return;
295 }
296
297 /* get pointer */
298 cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
299
300 /* loop through the buffer */
301 while (i-- > 0) {
302 ch = *cp++;
303 port->icount.rx++;
304 flg = TTY_NORMAL;
305
306 if (status &
307 (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
308 goto handle_error;
309 if (uart_handle_sysrq_char(port, ch))
310 continue;
311
312 error_return:
313 tty_insert_flip_char(tty, ch, flg);
314
315 } /* End while (i--) */
316
317 /* This BD is ready to be used again. Clear status. get next */
318 bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
319 bdp->cbd_sc |= BD_SC_EMPTY;
320
321 if (bdp->cbd_sc & BD_SC_WRAP)
322 bdp = pinfo->rx_bd_base;
323 else
324 bdp++;
325
326 } /* End for (;;) */
327
328 /* Write back buffer pointer */
329 pinfo->rx_cur = (volatile cbd_t *) bdp;
330
331 /* activate BH processing */
332 tty_flip_buffer_push(tty);
333
334 return;
335
336 /* Error processing */
337
338 handle_error:
339 /* Statistics */
340 if (status & BD_SC_BR)
341 port->icount.brk++;
342 if (status & BD_SC_PR)
343 port->icount.parity++;
344 if (status & BD_SC_FR)
345 port->icount.frame++;
346 if (status & BD_SC_OV)
347 port->icount.overrun++;
348
349 /* Mask out ignored conditions */
350 status &= port->read_status_mask;
351
352 /* Handle the remaining ones */
353 if (status & BD_SC_BR)
354 flg = TTY_BREAK;
355 else if (status & BD_SC_PR)
356 flg = TTY_PARITY;
357 else if (status & BD_SC_FR)
358 flg = TTY_FRAME;
359
360 /* overrun does not affect the current character ! */
361 if (status & BD_SC_OV) {
362 ch = 0;
363 flg = TTY_OVERRUN;
364 /* We skip this buffer */
365 /* CHECK: Is really nothing senseful there */
366 /* ASSUMPTION: it contains nothing valid */
367 i = 0;
368 }
369 #ifdef SUPPORT_SYSRQ
370 port->sysrq = 0;
371 #endif
372 goto error_return;
373 }
374
375 /*
376 * Asynchron mode interrupt handler
377 */
378 static irqreturn_t cpm_uart_int(int irq, void *data)
379 {
380 u8 events;
381 struct uart_port *port = (struct uart_port *)data;
382 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
383 volatile smc_t *smcp = pinfo->smcp;
384 volatile scc_t *sccp = pinfo->sccp;
385
386 pr_debug("CPM uart[%d]:IRQ\n", port->line);
387
388 if (IS_SMC(pinfo)) {
389 events = smcp->smc_smce;
390 smcp->smc_smce = events;
391 if (events & SMCM_BRKE)
392 uart_handle_break(port);
393 if (events & SMCM_RX)
394 cpm_uart_int_rx(port);
395 if (events & SMCM_TX)
396 cpm_uart_int_tx(port);
397 } else {
398 events = sccp->scc_scce;
399 sccp->scc_scce = events;
400 if (events & UART_SCCM_BRKE)
401 uart_handle_break(port);
402 if (events & UART_SCCM_RX)
403 cpm_uart_int_rx(port);
404 if (events & UART_SCCM_TX)
405 cpm_uart_int_tx(port);
406 }
407 return (events) ? IRQ_HANDLED : IRQ_NONE;
408 }
409
410 static int cpm_uart_startup(struct uart_port *port)
411 {
412 int retval;
413 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
414
415 pr_debug("CPM uart[%d]:startup\n", port->line);
416
417 /* Install interrupt handler. */
418 retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
419 if (retval)
420 return retval;
421
422 /* Startup rx-int */
423 if (IS_SMC(pinfo)) {
424 pinfo->smcp->smc_smcm |= SMCM_RX;
425 pinfo->smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
426 } else {
427 pinfo->sccp->scc_sccm |= UART_SCCM_RX;
428 pinfo->sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
429 }
430
431 if (!(pinfo->flags & FLAG_CONSOLE))
432 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
433 return 0;
434 }
435
436 inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
437 {
438 set_current_state(TASK_UNINTERRUPTIBLE);
439 schedule_timeout(pinfo->wait_closing);
440 }
441
442 /*
443 * Shutdown the uart
444 */
445 static void cpm_uart_shutdown(struct uart_port *port)
446 {
447 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
448
449 pr_debug("CPM uart[%d]:shutdown\n", port->line);
450
451 /* free interrupt handler */
452 free_irq(port->irq, port);
453
454 /* If the port is not the console, disable Rx and Tx. */
455 if (!(pinfo->flags & FLAG_CONSOLE)) {
456 /* Wait for all the BDs marked sent */
457 while(!cpm_uart_tx_empty(port)) {
458 set_current_state(TASK_UNINTERRUPTIBLE);
459 schedule_timeout(2);
460 }
461
462 if (pinfo->wait_closing)
463 cpm_uart_wait_until_send(pinfo);
464
465 /* Stop uarts */
466 if (IS_SMC(pinfo)) {
467 volatile smc_t *smcp = pinfo->smcp;
468 smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
469 smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
470 } else {
471 volatile scc_t *sccp = pinfo->sccp;
472 sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
473 sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
474 }
475
476 /* Shut them really down and reinit buffer descriptors */
477 if (IS_SMC(pinfo))
478 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
479 else
480 cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
481
482 cpm_uart_initbd(pinfo);
483 }
484 }
485
486 static void cpm_uart_set_termios(struct uart_port *port,
487 struct ktermios *termios,
488 struct ktermios *old)
489 {
490 int baud;
491 unsigned long flags;
492 u16 cval, scval, prev_mode;
493 int bits, sbits;
494 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
495 volatile smc_t *smcp = pinfo->smcp;
496 volatile scc_t *sccp = pinfo->sccp;
497
498 pr_debug("CPM uart[%d]:set_termios\n", port->line);
499
500 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
501
502 /* Character length programmed into the mode register is the
503 * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
504 * 1 or 2 stop bits, minus 1.
505 * The value 'bits' counts this for us.
506 */
507 cval = 0;
508 scval = 0;
509
510 /* byte size */
511 switch (termios->c_cflag & CSIZE) {
512 case CS5:
513 bits = 5;
514 break;
515 case CS6:
516 bits = 6;
517 break;
518 case CS7:
519 bits = 7;
520 break;
521 case CS8:
522 bits = 8;
523 break;
524 /* Never happens, but GCC is too dumb to figure it out */
525 default:
526 bits = 8;
527 break;
528 }
529 sbits = bits - 5;
530
531 if (termios->c_cflag & CSTOPB) {
532 cval |= SMCMR_SL; /* Two stops */
533 scval |= SCU_PSMR_SL;
534 bits++;
535 }
536
537 if (termios->c_cflag & PARENB) {
538 cval |= SMCMR_PEN;
539 scval |= SCU_PSMR_PEN;
540 bits++;
541 if (!(termios->c_cflag & PARODD)) {
542 cval |= SMCMR_PM_EVEN;
543 scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP);
544 }
545 }
546
547 /*
548 * Set up parity check flag
549 */
550 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
551
552 port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
553 if (termios->c_iflag & INPCK)
554 port->read_status_mask |= BD_SC_FR | BD_SC_PR;
555 if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK))
556 port->read_status_mask |= BD_SC_BR;
557
558 /*
559 * Characters to ignore
560 */
561 port->ignore_status_mask = 0;
562 if (termios->c_iflag & IGNPAR)
563 port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
564 if (termios->c_iflag & IGNBRK) {
565 port->ignore_status_mask |= BD_SC_BR;
566 /*
567 * If we're ignore parity and break indicators, ignore
568 * overruns too. (For real raw support).
569 */
570 if (termios->c_iflag & IGNPAR)
571 port->ignore_status_mask |= BD_SC_OV;
572 }
573 /*
574 * !!! ignore all characters if CREAD is not set
575 */
576 if ((termios->c_cflag & CREAD) == 0)
577 port->read_status_mask &= ~BD_SC_EMPTY;
578
579 spin_lock_irqsave(&port->lock, flags);
580
581 /* Start bit has not been added (so don't, because we would just
582 * subtract it later), and we need to add one for the number of
583 * stops bits (there is always at least one).
584 */
585 bits++;
586 if (IS_SMC(pinfo)) {
587 /* Set the mode register. We want to keep a copy of the
588 * enables, because we want to put them back if they were
589 * present.
590 */
591 prev_mode = smcp->smc_smcmr;
592 smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
593 smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
594 } else {
595 sccp->scc_psmr = (sbits << 12) | scval;
596 }
597
598 cpm_set_brg(pinfo->brg - 1, baud);
599 spin_unlock_irqrestore(&port->lock, flags);
600 }
601
602 static const char *cpm_uart_type(struct uart_port *port)
603 {
604 pr_debug("CPM uart[%d]:uart_type\n", port->line);
605
606 return port->type == PORT_CPM ? "CPM UART" : NULL;
607 }
608
609 /*
610 * verify the new serial_struct (for TIOCSSERIAL).
611 */
612 static int cpm_uart_verify_port(struct uart_port *port,
613 struct serial_struct *ser)
614 {
615 int ret = 0;
616
617 pr_debug("CPM uart[%d]:verify_port\n", port->line);
618
619 if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
620 ret = -EINVAL;
621 if (ser->irq < 0 || ser->irq >= NR_IRQS)
622 ret = -EINVAL;
623 if (ser->baud_base < 9600)
624 ret = -EINVAL;
625 return ret;
626 }
627
628 /*
629 * Transmit characters, refill buffer descriptor, if possible
630 */
631 static int cpm_uart_tx_pump(struct uart_port *port)
632 {
633 volatile cbd_t *bdp;
634 unsigned char *p;
635 int count;
636 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
637 struct circ_buf *xmit = &port->info->xmit;
638
639 /* Handle xon/xoff */
640 if (port->x_char) {
641 /* Pick next descriptor and fill from buffer */
642 bdp = pinfo->tx_cur;
643
644 p = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
645
646 *p++ = port->x_char;
647 bdp->cbd_datlen = 1;
648 bdp->cbd_sc |= BD_SC_READY;
649 /* Get next BD. */
650 if (bdp->cbd_sc & BD_SC_WRAP)
651 bdp = pinfo->tx_bd_base;
652 else
653 bdp++;
654 pinfo->tx_cur = bdp;
655
656 port->icount.tx++;
657 port->x_char = 0;
658 return 1;
659 }
660
661 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
662 cpm_uart_stop_tx(port);
663 return 0;
664 }
665
666 /* Pick next descriptor and fill from buffer */
667 bdp = pinfo->tx_cur;
668
669 while (!(bdp->cbd_sc & BD_SC_READY) && (xmit->tail != xmit->head)) {
670 count = 0;
671 p = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
672 while (count < pinfo->tx_fifosize) {
673 *p++ = xmit->buf[xmit->tail];
674 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
675 port->icount.tx++;
676 count++;
677 if (xmit->head == xmit->tail)
678 break;
679 }
680 bdp->cbd_datlen = count;
681 bdp->cbd_sc |= BD_SC_READY;
682 eieio();
683 /* Get next BD. */
684 if (bdp->cbd_sc & BD_SC_WRAP)
685 bdp = pinfo->tx_bd_base;
686 else
687 bdp++;
688 }
689 pinfo->tx_cur = bdp;
690
691 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
692 uart_write_wakeup(port);
693
694 if (uart_circ_empty(xmit)) {
695 cpm_uart_stop_tx(port);
696 return 0;
697 }
698
699 return 1;
700 }
701
702 /*
703 * init buffer descriptors
704 */
705 static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
706 {
707 int i;
708 u8 *mem_addr;
709 volatile cbd_t *bdp;
710
711 pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
712
713 /* Set the physical address of the host memory
714 * buffers in the buffer descriptors, and the
715 * virtual address for us to work with.
716 */
717 mem_addr = pinfo->mem_addr;
718 bdp = pinfo->rx_cur = pinfo->rx_bd_base;
719 for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
720 bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
721 bdp->cbd_sc = BD_SC_EMPTY | BD_SC_INTRPT;
722 mem_addr += pinfo->rx_fifosize;
723 }
724
725 bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
726 bdp->cbd_sc = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
727
728 /* Set the physical address of the host memory
729 * buffers in the buffer descriptors, and the
730 * virtual address for us to work with.
731 */
732 mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
733 bdp = pinfo->tx_cur = pinfo->tx_bd_base;
734 for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
735 bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
736 bdp->cbd_sc = BD_SC_INTRPT;
737 mem_addr += pinfo->tx_fifosize;
738 }
739
740 bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
741 bdp->cbd_sc = BD_SC_WRAP | BD_SC_INTRPT;
742 }
743
744 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
745 {
746 volatile scc_t *scp;
747 volatile scc_uart_t *sup;
748
749 pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
750
751 scp = pinfo->sccp;
752 sup = pinfo->sccup;
753
754 /* Store address */
755 pinfo->sccup->scc_genscc.scc_rbase = (unsigned char *)pinfo->rx_bd_base - DPRAM_BASE;
756 pinfo->sccup->scc_genscc.scc_tbase = (unsigned char *)pinfo->tx_bd_base - DPRAM_BASE;
757
758 /* Set up the uart parameters in the
759 * parameter ram.
760 */
761
762 cpm_set_scc_fcr(sup);
763
764 sup->scc_genscc.scc_mrblr = pinfo->rx_fifosize;
765 sup->scc_maxidl = pinfo->rx_fifosize;
766 sup->scc_brkcr = 1;
767 sup->scc_parec = 0;
768 sup->scc_frmec = 0;
769 sup->scc_nosec = 0;
770 sup->scc_brkec = 0;
771 sup->scc_uaddr1 = 0;
772 sup->scc_uaddr2 = 0;
773 sup->scc_toseq = 0;
774 sup->scc_char1 = 0x8000;
775 sup->scc_char2 = 0x8000;
776 sup->scc_char3 = 0x8000;
777 sup->scc_char4 = 0x8000;
778 sup->scc_char5 = 0x8000;
779 sup->scc_char6 = 0x8000;
780 sup->scc_char7 = 0x8000;
781 sup->scc_char8 = 0x8000;
782 sup->scc_rccm = 0xc0ff;
783
784 /* Send the CPM an initialize command.
785 */
786 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
787
788 /* Set UART mode, 8 bit, no parity, one stop.
789 * Enable receive and transmit.
790 */
791 scp->scc_gsmrh = 0;
792 scp->scc_gsmrl =
793 (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
794
795 /* Enable rx interrupts and clear all pending events. */
796 scp->scc_sccm = 0;
797 scp->scc_scce = 0xffff;
798 scp->scc_dsr = 0x7e7e;
799 scp->scc_psmr = 0x3000;
800
801 scp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
802 }
803
804 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
805 {
806 volatile smc_t *sp;
807 volatile smc_uart_t *up;
808
809 pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
810
811 sp = pinfo->smcp;
812 up = pinfo->smcup;
813
814 /* Store address */
815 pinfo->smcup->smc_rbase = (u_char *)pinfo->rx_bd_base - DPRAM_BASE;
816 pinfo->smcup->smc_tbase = (u_char *)pinfo->tx_bd_base - DPRAM_BASE;
817
818 /*
819 * In case SMC1 is being relocated...
820 */
821 #if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
822 up->smc_rbptr = pinfo->smcup->smc_rbase;
823 up->smc_tbptr = pinfo->smcup->smc_tbase;
824 up->smc_rstate = 0;
825 up->smc_tstate = 0;
826 up->smc_brkcr = 1; /* number of break chars */
827 up->smc_brkec = 0;
828 #endif
829
830 /* Set up the uart parameters in the
831 * parameter ram.
832 */
833 cpm_set_smc_fcr(up);
834
835 /* Using idle charater time requires some additional tuning. */
836 up->smc_mrblr = pinfo->rx_fifosize;
837 up->smc_maxidl = pinfo->rx_fifosize;
838 up->smc_brklen = 0;
839 up->smc_brkec = 0;
840 up->smc_brkcr = 1;
841
842 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
843
844 /* Set UART mode, 8 bit, no parity, one stop.
845 * Enable receive and transmit.
846 */
847 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
848
849 /* Enable only rx interrupts clear all pending events. */
850 sp->smc_smcm = 0;
851 sp->smc_smce = 0xff;
852
853 sp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
854 }
855
856 /*
857 * Initialize port. This is called from early_console stuff
858 * so we have to be careful here !
859 */
860 static int cpm_uart_request_port(struct uart_port *port)
861 {
862 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
863 int ret;
864
865 pr_debug("CPM uart[%d]:request port\n", port->line);
866
867 if (pinfo->flags & FLAG_CONSOLE)
868 return 0;
869
870 if (IS_SMC(pinfo)) {
871 pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
872 pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
873 } else {
874 pinfo->sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
875 pinfo->sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
876 }
877
878 ret = cpm_uart_allocbuf(pinfo, 0);
879
880 if (ret)
881 return ret;
882
883 cpm_uart_initbd(pinfo);
884 if (IS_SMC(pinfo))
885 cpm_uart_init_smc(pinfo);
886 else
887 cpm_uart_init_scc(pinfo);
888
889 return 0;
890 }
891
892 static void cpm_uart_release_port(struct uart_port *port)
893 {
894 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
895
896 if (!(pinfo->flags & FLAG_CONSOLE))
897 cpm_uart_freebuf(pinfo);
898 }
899
900 /*
901 * Configure/autoconfigure the port.
902 */
903 static void cpm_uart_config_port(struct uart_port *port, int flags)
904 {
905 pr_debug("CPM uart[%d]:config_port\n", port->line);
906
907 if (flags & UART_CONFIG_TYPE) {
908 port->type = PORT_CPM;
909 cpm_uart_request_port(port);
910 }
911 }
912 static struct uart_ops cpm_uart_pops = {
913 .tx_empty = cpm_uart_tx_empty,
914 .set_mctrl = cpm_uart_set_mctrl,
915 .get_mctrl = cpm_uart_get_mctrl,
916 .stop_tx = cpm_uart_stop_tx,
917 .start_tx = cpm_uart_start_tx,
918 .stop_rx = cpm_uart_stop_rx,
919 .enable_ms = cpm_uart_enable_ms,
920 .break_ctl = cpm_uart_break_ctl,
921 .startup = cpm_uart_startup,
922 .shutdown = cpm_uart_shutdown,
923 .set_termios = cpm_uart_set_termios,
924 .type = cpm_uart_type,
925 .release_port = cpm_uart_release_port,
926 .request_port = cpm_uart_request_port,
927 .config_port = cpm_uart_config_port,
928 .verify_port = cpm_uart_verify_port,
929 };
930
931 #ifdef CONFIG_PPC_CPM_NEW_BINDING
932 struct uart_cpm_port cpm_uart_ports[UART_NR];
933
934 int cpm_uart_init_port(struct device_node *np, struct uart_cpm_port *pinfo)
935 {
936 const u32 *data;
937 void __iomem *mem, __iomem *pram;
938 int len;
939 int ret;
940
941 data = of_get_property(np, "fsl,cpm-brg", &len);
942 if (!data || len != 4) {
943 printk(KERN_ERR "CPM UART %s has no/invalid "
944 "fsl,cpm-brg property.\n", np->name);
945 return -EINVAL;
946 }
947 pinfo->brg = *data;
948
949 data = of_get_property(np, "fsl,cpm-command", &len);
950 if (!data || len != 4) {
951 printk(KERN_ERR "CPM UART %s has no/invalid "
952 "fsl,cpm-command property.\n", np->name);
953 return -EINVAL;
954 }
955 pinfo->command = *data;
956
957 mem = of_iomap(np, 0);
958 if (!mem)
959 return -ENOMEM;
960
961 pram = of_iomap(np, 1);
962 if (!pram) {
963 ret = -ENOMEM;
964 goto out_mem;
965 }
966
967 if (of_device_is_compatible(np, "fsl,cpm1-scc-uart") ||
968 of_device_is_compatible(np, "fsl,cpm2-scc-uart")) {
969 pinfo->sccp = mem;
970 pinfo->sccup = pram;
971 } else if (of_device_is_compatible(np, "fsl,cpm1-smc-uart") ||
972 of_device_is_compatible(np, "fsl,cpm2-smc-uart")) {
973 pinfo->flags |= FLAG_SMC;
974 pinfo->smcp = mem;
975 pinfo->smcup = pram;
976 } else {
977 ret = -ENODEV;
978 goto out_pram;
979 }
980
981 pinfo->tx_nrfifos = TX_NUM_FIFO;
982 pinfo->tx_fifosize = TX_BUF_SIZE;
983 pinfo->rx_nrfifos = RX_NUM_FIFO;
984 pinfo->rx_fifosize = RX_BUF_SIZE;
985
986 pinfo->port.uartclk = ppc_proc_freq;
987 pinfo->port.mapbase = (unsigned long)mem;
988 pinfo->port.type = PORT_CPM;
989 pinfo->port.ops = &cpm_uart_pops,
990 pinfo->port.iotype = UPIO_MEM;
991 spin_lock_init(&pinfo->port.lock);
992
993 pinfo->port.irq = of_irq_to_resource(np, 0, NULL);
994 if (pinfo->port.irq == NO_IRQ) {
995 ret = -EINVAL;
996 goto out_pram;
997 }
998
999 return cpm_uart_request_port(&pinfo->port);
1000
1001 out_pram:
1002 iounmap(pram);
1003 out_mem:
1004 iounmap(mem);
1005 return ret;
1006 }
1007
1008 #else
1009
1010 struct uart_cpm_port cpm_uart_ports[UART_NR] = {
1011 [UART_SMC1] = {
1012 .port = {
1013 .irq = SMC1_IRQ,
1014 .ops = &cpm_uart_pops,
1015 .iotype = UPIO_MEM,
1016 .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SMC1].port.lock),
1017 },
1018 .flags = FLAG_SMC,
1019 .tx_nrfifos = TX_NUM_FIFO,
1020 .tx_fifosize = TX_BUF_SIZE,
1021 .rx_nrfifos = RX_NUM_FIFO,
1022 .rx_fifosize = RX_BUF_SIZE,
1023 .set_lineif = smc1_lineif,
1024 },
1025 [UART_SMC2] = {
1026 .port = {
1027 .irq = SMC2_IRQ,
1028 .ops = &cpm_uart_pops,
1029 .iotype = UPIO_MEM,
1030 .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SMC2].port.lock),
1031 },
1032 .flags = FLAG_SMC,
1033 .tx_nrfifos = TX_NUM_FIFO,
1034 .tx_fifosize = TX_BUF_SIZE,
1035 .rx_nrfifos = RX_NUM_FIFO,
1036 .rx_fifosize = RX_BUF_SIZE,
1037 .set_lineif = smc2_lineif,
1038 #ifdef CONFIG_SERIAL_CPM_ALT_SMC2
1039 .is_portb = 1,
1040 #endif
1041 },
1042 [UART_SCC1] = {
1043 .port = {
1044 .irq = SCC1_IRQ,
1045 .ops = &cpm_uart_pops,
1046 .iotype = UPIO_MEM,
1047 .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC1].port.lock),
1048 },
1049 .tx_nrfifos = TX_NUM_FIFO,
1050 .tx_fifosize = TX_BUF_SIZE,
1051 .rx_nrfifos = RX_NUM_FIFO,
1052 .rx_fifosize = RX_BUF_SIZE,
1053 .set_lineif = scc1_lineif,
1054 .wait_closing = SCC_WAIT_CLOSING,
1055 },
1056 [UART_SCC2] = {
1057 .port = {
1058 .irq = SCC2_IRQ,
1059 .ops = &cpm_uart_pops,
1060 .iotype = UPIO_MEM,
1061 .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC2].port.lock),
1062 },
1063 .tx_nrfifos = TX_NUM_FIFO,
1064 .tx_fifosize = TX_BUF_SIZE,
1065 .rx_nrfifos = RX_NUM_FIFO,
1066 .rx_fifosize = RX_BUF_SIZE,
1067 .set_lineif = scc2_lineif,
1068 .wait_closing = SCC_WAIT_CLOSING,
1069 },
1070 [UART_SCC3] = {
1071 .port = {
1072 .irq = SCC3_IRQ,
1073 .ops = &cpm_uart_pops,
1074 .iotype = UPIO_MEM,
1075 .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC3].port.lock),
1076 },
1077 .tx_nrfifos = TX_NUM_FIFO,
1078 .tx_fifosize = TX_BUF_SIZE,
1079 .rx_nrfifos = RX_NUM_FIFO,
1080 .rx_fifosize = RX_BUF_SIZE,
1081 .set_lineif = scc3_lineif,
1082 .wait_closing = SCC_WAIT_CLOSING,
1083 },
1084 [UART_SCC4] = {
1085 .port = {
1086 .irq = SCC4_IRQ,
1087 .ops = &cpm_uart_pops,
1088 .iotype = UPIO_MEM,
1089 .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC4].port.lock),
1090 },
1091 .tx_nrfifos = TX_NUM_FIFO,
1092 .tx_fifosize = TX_BUF_SIZE,
1093 .rx_nrfifos = RX_NUM_FIFO,
1094 .rx_fifosize = RX_BUF_SIZE,
1095 .set_lineif = scc4_lineif,
1096 .wait_closing = SCC_WAIT_CLOSING,
1097 },
1098 };
1099
1100 int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con)
1101 {
1102 struct resource *r;
1103 struct fs_uart_platform_info *pdata = pdev->dev.platform_data;
1104 int idx; /* It is UART_SMCx or UART_SCCx index */
1105 struct uart_cpm_port *pinfo;
1106 int line;
1107 u32 mem, pram;
1108
1109 idx = pdata->fs_no = fs_uart_get_id(pdata);
1110
1111 line = cpm_uart_id2nr(idx);
1112 if(line < 0) {
1113 printk(KERN_ERR"%s(): port %d is not registered", __FUNCTION__, idx);
1114 return -EINVAL;
1115 }
1116
1117 pinfo = (struct uart_cpm_port *) &cpm_uart_ports[idx];
1118
1119 pinfo->brg = pdata->brg;
1120
1121 if (!is_con) {
1122 pinfo->port.line = line;
1123 pinfo->port.flags = UPF_BOOT_AUTOCONF;
1124 }
1125
1126 if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs")))
1127 return -EINVAL;
1128 mem = (u32)ioremap(r->start, r->end - r->start + 1);
1129
1130 if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram")))
1131 return -EINVAL;
1132 pram = (u32)ioremap(r->start, r->end - r->start + 1);
1133
1134 if(idx > fsid_smc2_uart) {
1135 pinfo->sccp = (scc_t *)mem;
1136 pinfo->sccup = (scc_uart_t *)pram;
1137 } else {
1138 pinfo->smcp = (smc_t *)mem;
1139 pinfo->smcup = (smc_uart_t *)pram;
1140 }
1141 pinfo->tx_nrfifos = pdata->tx_num_fifo;
1142 pinfo->tx_fifosize = pdata->tx_buf_size;
1143
1144 pinfo->rx_nrfifos = pdata->rx_num_fifo;
1145 pinfo->rx_fifosize = pdata->rx_buf_size;
1146
1147 pinfo->port.uartclk = pdata->uart_clk;
1148 pinfo->port.mapbase = (unsigned long)mem;
1149 pinfo->port.irq = platform_get_irq(pdev, 0);
1150
1151 return 0;
1152 }
1153 #endif
1154
1155 #ifdef CONFIG_SERIAL_CPM_CONSOLE
1156 /*
1157 * Print a string to the serial port trying not to disturb
1158 * any possible real use of the port...
1159 *
1160 * Note that this is called with interrupts already disabled
1161 */
1162 static void cpm_uart_console_write(struct console *co, const char *s,
1163 u_int count)
1164 {
1165 #ifdef CONFIG_PPC_CPM_NEW_BINDING
1166 struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
1167 #else
1168 struct uart_cpm_port *pinfo =
1169 &cpm_uart_ports[cpm_uart_port_map[co->index]];
1170 #endif
1171 unsigned int i;
1172 volatile cbd_t *bdp, *bdbase;
1173 volatile unsigned char *cp;
1174
1175 /* Get the address of the host memory buffer.
1176 */
1177 bdp = pinfo->tx_cur;
1178 bdbase = pinfo->tx_bd_base;
1179
1180 /*
1181 * Now, do each character. This is not as bad as it looks
1182 * since this is a holding FIFO and not a transmitting FIFO.
1183 * We could add the complexity of filling the entire transmit
1184 * buffer, but we would just wait longer between accesses......
1185 */
1186 for (i = 0; i < count; i++, s++) {
1187 /* Wait for transmitter fifo to empty.
1188 * Ready indicates output is ready, and xmt is doing
1189 * that, not that it is ready for us to send.
1190 */
1191 while ((bdp->cbd_sc & BD_SC_READY) != 0)
1192 ;
1193
1194 /* Send the character out.
1195 * If the buffer address is in the CPM DPRAM, don't
1196 * convert it.
1197 */
1198 cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
1199
1200 *cp = *s;
1201
1202 bdp->cbd_datlen = 1;
1203 bdp->cbd_sc |= BD_SC_READY;
1204
1205 if (bdp->cbd_sc & BD_SC_WRAP)
1206 bdp = bdbase;
1207 else
1208 bdp++;
1209
1210 /* if a LF, also do CR... */
1211 if (*s == 10) {
1212 while ((bdp->cbd_sc & BD_SC_READY) != 0)
1213 ;
1214
1215 cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
1216
1217 *cp = 13;
1218 bdp->cbd_datlen = 1;
1219 bdp->cbd_sc |= BD_SC_READY;
1220
1221 if (bdp->cbd_sc & BD_SC_WRAP)
1222 bdp = bdbase;
1223 else
1224 bdp++;
1225 }
1226 }
1227
1228 /*
1229 * Finally, Wait for transmitter & holding register to empty
1230 * and restore the IER
1231 */
1232 while ((bdp->cbd_sc & BD_SC_READY) != 0)
1233 ;
1234
1235 pinfo->tx_cur = (volatile cbd_t *) bdp;
1236 }
1237
1238
1239 static int __init cpm_uart_console_setup(struct console *co, char *options)
1240 {
1241 int baud = 38400;
1242 int bits = 8;
1243 int parity = 'n';
1244 int flow = 'n';
1245 int ret;
1246 struct uart_cpm_port *pinfo;
1247 struct uart_port *port;
1248
1249 #ifdef CONFIG_PPC_CPM_NEW_BINDING
1250 struct device_node *np = NULL;
1251 int i = 0;
1252
1253 if (co->index >= UART_NR) {
1254 printk(KERN_ERR "cpm_uart: console index %d too high\n",
1255 co->index);
1256 return -ENODEV;
1257 }
1258
1259 do {
1260 np = of_find_node_by_type(np, "serial");
1261 if (!np)
1262 return -ENODEV;
1263
1264 if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") &&
1265 !of_device_is_compatible(np, "fsl,cpm1-scc-uart") &&
1266 !of_device_is_compatible(np, "fsl,cpm2-smc-uart") &&
1267 !of_device_is_compatible(np, "fsl,cpm2-scc-uart"))
1268 i--;
1269 } while (i++ != co->index);
1270
1271 pinfo = &cpm_uart_ports[co->index];
1272
1273 pinfo->flags |= FLAG_CONSOLE;
1274 port = &pinfo->port;
1275
1276 ret = cpm_uart_init_port(np, pinfo);
1277 of_node_put(np);
1278 if (ret)
1279 return ret;
1280
1281 #else
1282
1283 struct fs_uart_platform_info *pdata;
1284 struct platform_device* pdev = early_uart_get_pdev(co->index);
1285
1286 if (!pdev) {
1287 pr_info("cpm_uart: console: compat mode\n");
1288 /* compatibility - will be cleaned up */
1289 cpm_uart_init_portdesc();
1290 }
1291
1292 port =
1293 (struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]];
1294 pinfo = (struct uart_cpm_port *)port;
1295 if (!pdev) {
1296 if (pinfo->set_lineif)
1297 pinfo->set_lineif(pinfo);
1298 } else {
1299 pdata = pdev->dev.platform_data;
1300 if (pdata)
1301 if (pdata->init_ioports)
1302 pdata->init_ioports(pdata);
1303
1304 cpm_uart_drv_get_platform_data(pdev, 1);
1305 }
1306
1307 pinfo->flags |= FLAG_CONSOLE;
1308 #endif
1309
1310 if (options) {
1311 uart_parse_options(options, &baud, &parity, &bits, &flow);
1312 } else {
1313 if ((baud = uart_baudrate()) == -1)
1314 baud = 9600;
1315 }
1316
1317 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
1318 udbg_putc = NULL;
1319 #endif
1320
1321 if (IS_SMC(pinfo)) {
1322 pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
1323 pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
1324 } else {
1325 pinfo->sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
1326 pinfo->sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1327 }
1328
1329 ret = cpm_uart_allocbuf(pinfo, 1);
1330
1331 if (ret)
1332 return ret;
1333
1334 cpm_uart_initbd(pinfo);
1335
1336 if (IS_SMC(pinfo))
1337 cpm_uart_init_smc(pinfo);
1338 else
1339 cpm_uart_init_scc(pinfo);
1340
1341 uart_set_options(port, co, baud, parity, bits, flow);
1342
1343 return 0;
1344 }
1345
1346 static struct uart_driver cpm_reg;
1347 static struct console cpm_scc_uart_console = {
1348 .name = "ttyCPM",
1349 .write = cpm_uart_console_write,
1350 .device = uart_console_device,
1351 .setup = cpm_uart_console_setup,
1352 .flags = CON_PRINTBUFFER,
1353 .index = -1,
1354 .data = &cpm_reg,
1355 };
1356
1357 int __init cpm_uart_console_init(void)
1358 {
1359 register_console(&cpm_scc_uart_console);
1360 return 0;
1361 }
1362
1363 console_initcall(cpm_uart_console_init);
1364
1365 #define CPM_UART_CONSOLE &cpm_scc_uart_console
1366 #else
1367 #define CPM_UART_CONSOLE NULL
1368 #endif
1369
1370 static struct uart_driver cpm_reg = {
1371 .owner = THIS_MODULE,
1372 .driver_name = "ttyCPM",
1373 .dev_name = "ttyCPM",
1374 .major = SERIAL_CPM_MAJOR,
1375 .minor = SERIAL_CPM_MINOR,
1376 .cons = CPM_UART_CONSOLE,
1377 .nr = UART_NR,
1378 };
1379
1380 #ifdef CONFIG_PPC_CPM_NEW_BINDING
1381 static int probe_index;
1382
1383 static int __devinit cpm_uart_probe(struct of_device *ofdev,
1384 const struct of_device_id *match)
1385 {
1386 int index = probe_index++;
1387 struct uart_cpm_port *pinfo = &cpm_uart_ports[index];
1388 int ret;
1389
1390 pinfo->port.line = index;
1391
1392 if (index >= UART_NR)
1393 return -ENODEV;
1394
1395 dev_set_drvdata(&ofdev->dev, pinfo);
1396
1397 ret = cpm_uart_init_port(ofdev->node, pinfo);
1398 if (ret)
1399 return ret;
1400
1401 return uart_add_one_port(&cpm_reg, &pinfo->port);
1402 }
1403
1404 static int __devexit cpm_uart_remove(struct of_device *ofdev)
1405 {
1406 struct uart_cpm_port *pinfo = dev_get_drvdata(&ofdev->dev);
1407 return uart_remove_one_port(&cpm_reg, &pinfo->port);
1408 }
1409
1410 static struct of_device_id cpm_uart_match[] = {
1411 {
1412 .compatible = "fsl,cpm1-smc-uart",
1413 },
1414 {
1415 .compatible = "fsl,cpm1-scc-uart",
1416 },
1417 {
1418 .compatible = "fsl,cpm2-smc-uart",
1419 },
1420 {
1421 .compatible = "fsl,cpm2-scc-uart",
1422 },
1423 {}
1424 };
1425
1426 static struct of_platform_driver cpm_uart_driver = {
1427 .name = "cpm_uart",
1428 .match_table = cpm_uart_match,
1429 .probe = cpm_uart_probe,
1430 .remove = cpm_uart_remove,
1431 };
1432
1433 static int __init cpm_uart_init(void)
1434 {
1435 int ret = uart_register_driver(&cpm_reg);
1436 if (ret)
1437 return ret;
1438
1439 ret = of_register_platform_driver(&cpm_uart_driver);
1440 if (ret)
1441 uart_unregister_driver(&cpm_reg);
1442
1443 return ret;
1444 }
1445
1446 static void __exit cpm_uart_exit(void)
1447 {
1448 of_unregister_platform_driver(&cpm_uart_driver);
1449 uart_unregister_driver(&cpm_reg);
1450 }
1451 #else
1452 static int cpm_uart_drv_probe(struct device *dev)
1453 {
1454 struct platform_device *pdev = to_platform_device(dev);
1455 struct fs_uart_platform_info *pdata;
1456 int ret = -ENODEV;
1457
1458 if(!pdev) {
1459 printk(KERN_ERR"CPM UART: platform data missing!\n");
1460 return ret;
1461 }
1462
1463 pdata = pdev->dev.platform_data;
1464
1465 if ((ret = cpm_uart_drv_get_platform_data(pdev, 0)))
1466 return ret;
1467
1468 pr_debug("cpm_uart_drv_probe: Adding CPM UART %d\n", cpm_uart_id2nr(pdata->fs_no));
1469
1470 if (pdata->init_ioports)
1471 pdata->init_ioports(pdata);
1472
1473 ret = uart_add_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port);
1474
1475 return ret;
1476 }
1477
1478 static int cpm_uart_drv_remove(struct device *dev)
1479 {
1480 struct platform_device *pdev = to_platform_device(dev);
1481 struct fs_uart_platform_info *pdata = pdev->dev.platform_data;
1482
1483 pr_debug("cpm_uart_drv_remove: Removing CPM UART %d\n",
1484 cpm_uart_id2nr(pdata->fs_no));
1485
1486 uart_remove_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port);
1487 return 0;
1488 }
1489
1490 static struct device_driver cpm_smc_uart_driver = {
1491 .name = "fsl-cpm-smc:uart",
1492 .bus = &platform_bus_type,
1493 .probe = cpm_uart_drv_probe,
1494 .remove = cpm_uart_drv_remove,
1495 };
1496
1497 static struct device_driver cpm_scc_uart_driver = {
1498 .name = "fsl-cpm-scc:uart",
1499 .bus = &platform_bus_type,
1500 .probe = cpm_uart_drv_probe,
1501 .remove = cpm_uart_drv_remove,
1502 };
1503
1504 /*
1505 This is supposed to match uart devices on platform bus,
1506 */
1507 static int match_is_uart (struct device* dev, void* data)
1508 {
1509 struct platform_device* pdev = container_of(dev, struct platform_device, dev);
1510 int ret = 0;
1511 /* this was setfunc as uart */
1512 if(strstr(pdev->name,":uart")) {
1513 ret = 1;
1514 }
1515 return ret;
1516 }
1517
1518
1519 static int cpm_uart_init(void) {
1520
1521 int ret;
1522 int i;
1523 struct device *dev;
1524 printk(KERN_INFO "Serial: CPM driver $Revision: 0.02 $\n");
1525
1526 /* lookup the bus for uart devices */
1527 dev = bus_find_device(&platform_bus_type, NULL, 0, match_is_uart);
1528
1529 /* There are devices on the bus - all should be OK */
1530 if (dev) {
1531 cpm_uart_count();
1532 cpm_reg.nr = cpm_uart_nr;
1533
1534 if (!(ret = uart_register_driver(&cpm_reg))) {
1535 if ((ret = driver_register(&cpm_smc_uart_driver))) {
1536 uart_unregister_driver(&cpm_reg);
1537 return ret;
1538 }
1539 if ((ret = driver_register(&cpm_scc_uart_driver))) {
1540 driver_unregister(&cpm_scc_uart_driver);
1541 uart_unregister_driver(&cpm_reg);
1542 }
1543 }
1544 } else {
1545 /* No capable platform devices found - falling back to legacy mode */
1546 pr_info("cpm_uart: WARNING: no UART devices found on platform bus!\n");
1547 pr_info(
1548 "cpm_uart: the driver will guess configuration, but this mode is no longer supported.\n");
1549
1550 /* Don't run this again, if the console driver did it already */
1551 if (cpm_uart_nr == 0)
1552 cpm_uart_init_portdesc();
1553
1554 cpm_reg.nr = cpm_uart_nr;
1555 ret = uart_register_driver(&cpm_reg);
1556
1557 if (ret)
1558 return ret;
1559
1560 for (i = 0; i < cpm_uart_nr; i++) {
1561 int con = cpm_uart_port_map[i];
1562 cpm_uart_ports[con].port.line = i;
1563 cpm_uart_ports[con].port.flags = UPF_BOOT_AUTOCONF;
1564 if (cpm_uart_ports[con].set_lineif)
1565 cpm_uart_ports[con].set_lineif(&cpm_uart_ports[con]);
1566 uart_add_one_port(&cpm_reg, &cpm_uart_ports[con].port);
1567 }
1568
1569 }
1570 return ret;
1571 }
1572
1573 static void __exit cpm_uart_exit(void)
1574 {
1575 driver_unregister(&cpm_scc_uart_driver);
1576 driver_unregister(&cpm_smc_uart_driver);
1577 uart_unregister_driver(&cpm_reg);
1578 }
1579 #endif
1580
1581 module_init(cpm_uart_init);
1582 module_exit(cpm_uart_exit);
1583
1584 MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1585 MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1586 MODULE_LICENSE("GPL");
1587 MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR);
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