drivers/ide/pci/ns87415.c

   1 /*
   2  * linux/drivers/ide/pci/ns87415.c              Version 2.00  Sep. 10, 2002
   3  *
   4  * Copyright (C) 1997-1998      Mark Lord <mlord@pobox.com>
   5  * Copyright (C) 1998           Eddie C. Dost <ecd@skynet.be>
   6  * Copyright (C) 1999-2000      Andre Hedrick <andre@linux-ide.org>
   7  * Copyright (C) 2004           Grant Grundler <grundler at parisc-linux.org>
   8  *
   9  * Inspired by an earlier effort from David S. Miller <davem@redhat.com>
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/types.h>
  14 #include <linux/kernel.h>
  15 #include <linux/timer.h>
  16 #include <linux/mm.h>
  17 #include <linux/ioport.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/blkdev.h>
  20 #include <linux/hdreg.h>
  21 #include <linux/pci.h>
  22 #include <linux/delay.h>
  23 #include <linux/ide.h>
  24 #include <linux/init.h>
  25
  26 #include <asm/io.h>
  27
  28 #ifdef CONFIG_SUPERIO
  29 /* SUPERIO 87560 is a PoS chip that NatSem denies exists.
  30  * Unfortunately, it's built-in on all Astro-based PA-RISC workstations
  31  * which use the integrated NS87514 cell for CD-ROM support.
  32  * i.e we have to support for CD-ROM installs.
  33  * See drivers/parisc/superio.c for more gory details.
  34  */
  35 #include <asm/superio.h>
  36
  37 static unsigned long superio_ide_status[2];
  38 static unsigned long superio_ide_select[2];
  39 static unsigned long superio_ide_dma_status[2];
  40
  41 #define SUPERIO_IDE_MAX_RETRIES 25
  42
  43 /* Because of a defect in Super I/O, all reads of the PCI DMA status
  44  * registers, IDE status register and the IDE select register need to be
  45  * retried
  46  */
  47 static u8 superio_ide_inb (unsigned long port)
  48 {
  49         if (port == superio_ide_status[0] ||
  50             port == superio_ide_status[1] ||
  51             port == superio_ide_select[0] ||
  52             port == superio_ide_select[1] ||
  53             port == superio_ide_dma_status[0] ||
  54             port == superio_ide_dma_status[1]) {
  55                 u8 tmp;
  56                 int retries = SUPERIO_IDE_MAX_RETRIES;
  57
  58                 /* printk(" [ reading port 0x%x with retry ] ", port); */
  59
  60                 do {
  61                         tmp = inb(port);
  62                         if (tmp == 0)
  63                                 udelay(50);
  64                 } while (tmp == 0 && retries-- > 0);
  65
  66                 return tmp;
  67         }
  68
  69         return inb(port);
  70 }
  71
  72 static void __devinit superio_ide_init_iops (struct hwif_s *hwif)
  73 {
  74         u32 base, dmabase;
  75         u8 tmp;
  76         struct pci_dev *pdev = hwif->pci_dev;
  77         u8 port = hwif->channel;
  78
  79         base = pci_resource_start(pdev, port * 2) & ~3;
  80         dmabase = pci_resource_start(pdev, 4) & ~3;
  81
  82         superio_ide_status[port] = base + IDE_STATUS_OFFSET;
  83         superio_ide_select[port] = base + IDE_SELECT_OFFSET;
  84         superio_ide_dma_status[port] = dmabase + (!port ? 2 : 0xa);
  85
  86         /* Clear error/interrupt, enable dma */
  87         tmp = superio_ide_inb(superio_ide_dma_status[port]);
  88         outb(tmp | 0x66, superio_ide_dma_status[port]);
  89
  90         /* We need to override inb to workaround a SuperIO errata */
  91         hwif->INB = superio_ide_inb;
  92 }
  93
  94 static void __devinit init_iops_ns87415(ide_hwif_t *hwif)
  95 {
  96         if (PCI_SLOT(hwif->pci_dev->devfn) == 0xE) {
  97                 /* Built-in - assume it's under superio. */
  98                 superio_ide_init_iops(hwif);
  99         }
 100 }
 101 #endif
 102
 103 static unsigned int ns87415_count = 0, ns87415_control[MAX_HWIFS] = { 0 };
 104
 105 /*
 106  * This routine either enables/disables (according to drive->present)
 107  * the IRQ associated with the port (HWIF(drive)),
 108  * and selects either PIO or DMA handshaking for the next I/O operation.
 109  */
 110 static void ns87415_prepare_drive (ide_drive_t *drive, unsigned int use_dma)
 111 {
 112         ide_hwif_t *hwif = HWIF(drive);
 113         unsigned int bit, other, new, *old = (unsigned int *) hwif->select_data;
 114         struct pci_dev *dev = hwif->pci_dev;
 115         unsigned long flags;
 116
 117         local_irq_save(flags);
 118         new = *old;
 119
 120         /* Adjust IRQ enable bit */
 121         bit = 1 << (8 + hwif->channel);
 122         new = drive->present ? (new & ~bit) : (new | bit);
 123
 124         /* Select PIO or DMA, DMA may only be selected for one drive/channel. */
 125         bit   = 1 << (20 + drive->select.b.unit       + (hwif->channel << 1));
 126         other = 1 << (20 + (1 - drive->select.b.unit) + (hwif->channel << 1));
 127         new = use_dma ? ((new & ~other) | bit) : (new & ~bit);
 128
 129         if (new != *old) {
 130                 unsigned char stat;
 131
 132                 /*
 133                  * Don't change DMA engine settings while Write Buffers
 134                  * are busy.
 135                  */
 136                 (void) pci_read_config_byte(dev, 0x43, &stat);
 137                 while (stat & 0x03) {
 138                         udelay(1);
 139                         (void) pci_read_config_byte(dev, 0x43, &stat);
 140                 }
 141
 142                 *old = new;
 143                 (void) pci_write_config_dword(dev, 0x40, new);
 144
 145                 /*
 146                  * And let things settle...
 147                  */
 148                 udelay(10);
 149         }
 150
 151         local_irq_restore(flags);
 152 }
 153
 154 static void ns87415_selectproc (ide_drive_t *drive)
 155 {
 156         ns87415_prepare_drive (drive, drive->using_dma);
 157 }
 158
 159 static int ns87415_ide_dma_end (ide_drive_t *drive)
 160 {
 161         ide_hwif_t      *hwif = HWIF(drive);
 162         u8 dma_stat = 0, dma_cmd = 0;
 163
 164         drive->waiting_for_dma = 0;
 165         dma_stat = hwif->INB(hwif->dma_status);
 166         /* get dma command mode */
 167         dma_cmd = hwif->INB(hwif->dma_command);
 168         /* stop DMA */
 169         outb(dma_cmd & ~1, hwif->dma_command);
 170         /* from ERRATA: clear the INTR & ERROR bits */
 171         dma_cmd = hwif->INB(hwif->dma_command);
 172         outb(dma_cmd | 6, hwif->dma_command);
 173         /* and free any DMA resources */
 174         ide_destroy_dmatable(drive);
 175         /* verify good DMA status */
 176         return (dma_stat & 7) != 4;
 177 }
 178
 179 static int ns87415_ide_dma_setup(ide_drive_t *drive)
 180 {
 181         /* select DMA xfer */
 182         ns87415_prepare_drive(drive, 1);
 183         if (!ide_dma_setup(drive))
 184                 return 0;
 185         /* DMA failed: select PIO xfer */
 186         ns87415_prepare_drive(drive, 0);
 187         return 1;
 188 }
 189
 190 static int ns87415_ide_dma_check (ide_drive_t *drive)
 191 {
 192         if (drive->media != ide_disk)
 193                 return -1;
 194
 195         return __ide_dma_check(drive);
 196 }
 197
 198 static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
 199 {
 200         struct pci_dev *dev = hwif->pci_dev;
 201         unsigned int ctrl, using_inta;
 202         u8 progif;
 203 #ifdef __sparc_v9__
 204         int timeout;
 205         u8 stat;
 206 #endif
 207
 208         hwif->autodma = 0;
 209         hwif->selectproc = &ns87415_selectproc;
 210
 211         /*
 212          * We cannot probe for IRQ: both ports share common IRQ on INTA.
 213          * Also, leave IRQ masked during drive probing, to prevent infinite
 214          * interrupts from a potentially floating INTA..
 215          *
 216          * IRQs get unmasked in selectproc when drive is first used.
 217          */
 218         (void) pci_read_config_dword(dev, 0x40, &ctrl);
 219         (void) pci_read_config_byte(dev, 0x09, &progif);
 220         /* is irq in "native" mode? */
 221         using_inta = progif & (1 << (hwif->channel << 1));
 222         if (!using_inta)
 223                 using_inta = ctrl & (1 << (4 + hwif->channel));
 224         if (hwif->mate) {
 225                 hwif->select_data = hwif->mate->select_data;
 226         } else {
 227                 hwif->select_data = (unsigned long)
 228                                         &ns87415_control[ns87415_count++];
 229                 ctrl |= (1 << 8) | (1 << 9);    /* mask both IRQs */
 230                 if (using_inta)
 231                         ctrl &= ~(1 << 6);      /* unmask INTA */
 232                 *((unsigned int *)hwif->select_data) = ctrl;
 233                 (void) pci_write_config_dword(dev, 0x40, ctrl);
 234
 235                 /*
 236                  * Set prefetch size to 512 bytes for both ports,
 237                  * but don't turn on/off prefetching here.
 238                  */
 239                 pci_write_config_byte(dev, 0x55, 0xee);
 240
 241 #ifdef __sparc_v9__
 242                 /*
 243                  * XXX: Reset the device, if we don't it will not respond
 244                  *      to SELECT_DRIVE() properly during first probe_hwif().
 245                  */
 246                 timeout = 10000;
 247                 outb(12, hwif->io_ports[IDE_CONTROL_OFFSET]);
 248                 udelay(10);
 249                 outb(8, hwif->io_ports[IDE_CONTROL_OFFSET]);
 250                 do {
 251                         udelay(50);
 252                         stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
 253                         if (stat == 0xff)
 254                                 break;
 255                 } while ((stat & BUSY_STAT) && --timeout);
 256 #endif
 257         }
 258
 259         if (!using_inta)
 260                 hwif->irq = ide_default_irq(hwif->io_ports[IDE_DATA_OFFSET]);
 261         else if (!hwif->irq && hwif->mate && hwif->mate->irq)
 262                 hwif->irq = hwif->mate->irq;    /* share IRQ with mate */
 263
 264         if (!hwif->dma_base)
 265                 return;
 266
 267         outb(0x60, hwif->dma_status);
 268         hwif->dma_setup = &ns87415_ide_dma_setup;
 269         hwif->ide_dma_check = &ns87415_ide_dma_check;
 270         hwif->ide_dma_end = &ns87415_ide_dma_end;
 271
 272         if (!noautodma)
 273                 hwif->autodma = 1;
 274         hwif->drives[0].autodma = hwif->autodma;
 275         hwif->drives[1].autodma = hwif->autodma;
 276 }
 277
 278 static ide_pci_device_t ns87415_chipset __devinitdata = {
 279         .name           = "NS87415",
 280 #ifdef CONFIG_SUPERIO
 281         .init_iops      = init_iops_ns87415,
 282 #endif
 283         .init_hwif      = init_hwif_ns87415,
 284         .channels       = 2,
 285         .autodma        = AUTODMA,
 286         .bootable       = ON_BOARD,
 287 };
 288
 289 static int __devinit ns87415_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 290 {
 291         return ide_setup_pci_device(dev, &ns87415_chipset);
 292 }
 293
 294 static struct pci_device_id ns87415_pci_tbl[] = {
 295         { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
 296         { 0, },
 297 };
 298 MODULE_DEVICE_TABLE(pci, ns87415_pci_tbl);
 299
 300 static struct pci_driver driver = {
 301         .name           = "NS87415_IDE",
 302         .id_table       = ns87415_pci_tbl,
 303         .probe          = ns87415_init_one,
 304 };
 305
 306 static int __init ns87415_ide_init(void)
 307 {
 308         return ide_pci_register_driver(&driver);
 309 }
 310
 311 module_init(ns87415_ide_init);
 312
 313 MODULE_AUTHOR("Mark Lord, Eddie Dost, Andre Hedrick");
 314 MODULE_DESCRIPTION("PCI driver module for NS87415 IDE");
 315 MODULE_LICENSE("GPL");