arch/powerpc/platforms/83xx/mpc832x_mds.c

   1 /*
   2  * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
   3  *
   4  * Description:
   5  * MPC832xE MDS board specific routines.
   6  *
   7  * This program is free software; you can redistribute  it and/or modify it
   8  * under  the terms of  the GNU General  Public License as published by the
   9  * Free Software Foundation;  either version 2 of the  License, or (at your
  10  * option) any later version.
  11  */
  12
  13 #include <linux/stddef.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/errno.h>
  17 #include <linux/reboot.h>
  18 #include <linux/pci.h>
  19 #include <linux/kdev_t.h>
  20 #include <linux/major.h>
  21 #include <linux/console.h>
  22 #include <linux/delay.h>
  23 #include <linux/seq_file.h>
  24 #include <linux/root_dev.h>
  25 #include <linux/initrd.h>
  26 #include <linux/of_platform.h>
  27 #include <linux/of_device.h>
  28
  29 #include <asm/system.h>
  30 #include <asm/atomic.h>
  31 #include <asm/time.h>
  32 #include <asm/io.h>
  33 #include <asm/machdep.h>
  34 #include <asm/ipic.h>
  35 #include <asm/irq.h>
  36 #include <asm/prom.h>
  37 #include <asm/udbg.h>
  38 #include <sysdev/fsl_soc.h>
  39 #include <sysdev/fsl_pci.h>
  40 #include <asm/qe.h>
  41 #include <asm/qe_ic.h>
  42
  43 #include "mpc83xx.h"
  44
  45 #undef DEBUG
  46 #ifdef DEBUG
  47 #define DBG(fmt...) udbg_printf(fmt)
  48 #else
  49 #define DBG(fmt...)
  50 #endif
  51
  52 static u8 *bcsr_regs = NULL;
  53
  54 /* ************************************************************************
  55  *
  56  * Setup the architecture
  57  *
  58  */
  59 static void __init mpc832x_sys_setup_arch(void)
  60 {
  61         struct device_node *np;
  62
  63         if (ppc_md.progress)
  64                 ppc_md.progress("mpc832x_sys_setup_arch()", 0);
  65
  66         /* Map BCSR area */
  67         np = of_find_node_by_name(NULL, "bcsr");
  68         if (np != 0) {
  69                 struct resource res;
  70
  71                 of_address_to_resource(np, 0, &res);
  72                 bcsr_regs = ioremap(res.start, res.end - res.start +1);
  73                 of_node_put(np);
  74         }
  75
  76 #ifdef CONFIG_PCI
  77         for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
  78                 mpc83xx_add_bridge(np);
  79 #endif
  80
  81 #ifdef CONFIG_QUICC_ENGINE
  82         qe_reset();
  83
  84         if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
  85                 par_io_init(np);
  86                 of_node_put(np);
  87
  88                 for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
  89                         par_io_of_config(np);
  90         }
  91
  92         if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
  93                         != NULL){
  94                 /* Reset the Ethernet PHYs */
  95 #define BCSR8_FETH_RST 0x50
  96                 bcsr_regs[8] &= ~BCSR8_FETH_RST;
  97                 udelay(1000);
  98                 bcsr_regs[8] |= BCSR8_FETH_RST;
  99                 iounmap(bcsr_regs);
 100                 of_node_put(np);
 101         }
 102 #endif                          /* CONFIG_QUICC_ENGINE */
 103 }
 104
 105 static struct of_device_id mpc832x_ids[] = {
 106         { .type = "soc", },
 107         { .compatible = "soc", },
 108         { .type = "qe", },
 109         { .compatible = "fsl,qe", },
 110         {},
 111 };
 112
 113 static int __init mpc832x_declare_of_platform_devices(void)
 114 {
 115         /* Publish the QE devices */
 116         of_platform_bus_probe(NULL, mpc832x_ids, NULL);
 117
 118         return 0;
 119 }
 120 machine_device_initcall(mpc832x_mds, mpc832x_declare_of_platform_devices);
 121
 122 static void __init mpc832x_sys_init_IRQ(void)
 123 {
 124         struct device_node *np;
 125
 126         np = of_find_node_by_type(NULL, "ipic");
 127         if (!np)
 128                 return;
 129
 130         ipic_init(np, 0);
 131
 132         /* Initialize the default interrupt mapping priorities,
 133          * in case the boot rom changed something on us.
 134          */
 135         ipic_set_default_priority();
 136         of_node_put(np);
 137
 138 #ifdef CONFIG_QUICC_ENGINE
 139         np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
 140         if (!np) {
 141                 np = of_find_node_by_type(NULL, "qeic");
 142                 if (!np)
 143                         return;
 144         }
 145         qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
 146         of_node_put(np);
 147 #endif                          /* CONFIG_QUICC_ENGINE */
 148 }
 149
 150 /*
 151  * Called very early, MMU is off, device-tree isn't unflattened
 152  */
 153 static int __init mpc832x_sys_probe(void)
 154 {
 155         unsigned long root = of_get_flat_dt_root();
 156
 157         return of_flat_dt_is_compatible(root, "MPC832xMDS");
 158 }
 159
 160 define_machine(mpc832x_mds) {
 161         .name           = "MPC832x MDS",
 162         .probe          = mpc832x_sys_probe,
 163         .setup_arch     = mpc832x_sys_setup_arch,
 164         .init_IRQ       = mpc832x_sys_init_IRQ,
 165         .get_irq        = ipic_get_irq,
 166         .restart        = mpc83xx_restart,
 167         .time_init      = mpc83xx_time_init,
 168         .calibrate_decr = generic_calibrate_decr,
 169         .progress       = udbg_progress,
 170 };