2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
9 * Erich Boleyn : MP v1.4 and additional changes.
10 * Alan Cox : Added EBDA scanning
11 * Ingo Molnar : various cleanups and rewrites
12 * Maciej W. Rozycki: Bits for default MP configurations
13 * Paul Diefenbaugh: Added full ACPI support
17 #include <linux/init.h>
18 #include <linux/acpi.h>
19 #include <linux/delay.h>
20 #include <linux/config.h>
21 #include <linux/bootmem.h>
22 #include <linux/smp_lock.h>
23 #include <linux/kernel_stat.h>
24 #include <linux/mc146818rtc.h>
25 #include <linux/bitops.h>
30 #include <asm/mpspec.h>
31 #include <asm/io_apic.h>
33 #include <mach_apic.h>
34 #include <mach_mpparse.h>
35 #include <bios_ebda.h>
37 /* Have we found an MP table */
39 unsigned int __initdata maxcpus
= NR_CPUS
;
42 * Various Linux-internal data structures created from the
45 int apic_version
[MAX_APICS
];
46 int mp_bus_id_to_type
[MAX_MP_BUSSES
];
47 int mp_bus_id_to_node
[MAX_MP_BUSSES
];
48 int mp_bus_id_to_local
[MAX_MP_BUSSES
];
49 int quad_local_to_mp_bus_id
[NR_CPUS
/4][4];
50 int mp_bus_id_to_pci_bus
[MAX_MP_BUSSES
] = { [0 ... MAX_MP_BUSSES
-1] = -1 };
51 static int mp_current_pci_id
;
53 /* I/O APIC entries */
54 struct mpc_config_ioapic mp_ioapics
[MAX_IO_APICS
];
56 /* # of MP IRQ source entries */
57 struct mpc_config_intsrc mp_irqs
[MAX_IRQ_SOURCES
];
59 /* MP IRQ source entries */
65 unsigned long mp_lapic_addr
;
67 unsigned int def_to_bigsmp
= 0;
69 /* Processor that is doing the boot up */
70 unsigned int boot_cpu_physical_apicid
= -1U;
71 /* Internal processor count */
72 static unsigned int __devinitdata num_processors
;
74 /* Bitmask of physically existing CPUs */
75 physid_mask_t phys_cpu_present_map
;
77 u8 bios_cpu_apicid
[NR_CPUS
] = { [0 ... NR_CPUS
-1] = BAD_APICID
};
80 * Intel MP BIOS table parsing routines:
85 * Checksum an MP configuration block.
88 static int __init
mpf_checksum(unsigned char *mp
, int len
)
99 * Have to match translation table entries to main table entries by counter
100 * hence the mpc_record variable .... can't see a less disgusting way of
104 static int mpc_record
;
105 static struct mpc_config_translation
*translation_table
[MAX_MPC_ENTRY
] __initdata
;
107 #ifdef CONFIG_X86_NUMAQ
108 static int MP_valid_apicid(int apicid
, int version
)
110 return hweight_long(apicid
& 0xf) == 1 && (apicid
>> 4) != 0xf;
113 static int MP_valid_apicid(int apicid
, int version
)
116 return apicid
< 0xff;
122 static void __devinit
MP_processor_info (struct mpc_config_processor
*m
)
125 physid_mask_t phys_cpu
;
127 if (!(m
->mpc_cpuflag
& CPU_ENABLED
))
130 apicid
= mpc_apic_id(m
, translation_table
[mpc_record
]);
132 if (m
->mpc_featureflag
&(1<<0))
133 Dprintk(" Floating point unit present.\n");
134 if (m
->mpc_featureflag
&(1<<7))
135 Dprintk(" Machine Exception supported.\n");
136 if (m
->mpc_featureflag
&(1<<8))
137 Dprintk(" 64 bit compare & exchange supported.\n");
138 if (m
->mpc_featureflag
&(1<<9))
139 Dprintk(" Internal APIC present.\n");
140 if (m
->mpc_featureflag
&(1<<11))
141 Dprintk(" SEP present.\n");
142 if (m
->mpc_featureflag
&(1<<12))
143 Dprintk(" MTRR present.\n");
144 if (m
->mpc_featureflag
&(1<<13))
145 Dprintk(" PGE present.\n");
146 if (m
->mpc_featureflag
&(1<<14))
147 Dprintk(" MCA present.\n");
148 if (m
->mpc_featureflag
&(1<<15))
149 Dprintk(" CMOV present.\n");
150 if (m
->mpc_featureflag
&(1<<16))
151 Dprintk(" PAT present.\n");
152 if (m
->mpc_featureflag
&(1<<17))
153 Dprintk(" PSE present.\n");
154 if (m
->mpc_featureflag
&(1<<18))
155 Dprintk(" PSN present.\n");
156 if (m
->mpc_featureflag
&(1<<19))
157 Dprintk(" Cache Line Flush Instruction present.\n");
159 if (m
->mpc_featureflag
&(1<<21))
160 Dprintk(" Debug Trace and EMON Store present.\n");
161 if (m
->mpc_featureflag
&(1<<22))
162 Dprintk(" ACPI Thermal Throttle Registers present.\n");
163 if (m
->mpc_featureflag
&(1<<23))
164 Dprintk(" MMX present.\n");
165 if (m
->mpc_featureflag
&(1<<24))
166 Dprintk(" FXSR present.\n");
167 if (m
->mpc_featureflag
&(1<<25))
168 Dprintk(" XMM present.\n");
169 if (m
->mpc_featureflag
&(1<<26))
170 Dprintk(" Willamette New Instructions present.\n");
171 if (m
->mpc_featureflag
&(1<<27))
172 Dprintk(" Self Snoop present.\n");
173 if (m
->mpc_featureflag
&(1<<28))
174 Dprintk(" HT present.\n");
175 if (m
->mpc_featureflag
&(1<<29))
176 Dprintk(" Thermal Monitor present.\n");
177 /* 30, 31 Reserved */
180 if (m
->mpc_cpuflag
& CPU_BOOTPROCESSOR
) {
181 Dprintk(" Bootup CPU\n");
182 boot_cpu_physical_apicid
= m
->mpc_apicid
;
185 ver
= m
->mpc_apicver
;
187 if (!MP_valid_apicid(apicid
, ver
)) {
188 printk(KERN_WARNING
"Processor #%d INVALID. (Max ID: %d).\n",
189 m
->mpc_apicid
, MAX_APICS
);
197 printk(KERN_WARNING
"BIOS bug, APIC version is 0 for CPU#%d! "
198 "fixing up to 0x10. (tell your hw vendor)\n",
202 apic_version
[m
->mpc_apicid
] = ver
;
204 phys_cpu
= apicid_to_cpu_present(apicid
);
205 physids_or(phys_cpu_present_map
, phys_cpu_present_map
, phys_cpu
);
207 if (num_processors
>= NR_CPUS
) {
208 printk(KERN_WARNING
"WARNING: NR_CPUS limit of %i reached."
209 " Processor ignored.\n", NR_CPUS
);
213 if (num_processors
>= maxcpus
) {
214 printk(KERN_WARNING
"WARNING: maxcpus limit of %i reached."
215 " Processor ignored.\n", maxcpus
);
219 cpu_set(num_processors
, cpu_possible_map
);
222 if ((num_processors
> 8) &&
224 (boot_cpu_data
.x86_vendor
== X86_VENDOR_INTEL
))
229 bios_cpu_apicid
[num_processors
- 1] = m
->mpc_apicid
;
232 static void __init
MP_bus_info (struct mpc_config_bus
*m
)
236 memcpy(str
, m
->mpc_bustype
, 6);
239 mpc_oem_bus_info(m
, str
, translation_table
[mpc_record
]);
241 if (strncmp(str
, BUSTYPE_ISA
, sizeof(BUSTYPE_ISA
)-1) == 0) {
242 mp_bus_id_to_type
[m
->mpc_busid
] = MP_BUS_ISA
;
243 } else if (strncmp(str
, BUSTYPE_EISA
, sizeof(BUSTYPE_EISA
)-1) == 0) {
244 mp_bus_id_to_type
[m
->mpc_busid
] = MP_BUS_EISA
;
245 } else if (strncmp(str
, BUSTYPE_PCI
, sizeof(BUSTYPE_PCI
)-1) == 0) {
246 mpc_oem_pci_bus(m
, translation_table
[mpc_record
]);
247 mp_bus_id_to_type
[m
->mpc_busid
] = MP_BUS_PCI
;
248 mp_bus_id_to_pci_bus
[m
->mpc_busid
] = mp_current_pci_id
;
250 } else if (strncmp(str
, BUSTYPE_MCA
, sizeof(BUSTYPE_MCA
)-1) == 0) {
251 mp_bus_id_to_type
[m
->mpc_busid
] = MP_BUS_MCA
;
252 } else if (strncmp(str
, BUSTYPE_NEC98
, sizeof(BUSTYPE_NEC98
)-1) == 0) {
253 mp_bus_id_to_type
[m
->mpc_busid
] = MP_BUS_NEC98
;
255 printk(KERN_WARNING
"Unknown bustype %s - ignoring\n", str
);
259 static void __init
MP_ioapic_info (struct mpc_config_ioapic
*m
)
261 if (!(m
->mpc_flags
& MPC_APIC_USABLE
))
264 printk(KERN_INFO
"I/O APIC #%d Version %d at 0x%lX.\n",
265 m
->mpc_apicid
, m
->mpc_apicver
, m
->mpc_apicaddr
);
266 if (nr_ioapics
>= MAX_IO_APICS
) {
267 printk(KERN_CRIT
"Max # of I/O APICs (%d) exceeded (found %d).\n",
268 MAX_IO_APICS
, nr_ioapics
);
269 panic("Recompile kernel with bigger MAX_IO_APICS!.\n");
271 if (!m
->mpc_apicaddr
) {
272 printk(KERN_ERR
"WARNING: bogus zero I/O APIC address"
273 " found in MP table, skipping!\n");
276 mp_ioapics
[nr_ioapics
] = *m
;
280 static void __init
MP_intsrc_info (struct mpc_config_intsrc
*m
)
282 mp_irqs
[mp_irq_entries
] = *m
;
283 Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
284 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
285 m
->mpc_irqtype
, m
->mpc_irqflag
& 3,
286 (m
->mpc_irqflag
>> 2) & 3, m
->mpc_srcbus
,
287 m
->mpc_srcbusirq
, m
->mpc_dstapic
, m
->mpc_dstirq
);
288 if (++mp_irq_entries
== MAX_IRQ_SOURCES
)
289 panic("Max # of irq sources exceeded!!\n");
292 static void __init
MP_lintsrc_info (struct mpc_config_lintsrc
*m
)
294 Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
295 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
296 m
->mpc_irqtype
, m
->mpc_irqflag
& 3,
297 (m
->mpc_irqflag
>> 2) &3, m
->mpc_srcbusid
,
298 m
->mpc_srcbusirq
, m
->mpc_destapic
, m
->mpc_destapiclint
);
300 * Well it seems all SMP boards in existence
301 * use ExtINT/LVT1 == LINT0 and
302 * NMI/LVT2 == LINT1 - the following check
303 * will show us if this assumptions is false.
304 * Until then we do not have to add baggage.
306 if ((m
->mpc_irqtype
== mp_ExtINT
) &&
307 (m
->mpc_destapiclint
!= 0))
309 if ((m
->mpc_irqtype
== mp_NMI
) &&
310 (m
->mpc_destapiclint
!= 1))
314 #ifdef CONFIG_X86_NUMAQ
315 static void __init
MP_translation_info (struct mpc_config_translation
*m
)
317 printk(KERN_INFO
"Translation: record %d, type %d, quad %d, global %d, local %d\n", mpc_record
, m
->trans_type
, m
->trans_quad
, m
->trans_global
, m
->trans_local
);
319 if (mpc_record
>= MAX_MPC_ENTRY
)
320 printk(KERN_ERR
"MAX_MPC_ENTRY exceeded!\n");
322 translation_table
[mpc_record
] = m
; /* stash this for later */
323 if (m
->trans_quad
< MAX_NUMNODES
&& !node_online(m
->trans_quad
))
324 node_set_online(m
->trans_quad
);
328 * Read/parse the MPC oem tables
331 static void __init
smp_read_mpc_oem(struct mp_config_oemtable
*oemtable
, \
332 unsigned short oemsize
)
334 int count
= sizeof (*oemtable
); /* the header size */
335 unsigned char *oemptr
= ((unsigned char *)oemtable
)+count
;
338 printk(KERN_INFO
"Found an OEM MPC table at %8p - parsing it ... \n", oemtable
);
339 if (memcmp(oemtable
->oem_signature
,MPC_OEM_SIGNATURE
,4))
341 printk(KERN_WARNING
"SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
342 oemtable
->oem_signature
[0],
343 oemtable
->oem_signature
[1],
344 oemtable
->oem_signature
[2],
345 oemtable
->oem_signature
[3]);
348 if (mpf_checksum((unsigned char *)oemtable
,oemtable
->oem_length
))
350 printk(KERN_WARNING
"SMP oem mptable: checksum error!\n");
353 while (count
< oemtable
->oem_length
) {
357 struct mpc_config_translation
*m
=
358 (struct mpc_config_translation
*)oemptr
;
359 MP_translation_info(m
);
360 oemptr
+= sizeof(*m
);
367 printk(KERN_WARNING
"Unrecognised OEM table entry type! - %d\n", (int) *oemptr
);
374 static inline void mps_oem_check(struct mp_config_table
*mpc
, char *oem
,
377 if (strncmp(oem
, "IBM NUMA", 8))
378 printk("Warning! May not be a NUMA-Q system!\n");
380 smp_read_mpc_oem((struct mp_config_oemtable
*) mpc
->mpc_oemptr
,
383 #endif /* CONFIG_X86_NUMAQ */
389 static int __init
smp_read_mpc(struct mp_config_table
*mpc
)
393 int count
=sizeof(*mpc
);
394 unsigned char *mpt
=((unsigned char *)mpc
)+count
;
396 if (memcmp(mpc
->mpc_signature
,MPC_SIGNATURE
,4)) {
397 printk(KERN_ERR
"SMP mptable: bad signature [0x%x]!\n",
398 *(u32
*)mpc
->mpc_signature
);
401 if (mpf_checksum((unsigned char *)mpc
,mpc
->mpc_length
)) {
402 printk(KERN_ERR
"SMP mptable: checksum error!\n");
405 if (mpc
->mpc_spec
!=0x01 && mpc
->mpc_spec
!=0x04) {
406 printk(KERN_ERR
"SMP mptable: bad table version (%d)!!\n",
410 if (!mpc
->mpc_lapic
) {
411 printk(KERN_ERR
"SMP mptable: null local APIC address!\n");
414 memcpy(oem
,mpc
->mpc_oem
,8);
416 printk(KERN_INFO
"OEM ID: %s ",oem
);
418 memcpy(str
,mpc
->mpc_productid
,12);
420 printk("Product ID: %s ",str
);
422 mps_oem_check(mpc
, oem
, str
);
424 printk("APIC at: 0x%lX\n",mpc
->mpc_lapic
);
427 * Save the local APIC address (it might be non-default) -- but only
428 * if we're not using ACPI.
431 mp_lapic_addr
= mpc
->mpc_lapic
;
434 * Now process the configuration blocks.
437 while (count
< mpc
->mpc_length
) {
441 struct mpc_config_processor
*m
=
442 (struct mpc_config_processor
*)mpt
;
443 /* ACPI may have already provided this data */
445 MP_processor_info(m
);
452 struct mpc_config_bus
*m
=
453 (struct mpc_config_bus
*)mpt
;
461 struct mpc_config_ioapic
*m
=
462 (struct mpc_config_ioapic
*)mpt
;
470 struct mpc_config_intsrc
*m
=
471 (struct mpc_config_intsrc
*)mpt
;
480 struct mpc_config_lintsrc
*m
=
481 (struct mpc_config_lintsrc
*)mpt
;
489 count
= mpc
->mpc_length
;
495 clustered_apic_check();
497 printk(KERN_ERR
"SMP mptable: no processors registered!\n");
498 return num_processors
;
501 static int __init
ELCR_trigger(unsigned int irq
)
505 port
= 0x4d0 + (irq
>> 3);
506 return (inb(port
) >> (irq
& 7)) & 1;
509 static void __init
construct_default_ioirq_mptable(int mpc_default_type
)
511 struct mpc_config_intsrc intsrc
;
513 int ELCR_fallback
= 0;
515 intsrc
.mpc_type
= MP_INTSRC
;
516 intsrc
.mpc_irqflag
= 0; /* conforming */
517 intsrc
.mpc_srcbus
= 0;
518 intsrc
.mpc_dstapic
= mp_ioapics
[0].mpc_apicid
;
520 intsrc
.mpc_irqtype
= mp_INT
;
523 * If true, we have an ISA/PCI system with no IRQ entries
524 * in the MP table. To prevent the PCI interrupts from being set up
525 * incorrectly, we try to use the ELCR. The sanity check to see if
526 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
527 * never be level sensitive, so we simply see if the ELCR agrees.
528 * If it does, we assume it's valid.
530 if (mpc_default_type
== 5) {
531 printk(KERN_INFO
"ISA/PCI bus type with no IRQ information... falling back to ELCR\n");
533 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || ELCR_trigger(13))
534 printk(KERN_WARNING
"ELCR contains invalid data... not using ELCR\n");
536 printk(KERN_INFO
"Using ELCR to identify PCI interrupts\n");
541 for (i
= 0; i
< 16; i
++) {
542 switch (mpc_default_type
) {
544 if (i
== 0 || i
== 13)
545 continue; /* IRQ0 & IRQ13 not connected */
549 continue; /* IRQ2 is never connected */
554 * If the ELCR indicates a level-sensitive interrupt, we
555 * copy that information over to the MP table in the
556 * irqflag field (level sensitive, active high polarity).
559 intsrc
.mpc_irqflag
= 13;
561 intsrc
.mpc_irqflag
= 0;
564 intsrc
.mpc_srcbusirq
= i
;
565 intsrc
.mpc_dstirq
= i
? i
: 2; /* IRQ0 to INTIN2 */
566 MP_intsrc_info(&intsrc
);
569 intsrc
.mpc_irqtype
= mp_ExtINT
;
570 intsrc
.mpc_srcbusirq
= 0;
571 intsrc
.mpc_dstirq
= 0; /* 8259A to INTIN0 */
572 MP_intsrc_info(&intsrc
);
575 static inline void __init
construct_default_ISA_mptable(int mpc_default_type
)
577 struct mpc_config_processor processor
;
578 struct mpc_config_bus bus
;
579 struct mpc_config_ioapic ioapic
;
580 struct mpc_config_lintsrc lintsrc
;
581 int linttypes
[2] = { mp_ExtINT
, mp_NMI
};
585 * local APIC has default address
587 mp_lapic_addr
= APIC_DEFAULT_PHYS_BASE
;
590 * 2 CPUs, numbered 0 & 1.
592 processor
.mpc_type
= MP_PROCESSOR
;
593 /* Either an integrated APIC or a discrete 82489DX. */
594 processor
.mpc_apicver
= mpc_default_type
> 4 ? 0x10 : 0x01;
595 processor
.mpc_cpuflag
= CPU_ENABLED
;
596 processor
.mpc_cpufeature
= (boot_cpu_data
.x86
<< 8) |
597 (boot_cpu_data
.x86_model
<< 4) |
598 boot_cpu_data
.x86_mask
;
599 processor
.mpc_featureflag
= boot_cpu_data
.x86_capability
[0];
600 processor
.mpc_reserved
[0] = 0;
601 processor
.mpc_reserved
[1] = 0;
602 for (i
= 0; i
< 2; i
++) {
603 processor
.mpc_apicid
= i
;
604 MP_processor_info(&processor
);
607 bus
.mpc_type
= MP_BUS
;
609 switch (mpc_default_type
) {
612 printk(KERN_ERR
"Unknown standard configuration %d\n",
617 memcpy(bus
.mpc_bustype
, "ISA ", 6);
622 memcpy(bus
.mpc_bustype
, "EISA ", 6);
626 memcpy(bus
.mpc_bustype
, "MCA ", 6);
629 if (mpc_default_type
> 4) {
631 memcpy(bus
.mpc_bustype
, "PCI ", 6);
635 ioapic
.mpc_type
= MP_IOAPIC
;
636 ioapic
.mpc_apicid
= 2;
637 ioapic
.mpc_apicver
= mpc_default_type
> 4 ? 0x10 : 0x01;
638 ioapic
.mpc_flags
= MPC_APIC_USABLE
;
639 ioapic
.mpc_apicaddr
= 0xFEC00000;
640 MP_ioapic_info(&ioapic
);
643 * We set up most of the low 16 IO-APIC pins according to MPS rules.
645 construct_default_ioirq_mptable(mpc_default_type
);
647 lintsrc
.mpc_type
= MP_LINTSRC
;
648 lintsrc
.mpc_irqflag
= 0; /* conforming */
649 lintsrc
.mpc_srcbusid
= 0;
650 lintsrc
.mpc_srcbusirq
= 0;
651 lintsrc
.mpc_destapic
= MP_APIC_ALL
;
652 for (i
= 0; i
< 2; i
++) {
653 lintsrc
.mpc_irqtype
= linttypes
[i
];
654 lintsrc
.mpc_destapiclint
= i
;
655 MP_lintsrc_info(&lintsrc
);
659 static struct intel_mp_floating
*mpf_found
;
662 * Scan the memory blocks for an SMP configuration block.
664 void __init
get_smp_config (void)
666 struct intel_mp_floating
*mpf
= mpf_found
;
669 * ACPI supports both logical (e.g. Hyper-Threading) and physical
670 * processors, where MPS only supports physical.
672 if (acpi_lapic
&& acpi_ioapic
) {
673 printk(KERN_INFO
"Using ACPI (MADT) for SMP configuration information\n");
677 printk(KERN_INFO
"Using ACPI for processor (LAPIC) configuration information\n");
679 printk(KERN_INFO
"Intel MultiProcessor Specification v1.%d\n", mpf
->mpf_specification
);
680 if (mpf
->mpf_feature2
& (1<<7)) {
681 printk(KERN_INFO
" IMCR and PIC compatibility mode.\n");
684 printk(KERN_INFO
" Virtual Wire compatibility mode.\n");
689 * Now see if we need to read further.
691 if (mpf
->mpf_feature1
!= 0) {
693 printk(KERN_INFO
"Default MP configuration #%d\n", mpf
->mpf_feature1
);
694 construct_default_ISA_mptable(mpf
->mpf_feature1
);
696 } else if (mpf
->mpf_physptr
) {
699 * Read the physical hardware table. Anything here will
700 * override the defaults.
702 if (!smp_read_mpc((void *)mpf
->mpf_physptr
)) {
703 smp_found_config
= 0;
704 printk(KERN_ERR
"BIOS bug, MP table errors detected!...\n");
705 printk(KERN_ERR
"... disabling SMP support. (tell your hw vendor)\n");
709 * If there are no explicit MP IRQ entries, then we are
710 * broken. We set up most of the low 16 IO-APIC pins to
711 * ISA defaults and hope it will work.
713 if (!mp_irq_entries
) {
714 struct mpc_config_bus bus
;
716 printk(KERN_ERR
"BIOS bug, no explicit IRQ entries, using default mptable. (tell your hw vendor)\n");
718 bus
.mpc_type
= MP_BUS
;
720 memcpy(bus
.mpc_bustype
, "ISA ", 6);
723 construct_default_ioirq_mptable(0);
729 printk(KERN_INFO
"Processors: %d\n", num_processors
);
731 * Only use the first configuration found.
735 static int __init
smp_scan_config (unsigned long base
, unsigned long length
)
737 unsigned long *bp
= phys_to_virt(base
);
738 struct intel_mp_floating
*mpf
;
740 Dprintk("Scan SMP from %p for %ld bytes.\n", bp
,length
);
741 if (sizeof(*mpf
) != 16)
742 printk("Error: MPF size\n");
745 mpf
= (struct intel_mp_floating
*)bp
;
746 if ((*bp
== SMP_MAGIC_IDENT
) &&
747 (mpf
->mpf_length
== 1) &&
748 !mpf_checksum((unsigned char *)bp
, 16) &&
749 ((mpf
->mpf_specification
== 1)
750 || (mpf
->mpf_specification
== 4)) ) {
752 smp_found_config
= 1;
753 printk(KERN_INFO
"found SMP MP-table at %08lx\n",
755 reserve_bootmem(virt_to_phys(mpf
), PAGE_SIZE
);
756 if (mpf
->mpf_physptr
) {
758 * We cannot access to MPC table to compute
759 * table size yet, as only few megabytes from
760 * the bottom is mapped now.
761 * PC-9800's MPC table places on the very last
762 * of physical memory; so that simply reserving
763 * PAGE_SIZE from mpg->mpf_physptr yields BUG()
764 * in reserve_bootmem.
766 unsigned long size
= PAGE_SIZE
;
767 unsigned long end
= max_low_pfn
* PAGE_SIZE
;
768 if (mpf
->mpf_physptr
+ size
> end
)
769 size
= end
- mpf
->mpf_physptr
;
770 reserve_bootmem(mpf
->mpf_physptr
, size
);
782 void __init
find_smp_config (void)
784 unsigned int address
;
787 * FIXME: Linux assumes you have 640K of base ram..
788 * this continues the error...
790 * 1) Scan the bottom 1K for a signature
791 * 2) Scan the top 1K of base RAM
792 * 3) Scan the 64K of bios
794 if (smp_scan_config(0x0,0x400) ||
795 smp_scan_config(639*0x400,0x400) ||
796 smp_scan_config(0xF0000,0x10000))
799 * If it is an SMP machine we should know now, unless the
800 * configuration is in an EISA/MCA bus machine with an
801 * extended bios data area.
803 * there is a real-mode segmented pointer pointing to the
804 * 4K EBDA area at 0x40E, calculate and scan it here.
806 * NOTE! There are Linux loaders that will corrupt the EBDA
807 * area, and as such this kind of SMP config may be less
808 * trustworthy, simply because the SMP table may have been
809 * stomped on during early boot. These loaders are buggy and
812 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
815 address
= get_bios_ebda();
817 smp_scan_config(address
, 0x400);
820 /* --------------------------------------------------------------------------
821 ACPI-based MP Configuration
822 -------------------------------------------------------------------------- */
826 void __init
mp_register_lapic_address (
829 mp_lapic_addr
= (unsigned long) address
;
831 set_fixmap_nocache(FIX_APIC_BASE
, mp_lapic_addr
);
833 if (boot_cpu_physical_apicid
== -1U)
834 boot_cpu_physical_apicid
= GET_APIC_ID(apic_read(APIC_ID
));
836 Dprintk("Boot CPU = %d\n", boot_cpu_physical_apicid
);
840 void __devinit
mp_register_lapic (
844 struct mpc_config_processor processor
;
847 if (MAX_APICS
- id
<= 0) {
848 printk(KERN_WARNING
"Processor #%d invalid (max %d)\n",
853 if (id
== boot_cpu_physical_apicid
)
856 processor
.mpc_type
= MP_PROCESSOR
;
857 processor
.mpc_apicid
= id
;
858 processor
.mpc_apicver
= GET_APIC_VERSION(apic_read(APIC_LVR
));
859 processor
.mpc_cpuflag
= (enabled
? CPU_ENABLED
: 0);
860 processor
.mpc_cpuflag
|= (boot_cpu
? CPU_BOOTPROCESSOR
: 0);
861 processor
.mpc_cpufeature
= (boot_cpu_data
.x86
<< 8) |
862 (boot_cpu_data
.x86_model
<< 4) | boot_cpu_data
.x86_mask
;
863 processor
.mpc_featureflag
= boot_cpu_data
.x86_capability
[0];
864 processor
.mpc_reserved
[0] = 0;
865 processor
.mpc_reserved
[1] = 0;
867 MP_processor_info(&processor
);
870 #ifdef CONFIG_X86_IO_APIC
873 #define MP_MAX_IOAPIC_PIN 127
875 static struct mp_ioapic_routing
{
879 u32 pin_programmed
[4];
880 } mp_ioapic_routing
[MAX_IO_APICS
];
883 static int mp_find_ioapic (
888 /* Find the IOAPIC that manages this GSI. */
889 for (i
= 0; i
< nr_ioapics
; i
++) {
890 if ((gsi
>= mp_ioapic_routing
[i
].gsi_base
)
891 && (gsi
<= mp_ioapic_routing
[i
].gsi_end
))
895 printk(KERN_ERR
"ERROR: Unable to locate IOAPIC for GSI %d\n", gsi
);
901 void __init
mp_register_ioapic (
908 if (nr_ioapics
>= MAX_IO_APICS
) {
909 printk(KERN_ERR
"ERROR: Max # of I/O APICs (%d) exceeded "
910 "(found %d)\n", MAX_IO_APICS
, nr_ioapics
);
911 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
914 printk(KERN_ERR
"WARNING: Bogus (zero) I/O APIC address"
915 " found in MADT table, skipping!\n");
921 mp_ioapics
[idx
].mpc_type
= MP_IOAPIC
;
922 mp_ioapics
[idx
].mpc_flags
= MPC_APIC_USABLE
;
923 mp_ioapics
[idx
].mpc_apicaddr
= address
;
925 set_fixmap_nocache(FIX_IO_APIC_BASE_0
+ idx
, address
);
926 if ((boot_cpu_data
.x86_vendor
== X86_VENDOR_INTEL
) && (boot_cpu_data
.x86
< 15))
927 mp_ioapics
[idx
].mpc_apicid
= io_apic_get_unique_id(idx
, id
);
929 mp_ioapics
[idx
].mpc_apicid
= id
;
930 mp_ioapics
[idx
].mpc_apicver
= io_apic_get_version(idx
);
933 * Build basic GSI lookup table to facilitate gsi->io_apic lookups
934 * and to prevent reprogramming of IOAPIC pins (PCI GSIs).
936 mp_ioapic_routing
[idx
].apic_id
= mp_ioapics
[idx
].mpc_apicid
;
937 mp_ioapic_routing
[idx
].gsi_base
= gsi_base
;
938 mp_ioapic_routing
[idx
].gsi_end
= gsi_base
+
939 io_apic_get_redir_entries(idx
);
941 printk("IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, "
942 "GSI %d-%d\n", idx
, mp_ioapics
[idx
].mpc_apicid
,
943 mp_ioapics
[idx
].mpc_apicver
, mp_ioapics
[idx
].mpc_apicaddr
,
944 mp_ioapic_routing
[idx
].gsi_base
,
945 mp_ioapic_routing
[idx
].gsi_end
);
951 void __init
mp_override_legacy_irq (
957 struct mpc_config_intsrc intsrc
;
962 * Convert 'gsi' to 'ioapic.pin'.
964 ioapic
= mp_find_ioapic(gsi
);
967 pin
= gsi
- mp_ioapic_routing
[ioapic
].gsi_base
;
970 * TBD: This check is for faulty timer entries, where the override
971 * erroneously sets the trigger to level, resulting in a HUGE
972 * increase of timer interrupts!
974 if ((bus_irq
== 0) && (trigger
== 3))
977 intsrc
.mpc_type
= MP_INTSRC
;
978 intsrc
.mpc_irqtype
= mp_INT
;
979 intsrc
.mpc_irqflag
= (trigger
<< 2) | polarity
;
980 intsrc
.mpc_srcbus
= MP_ISA_BUS
;
981 intsrc
.mpc_srcbusirq
= bus_irq
; /* IRQ */
982 intsrc
.mpc_dstapic
= mp_ioapics
[ioapic
].mpc_apicid
; /* APIC ID */
983 intsrc
.mpc_dstirq
= pin
; /* INTIN# */
985 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n",
986 intsrc
.mpc_irqtype
, intsrc
.mpc_irqflag
& 3,
987 (intsrc
.mpc_irqflag
>> 2) & 3, intsrc
.mpc_srcbus
,
988 intsrc
.mpc_srcbusirq
, intsrc
.mpc_dstapic
, intsrc
.mpc_dstirq
);
990 mp_irqs
[mp_irq_entries
] = intsrc
;
991 if (++mp_irq_entries
== MAX_IRQ_SOURCES
)
992 panic("Max # of irq sources exceeded!\n");
999 void __init
mp_config_acpi_legacy_irqs (void)
1001 struct mpc_config_intsrc intsrc
;
1006 * Fabricate the legacy ISA bus (bus #31).
1008 mp_bus_id_to_type
[MP_ISA_BUS
] = MP_BUS_ISA
;
1009 Dprintk("Bus #%d is ISA\n", MP_ISA_BUS
);
1012 * Older generations of ES7000 have no legacy identity mappings
1014 if (es7000_plat
== 1)
1018 * Locate the IOAPIC that manages the ISA IRQs (0-15).
1020 ioapic
= mp_find_ioapic(0);
1024 intsrc
.mpc_type
= MP_INTSRC
;
1025 intsrc
.mpc_irqflag
= 0; /* Conforming */
1026 intsrc
.mpc_srcbus
= MP_ISA_BUS
;
1027 intsrc
.mpc_dstapic
= mp_ioapics
[ioapic
].mpc_apicid
;
1030 * Use the default configuration for the IRQs 0-15. Unless
1031 * overriden by (MADT) interrupt source override entries.
1033 for (i
= 0; i
< 16; i
++) {
1036 for (idx
= 0; idx
< mp_irq_entries
; idx
++) {
1037 struct mpc_config_intsrc
*irq
= mp_irqs
+ idx
;
1039 /* Do we already have a mapping for this ISA IRQ? */
1040 if (irq
->mpc_srcbus
== MP_ISA_BUS
&& irq
->mpc_srcbusirq
== i
)
1043 /* Do we already have a mapping for this IOAPIC pin */
1044 if ((irq
->mpc_dstapic
== intsrc
.mpc_dstapic
) &&
1045 (irq
->mpc_dstirq
== i
))
1049 if (idx
!= mp_irq_entries
) {
1050 printk(KERN_DEBUG
"ACPI: IRQ%d used by override.\n", i
);
1051 continue; /* IRQ already used */
1054 intsrc
.mpc_irqtype
= mp_INT
;
1055 intsrc
.mpc_srcbusirq
= i
; /* Identity mapped */
1056 intsrc
.mpc_dstirq
= i
;
1058 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, "
1059 "%d-%d\n", intsrc
.mpc_irqtype
, intsrc
.mpc_irqflag
& 3,
1060 (intsrc
.mpc_irqflag
>> 2) & 3, intsrc
.mpc_srcbus
,
1061 intsrc
.mpc_srcbusirq
, intsrc
.mpc_dstapic
,
1064 mp_irqs
[mp_irq_entries
] = intsrc
;
1065 if (++mp_irq_entries
== MAX_IRQ_SOURCES
)
1066 panic("Max # of irq sources exceeded!\n");
1070 #define MAX_GSI_NUM 4096
1072 int mp_register_gsi (u32 gsi
, int edge_level
, int active_high_low
)
1077 static int pci_irq
= 16;
1079 * Mapping between Global System Interrups, which
1080 * represent all possible interrupts, and IRQs
1081 * assigned to actual devices.
1083 static int gsi_to_irq
[MAX_GSI_NUM
];
1085 /* Don't set up the ACPI SCI because it's already set up */
1086 if (acpi_fadt
.sci_int
== gsi
)
1089 ioapic
= mp_find_ioapic(gsi
);
1091 printk(KERN_WARNING
"No IOAPIC for GSI %u\n", gsi
);
1095 ioapic_pin
= gsi
- mp_ioapic_routing
[ioapic
].gsi_base
;
1097 if (ioapic_renumber_irq
)
1098 gsi
= ioapic_renumber_irq(ioapic
, gsi
);
1101 * Avoid pin reprogramming. PRTs typically include entries
1102 * with redundant pin->gsi mappings (but unique PCI devices);
1103 * we only program the IOAPIC on the first.
1105 bit
= ioapic_pin
% 32;
1106 idx
= (ioapic_pin
< 32) ? 0 : (ioapic_pin
/ 32);
1108 printk(KERN_ERR
"Invalid reference to IOAPIC pin "
1109 "%d-%d\n", mp_ioapic_routing
[ioapic
].apic_id
,
1113 if ((1<<bit
) & mp_ioapic_routing
[ioapic
].pin_programmed
[idx
]) {
1114 Dprintk(KERN_DEBUG
"Pin %d-%d already programmed\n",
1115 mp_ioapic_routing
[ioapic
].apic_id
, ioapic_pin
);
1116 return gsi_to_irq
[gsi
];
1119 mp_ioapic_routing
[ioapic
].pin_programmed
[idx
] |= (1<<bit
);
1123 * For PCI devices assign IRQs in order, avoiding gaps
1124 * due to unused I/O APIC pins.
1127 if (gsi
< MAX_GSI_NUM
) {
1131 * Don't assign IRQ used by ACPI SCI
1133 if (gsi
== acpi_fadt
.sci_int
)
1135 gsi_to_irq
[irq
] = gsi
;
1137 printk(KERN_ERR
"GSI %u is too high\n", gsi
);
1142 io_apic_set_pci_routing(ioapic
, ioapic_pin
, gsi
,
1143 edge_level
== ACPI_EDGE_SENSITIVE
? 0 : 1,
1144 active_high_low
== ACPI_ACTIVE_HIGH
? 0 : 1);
1148 #endif /* CONFIG_X86_IO_APIC */
1149 #endif /* CONFIG_ACPI */