arch/powerpc/kernel/setup_32.c

   1 /*
   2  * Common prep/pmac/chrp boot and setup code.
   3  */
   4
   5 #include <linux/module.h>
   6 #include <linux/string.h>
   7 #include <linux/sched.h>
   8 #include <linux/init.h>
   9 #include <linux/kernel.h>
  10 #include <linux/reboot.h>
  11 #include <linux/delay.h>
  12 #include <linux/initrd.h>
  13 #include <linux/tty.h>
  14 #include <linux/bootmem.h>
  15 #include <linux/seq_file.h>
  16 #include <linux/root_dev.h>
  17 #include <linux/cpu.h>
  18 #include <linux/console.h>
  19 #include <linux/lmb.h>
  20
  21 #include <asm/io.h>
  22 #include <asm/prom.h>
  23 #include <asm/processor.h>
  24 #include <asm/pgtable.h>
  25 #include <asm/setup.h>
  26 #include <asm/smp.h>
  27 #include <asm/elf.h>
  28 #include <asm/cputable.h>
  29 #include <asm/bootx.h>
  30 #include <asm/btext.h>
  31 #include <asm/machdep.h>
  32 #include <asm/uaccess.h>
  33 #include <asm/system.h>
  34 #include <asm/pmac_feature.h>
  35 #include <asm/sections.h>
  36 #include <asm/nvram.h>
  37 #include <asm/xmon.h>
  38 #include <asm/time.h>
  39 #include <asm/serial.h>
  40 #include <asm/udbg.h>
  41
  42 #include "setup.h"
  43
  44 #define DBG(fmt...)
  45
  46 extern void bootx_init(unsigned long r4, unsigned long phys);
  47
  48 int boot_cpuid;
  49 EXPORT_SYMBOL_GPL(boot_cpuid);
  50 int boot_cpuid_phys;
  51
  52 unsigned long ISA_DMA_THRESHOLD;
  53 unsigned int DMA_MODE_READ;
  54 unsigned int DMA_MODE_WRITE;
  55
  56 #ifdef CONFIG_VGA_CONSOLE
  57 unsigned long vgacon_remap_base;
  58 EXPORT_SYMBOL(vgacon_remap_base);
  59 #endif
  60
  61 /*
  62  * These are used in binfmt_elf.c to put aux entries on the stack
  63  * for each elf executable being started.
  64  */
  65 int dcache_bsize;
  66 int icache_bsize;
  67 int ucache_bsize;
  68
  69 /*
  70  * We're called here very early in the boot.  We determine the machine
  71  * type and call the appropriate low-level setup functions.
  72  *  -- Cort <cort@fsmlabs.com>
  73  *
  74  * Note that the kernel may be running at an address which is different
  75  * from the address that it was linked at, so we must use RELOC/PTRRELOC
  76  * to access static data (including strings).  -- paulus
  77  */
  78 notrace unsigned long __init early_init(unsigned long dt_ptr)
  79 {
  80         unsigned long offset = reloc_offset();
  81         struct cpu_spec *spec;
  82
  83         /* First zero the BSS -- use memset_io, some platforms don't have
  84          * caches on yet */
  85         memset_io((void __iomem *)PTRRELOC(&__bss_start), 0,
  86                         __bss_stop - __bss_start);
  87
  88         /*
  89          * Identify the CPU type and fix up code sections
  90          * that depend on which cpu we have.
  91          */
  92         spec = identify_cpu(offset, mfspr(SPRN_PVR));
  93
  94         do_feature_fixups(spec->cpu_features,
  95                           PTRRELOC(&__start___ftr_fixup),
  96                           PTRRELOC(&__stop___ftr_fixup));
  97
  98         do_lwsync_fixups(spec->cpu_features,
  99                          PTRRELOC(&__start___lwsync_fixup),
 100                          PTRRELOC(&__stop___lwsync_fixup));
 101
 102         return KERNELBASE + offset;
 103 }
 104
 105
 106 /*
 107  * Find out what kind of machine we're on and save any data we need
 108  * from the early boot process (devtree is copied on pmac by prom_init()).
 109  * This is called very early on the boot process, after a minimal
 110  * MMU environment has been set up but before MMU_init is called.
 111  */
 112 notrace void __init machine_init(unsigned long dt_ptr)
 113 {
 114         /* Enable early debugging if any specified (see udbg.h) */
 115         udbg_early_init();
 116
 117         /* Do some early initialization based on the flat device tree */
 118         early_init_devtree(__va(dt_ptr));
 119
 120         probe_machine();
 121
 122 #ifdef CONFIG_6xx
 123         if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
 124             cpu_has_feature(CPU_FTR_CAN_NAP))
 125                 ppc_md.power_save = ppc6xx_idle;
 126 #endif
 127
 128 #ifdef CONFIG_E500
 129         if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
 130             cpu_has_feature(CPU_FTR_CAN_NAP))
 131                 ppc_md.power_save = e500_idle;
 132 #endif
 133         if (ppc_md.progress)
 134                 ppc_md.progress("id mach(): done", 0x200);
 135 }
 136
 137 #ifdef CONFIG_BOOKE_WDT
 138 /* Checks wdt=x and wdt_period=xx command-line option */
 139 notrace int __init early_parse_wdt(char *p)
 140 {
 141         if (p && strncmp(p, "0", 1) != 0)
 142                booke_wdt_enabled = 1;
 143
 144         return 0;
 145 }
 146 early_param("wdt", early_parse_wdt);
 147
 148 int __init early_parse_wdt_period (char *p)
 149 {
 150         if (p)
 151                 booke_wdt_period = simple_strtoul(p, NULL, 0);
 152
 153         return 0;
 154 }
 155 early_param("wdt_period", early_parse_wdt_period);
 156 #endif  /* CONFIG_BOOKE_WDT */
 157
 158 /* Checks "l2cr=xxxx" command-line option */
 159 int __init ppc_setup_l2cr(char *str)
 160 {
 161         if (cpu_has_feature(CPU_FTR_L2CR)) {
 162                 unsigned long val = simple_strtoul(str, NULL, 0);
 163                 printk(KERN_INFO "l2cr set to %lx\n", val);
 164                 _set_L2CR(0);           /* force invalidate by disable cache */
 165                 _set_L2CR(val);         /* and enable it */
 166         }
 167         return 1;
 168 }
 169 __setup("l2cr=", ppc_setup_l2cr);
 170
 171 /* Checks "l3cr=xxxx" command-line option */
 172 int __init ppc_setup_l3cr(char *str)
 173 {
 174         if (cpu_has_feature(CPU_FTR_L3CR)) {
 175                 unsigned long val = simple_strtoul(str, NULL, 0);
 176                 printk(KERN_INFO "l3cr set to %lx\n", val);
 177                 _set_L3CR(val);         /* and enable it */
 178         }
 179         return 1;
 180 }
 181 __setup("l3cr=", ppc_setup_l3cr);
 182
 183 #ifdef CONFIG_GENERIC_NVRAM
 184
 185 /* Generic nvram hooks used by drivers/char/gen_nvram.c */
 186 unsigned char nvram_read_byte(int addr)
 187 {
 188         if (ppc_md.nvram_read_val)
 189                 return ppc_md.nvram_read_val(addr);
 190         return 0xff;
 191 }
 192 EXPORT_SYMBOL(nvram_read_byte);
 193
 194 void nvram_write_byte(unsigned char val, int addr)
 195 {
 196         if (ppc_md.nvram_write_val)
 197                 ppc_md.nvram_write_val(addr, val);
 198 }
 199 EXPORT_SYMBOL(nvram_write_byte);
 200
 201 void nvram_sync(void)
 202 {
 203         if (ppc_md.nvram_sync)
 204                 ppc_md.nvram_sync();
 205 }
 206 EXPORT_SYMBOL(nvram_sync);
 207
 208 #endif /* CONFIG_NVRAM */
 209
 210 int __init ppc_init(void)
 211 {
 212         /* clear the progress line */
 213         if (ppc_md.progress)
 214                 ppc_md.progress("             ", 0xffff);
 215
 216         /* call platform init */
 217         if (ppc_md.init != NULL) {
 218                 ppc_md.init();
 219         }
 220         return 0;
 221 }
 222
 223 arch_initcall(ppc_init);
 224
 225 #ifdef CONFIG_IRQSTACKS
 226 static void __init irqstack_early_init(void)
 227 {
 228         unsigned int i;
 229
 230         /* interrupt stacks must be in lowmem, we get that for free on ppc32
 231          * as the lmb is limited to lowmem by LMB_REAL_LIMIT */
 232         for_each_possible_cpu(i) {
 233                 softirq_ctx[i] = (struct thread_info *)
 234                         __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
 235                 hardirq_ctx[i] = (struct thread_info *)
 236                         __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
 237         }
 238 }
 239 #else
 240 #define irqstack_early_init()
 241 #endif
 242
 243 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
 244 static void __init exc_lvl_early_init(void)
 245 {
 246         unsigned int i;
 247
 248         /* interrupt stacks must be in lowmem, we get that for free on ppc32
 249          * as the lmb is limited to lowmem by LMB_REAL_LIMIT */
 250         for_each_possible_cpu(i) {
 251                 critirq_ctx[i] = (struct thread_info *)
 252                         __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
 253 #ifdef CONFIG_BOOKE
 254                 dbgirq_ctx[i] = (struct thread_info *)
 255                         __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
 256                 mcheckirq_ctx[i] = (struct thread_info *)
 257                         __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
 258 #endif
 259         }
 260 }
 261 #else
 262 #define exc_lvl_early_init()
 263 #endif
 264
 265 /* Warning, IO base is not yet inited */
 266 void __init setup_arch(char **cmdline_p)
 267 {
 268         *cmdline_p = cmd_line;
 269
 270         /* so udelay does something sensible, assume <= 1000 bogomips */
 271         loops_per_jiffy = 500000000 / HZ;
 272
 273         unflatten_device_tree();
 274         check_for_initrd();
 275
 276         if (ppc_md.init_early)
 277                 ppc_md.init_early();
 278
 279         find_legacy_serial_ports();
 280
 281         smp_setup_cpu_maps();
 282
 283         /* Register early console */
 284         register_early_udbg_console();
 285
 286         xmon_setup();
 287
 288         /*
 289          * Set cache line size based on type of cpu as a default.
 290          * Systems with OF can look in the properties on the cpu node(s)
 291          * for a possibly more accurate value.
 292          */
 293         dcache_bsize = cur_cpu_spec->dcache_bsize;
 294         icache_bsize = cur_cpu_spec->icache_bsize;
 295         ucache_bsize = 0;
 296         if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE))
 297                 ucache_bsize = icache_bsize = dcache_bsize;
 298
 299         /* reboot on panic */
 300         panic_timeout = 180;
 301
 302         if (ppc_md.panic)
 303                 setup_panic();
 304
 305         init_mm.start_code = (unsigned long)_stext;
 306         init_mm.end_code = (unsigned long) _etext;
 307         init_mm.end_data = (unsigned long) _edata;
 308         init_mm.brk = klimit;
 309
 310         exc_lvl_early_init();
 311
 312         irqstack_early_init();
 313
 314         /* set up the bootmem stuff with available memory */
 315         do_init_bootmem();
 316         if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
 317
 318 #ifdef CONFIG_DUMMY_CONSOLE
 319         conswitchp = &dummy_con;
 320 #endif
 321
 322         if (ppc_md.setup_arch)
 323                 ppc_md.setup_arch();
 324         if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
 325
 326         paging_init();
 327 }