drivers/net/cxgb3/adapter.h

   1 /*
   2  * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 /* This file should not be included directly.  Include common.h instead. */
  34
  35 #ifndef __T3_ADAPTER_H__
  36 #define __T3_ADAPTER_H__
  37
  38 #include <linux/pci.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/interrupt.h>
  41 #include <linux/timer.h>
  42 #include <linux/cache.h>
  43 #include <linux/mutex.h>
  44 #include <linux/bitops.h>
  45 #include <linux/inet_lro.h>
  46 #include "t3cdev.h"
  47 #include <asm/io.h>
  48
  49 struct vlan_group;
  50 struct adapter;
  51 struct sge_qset;
  52
  53 enum {                  /* rx_offload flags */
  54         T3_RX_CSUM      = 1 << 0,
  55         T3_LRO          = 1 << 1,
  56 };
  57
  58 struct port_info {
  59         struct adapter *adapter;
  60         struct vlan_group *vlan_grp;
  61         struct sge_qset *qs;
  62         u8 port_id;
  63         u8 rx_offload;
  64         u8 nqsets;
  65         u8 first_qset;
  66         struct cphy phy;
  67         struct cmac mac;
  68         struct link_config link_config;
  69         struct net_device_stats netstats;
  70         int activity;
  71         __be32 iscsi_ipv4addr;
  72 };
  73
  74 enum {                          /* adapter flags */
  75         FULL_INIT_DONE = (1 << 0),
  76         USING_MSI = (1 << 1),
  77         USING_MSIX = (1 << 2),
  78         QUEUES_BOUND = (1 << 3),
  79         TP_PARITY_INIT = (1 << 4),
  80         NAPI_INIT = (1 << 5),
  81 };
  82
  83 struct fl_pg_chunk {
  84         struct page *page;
  85         void *va;
  86         unsigned int offset;
  87 };
  88
  89 struct rx_desc;
  90 struct rx_sw_desc;
  91
  92 struct sge_fl {                     /* SGE per free-buffer list state */
  93         unsigned int buf_size;      /* size of each Rx buffer */
  94         unsigned int credits;       /* # of available Rx buffers */
  95         unsigned int size;          /* capacity of free list */
  96         unsigned int cidx;          /* consumer index */
  97         unsigned int pidx;          /* producer index */
  98         unsigned int gen;           /* free list generation */
  99         struct fl_pg_chunk pg_chunk;/* page chunk cache */
 100         unsigned int use_pages;     /* whether FL uses pages or sk_buffs */
 101         unsigned int order;         /* order of page allocations */
 102         struct rx_desc *desc;       /* address of HW Rx descriptor ring */
 103         struct rx_sw_desc *sdesc;   /* address of SW Rx descriptor ring */
 104         dma_addr_t   phys_addr;     /* physical address of HW ring start */
 105         unsigned int cntxt_id;      /* SGE context id for the free list */
 106         unsigned long empty;        /* # of times queue ran out of buffers */
 107         unsigned long alloc_failed; /* # of times buffer allocation failed */
 108 };
 109
 110 /*
 111  * Bundle size for grouping offload RX packets for delivery to the stack.
 112  * Don't make this too big as we do prefetch on each packet in a bundle.
 113  */
 114 # define RX_BUNDLE_SIZE 8
 115
 116 struct rsp_desc;
 117
 118 struct sge_rspq {               /* state for an SGE response queue */
 119         unsigned int credits;   /* # of pending response credits */
 120         unsigned int size;      /* capacity of response queue */
 121         unsigned int cidx;      /* consumer index */
 122         unsigned int gen;       /* current generation bit */
 123         unsigned int polling;   /* is the queue serviced through NAPI? */
 124         unsigned int holdoff_tmr;       /* interrupt holdoff timer in 100ns */
 125         unsigned int next_holdoff;      /* holdoff time for next interrupt */
 126         unsigned int rx_recycle_buf; /* whether recycling occurred
 127                                         within current sop-eop */
 128         struct rsp_desc *desc;  /* address of HW response ring */
 129         dma_addr_t phys_addr;   /* physical address of the ring */
 130         unsigned int cntxt_id;  /* SGE context id for the response q */
 131         spinlock_t lock;        /* guards response processing */
 132         struct sk_buff_head rx_queue; /* offload packet receive queue */
 133         struct sk_buff *pg_skb; /* used to build frag list in napi handler */
 134
 135         unsigned long offload_pkts;
 136         unsigned long offload_bundles;
 137         unsigned long eth_pkts; /* # of ethernet packets */
 138         unsigned long pure_rsps;        /* # of pure (non-data) responses */
 139         unsigned long imm_data; /* responses with immediate data */
 140         unsigned long rx_drops; /* # of packets dropped due to no mem */
 141         unsigned long async_notif; /* # of asynchronous notification events */
 142         unsigned long empty;    /* # of times queue ran out of credits */
 143         unsigned long nomem;    /* # of responses deferred due to no mem */
 144         unsigned long unhandled_irqs;   /* # of spurious intrs */
 145         unsigned long starved;
 146         unsigned long restarted;
 147 };
 148
 149 struct tx_desc;
 150 struct tx_sw_desc;
 151
 152 struct sge_txq {                /* state for an SGE Tx queue */
 153         unsigned long flags;    /* HW DMA fetch status */
 154         unsigned int in_use;    /* # of in-use Tx descriptors */
 155         unsigned int size;      /* # of descriptors */
 156         unsigned int processed; /* total # of descs HW has processed */
 157         unsigned int cleaned;   /* total # of descs SW has reclaimed */
 158         unsigned int stop_thres;        /* SW TX queue suspend threshold */
 159         unsigned int cidx;      /* consumer index */
 160         unsigned int pidx;      /* producer index */
 161         unsigned int gen;       /* current value of generation bit */
 162         unsigned int unacked;   /* Tx descriptors used since last COMPL */
 163         struct tx_desc *desc;   /* address of HW Tx descriptor ring */
 164         struct tx_sw_desc *sdesc;       /* address of SW Tx descriptor ring */
 165         spinlock_t lock;        /* guards enqueueing of new packets */
 166         unsigned int token;     /* WR token */
 167         dma_addr_t phys_addr;   /* physical address of the ring */
 168         struct sk_buff_head sendq;      /* List of backpressured offload packets */
 169         struct tasklet_struct qresume_tsk;      /* restarts the queue */
 170         unsigned int cntxt_id;  /* SGE context id for the Tx q */
 171         unsigned long stops;    /* # of times q has been stopped */
 172         unsigned long restarts; /* # of queue restarts */
 173 };
 174
 175 enum {                          /* per port SGE statistics */
 176         SGE_PSTAT_TSO,          /* # of TSO requests */
 177         SGE_PSTAT_RX_CSUM_GOOD, /* # of successful RX csum offloads */
 178         SGE_PSTAT_TX_CSUM,      /* # of TX checksum offloads */
 179         SGE_PSTAT_VLANEX,       /* # of VLAN tag extractions */
 180         SGE_PSTAT_VLANINS,      /* # of VLAN tag insertions */
 181         SGE_PSTAT_LRO_AGGR,     /* # of page chunks added to LRO sessions */
 182         SGE_PSTAT_LRO_FLUSHED,  /* # of flushed LRO sessions */
 183         SGE_PSTAT_LRO_NO_DESC,  /* # of overflown LRO sessions */
 184
 185         SGE_PSTAT_MAX           /* must be last */
 186 };
 187
 188 #define T3_MAX_LRO_SES 8
 189 #define T3_MAX_LRO_MAX_PKTS 64
 190
 191 struct sge_qset {               /* an SGE queue set */
 192         struct adapter *adap;
 193         struct napi_struct napi;
 194         struct sge_rspq rspq;
 195         struct sge_fl fl[SGE_RXQ_PER_SET];
 196         struct sge_txq txq[SGE_TXQ_PER_SET];
 197         struct net_lro_mgr lro_mgr;
 198         struct net_lro_desc lro_desc[T3_MAX_LRO_SES];
 199         struct skb_frag_struct *lro_frag_tbl;
 200         int lro_nfrags;
 201         int lro_enabled;
 202         int lro_frag_len;
 203         void *lro_va;
 204         struct net_device *netdev;
 205         struct netdev_queue *tx_q;      /* associated netdev TX queue */
 206         unsigned long txq_stopped;      /* which Tx queues are stopped */
 207         struct timer_list tx_reclaim_timer;     /* reclaims TX buffers */
 208         unsigned long port_stats[SGE_PSTAT_MAX];
 209 } ____cacheline_aligned;
 210
 211 struct sge {
 212         struct sge_qset qs[SGE_QSETS];
 213         spinlock_t reg_lock;    /* guards non-atomic SGE registers (eg context) */
 214 };
 215
 216 struct adapter {
 217         struct t3cdev tdev;
 218         struct list_head adapter_list;
 219         void __iomem *regs;
 220         struct pci_dev *pdev;
 221         unsigned long registered_device_map;
 222         unsigned long open_device_map;
 223         unsigned long flags;
 224
 225         const char *name;
 226         int msg_enable;
 227         unsigned int mmio_len;
 228
 229         struct adapter_params params;
 230         unsigned int slow_intr_mask;
 231         unsigned long irq_stats[IRQ_NUM_STATS];
 232
 233         int msix_nvectors;
 234         struct {
 235                 unsigned short vec;
 236                 char desc[22];
 237         } msix_info[SGE_QSETS + 1];
 238
 239         /* T3 modules */
 240         struct sge sge;
 241         struct mc7 pmrx;
 242         struct mc7 pmtx;
 243         struct mc7 cm;
 244         struct mc5 mc5;
 245
 246         struct net_device *port[MAX_NPORTS];
 247         unsigned int check_task_cnt;
 248         struct delayed_work adap_check_task;
 249         struct work_struct ext_intr_handler_task;
 250         struct work_struct fatal_error_handler_task;
 251
 252         struct dentry *debugfs_root;
 253
 254         struct mutex mdio_lock;
 255         spinlock_t stats_lock;
 256         spinlock_t work_lock;
 257 };
 258
 259 static inline u32 t3_read_reg(struct adapter *adapter, u32 reg_addr)
 260 {
 261         u32 val = readl(adapter->regs + reg_addr);
 262
 263         CH_DBG(adapter, MMIO, "read register 0x%x value 0x%x\n", reg_addr, val);
 264         return val;
 265 }
 266
 267 static inline void t3_write_reg(struct adapter *adapter, u32 reg_addr, u32 val)
 268 {
 269         CH_DBG(adapter, MMIO, "setting register 0x%x to 0x%x\n", reg_addr, val);
 270         writel(val, adapter->regs + reg_addr);
 271 }
 272
 273 static inline struct port_info *adap2pinfo(struct adapter *adap, int idx)
 274 {
 275         return netdev_priv(adap->port[idx]);
 276 }
 277
 278 #define OFFLOAD_DEVMAP_BIT 15
 279
 280 #define tdev2adap(d) container_of(d, struct adapter, tdev)
 281
 282 static inline int offload_running(struct adapter *adapter)
 283 {
 284         return test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map);
 285 }
 286
 287 int t3_offload_tx(struct t3cdev *tdev, struct sk_buff *skb);
 288
 289 void t3_os_ext_intr_handler(struct adapter *adapter);
 290 void t3_os_link_changed(struct adapter *adapter, int port_id, int link_status,
 291                         int speed, int duplex, int fc);
 292 void t3_os_phymod_changed(struct adapter *adap, int port_id);
 293
 294 void t3_sge_start(struct adapter *adap);
 295 void t3_sge_stop(struct adapter *adap);
 296 void t3_stop_sge_timers(struct adapter *adap);
 297 void t3_free_sge_resources(struct adapter *adap);
 298 void t3_sge_err_intr_handler(struct adapter *adapter);
 299 irq_handler_t t3_intr_handler(struct adapter *adap, int polling);
 300 int t3_eth_xmit(struct sk_buff *skb, struct net_device *dev);
 301 int t3_mgmt_tx(struct adapter *adap, struct sk_buff *skb);
 302 void t3_update_qset_coalesce(struct sge_qset *qs, const struct qset_params *p);
 303 int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports,
 304                       int irq_vec_idx, const struct qset_params *p,
 305                       int ntxq, struct net_device *dev,
 306                       struct netdev_queue *netdevq);
 307 int t3_get_desc(const struct sge_qset *qs, unsigned int qnum, unsigned int idx,
 308                 unsigned char *data);
 309 irqreturn_t t3_sge_intr_msix(int irq, void *cookie);
 310
 311 #endif                          /* __T3_ADAPTER_H__ */