include/asm-blackfin/mach-bf561/bfin_serial_5xx.h

   1 #include <linux/serial.h>
   2 #include <asm/dma.h>
   3 #include <asm/portmux.h>
   4
   5 #define NR_PORTS                1
   6
   7 #define OFFSET_THR              0x00    /* Transmit Holding register            */
   8 #define OFFSET_RBR              0x00    /* Receive Buffer register              */
   9 #define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
  10 #define OFFSET_IER              0x04    /* Interrupt Enable Register            */
  11 #define OFFSET_DLH              0x04    /* Divisor Latch (High-Byte)            */
  12 #define OFFSET_IIR              0x08    /* Interrupt Identification Register    */
  13 #define OFFSET_LCR              0x0C    /* Line Control Register                */
  14 #define OFFSET_MCR              0x10    /* Modem Control Register               */
  15 #define OFFSET_LSR              0x14    /* Line Status Register                 */
  16 #define OFFSET_MSR              0x18    /* Modem Status Register                */
  17 #define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
  18 #define OFFSET_GCTL             0x24    /* Global Control Register              */
  19
  20 #define UART_GET_CHAR(uart)     bfin_read16(((uart)->port.membase + OFFSET_RBR))
  21 #define UART_GET_DLL(uart)      bfin_read16(((uart)->port.membase + OFFSET_DLL))
  22 #define UART_GET_IER(uart)      bfin_read16(((uart)->port.membase + OFFSET_IER))
  23 #define UART_GET_DLH(uart)      bfin_read16(((uart)->port.membase + OFFSET_DLH))
  24 #define UART_GET_IIR(uart)      bfin_read16(((uart)->port.membase + OFFSET_IIR))
  25 #define UART_GET_LCR(uart)      bfin_read16(((uart)->port.membase + OFFSET_LCR))
  26 #define UART_GET_LSR(uart)      bfin_read16(((uart)->port.membase + OFFSET_LSR))
  27 #define UART_GET_GCTL(uart)     bfin_read16(((uart)->port.membase + OFFSET_GCTL))
  28
  29 #define UART_PUT_CHAR(uart,v)   bfin_write16(((uart)->port.membase + OFFSET_THR),v)
  30 #define UART_PUT_DLL(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
  31 #define UART_PUT_IER(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_IER),v)
  32 #define UART_PUT_DLH(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
  33 #define UART_PUT_LCR(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
  34 #define UART_PUT_GCTL(uart,v)   bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
  35
  36 #ifdef CONFIG_BFIN_UART0_CTSRTS
  37 # define CONFIG_SERIAL_BFIN_CTSRTS
  38 # ifndef CONFIG_UART0_CTS_PIN
  39 #  define CONFIG_UART0_CTS_PIN -1
  40 # endif
  41 # ifndef CONFIG_UART0_RTS_PIN
  42 #  define CONFIG_UART0_RTS_PIN -1
  43 # endif
  44 #endif
  45
  46 struct bfin_serial_port {
  47         struct uart_port        port;
  48         unsigned int            old_status;
  49 #ifdef CONFIG_SERIAL_BFIN_DMA
  50         int                     tx_done;
  51         int                     tx_count;
  52         struct circ_buf         rx_dma_buf;
  53         struct timer_list       rx_dma_timer;
  54         int                     rx_dma_nrows;
  55         unsigned int            tx_dma_channel;
  56         unsigned int            rx_dma_channel;
  57         struct work_struct      tx_dma_workqueue;
  58 #else
  59         struct work_struct      cts_workqueue;
  60 #endif
  61 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  62         int                     cts_pin;
  63         int                     rts_pin;
  64 #endif
  65 };
  66
  67 struct bfin_serial_port bfin_serial_ports[NR_PORTS];
  68 struct bfin_serial_res {
  69         unsigned long   uart_base_addr;
  70         int             uart_irq;
  71 #ifdef CONFIG_SERIAL_BFIN_DMA
  72         unsigned int    uart_tx_dma_channel;
  73         unsigned int    uart_rx_dma_channel;
  74 #endif
  75 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  76         int             uart_cts_pin;
  77         int             uart_rts_pin;
  78 #endif
  79 };
  80
  81 struct bfin_serial_res bfin_serial_resource[] = {
  82         {
  83         0xFFC00400,
  84         IRQ_UART_RX,
  85 #ifdef CONFIG_SERIAL_BFIN_DMA
  86         CH_UART_TX,
  87         CH_UART_RX,
  88 #endif
  89 #ifdef CONFIG_BFIN_UART0_CTSRTS
  90         CONFIG_UART0_CTS_PIN,
  91         CONFIG_UART0_RTS_PIN,
  92 #endif
  93         }
  94 };
  95
  96 #define DRIVER_NAME "bfin-uart"
  97
  98 int nr_ports = NR_PORTS;
  99 static void bfin_serial_hw_init(struct bfin_serial_port *uart)
 100 {
 101
 102 #ifdef CONFIG_SERIAL_BFIN_UART0
 103         peripheral_request(P_UART0_TX, DRIVER_NAME);
 104         peripheral_request(P_UART0_RX, DRIVER_NAME);
 105 #endif
 106
 107 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 108         if (uart->cts_pin >= 0) {
 109                 gpio_request(uart->cts_pin, DRIVER_NAME);
 110                 gpio_direction_input(uart->cts_pin);
 111         }
 112         if (uart->rts_pin >= 0) {
 113                 gpio_request(uart->rts_pin, DRIVER_NAME);
 114                 gpio_direction_input(uart->rts_pin, 0);
 115         }
 116 #endif
 117 }