2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #include <linux/types.h>
14 #include <linux/delay.h>
15 #include <linux/module.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/init.h>
19 #include <linux/serio.h>
20 #include <linux/err.h>
21 #include <linux/rcupdate.h>
22 #include <linux/platform_device.h>
23 #include <linux/i8042.h>
27 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
28 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
29 MODULE_LICENSE("GPL");
31 static bool i8042_nokbd
;
32 module_param_named(nokbd
, i8042_nokbd
, bool, 0);
33 MODULE_PARM_DESC(nokbd
, "Do not probe or use KBD port.");
35 static bool i8042_noaux
;
36 module_param_named(noaux
, i8042_noaux
, bool, 0);
37 MODULE_PARM_DESC(noaux
, "Do not probe or use AUX (mouse) port.");
39 static bool i8042_nomux
;
40 module_param_named(nomux
, i8042_nomux
, bool, 0);
41 MODULE_PARM_DESC(nomux
, "Do not check whether an active multiplexing conrtoller is present.");
43 static bool i8042_unlock
;
44 module_param_named(unlock
, i8042_unlock
, bool, 0);
45 MODULE_PARM_DESC(unlock
, "Ignore keyboard lock.");
47 static bool i8042_reset
;
48 module_param_named(reset
, i8042_reset
, bool, 0);
49 MODULE_PARM_DESC(reset
, "Reset controller during init and cleanup.");
51 static bool i8042_direct
;
52 module_param_named(direct
, i8042_direct
, bool, 0);
53 MODULE_PARM_DESC(direct
, "Put keyboard port into non-translated mode.");
55 static bool i8042_dumbkbd
;
56 module_param_named(dumbkbd
, i8042_dumbkbd
, bool, 0);
57 MODULE_PARM_DESC(dumbkbd
, "Pretend that controller can only read data from keyboard");
59 static bool i8042_noloop
;
60 module_param_named(noloop
, i8042_noloop
, bool, 0);
61 MODULE_PARM_DESC(noloop
, "Disable the AUX Loopback command while probing for the AUX port");
63 static unsigned int i8042_blink_frequency
= 500;
64 module_param_named(panicblink
, i8042_blink_frequency
, uint
, 0600);
65 MODULE_PARM_DESC(panicblink
, "Frequency with which keyboard LEDs should blink when kernel panics");
68 static bool i8042_dritek
;
69 module_param_named(dritek
, i8042_dritek
, bool, 0);
70 MODULE_PARM_DESC(dritek
, "Force enable the Dritek keyboard extension");
74 static bool i8042_nopnp
;
75 module_param_named(nopnp
, i8042_nopnp
, bool, 0);
76 MODULE_PARM_DESC(nopnp
, "Do not use PNP to detect controller settings");
81 static bool i8042_debug
;
82 module_param_named(debug
, i8042_debug
, bool, 0600);
83 MODULE_PARM_DESC(debug
, "Turn i8042 debugging mode on and off");
86 static bool i8042_bypass_aux_irq_test
;
91 * i8042_lock protects serialization between i8042_command and
92 * the interrupt handler.
94 static DEFINE_SPINLOCK(i8042_lock
);
97 * Writers to AUX and KBD ports as well as users issuing i8042_command
98 * directly should acquire i8042_mutex (by means of calling
99 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
100 * they do not disturb each other (unfortunately in many i8042
101 * implementations write to one of the ports will immediately abort
102 * command that is being processed by another port).
104 static DEFINE_MUTEX(i8042_mutex
);
113 #define I8042_KBD_PORT_NO 0
114 #define I8042_AUX_PORT_NO 1
115 #define I8042_MUX_PORT_NO 2
116 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
118 static struct i8042_port i8042_ports
[I8042_NUM_PORTS
];
120 static unsigned char i8042_initial_ctr
;
121 static unsigned char i8042_ctr
;
122 static bool i8042_mux_present
;
123 static bool i8042_kbd_irq_registered
;
124 static bool i8042_aux_irq_registered
;
125 static unsigned char i8042_suppress_kbd_ack
;
126 static struct platform_device
*i8042_platform_device
;
128 static irqreturn_t
i8042_interrupt(int irq
, void *dev_id
);
130 void i8042_lock_chip(void)
132 mutex_lock(&i8042_mutex
);
134 EXPORT_SYMBOL(i8042_lock_chip
);
136 void i8042_unlock_chip(void)
138 mutex_unlock(&i8042_mutex
);
140 EXPORT_SYMBOL(i8042_unlock_chip
);
143 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
144 * be ready for reading values from it / writing values to it.
145 * Called always with i8042_lock held.
148 static int i8042_wait_read(void)
152 while ((~i8042_read_status() & I8042_STR_OBF
) && (i
< I8042_CTL_TIMEOUT
)) {
156 return -(i
== I8042_CTL_TIMEOUT
);
159 static int i8042_wait_write(void)
163 while ((i8042_read_status() & I8042_STR_IBF
) && (i
< I8042_CTL_TIMEOUT
)) {
167 return -(i
== I8042_CTL_TIMEOUT
);
171 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
172 * of the i8042 down the toilet.
175 static int i8042_flush(void)
178 unsigned char data
, str
;
181 spin_lock_irqsave(&i8042_lock
, flags
);
183 while (((str
= i8042_read_status()) & I8042_STR_OBF
) && (i
< I8042_BUFFER_SIZE
)) {
185 data
= i8042_read_data();
187 dbg("%02x <- i8042 (flush, %s)", data
,
188 str
& I8042_STR_AUXDATA
? "aux" : "kbd");
191 spin_unlock_irqrestore(&i8042_lock
, flags
);
197 * i8042_command() executes a command on the i8042. It also sends the input
198 * parameter(s) of the commands to it, and receives the output value(s). The
199 * parameters are to be stored in the param array, and the output is placed
200 * into the same array. The number of the parameters and output values is
201 * encoded in bits 8-11 of the command number.
204 static int __i8042_command(unsigned char *param
, int command
)
208 if (i8042_noloop
&& command
== I8042_CMD_AUX_LOOP
)
211 error
= i8042_wait_write();
215 dbg("%02x -> i8042 (command)", command
& 0xff);
216 i8042_write_command(command
& 0xff);
218 for (i
= 0; i
< ((command
>> 12) & 0xf); i
++) {
219 error
= i8042_wait_write();
222 dbg("%02x -> i8042 (parameter)", param
[i
]);
223 i8042_write_data(param
[i
]);
226 for (i
= 0; i
< ((command
>> 8) & 0xf); i
++) {
227 error
= i8042_wait_read();
229 dbg(" -- i8042 (timeout)");
233 if (command
== I8042_CMD_AUX_LOOP
&&
234 !(i8042_read_status() & I8042_STR_AUXDATA
)) {
235 dbg(" -- i8042 (auxerr)");
239 param
[i
] = i8042_read_data();
240 dbg("%02x <- i8042 (return)", param
[i
]);
246 int i8042_command(unsigned char *param
, int command
)
251 spin_lock_irqsave(&i8042_lock
, flags
);
252 retval
= __i8042_command(param
, command
);
253 spin_unlock_irqrestore(&i8042_lock
, flags
);
257 EXPORT_SYMBOL(i8042_command
);
260 * i8042_kbd_write() sends a byte out through the keyboard interface.
263 static int i8042_kbd_write(struct serio
*port
, unsigned char c
)
268 spin_lock_irqsave(&i8042_lock
, flags
);
270 if (!(retval
= i8042_wait_write())) {
271 dbg("%02x -> i8042 (kbd-data)", c
);
275 spin_unlock_irqrestore(&i8042_lock
, flags
);
281 * i8042_aux_write() sends a byte out through the aux interface.
284 static int i8042_aux_write(struct serio
*serio
, unsigned char c
)
286 struct i8042_port
*port
= serio
->port_data
;
288 return i8042_command(&c
, port
->mux
== -1 ?
290 I8042_CMD_MUX_SEND
+ port
->mux
);
295 * i8042_aux_close attempts to clear AUX or KBD port state by disabling
296 * and then re-enabling it.
299 static void i8042_port_close(struct serio
*serio
)
303 const char *port_name
;
305 if (serio
== i8042_ports
[I8042_AUX_PORT_NO
].serio
) {
306 irq_bit
= I8042_CTR_AUXINT
;
307 disable_bit
= I8042_CTR_AUXDIS
;
310 irq_bit
= I8042_CTR_KBDINT
;
311 disable_bit
= I8042_CTR_KBDDIS
;
315 i8042_ctr
&= ~irq_bit
;
316 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
))
318 "i8042.c: Can't write CTR while closing %s port.\n",
323 i8042_ctr
&= ~disable_bit
;
324 i8042_ctr
|= irq_bit
;
325 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
))
326 printk(KERN_ERR
"i8042.c: Can't reactivate %s port.\n",
330 * See if there is any data appeared while we were messing with
333 i8042_interrupt(0, NULL
);
337 * i8042_start() is called by serio core when port is about to finish
338 * registering. It will mark port as existing so i8042_interrupt can
339 * start sending data through it.
341 static int i8042_start(struct serio
*serio
)
343 struct i8042_port
*port
= serio
->port_data
;
351 * i8042_stop() marks serio port as non-existing so i8042_interrupt
352 * will not try to send data to the port that is about to go away.
353 * The function is called by serio core as part of unregister procedure.
355 static void i8042_stop(struct serio
*serio
)
357 struct i8042_port
*port
= serio
->port_data
;
359 port
->exists
= false;
362 * We synchronize with both AUX and KBD IRQs because there is
363 * a (very unlikely) chance that AUX IRQ is raised for KBD port
366 synchronize_irq(I8042_AUX_IRQ
);
367 synchronize_irq(I8042_KBD_IRQ
);
372 * i8042_filter() filters out unwanted bytes from the input data stream.
373 * It is called from i8042_interrupt and thus is running with interrupts
374 * off and i8042_lock held.
376 static bool i8042_filter(unsigned char data
, unsigned char str
)
378 if (unlikely(i8042_suppress_kbd_ack
)) {
379 if ((~str
& I8042_STR_AUXDATA
) &&
380 (data
== 0xfa || data
== 0xfe)) {
381 i8042_suppress_kbd_ack
--;
382 dbg("Extra keyboard ACK - filtered out\n");
391 * i8042_interrupt() is the most important function in this driver -
392 * it handles the interrupts from the i8042, and sends incoming bytes
393 * to the upper layers.
396 static irqreturn_t
i8042_interrupt(int irq
, void *dev_id
)
398 struct i8042_port
*port
;
400 unsigned char str
, data
;
402 unsigned int port_no
;
406 spin_lock_irqsave(&i8042_lock
, flags
);
408 str
= i8042_read_status();
409 if (unlikely(~str
& I8042_STR_OBF
)) {
410 spin_unlock_irqrestore(&i8042_lock
, flags
);
411 if (irq
) dbg("Interrupt %d, without any data", irq
);
416 data
= i8042_read_data();
418 if (i8042_mux_present
&& (str
& I8042_STR_AUXDATA
)) {
419 static unsigned long last_transmit
;
420 static unsigned char last_str
;
423 if (str
& I8042_STR_MUXERR
) {
424 dbg("MUX error, status is %02x, data is %02x", str
, data
);
426 * When MUXERR condition is signalled the data register can only contain
427 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
428 * it is not always the case. Some KBCs also report 0xfc when there is
429 * nothing connected to the port while others sometimes get confused which
430 * port the data came from and signal error leaving the data intact. They
431 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
432 * to legacy mode yet, when we see one we'll add proper handling).
433 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
434 * rest assume that the data came from the same serio last byte
435 * was transmitted (if transmission happened not too long ago).
440 if (time_before(jiffies
, last_transmit
+ HZ
/10)) {
444 /* fall through - report timeout */
447 case 0xfe: dfl
= SERIO_TIMEOUT
; data
= 0xfe; break;
448 case 0xff: dfl
= SERIO_PARITY
; data
= 0xfe; break;
452 port_no
= I8042_MUX_PORT_NO
+ ((str
>> 6) & 3);
454 last_transmit
= jiffies
;
457 dfl
= ((str
& I8042_STR_PARITY
) ? SERIO_PARITY
: 0) |
458 ((str
& I8042_STR_TIMEOUT
) ? SERIO_TIMEOUT
: 0);
460 port_no
= (str
& I8042_STR_AUXDATA
) ?
461 I8042_AUX_PORT_NO
: I8042_KBD_PORT_NO
;
464 port
= &i8042_ports
[port_no
];
466 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
468 dfl
& SERIO_PARITY
? ", bad parity" : "",
469 dfl
& SERIO_TIMEOUT
? ", timeout" : "");
471 filtered
= i8042_filter(data
, str
);
473 spin_unlock_irqrestore(&i8042_lock
, flags
);
475 if (likely(port
->exists
&& !filtered
))
476 serio_interrupt(port
->serio
, data
, dfl
);
479 return IRQ_RETVAL(ret
);
483 * i8042_enable_kbd_port enables keyboard port on chip
486 static int i8042_enable_kbd_port(void)
488 i8042_ctr
&= ~I8042_CTR_KBDDIS
;
489 i8042_ctr
|= I8042_CTR_KBDINT
;
491 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
492 i8042_ctr
&= ~I8042_CTR_KBDINT
;
493 i8042_ctr
|= I8042_CTR_KBDDIS
;
494 printk(KERN_ERR
"i8042.c: Failed to enable KBD port.\n");
502 * i8042_enable_aux_port enables AUX (mouse) port on chip
505 static int i8042_enable_aux_port(void)
507 i8042_ctr
&= ~I8042_CTR_AUXDIS
;
508 i8042_ctr
|= I8042_CTR_AUXINT
;
510 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
511 i8042_ctr
&= ~I8042_CTR_AUXINT
;
512 i8042_ctr
|= I8042_CTR_AUXDIS
;
513 printk(KERN_ERR
"i8042.c: Failed to enable AUX port.\n");
521 * i8042_enable_mux_ports enables 4 individual AUX ports after
522 * the controller has been switched into Multiplexed mode
525 static int i8042_enable_mux_ports(void)
530 for (i
= 0; i
< I8042_NUM_MUX_PORTS
; i
++) {
531 i8042_command(¶m
, I8042_CMD_MUX_PFX
+ i
);
532 i8042_command(¶m
, I8042_CMD_AUX_ENABLE
);
535 return i8042_enable_aux_port();
539 * i8042_set_mux_mode checks whether the controller has an
540 * active multiplexor and puts the chip into Multiplexed (true)
541 * or Legacy (false) mode.
544 static int i8042_set_mux_mode(bool multiplex
, unsigned char *mux_version
)
547 unsigned char param
, val
;
549 * Get rid of bytes in the queue.
555 * Internal loopback test - send three bytes, they should come back from the
556 * mouse interface, the last should be version.
560 if (i8042_command(¶m
, I8042_CMD_AUX_LOOP
) || param
!= val
)
562 param
= val
= multiplex
? 0x56 : 0xf6;
563 if (i8042_command(¶m
, I8042_CMD_AUX_LOOP
) || param
!= val
)
565 param
= val
= multiplex
? 0xa4 : 0xa5;
566 if (i8042_command(¶m
, I8042_CMD_AUX_LOOP
) || param
== val
)
570 * Workaround for interference with USB Legacy emulation
571 * that causes a v10.12 MUX to be found.
577 *mux_version
= param
;
583 * i8042_check_mux() checks whether the controller supports the PS/2 Active
584 * Multiplexing specification by Synaptics, Phoenix, Insyde and
588 static int __init
i8042_check_mux(void)
590 unsigned char mux_version
;
592 if (i8042_set_mux_mode(true, &mux_version
))
595 printk(KERN_INFO
"i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
596 (mux_version
>> 4) & 0xf, mux_version
& 0xf);
599 * Disable all muxed ports by disabling AUX.
601 i8042_ctr
|= I8042_CTR_AUXDIS
;
602 i8042_ctr
&= ~I8042_CTR_AUXINT
;
604 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
605 printk(KERN_ERR
"i8042.c: Failed to disable AUX port, can't use MUX.\n");
609 i8042_mux_present
= true;
615 * The following is used to test AUX IRQ delivery.
617 static struct completion i8042_aux_irq_delivered __initdata
;
618 static bool i8042_irq_being_tested __initdata
;
620 static irqreturn_t __init
i8042_aux_test_irq(int irq
, void *dev_id
)
623 unsigned char str
, data
;
626 spin_lock_irqsave(&i8042_lock
, flags
);
627 str
= i8042_read_status();
628 if (str
& I8042_STR_OBF
) {
629 data
= i8042_read_data();
630 dbg("%02x <- i8042 (aux_test_irq, %s)",
631 data
, str
& I8042_STR_AUXDATA
? "aux" : "kbd");
632 if (i8042_irq_being_tested
&&
633 data
== 0xa5 && (str
& I8042_STR_AUXDATA
))
634 complete(&i8042_aux_irq_delivered
);
637 spin_unlock_irqrestore(&i8042_lock
, flags
);
639 return IRQ_RETVAL(ret
);
643 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
644 * verifies success by readinng CTR. Used when testing for presence of AUX
647 static int __init
i8042_toggle_aux(bool on
)
652 if (i8042_command(¶m
,
653 on
? I8042_CMD_AUX_ENABLE
: I8042_CMD_AUX_DISABLE
))
656 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
657 for (i
= 0; i
< 100; i
++) {
660 if (i8042_command(¶m
, I8042_CMD_CTL_RCTR
))
663 if (!(param
& I8042_CTR_AUXDIS
) == on
)
671 * i8042_check_aux() applies as much paranoia as it can at detecting
672 * the presence of an AUX interface.
675 static int __init
i8042_check_aux(void)
678 bool irq_registered
= false;
679 bool aux_loop_broken
= false;
684 * Get rid of bytes in the queue.
690 * Internal loopback test - filters out AT-type i8042's. Unfortunately
691 * SiS screwed up and their 5597 doesn't support the LOOP command even
692 * though it has an AUX port.
696 retval
= i8042_command(¶m
, I8042_CMD_AUX_LOOP
);
697 if (retval
|| param
!= 0x5a) {
700 * External connection test - filters out AT-soldered PS/2 i8042's
701 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
702 * 0xfa - no error on some notebooks which ignore the spec
703 * Because it's common for chipsets to return error on perfectly functioning
704 * AUX ports, we test for this only when the LOOP command failed.
707 if (i8042_command(¶m
, I8042_CMD_AUX_TEST
) ||
708 (param
&& param
!= 0xfa && param
!= 0xff))
712 * If AUX_LOOP completed without error but returned unexpected data
716 aux_loop_broken
= true;
720 * Bit assignment test - filters out PS/2 i8042's in AT mode
723 if (i8042_toggle_aux(false)) {
724 printk(KERN_WARNING
"Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
725 printk(KERN_WARNING
"If AUX port is really absent please use the 'i8042.noaux' option.\n");
728 if (i8042_toggle_aux(true))
732 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
733 * used it for a PCI card or somethig else.
736 if (i8042_noloop
|| i8042_bypass_aux_irq_test
|| aux_loop_broken
) {
738 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
739 * is working and hope we are right.
745 if (request_irq(I8042_AUX_IRQ
, i8042_aux_test_irq
, IRQF_SHARED
,
746 "i8042", i8042_platform_device
))
749 irq_registered
= true;
751 if (i8042_enable_aux_port())
754 spin_lock_irqsave(&i8042_lock
, flags
);
756 init_completion(&i8042_aux_irq_delivered
);
757 i8042_irq_being_tested
= true;
760 retval
= __i8042_command(¶m
, I8042_CMD_AUX_LOOP
& 0xf0ff);
762 spin_unlock_irqrestore(&i8042_lock
, flags
);
767 if (wait_for_completion_timeout(&i8042_aux_irq_delivered
,
768 msecs_to_jiffies(250)) == 0) {
770 * AUX IRQ was never delivered so we need to flush the controller to
771 * get rid of the byte we put there; otherwise keyboard may not work.
773 dbg(" -- i8042 (aux irq test timeout)");
781 * Disable the interface.
784 i8042_ctr
|= I8042_CTR_AUXDIS
;
785 i8042_ctr
&= ~I8042_CTR_AUXINT
;
787 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
))
791 free_irq(I8042_AUX_IRQ
, i8042_platform_device
);
796 static int i8042_controller_check(void)
798 if (i8042_flush() == I8042_BUFFER_SIZE
) {
799 printk(KERN_ERR
"i8042.c: No controller found.\n");
806 static int i8042_controller_selftest(void)
815 * We try this 5 times; on some really fragile systems this does not
816 * take the first time...
820 if (i8042_command(¶m
, I8042_CMD_CTL_TEST
)) {
821 printk(KERN_ERR
"i8042.c: i8042 controller self test timeout.\n");
825 if (param
== I8042_RET_CTL_TEST
)
828 printk(KERN_ERR
"i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
829 param
, I8042_RET_CTL_TEST
);
835 * On x86, we don't fail entire i8042 initialization if controller
836 * reset fails in hopes that keyboard port will still be functional
837 * and user will still get a working keyboard. This is especially
838 * important on netbooks. On other arches we trust hardware more.
841 "i8042: giving up on controller selftest, continuing anyway...\n");
849 * i8042_controller init initializes the i8042 controller, and,
850 * most importantly, sets it into non-xlated mode if that's
854 static int i8042_controller_init(void)
858 unsigned char ctr
[2];
861 * Save the CTR for restore on unload / reboot.
867 "i8042.c: Unable to get stable CTR read.\n");
874 if (i8042_command(&ctr
[n
++ % 2], I8042_CMD_CTL_RCTR
)) {
876 "i8042.c: Can't read CTR while initializing i8042.\n");
880 } while (n
< 2 || ctr
[0] != ctr
[1]);
882 i8042_initial_ctr
= i8042_ctr
= ctr
[0];
885 * Disable the keyboard interface and interrupt.
888 i8042_ctr
|= I8042_CTR_KBDDIS
;
889 i8042_ctr
&= ~I8042_CTR_KBDINT
;
895 spin_lock_irqsave(&i8042_lock
, flags
);
896 if (~i8042_read_status() & I8042_STR_KEYLOCK
) {
898 i8042_ctr
|= I8042_CTR_IGNKEYLOCK
;
900 printk(KERN_WARNING
"i8042.c: Warning: Keylock active.\n");
902 spin_unlock_irqrestore(&i8042_lock
, flags
);
905 * If the chip is configured into nontranslated mode by the BIOS, don't
906 * bother enabling translating and be happy.
909 if (~i8042_ctr
& I8042_CTR_XLATE
)
913 * Set nontranslated mode for the kbd interface if requested by an option.
914 * After this the kbd interface becomes a simple serial in/out, like the aux
915 * interface is. We don't do this by default, since it can confuse notebook
920 i8042_ctr
&= ~I8042_CTR_XLATE
;
926 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
927 printk(KERN_ERR
"i8042.c: Can't write CTR while initializing i8042.\n");
932 * Flush whatever accumulated while we were disabling keyboard port.
942 * Reset the controller and reset CRT to the original value set by BIOS.
945 static void i8042_controller_reset(void)
950 * Disable both KBD and AUX interfaces so they don't get in the way
953 i8042_ctr
|= I8042_CTR_KBDDIS
| I8042_CTR_AUXDIS
;
954 i8042_ctr
&= ~(I8042_CTR_KBDINT
| I8042_CTR_AUXINT
);
956 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
))
957 printk(KERN_WARNING
"i8042.c: Can't write CTR while resetting.\n");
960 * Disable MUX mode if present.
963 if (i8042_mux_present
)
964 i8042_set_mux_mode(false, NULL
);
967 * Reset the controller if requested.
970 i8042_controller_selftest();
973 * Restore the original control register setting.
976 if (i8042_command(&i8042_initial_ctr
, I8042_CMD_CTL_WCTR
))
977 printk(KERN_WARNING
"i8042.c: Can't restore CTR.\n");
982 * i8042_panic_blink() will flash the keyboard LEDs and is called when
983 * kernel panics. Flashing LEDs is useful for users running X who may
984 * not see the console and will help distingushing panics from "real"
987 * Note that DELAY has a limit of 10ms so we will not get stuck here
988 * waiting for KBC to free up even if KBD interrupt is off
991 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
993 static long i8042_panic_blink(long count
)
996 static long last_blink
;
1000 * We expect frequency to be about 1/2s. KDB uses about 1s.
1001 * Make sure they are different.
1003 if (!i8042_blink_frequency
)
1005 if (count
- last_blink
< i8042_blink_frequency
)
1009 while (i8042_read_status() & I8042_STR_IBF
)
1011 dbg("%02x -> i8042 (panic blink)", 0xed);
1012 i8042_suppress_kbd_ack
= 2;
1013 i8042_write_data(0xed); /* set leds */
1015 while (i8042_read_status() & I8042_STR_IBF
)
1018 dbg("%02x -> i8042 (panic blink)", led
);
1019 i8042_write_data(led
);
1028 static void i8042_dritek_enable(void)
1033 error
= i8042_command(¶m
, 0x1059);
1036 "Failed to enable DRITEK extension: %d\n",
1044 * Here we try to restore the original BIOS settings to avoid
1048 static int i8042_pm_reset(struct device
*dev
)
1050 i8042_controller_reset();
1056 * Here we try to reset everything back to a state we had
1057 * before suspending.
1060 static int i8042_pm_restore(struct device
*dev
)
1064 error
= i8042_controller_check();
1068 error
= i8042_controller_selftest();
1073 * Restore original CTR value and disable all ports
1076 i8042_ctr
= i8042_initial_ctr
;
1078 i8042_ctr
&= ~I8042_CTR_XLATE
;
1079 i8042_ctr
|= I8042_CTR_AUXDIS
| I8042_CTR_KBDDIS
;
1080 i8042_ctr
&= ~(I8042_CTR_AUXINT
| I8042_CTR_KBDINT
);
1081 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
1082 printk(KERN_WARNING
"i8042: Can't write CTR to resume, retrying...\n");
1084 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
1085 printk(KERN_ERR
"i8042: CTR write retry failed\n");
1093 i8042_dritek_enable();
1096 if (i8042_mux_present
) {
1097 if (i8042_set_mux_mode(true, NULL
) || i8042_enable_mux_ports())
1099 "i8042: failed to resume active multiplexor, "
1100 "mouse won't work.\n");
1101 } else if (i8042_ports
[I8042_AUX_PORT_NO
].serio
)
1102 i8042_enable_aux_port();
1104 if (i8042_ports
[I8042_KBD_PORT_NO
].serio
)
1105 i8042_enable_kbd_port();
1107 i8042_interrupt(0, NULL
);
1112 static const struct dev_pm_ops i8042_pm_ops
= {
1113 .suspend
= i8042_pm_reset
,
1114 .resume
= i8042_pm_restore
,
1115 .poweroff
= i8042_pm_reset
,
1116 .restore
= i8042_pm_restore
,
1119 #endif /* CONFIG_PM */
1122 * We need to reset the 8042 back to original mode on system shutdown,
1123 * because otherwise BIOSes will be confused.
1126 static void i8042_shutdown(struct platform_device
*dev
)
1128 i8042_controller_reset();
1131 static int __init
i8042_create_kbd_port(void)
1133 struct serio
*serio
;
1134 struct i8042_port
*port
= &i8042_ports
[I8042_KBD_PORT_NO
];
1136 serio
= kzalloc(sizeof(struct serio
), GFP_KERNEL
);
1140 serio
->id
.type
= i8042_direct
? SERIO_8042
: SERIO_8042_XL
;
1141 serio
->write
= i8042_dumbkbd
? NULL
: i8042_kbd_write
;
1142 serio
->start
= i8042_start
;
1143 serio
->stop
= i8042_stop
;
1144 serio
->close
= i8042_port_close
;
1145 serio
->port_data
= port
;
1146 serio
->dev
.parent
= &i8042_platform_device
->dev
;
1147 strlcpy(serio
->name
, "i8042 KBD port", sizeof(serio
->name
));
1148 strlcpy(serio
->phys
, I8042_KBD_PHYS_DESC
, sizeof(serio
->phys
));
1150 port
->serio
= serio
;
1151 port
->irq
= I8042_KBD_IRQ
;
1156 static int __init
i8042_create_aux_port(int idx
)
1158 struct serio
*serio
;
1159 int port_no
= idx
< 0 ? I8042_AUX_PORT_NO
: I8042_MUX_PORT_NO
+ idx
;
1160 struct i8042_port
*port
= &i8042_ports
[port_no
];
1162 serio
= kzalloc(sizeof(struct serio
), GFP_KERNEL
);
1166 serio
->id
.type
= SERIO_8042
;
1167 serio
->write
= i8042_aux_write
;
1168 serio
->start
= i8042_start
;
1169 serio
->stop
= i8042_stop
;
1170 serio
->port_data
= port
;
1171 serio
->dev
.parent
= &i8042_platform_device
->dev
;
1173 strlcpy(serio
->name
, "i8042 AUX port", sizeof(serio
->name
));
1174 strlcpy(serio
->phys
, I8042_AUX_PHYS_DESC
, sizeof(serio
->phys
));
1175 serio
->close
= i8042_port_close
;
1177 snprintf(serio
->name
, sizeof(serio
->name
), "i8042 AUX%d port", idx
);
1178 snprintf(serio
->phys
, sizeof(serio
->phys
), I8042_MUX_PHYS_DESC
, idx
+ 1);
1181 port
->serio
= serio
;
1183 port
->irq
= I8042_AUX_IRQ
;
1188 static void __init
i8042_free_kbd_port(void)
1190 kfree(i8042_ports
[I8042_KBD_PORT_NO
].serio
);
1191 i8042_ports
[I8042_KBD_PORT_NO
].serio
= NULL
;
1194 static void __init
i8042_free_aux_ports(void)
1198 for (i
= I8042_AUX_PORT_NO
; i
< I8042_NUM_PORTS
; i
++) {
1199 kfree(i8042_ports
[i
].serio
);
1200 i8042_ports
[i
].serio
= NULL
;
1204 static void __init
i8042_register_ports(void)
1208 for (i
= 0; i
< I8042_NUM_PORTS
; i
++) {
1209 if (i8042_ports
[i
].serio
) {
1210 printk(KERN_INFO
"serio: %s at %#lx,%#lx irq %d\n",
1211 i8042_ports
[i
].serio
->name
,
1212 (unsigned long) I8042_DATA_REG
,
1213 (unsigned long) I8042_COMMAND_REG
,
1214 i8042_ports
[i
].irq
);
1215 serio_register_port(i8042_ports
[i
].serio
);
1220 static void __devexit
i8042_unregister_ports(void)
1224 for (i
= 0; i
< I8042_NUM_PORTS
; i
++) {
1225 if (i8042_ports
[i
].serio
) {
1226 serio_unregister_port(i8042_ports
[i
].serio
);
1227 i8042_ports
[i
].serio
= NULL
;
1233 * Checks whether port belongs to i8042 controller.
1235 bool i8042_check_port_owner(const struct serio
*port
)
1239 for (i
= 0; i
< I8042_NUM_PORTS
; i
++)
1240 if (i8042_ports
[i
].serio
== port
)
1245 EXPORT_SYMBOL(i8042_check_port_owner
);
1247 static void i8042_free_irqs(void)
1249 if (i8042_aux_irq_registered
)
1250 free_irq(I8042_AUX_IRQ
, i8042_platform_device
);
1251 if (i8042_kbd_irq_registered
)
1252 free_irq(I8042_KBD_IRQ
, i8042_platform_device
);
1254 i8042_aux_irq_registered
= i8042_kbd_irq_registered
= false;
1257 static int __init
i8042_setup_aux(void)
1259 int (*aux_enable
)(void);
1263 if (i8042_check_aux())
1266 if (i8042_nomux
|| i8042_check_mux()) {
1267 error
= i8042_create_aux_port(-1);
1269 goto err_free_ports
;
1270 aux_enable
= i8042_enable_aux_port
;
1272 for (i
= 0; i
< I8042_NUM_MUX_PORTS
; i
++) {
1273 error
= i8042_create_aux_port(i
);
1275 goto err_free_ports
;
1277 aux_enable
= i8042_enable_mux_ports
;
1280 error
= request_irq(I8042_AUX_IRQ
, i8042_interrupt
, IRQF_SHARED
,
1281 "i8042", i8042_platform_device
);
1283 goto err_free_ports
;
1288 i8042_aux_irq_registered
= true;
1292 free_irq(I8042_AUX_IRQ
, i8042_platform_device
);
1294 i8042_free_aux_ports();
1298 static int __init
i8042_setup_kbd(void)
1302 error
= i8042_create_kbd_port();
1306 error
= request_irq(I8042_KBD_IRQ
, i8042_interrupt
, IRQF_SHARED
,
1307 "i8042", i8042_platform_device
);
1311 error
= i8042_enable_kbd_port();
1315 i8042_kbd_irq_registered
= true;
1319 free_irq(I8042_KBD_IRQ
, i8042_platform_device
);
1321 i8042_free_kbd_port();
1325 static int __init
i8042_probe(struct platform_device
*dev
)
1329 error
= i8042_controller_selftest();
1333 error
= i8042_controller_init();
1339 i8042_dritek_enable();
1343 error
= i8042_setup_aux();
1344 if (error
&& error
!= -ENODEV
&& error
!= -EBUSY
)
1349 error
= i8042_setup_kbd();
1354 * Ok, everything is ready, let's register all serio ports
1356 i8042_register_ports();
1361 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1363 i8042_controller_reset();
1368 static int __devexit
i8042_remove(struct platform_device
*dev
)
1370 i8042_unregister_ports();
1372 i8042_controller_reset();
1377 static struct platform_driver i8042_driver
= {
1380 .owner
= THIS_MODULE
,
1382 .pm
= &i8042_pm_ops
,
1385 .remove
= __devexit_p(i8042_remove
),
1386 .shutdown
= i8042_shutdown
,
1389 static int __init
i8042_init(void)
1395 err
= i8042_platform_init();
1399 err
= i8042_controller_check();
1401 goto err_platform_exit
;
1403 i8042_platform_device
= platform_device_alloc("i8042", -1);
1404 if (!i8042_platform_device
) {
1406 goto err_platform_exit
;
1409 err
= platform_device_add(i8042_platform_device
);
1411 goto err_free_device
;
1413 err
= platform_driver_probe(&i8042_driver
, i8042_probe
);
1415 goto err_del_device
;
1417 panic_blink
= i8042_panic_blink
;
1422 platform_device_del(i8042_platform_device
);
1424 platform_device_put(i8042_platform_device
);
1426 i8042_platform_exit();
1431 static void __exit
i8042_exit(void)
1433 platform_driver_unregister(&i8042_driver
);
1434 platform_device_unregister(i8042_platform_device
);
1435 i8042_platform_exit();
1440 module_init(i8042_init
);
1441 module_exit(i8042_exit
);