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serial-core: resume serial hardware with no_console_suspend
[linux-2.6/linux-2.6-openrd.git] / drivers / mfd / wm8350-core.c
blob9a970bd6877587f9a40f01736280dd262c7ea32f
1 /*
2 * wm8350-core.c -- Device access for Wolfson WM8350
3 *
4 * Copyright 2007, 2008 Wolfson Microelectronics PLC.
5 *
6 * Author: Liam Girdwood, Mark Brown
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/init.h>
18 #include <linux/bug.h>
19 #include <linux/device.h>
20 #include <linux/delay.h>
21 #include <linux/interrupt.h>
22 #include <linux/workqueue.h>
23
24 #include <linux/mfd/wm8350/core.h>
25 #include <linux/mfd/wm8350/audio.h>
26 #include <linux/mfd/wm8350/comparator.h>
27 #include <linux/mfd/wm8350/gpio.h>
28 #include <linux/mfd/wm8350/pmic.h>
29 #include <linux/mfd/wm8350/rtc.h>
30 #include <linux/mfd/wm8350/supply.h>
31 #include <linux/mfd/wm8350/wdt.h>
32
33 #define WM8350_UNLOCK_KEY 0x0013
34 #define WM8350_LOCK_KEY 0x0000
35
36 #define WM8350_CLOCK_CONTROL_1 0x28
37 #define WM8350_AIF_TEST 0x74
38
39 /* debug */
40 #define WM8350_BUS_DEBUG 0
41 #if WM8350_BUS_DEBUG
42 #define dump(regs, src) do { \
43 int i_; \
44 u16 *src_ = src; \
45 printk(KERN_DEBUG); \
46 for (i_ = 0; i_ < regs; i_++) \
47 printk(" 0x%4.4x", *src_++); \
48 printk("\n"); \
49 } while (0);
50 #else
51 #define dump(bytes, src)
52 #endif
53
54 #define WM8350_LOCK_DEBUG 0
55 #if WM8350_LOCK_DEBUG
56 #define ldbg(format, arg...) printk(format, ## arg)
57 #else
58 #define ldbg(format, arg...)
59 #endif
60
61 /*
62 * WM8350 Device IO
63 */
64 static DEFINE_MUTEX(io_mutex);
65 static DEFINE_MUTEX(reg_lock_mutex);
66
67 /* Perform a physical read from the device.
68 */
69 static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs,
70 u16 *dest)
71 {
72 int i, ret;
73 int bytes = num_regs * 2;
74
75 dev_dbg(wm8350->dev, "volatile read\n");
76 ret = wm8350->read_dev(wm8350, reg, bytes, (char *)dest);
77
78 for (i = reg; i < reg + num_regs; i++) {
79 /* Cache is CPU endian */
80 dest[i - reg] = be16_to_cpu(dest[i - reg]);
81
82 /* Mask out non-readable bits */
83 dest[i - reg] &= wm8350_reg_io_map[i].readable;
84 }
85
86 dump(num_regs, dest);
87
88 return ret;
89 }
90
91 static int wm8350_read(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *dest)
92 {
93 int i;
94 int end = reg + num_regs;
95 int ret = 0;
96 int bytes = num_regs * 2;
97
98 if (wm8350->read_dev == NULL)
99 return -ENODEV;
100
101 if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
102 dev_err(wm8350->dev, "invalid reg %x\n",
103 reg + num_regs - 1);
104 return -EINVAL;
105 }
106
107 dev_dbg(wm8350->dev,
108 "%s R%d(0x%2.2x) %d regs\n", __func__, reg, reg, num_regs);
109
110 #if WM8350_BUS_DEBUG
111 /* we can _safely_ read any register, but warn if read not supported */
112 for (i = reg; i < end; i++) {
113 if (!wm8350_reg_io_map[i].readable)
114 dev_warn(wm8350->dev,
115 "reg R%d is not readable\n", i);
116 }
117 #endif
118
119 /* if any volatile registers are required, then read back all */
120 for (i = reg; i < end; i++)
121 if (wm8350_reg_io_map[i].vol)
122 return wm8350_phys_read(wm8350, reg, num_regs, dest);
123
124 /* no volatiles, then cache is good */
125 dev_dbg(wm8350->dev, "cache read\n");
126 memcpy(dest, &wm8350->reg_cache[reg], bytes);
127 dump(num_regs, dest);
128 return ret;
129 }
130
131 static inline int is_reg_locked(struct wm8350 *wm8350, u8 reg)
132 {
133 if (reg == WM8350_SECURITY ||
134 wm8350->reg_cache[WM8350_SECURITY] == WM8350_UNLOCK_KEY)
135 return 0;
136
137 if ((reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
138 reg <= WM8350_GPIO_FUNCTION_SELECT_4) ||
139 (reg >= WM8350_BATTERY_CHARGER_CONTROL_1 &&
140 reg <= WM8350_BATTERY_CHARGER_CONTROL_3))
141 return 1;
142 return 0;
143 }
144
145 static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src)
146 {
147 int i;
148 int end = reg + num_regs;
149 int bytes = num_regs * 2;
150
151 if (wm8350->write_dev == NULL)
152 return -ENODEV;
153
154 if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
155 dev_err(wm8350->dev, "invalid reg %x\n",
156 reg + num_regs - 1);
157 return -EINVAL;
158 }
159
160 /* it's generally not a good idea to write to RO or locked registers */
161 for (i = reg; i < end; i++) {
162 if (!wm8350_reg_io_map[i].writable) {
163 dev_err(wm8350->dev,
164 "attempted write to read only reg R%d\n", i);
165 return -EINVAL;
166 }
167
168 if (is_reg_locked(wm8350, i)) {
169 dev_err(wm8350->dev,
170 "attempted write to locked reg R%d\n", i);
171 return -EINVAL;
172 }
173
174 src[i - reg] &= wm8350_reg_io_map[i].writable;
175
176 wm8350->reg_cache[i] =
177 (wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable)
178 | src[i - reg];
179
180 src[i - reg] = cpu_to_be16(src[i - reg]);
181 }
182
183 /* Actually write it out */
184 return wm8350->write_dev(wm8350, reg, bytes, (char *)src);
185 }
186
187 /*
188 * Safe read, modify, write methods
189 */
190 int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
191 {
192 u16 data;
193 int err;
194
195 mutex_lock(&io_mutex);
196 err = wm8350_read(wm8350, reg, 1, &data);
197 if (err) {
198 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
199 goto out;
200 }
201
202 data &= ~mask;
203 err = wm8350_write(wm8350, reg, 1, &data);
204 if (err)
205 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
206 out:
207 mutex_unlock(&io_mutex);
208 return err;
209 }
210 EXPORT_SYMBOL_GPL(wm8350_clear_bits);
211
212 int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
213 {
214 u16 data;
215 int err;
216
217 mutex_lock(&io_mutex);
218 err = wm8350_read(wm8350, reg, 1, &data);
219 if (err) {
220 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
221 goto out;
222 }
223
224 data |= mask;
225 err = wm8350_write(wm8350, reg, 1, &data);
226 if (err)
227 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
228 out:
229 mutex_unlock(&io_mutex);
230 return err;
231 }
232 EXPORT_SYMBOL_GPL(wm8350_set_bits);
233
234 u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
235 {
236 u16 data;
237 int err;
238
239 mutex_lock(&io_mutex);
240 err = wm8350_read(wm8350, reg, 1, &data);
241 if (err)
242 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
243
244 mutex_unlock(&io_mutex);
245 return data;
246 }
247 EXPORT_SYMBOL_GPL(wm8350_reg_read);
248
249 int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
250 {
251 int ret;
252 u16 data = val;
253
254 mutex_lock(&io_mutex);
255 ret = wm8350_write(wm8350, reg, 1, &data);
256 if (ret)
257 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
258 mutex_unlock(&io_mutex);
259 return ret;
260 }
261 EXPORT_SYMBOL_GPL(wm8350_reg_write);
262
263 int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
264 u16 *dest)
265 {
266 int err = 0;
267
268 mutex_lock(&io_mutex);
269 err = wm8350_read(wm8350, start_reg, regs, dest);
270 if (err)
271 dev_err(wm8350->dev, "block read starting from R%d failed\n",
272 start_reg);
273 mutex_unlock(&io_mutex);
274 return err;
275 }
276 EXPORT_SYMBOL_GPL(wm8350_block_read);
277
278 int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
279 u16 *src)
280 {
281 int ret = 0;
282
283 mutex_lock(&io_mutex);
284 ret = wm8350_write(wm8350, start_reg, regs, src);
285 if (ret)
286 dev_err(wm8350->dev, "block write starting at R%d failed\n",
287 start_reg);
288 mutex_unlock(&io_mutex);
289 return ret;
290 }
291 EXPORT_SYMBOL_GPL(wm8350_block_write);
292
293 /**
294 * wm8350_reg_lock()
295 *
296 * The WM8350 has a hardware lock which can be used to prevent writes to
297 * some registers (generally those which can cause particularly serious
298 * problems if misused). This function enables that lock.
299 */
300 int wm8350_reg_lock(struct wm8350 *wm8350)
301 {
302 u16 key = WM8350_LOCK_KEY;
303 int ret;
304
305 ldbg(__func__);
306 mutex_lock(&io_mutex);
307 ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
308 if (ret)
309 dev_err(wm8350->dev, "lock failed\n");
310 mutex_unlock(&io_mutex);
311 return ret;
312 }
313 EXPORT_SYMBOL_GPL(wm8350_reg_lock);
314
315 /**
316 * wm8350_reg_unlock()
317 *
318 * The WM8350 has a hardware lock which can be used to prevent writes to
319 * some registers (generally those which can cause particularly serious
320 * problems if misused). This function disables that lock so updates
321 * can be performed. For maximum safety this should be done only when
322 * required.
323 */
324 int wm8350_reg_unlock(struct wm8350 *wm8350)
325 {
326 u16 key = WM8350_UNLOCK_KEY;
327 int ret;
328
329 ldbg(__func__);
330 mutex_lock(&io_mutex);
331 ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
332 if (ret)
333 dev_err(wm8350->dev, "unlock failed\n");
334 mutex_unlock(&io_mutex);
335 return ret;
336 }
337 EXPORT_SYMBOL_GPL(wm8350_reg_unlock);
338
339 int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
340 {
341 u16 reg, result = 0;
342 int tries = 5;
343
344 if (channel < WM8350_AUXADC_AUX1 || channel > WM8350_AUXADC_TEMP)
345 return -EINVAL;
346 if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
347 && (scale != 0 || vref != 0))
348 return -EINVAL;
349
350 mutex_lock(&wm8350->auxadc_mutex);
351
352 /* Turn on the ADC */
353 reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
354 wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg | WM8350_AUXADC_ENA);
355
356 if (scale || vref) {
357 reg = scale << 13;
358 reg |= vref << 12;
359 wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
360 }
361
362 reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
363 reg |= 1 << channel | WM8350_AUXADC_POLL;
364 wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);
365
366 do {
367 schedule_timeout_interruptible(1);
368 reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
369 } while ((reg & WM8350_AUXADC_POLL) && --tries);
370
371 if (!tries)
372 dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
373 else
374 result = wm8350_reg_read(wm8350,
375 WM8350_AUX1_READBACK + channel);
376
377 /* Turn off the ADC */
378 reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
379 wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
380 reg & ~WM8350_AUXADC_ENA);
381
382 mutex_unlock(&wm8350->auxadc_mutex);
383
384 return result & WM8350_AUXADC_DATA1_MASK;
385 }
386 EXPORT_SYMBOL_GPL(wm8350_read_auxadc);
387
388 /*
389 * Cache is always host endian.
390 */
391 static int wm8350_create_cache(struct wm8350 *wm8350, int type, int mode)
392 {
393 int i, ret = 0;
394 u16 value;
395 const u16 *reg_map;
396
397 switch (type) {
398 case 0:
399 switch (mode) {
400 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_0
401 case 0:
402 reg_map = wm8350_mode0_defaults;
403 break;
404 #endif
405 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_1
406 case 1:
407 reg_map = wm8350_mode1_defaults;
408 break;
409 #endif
410 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_2
411 case 2:
412 reg_map = wm8350_mode2_defaults;
413 break;
414 #endif
415 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_3
416 case 3:
417 reg_map = wm8350_mode3_defaults;
418 break;
419 #endif
420 default:
421 dev_err(wm8350->dev,
422 "WM8350 configuration mode %d not supported\n",
423 mode);
424 return -EINVAL;
425 }
426 break;
427
428 case 1:
429 switch (mode) {
430 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_0
431 case 0:
432 reg_map = wm8351_mode0_defaults;
433 break;
434 #endif
435 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_1
436 case 1:
437 reg_map = wm8351_mode1_defaults;
438 break;
439 #endif
440 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_2
441 case 2:
442 reg_map = wm8351_mode2_defaults;
443 break;
444 #endif
445 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_3
446 case 3:
447 reg_map = wm8351_mode3_defaults;
448 break;
449 #endif
450 default:
451 dev_err(wm8350->dev,
452 "WM8351 configuration mode %d not supported\n",
453 mode);
454 return -EINVAL;
455 }
456 break;
457
458 case 2:
459 switch (mode) {
460 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_0
461 case 0:
462 reg_map = wm8352_mode0_defaults;
463 break;
464 #endif
465 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_1
466 case 1:
467 reg_map = wm8352_mode1_defaults;
468 break;
469 #endif
470 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_2
471 case 2:
472 reg_map = wm8352_mode2_defaults;
473 break;
474 #endif
475 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_3
476 case 3:
477 reg_map = wm8352_mode3_defaults;
478 break;
479 #endif
480 default:
481 dev_err(wm8350->dev,
482 "WM8352 configuration mode %d not supported\n",
483 mode);
484 return -EINVAL;
485 }
486 break;
487
488 default:
489 dev_err(wm8350->dev,
490 "WM835x configuration mode %d not supported\n",
491 mode);
492 return -EINVAL;
493 }
494
495 wm8350->reg_cache =
496 kmalloc(sizeof(u16) * (WM8350_MAX_REGISTER + 1), GFP_KERNEL);
497 if (wm8350->reg_cache == NULL)
498 return -ENOMEM;
499
500 /* Read the initial cache state back from the device - this is
501 * a PMIC so the device many not be in a virgin state and we
502 * can't rely on the silicon values.
503 */
504 ret = wm8350->read_dev(wm8350, 0,
505 sizeof(u16) * (WM8350_MAX_REGISTER + 1),
506 wm8350->reg_cache);
507 if (ret < 0) {
508 dev_err(wm8350->dev,
509 "failed to read initial cache values\n");
510 goto out;
511 }
512
513 /* Mask out uncacheable/unreadable bits and the audio. */
514 for (i = 0; i < WM8350_MAX_REGISTER; i++) {
515 if (wm8350_reg_io_map[i].readable &&
516 (i < WM8350_CLOCK_CONTROL_1 || i > WM8350_AIF_TEST)) {
517 value = be16_to_cpu(wm8350->reg_cache[i]);
518 value &= wm8350_reg_io_map[i].readable;
519 wm8350->reg_cache[i] = value;
520 } else
521 wm8350->reg_cache[i] = reg_map[i];
522 }
523
524 out:
525 return ret;
526 }
527
528 /*
529 * Register a client device. This is non-fatal since there is no need to
530 * fail the entire device init due to a single platform device failing.
531 */
532 static void wm8350_client_dev_register(struct wm8350 *wm8350,
533 const char *name,
534 struct platform_device **pdev)
535 {
536 int ret;
537
538 *pdev = platform_device_alloc(name, -1);
539 if (*pdev == NULL) {
540 dev_err(wm8350->dev, "Failed to allocate %s\n", name);
541 return;
542 }
543
544 (*pdev)->dev.parent = wm8350->dev;
545 platform_set_drvdata(*pdev, wm8350);
546 ret = platform_device_add(*pdev);
547 if (ret != 0) {
548 dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret);
549 platform_device_put(*pdev);
550 *pdev = NULL;
551 }
552 }
553
554 int wm8350_device_init(struct wm8350 *wm8350, int irq,
555 struct wm8350_platform_data *pdata)
556 {
557 int ret;
558 u16 id1, id2, mask_rev;
559 u16 cust_id, mode, chip_rev;
560
561 /* get WM8350 revision and config mode */
562 ret = wm8350->read_dev(wm8350, WM8350_RESET_ID, sizeof(id1), &id1);
563 if (ret != 0) {
564 dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
565 goto err;
566 }
567
568 ret = wm8350->read_dev(wm8350, WM8350_ID, sizeof(id2), &id2);
569 if (ret != 0) {
570 dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
571 goto err;
572 }
573
574 ret = wm8350->read_dev(wm8350, WM8350_REVISION, sizeof(mask_rev),
575 &mask_rev);
576 if (ret != 0) {
577 dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
578 goto err;
579 }
580
581 id1 = be16_to_cpu(id1);
582 id2 = be16_to_cpu(id2);
583 mask_rev = be16_to_cpu(mask_rev);
584
585 if (id1 != 0x6143) {
586 dev_err(wm8350->dev,
587 "Device with ID %x is not a WM8350\n", id1);
588 ret = -ENODEV;
589 goto err;
590 }
591
592 mode = id2 & WM8350_CONF_STS_MASK >> 10;
593 cust_id = id2 & WM8350_CUST_ID_MASK;
594 chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12;
595 dev_info(wm8350->dev,
596 "CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
597 mode, cust_id, mask_rev, chip_rev);
598
599 if (cust_id != 0) {
600 dev_err(wm8350->dev, "Unsupported CUST_ID\n");
601 ret = -ENODEV;
602 goto err;
603 }
604
605 switch (mask_rev) {
606 case 0:
607 wm8350->pmic.max_dcdc = WM8350_DCDC_6;
608 wm8350->pmic.max_isink = WM8350_ISINK_B;
609
610 switch (chip_rev) {
611 case WM8350_REV_E:
612 dev_info(wm8350->dev, "WM8350 Rev E\n");
613 break;
614 case WM8350_REV_F:
615 dev_info(wm8350->dev, "WM8350 Rev F\n");
616 break;
617 case WM8350_REV_G:
618 dev_info(wm8350->dev, "WM8350 Rev G\n");
619 wm8350->power.rev_g_coeff = 1;
620 break;
621 case WM8350_REV_H:
622 dev_info(wm8350->dev, "WM8350 Rev H\n");
623 wm8350->power.rev_g_coeff = 1;
624 break;
625 default:
626 /* For safety we refuse to run on unknown hardware */
627 dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n");
628 ret = -ENODEV;
629 goto err;
630 }
631 break;
632
633 case 1:
634 wm8350->pmic.max_dcdc = WM8350_DCDC_4;
635 wm8350->pmic.max_isink = WM8350_ISINK_A;
636
637 switch (chip_rev) {
638 case 0:
639 dev_info(wm8350->dev, "WM8351 Rev A\n");
640 wm8350->power.rev_g_coeff = 1;
641 break;
642
643 case 1:
644 dev_info(wm8350->dev, "WM8351 Rev B\n");
645 wm8350->power.rev_g_coeff = 1;
646 break;
647
648 default:
649 dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
650 ret = -ENODEV;
651 goto err;
652 }
653 break;
654
655 case 2:
656 wm8350->pmic.max_dcdc = WM8350_DCDC_6;
657 wm8350->pmic.max_isink = WM8350_ISINK_B;
658
659 switch (chip_rev) {
660 case 0:
661 dev_info(wm8350->dev, "WM8352 Rev A\n");
662 wm8350->power.rev_g_coeff = 1;
663 break;
664
665 default:
666 dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n");
667 ret = -ENODEV;
668 goto err;
669 }
670 break;
671
672 default:
673 dev_err(wm8350->dev, "Unknown MASK_REV\n");
674 ret = -ENODEV;
675 goto err;
676 }
677
678 ret = wm8350_create_cache(wm8350, mask_rev, mode);
679 if (ret < 0) {
680 dev_err(wm8350->dev, "Failed to create register cache\n");
681 return ret;
682 }
683
684 mutex_init(&wm8350->auxadc_mutex);
685
686 ret = wm8350_irq_init(wm8350, irq, pdata);
687 if (ret < 0)
688 goto err;
689
690 if (pdata && pdata->init) {
691 ret = pdata->init(wm8350);
692 if (ret != 0) {
693 dev_err(wm8350->dev, "Platform init() failed: %d\n",
694 ret);
695 goto err_irq;
696 }
697 }
698
699 wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);
700
701 wm8350_client_dev_register(wm8350, "wm8350-codec",
702 &(wm8350->codec.pdev));
703 wm8350_client_dev_register(wm8350, "wm8350-gpio",
704 &(wm8350->gpio.pdev));
705 wm8350_client_dev_register(wm8350, "wm8350-hwmon",
706 &(wm8350->hwmon.pdev));
707 wm8350_client_dev_register(wm8350, "wm8350-power",
708 &(wm8350->power.pdev));
709 wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
710 wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev));
711
712 return 0;
713
714 err_irq:
715 wm8350_irq_exit(wm8350);
716 err:
717 kfree(wm8350->reg_cache);
718 return ret;
719 }
720 EXPORT_SYMBOL_GPL(wm8350_device_init);
721
722 void wm8350_device_exit(struct wm8350 *wm8350)
723 {
724 int i;
725
726 for (i = 0; i < ARRAY_SIZE(wm8350->pmic.led); i++)
727 platform_device_unregister(wm8350->pmic.led[i].pdev);
728
729 for (i = 0; i < ARRAY_SIZE(wm8350->pmic.pdev); i++)
730 platform_device_unregister(wm8350->pmic.pdev[i]);
731
732 platform_device_unregister(wm8350->wdt.pdev);
733 platform_device_unregister(wm8350->rtc.pdev);
734 platform_device_unregister(wm8350->power.pdev);
735 platform_device_unregister(wm8350->hwmon.pdev);
736 platform_device_unregister(wm8350->gpio.pdev);
737 platform_device_unregister(wm8350->codec.pdev);
738
739 wm8350_irq_exit(wm8350);
740
741 kfree(wm8350->reg_cache);
742 }
743 EXPORT_SYMBOL_GPL(wm8350_device_exit);
744
745 MODULE_DESCRIPTION("WM8350 AudioPlus PMIC core driver");
746 MODULE_LICENSE("GPL");
linux 2.6 git repository for openrd