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drm: initial KMS config fixes
[linux-2.6/linux-2.6-openrd.git] / sound / sparc / cs4231.c
blob41c387587474c9ccaef6ae1c228ad1dffde14977
1 /*
2 * Driver for CS4231 sound chips found on Sparcs.
3 * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net>
4 *
5 * Based entirely upon drivers/sbus/audio/cs4231.c which is:
6 * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
7 * and also sound/isa/cs423x/cs4231_lib.c which is:
8 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
9 */
10
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/slab.h>
14 #include <linux/delay.h>
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/moduleparam.h>
18 #include <linux/irq.h>
19 #include <linux/io.h>
20 #include <linux/of.h>
21 #include <linux/of_device.h>
22
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/info.h>
26 #include <sound/control.h>
27 #include <sound/timer.h>
28 #include <sound/initval.h>
29 #include <sound/pcm_params.h>
30
31 #ifdef CONFIG_SBUS
32 #define SBUS_SUPPORT
33 #endif
34
35 #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
36 #define EBUS_SUPPORT
37 #include <linux/pci.h>
38 #include <asm/ebus_dma.h>
39 #endif
40
41 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
42 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
43 /* Enable this card */
44 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
45
46 module_param_array(index, int, NULL, 0444);
47 MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
48 module_param_array(id, charp, NULL, 0444);
49 MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
50 module_param_array(enable, bool, NULL, 0444);
51 MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
52 MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
53 MODULE_DESCRIPTION("Sun CS4231");
54 MODULE_LICENSE("GPL");
55 MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
56
57 #ifdef SBUS_SUPPORT
58 struct sbus_dma_info {
59 spinlock_t lock; /* DMA access lock */
60 int dir;
61 void __iomem *regs;
62 };
63 #endif
64
65 struct snd_cs4231;
66 struct cs4231_dma_control {
67 void (*prepare)(struct cs4231_dma_control *dma_cont,
68 int dir);
69 void (*enable)(struct cs4231_dma_control *dma_cont, int on);
70 int (*request)(struct cs4231_dma_control *dma_cont,
71 dma_addr_t bus_addr, size_t len);
72 unsigned int (*address)(struct cs4231_dma_control *dma_cont);
73 #ifdef EBUS_SUPPORT
74 struct ebus_dma_info ebus_info;
75 #endif
76 #ifdef SBUS_SUPPORT
77 struct sbus_dma_info sbus_info;
78 #endif
79 };
80
81 struct snd_cs4231 {
82 spinlock_t lock; /* registers access lock */
83 void __iomem *port;
84
85 struct cs4231_dma_control p_dma;
86 struct cs4231_dma_control c_dma;
87
88 u32 flags;
89 #define CS4231_FLAG_EBUS 0x00000001
90 #define CS4231_FLAG_PLAYBACK 0x00000002
91 #define CS4231_FLAG_CAPTURE 0x00000004
92
93 struct snd_card *card;
94 struct snd_pcm *pcm;
95 struct snd_pcm_substream *playback_substream;
96 unsigned int p_periods_sent;
97 struct snd_pcm_substream *capture_substream;
98 unsigned int c_periods_sent;
99 struct snd_timer *timer;
100
101 unsigned short mode;
102 #define CS4231_MODE_NONE 0x0000
103 #define CS4231_MODE_PLAY 0x0001
104 #define CS4231_MODE_RECORD 0x0002
105 #define CS4231_MODE_TIMER 0x0004
106 #define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
107 CS4231_MODE_TIMER)
108
109 unsigned char image[32]; /* registers image */
110 int mce_bit;
111 int calibrate_mute;
112 struct mutex mce_mutex; /* mutex for mce register */
113 struct mutex open_mutex; /* mutex for ALSA open/close */
114
115 struct of_device *op;
116 unsigned int irq[2];
117 unsigned int regs_size;
118 struct snd_cs4231 *next;
119 };
120
121 /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
122 * now.... -DaveM
123 */
124
125 /* IO ports */
126 #include <sound/cs4231-regs.h>
127
128 /* XXX offsets are different than PC ISA chips... */
129 #define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2))
130
131 /* SBUS DMA register defines. */
132
133 #define APCCSR 0x10UL /* APC DMA CSR */
134 #define APCCVA 0x20UL /* APC Capture DMA Address */
135 #define APCCC 0x24UL /* APC Capture Count */
136 #define APCCNVA 0x28UL /* APC Capture DMA Next Address */
137 #define APCCNC 0x2cUL /* APC Capture Next Count */
138 #define APCPVA 0x30UL /* APC Play DMA Address */
139 #define APCPC 0x34UL /* APC Play Count */
140 #define APCPNVA 0x38UL /* APC Play DMA Next Address */
141 #define APCPNC 0x3cUL /* APC Play Next Count */
142
143 /* Defines for SBUS DMA-routines */
144
145 #define APCVA 0x0UL /* APC DMA Address */
146 #define APCC 0x4UL /* APC Count */
147 #define APCNVA 0x8UL /* APC DMA Next Address */
148 #define APCNC 0xcUL /* APC Next Count */
149 #define APC_PLAY 0x30UL /* Play registers start at 0x30 */
150 #define APC_RECORD 0x20UL /* Record registers start at 0x20 */
151
152 /* APCCSR bits */
153
154 #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
155 #define APC_PLAY_INT 0x400000 /* Playback interrupt */
156 #define APC_CAPT_INT 0x200000 /* Capture interrupt */
157 #define APC_GENL_INT 0x100000 /* General interrupt */
158 #define APC_XINT_ENA 0x80000 /* General ext int. enable */
159 #define APC_XINT_PLAY 0x40000 /* Playback ext intr */
160 #define APC_XINT_CAPT 0x20000 /* Capture ext intr */
161 #define APC_XINT_GENL 0x10000 /* Error ext intr */
162 #define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
163 #define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
164 #define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
165 #define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
166 #define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
167 #define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
168 #define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
169 #define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
170 #define APC_PPAUSE 0x80 /* Pause the play DMA */
171 #define APC_CPAUSE 0x40 /* Pause the capture DMA */
172 #define APC_CDC_RESET 0x20 /* CODEC RESET */
173 #define APC_PDMA_READY 0x08 /* Play DMA Go */
174 #define APC_CDMA_READY 0x04 /* Capture DMA Go */
175 #define APC_CHIP_RESET 0x01 /* Reset the chip */
176
177 /* EBUS DMA register offsets */
178
179 #define EBDMA_CSR 0x00UL /* Control/Status */
180 #define EBDMA_ADDR 0x04UL /* DMA Address */
181 #define EBDMA_COUNT 0x08UL /* DMA Count */
182
183 /*
184 * Some variables
185 */
186
187 static unsigned char freq_bits[14] = {
188 /* 5510 */ 0x00 | CS4231_XTAL2,
189 /* 6620 */ 0x0E | CS4231_XTAL2,
190 /* 8000 */ 0x00 | CS4231_XTAL1,
191 /* 9600 */ 0x0E | CS4231_XTAL1,
192 /* 11025 */ 0x02 | CS4231_XTAL2,
193 /* 16000 */ 0x02 | CS4231_XTAL1,
194 /* 18900 */ 0x04 | CS4231_XTAL2,
195 /* 22050 */ 0x06 | CS4231_XTAL2,
196 /* 27042 */ 0x04 | CS4231_XTAL1,
197 /* 32000 */ 0x06 | CS4231_XTAL1,
198 /* 33075 */ 0x0C | CS4231_XTAL2,
199 /* 37800 */ 0x08 | CS4231_XTAL2,
200 /* 44100 */ 0x0A | CS4231_XTAL2,
201 /* 48000 */ 0x0C | CS4231_XTAL1
202 };
203
204 static unsigned int rates[14] = {
205 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
206 27042, 32000, 33075, 37800, 44100, 48000
207 };
208
209 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
210 .count = ARRAY_SIZE(rates),
211 .list = rates,
212 };
213
214 static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
215 {
216 return snd_pcm_hw_constraint_list(runtime, 0,
217 SNDRV_PCM_HW_PARAM_RATE,
218 &hw_constraints_rates);
219 }
220
221 static unsigned char snd_cs4231_original_image[32] =
222 {
223 0x00, /* 00/00 - lic */
224 0x00, /* 01/01 - ric */
225 0x9f, /* 02/02 - la1ic */
226 0x9f, /* 03/03 - ra1ic */
227 0x9f, /* 04/04 - la2ic */
228 0x9f, /* 05/05 - ra2ic */
229 0xbf, /* 06/06 - loc */
230 0xbf, /* 07/07 - roc */
231 0x20, /* 08/08 - pdfr */
232 CS4231_AUTOCALIB, /* 09/09 - ic */
233 0x00, /* 0a/10 - pc */
234 0x00, /* 0b/11 - ti */
235 CS4231_MODE2, /* 0c/12 - mi */
236 0x00, /* 0d/13 - lbc */
237 0x00, /* 0e/14 - pbru */
238 0x00, /* 0f/15 - pbrl */
239 0x80, /* 10/16 - afei */
240 0x01, /* 11/17 - afeii */
241 0x9f, /* 12/18 - llic */
242 0x9f, /* 13/19 - rlic */
243 0x00, /* 14/20 - tlb */
244 0x00, /* 15/21 - thb */
245 0x00, /* 16/22 - la3mic/reserved */
246 0x00, /* 17/23 - ra3mic/reserved */
247 0x00, /* 18/24 - afs */
248 0x00, /* 19/25 - lamoc/version */
249 0x00, /* 1a/26 - mioc */
250 0x00, /* 1b/27 - ramoc/reserved */
251 0x20, /* 1c/28 - cdfr */
252 0x00, /* 1d/29 - res4 */
253 0x00, /* 1e/30 - cbru */
254 0x00, /* 1f/31 - cbrl */
255 };
256
257 static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
258 {
259 if (cp->flags & CS4231_FLAG_EBUS)
260 return readb(reg_addr);
261 else
262 return sbus_readb(reg_addr);
263 }
264
265 static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
266 void __iomem *reg_addr)
267 {
268 if (cp->flags & CS4231_FLAG_EBUS)
269 return writeb(val, reg_addr);
270 else
271 return sbus_writeb(val, reg_addr);
272 }
273
274 /*
275 * Basic I/O functions
276 */
277
278 static void snd_cs4231_ready(struct snd_cs4231 *chip)
279 {
280 int timeout;
281
282 for (timeout = 250; timeout > 0; timeout--) {
283 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
284 if ((val & CS4231_INIT) == 0)
285 break;
286 udelay(100);
287 }
288 }
289
290 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
291 unsigned char value)
292 {
293 snd_cs4231_ready(chip);
294 #ifdef CONFIG_SND_DEBUG
295 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
296 snd_printdd("out: auto calibration time out - reg = 0x%x, "
297 "value = 0x%x\n",
298 reg, value);
299 #endif
300 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
301 wmb();
302 __cs4231_writeb(chip, value, CS4231U(chip, REG));
303 mb();
304 }
305
306 static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
307 unsigned char mask, unsigned char value)
308 {
309 unsigned char tmp = (chip->image[reg] & mask) | value;
310
311 chip->image[reg] = tmp;
312 if (!chip->calibrate_mute)
313 snd_cs4231_dout(chip, reg, tmp);
314 }
315
316 static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
317 unsigned char value)
318 {
319 snd_cs4231_dout(chip, reg, value);
320 chip->image[reg] = value;
321 mb();
322 }
323
324 static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
325 {
326 snd_cs4231_ready(chip);
327 #ifdef CONFIG_SND_DEBUG
328 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
329 snd_printdd("in: auto calibration time out - reg = 0x%x\n",
330 reg);
331 #endif
332 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
333 mb();
334 return __cs4231_readb(chip, CS4231U(chip, REG));
335 }
336
337 /*
338 * CS4231 detection / MCE routines
339 */
340
341 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
342 {
343 int timeout;
344
345 /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
346 for (timeout = 5; timeout > 0; timeout--)
347 __cs4231_readb(chip, CS4231U(chip, REGSEL));
348
349 /* end of cleanup sequence */
350 for (timeout = 500; timeout > 0; timeout--) {
351 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
352 if ((val & CS4231_INIT) == 0)
353 break;
354 msleep(1);
355 }
356 }
357
358 static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
359 {
360 unsigned long flags;
361 int timeout;
362
363 spin_lock_irqsave(&chip->lock, flags);
364 snd_cs4231_ready(chip);
365 #ifdef CONFIG_SND_DEBUG
366 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
367 snd_printdd("mce_up - auto calibration time out (0)\n");
368 #endif
369 chip->mce_bit |= CS4231_MCE;
370 timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
371 if (timeout == 0x80)
372 snd_printdd("mce_up [%p]: serious init problem - "
373 "codec still busy\n",
374 chip->port);
375 if (!(timeout & CS4231_MCE))
376 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
377 CS4231U(chip, REGSEL));
378 spin_unlock_irqrestore(&chip->lock, flags);
379 }
380
381 static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
382 {
383 unsigned long flags, timeout;
384 int reg;
385
386 snd_cs4231_busy_wait(chip);
387 spin_lock_irqsave(&chip->lock, flags);
388 #ifdef CONFIG_SND_DEBUG
389 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
390 snd_printdd("mce_down [%p] - auto calibration time out (0)\n",
391 CS4231U(chip, REGSEL));
392 #endif
393 chip->mce_bit &= ~CS4231_MCE;
394 reg = __cs4231_readb(chip, CS4231U(chip, REGSEL));
395 __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f),
396 CS4231U(chip, REGSEL));
397 if (reg == 0x80)
398 snd_printdd("mce_down [%p]: serious init problem "
399 "- codec still busy\n", chip->port);
400 if ((reg & CS4231_MCE) == 0) {
401 spin_unlock_irqrestore(&chip->lock, flags);
402 return;
403 }
404
405 /*
406 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
407 */
408 timeout = jiffies + msecs_to_jiffies(250);
409 do {
410 spin_unlock_irqrestore(&chip->lock, flags);
411 msleep(1);
412 spin_lock_irqsave(&chip->lock, flags);
413 reg = snd_cs4231_in(chip, CS4231_TEST_INIT);
414 reg &= CS4231_CALIB_IN_PROGRESS;
415 } while (reg && time_before(jiffies, timeout));
416 spin_unlock_irqrestore(&chip->lock, flags);
417
418 if (reg)
419 snd_printk(KERN_ERR
420 "mce_down - auto calibration time out (2)\n");
421 }
422
423 static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
424 struct snd_pcm_substream *substream,
425 unsigned int *periods_sent)
426 {
427 struct snd_pcm_runtime *runtime = substream->runtime;
428
429 while (1) {
430 unsigned int period_size = snd_pcm_lib_period_bytes(substream);
431 unsigned int offset = period_size * (*periods_sent);
432
433 BUG_ON(period_size >= (1 << 24));
434
435 if (dma_cont->request(dma_cont,
436 runtime->dma_addr + offset, period_size))
437 return;
438 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
439 }
440 }
441
442 static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
443 unsigned int what, int on)
444 {
445 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
446 struct cs4231_dma_control *dma_cont;
447
448 if (what & CS4231_PLAYBACK_ENABLE) {
449 dma_cont = &chip->p_dma;
450 if (on) {
451 dma_cont->prepare(dma_cont, 0);
452 dma_cont->enable(dma_cont, 1);
453 snd_cs4231_advance_dma(dma_cont,
454 chip->playback_substream,
455 &chip->p_periods_sent);
456 } else {
457 dma_cont->enable(dma_cont, 0);
458 }
459 }
460 if (what & CS4231_RECORD_ENABLE) {
461 dma_cont = &chip->c_dma;
462 if (on) {
463 dma_cont->prepare(dma_cont, 1);
464 dma_cont->enable(dma_cont, 1);
465 snd_cs4231_advance_dma(dma_cont,
466 chip->capture_substream,
467 &chip->c_periods_sent);
468 } else {
469 dma_cont->enable(dma_cont, 0);
470 }
471 }
472 }
473
474 static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
475 {
476 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
477 int result = 0;
478
479 switch (cmd) {
480 case SNDRV_PCM_TRIGGER_START:
481 case SNDRV_PCM_TRIGGER_STOP:
482 {
483 unsigned int what = 0;
484 struct snd_pcm_substream *s;
485 unsigned long flags;
486
487 snd_pcm_group_for_each_entry(s, substream) {
488 if (s == chip->playback_substream) {
489 what |= CS4231_PLAYBACK_ENABLE;
490 snd_pcm_trigger_done(s, substream);
491 } else if (s == chip->capture_substream) {
492 what |= CS4231_RECORD_ENABLE;
493 snd_pcm_trigger_done(s, substream);
494 }
495 }
496
497 spin_lock_irqsave(&chip->lock, flags);
498 if (cmd == SNDRV_PCM_TRIGGER_START) {
499 cs4231_dma_trigger(substream, what, 1);
500 chip->image[CS4231_IFACE_CTRL] |= what;
501 } else {
502 cs4231_dma_trigger(substream, what, 0);
503 chip->image[CS4231_IFACE_CTRL] &= ~what;
504 }
505 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
506 chip->image[CS4231_IFACE_CTRL]);
507 spin_unlock_irqrestore(&chip->lock, flags);
508 break;
509 }
510 default:
511 result = -EINVAL;
512 break;
513 }
514
515 return result;
516 }
517
518 /*
519 * CODEC I/O
520 */
521
522 static unsigned char snd_cs4231_get_rate(unsigned int rate)
523 {
524 int i;
525
526 for (i = 0; i < 14; i++)
527 if (rate == rates[i])
528 return freq_bits[i];
529
530 return freq_bits[13];
531 }
532
533 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
534 int channels)
535 {
536 unsigned char rformat;
537
538 rformat = CS4231_LINEAR_8;
539 switch (format) {
540 case SNDRV_PCM_FORMAT_MU_LAW:
541 rformat = CS4231_ULAW_8;
542 break;
543 case SNDRV_PCM_FORMAT_A_LAW:
544 rformat = CS4231_ALAW_8;
545 break;
546 case SNDRV_PCM_FORMAT_S16_LE:
547 rformat = CS4231_LINEAR_16;
548 break;
549 case SNDRV_PCM_FORMAT_S16_BE:
550 rformat = CS4231_LINEAR_16_BIG;
551 break;
552 case SNDRV_PCM_FORMAT_IMA_ADPCM:
553 rformat = CS4231_ADPCM_16;
554 break;
555 }
556 if (channels > 1)
557 rformat |= CS4231_STEREO;
558 return rformat;
559 }
560
561 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
562 {
563 unsigned long flags;
564
565 mute = mute ? 1 : 0;
566 spin_lock_irqsave(&chip->lock, flags);
567 if (chip->calibrate_mute == mute) {
568 spin_unlock_irqrestore(&chip->lock, flags);
569 return;
570 }
571 if (!mute) {
572 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
573 chip->image[CS4231_LEFT_INPUT]);
574 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
575 chip->image[CS4231_RIGHT_INPUT]);
576 snd_cs4231_dout(chip, CS4231_LOOPBACK,
577 chip->image[CS4231_LOOPBACK]);
578 }
579 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
580 mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
581 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
582 mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
583 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
584 mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
585 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
586 mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
587 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
588 mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
589 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
590 mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
591 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
592 mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
593 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
594 mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
595 snd_cs4231_dout(chip, CS4231_MONO_CTRL,
596 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
597 chip->calibrate_mute = mute;
598 spin_unlock_irqrestore(&chip->lock, flags);
599 }
600
601 static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
602 struct snd_pcm_hw_params *params,
603 unsigned char pdfr)
604 {
605 unsigned long flags;
606
607 mutex_lock(&chip->mce_mutex);
608 snd_cs4231_calibrate_mute(chip, 1);
609
610 snd_cs4231_mce_up(chip);
611
612 spin_lock_irqsave(&chip->lock, flags);
613 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
614 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
615 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
616 pdfr);
617 spin_unlock_irqrestore(&chip->lock, flags);
618
619 snd_cs4231_mce_down(chip);
620
621 snd_cs4231_calibrate_mute(chip, 0);
622 mutex_unlock(&chip->mce_mutex);
623 }
624
625 static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
626 struct snd_pcm_hw_params *params,
627 unsigned char cdfr)
628 {
629 unsigned long flags;
630
631 mutex_lock(&chip->mce_mutex);
632 snd_cs4231_calibrate_mute(chip, 1);
633
634 snd_cs4231_mce_up(chip);
635
636 spin_lock_irqsave(&chip->lock, flags);
637 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
638 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
639 ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
640 (cdfr & 0x0f));
641 spin_unlock_irqrestore(&chip->lock, flags);
642 snd_cs4231_mce_down(chip);
643 snd_cs4231_mce_up(chip);
644 spin_lock_irqsave(&chip->lock, flags);
645 }
646 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
647 spin_unlock_irqrestore(&chip->lock, flags);
648
649 snd_cs4231_mce_down(chip);
650
651 snd_cs4231_calibrate_mute(chip, 0);
652 mutex_unlock(&chip->mce_mutex);
653 }
654
655 /*
656 * Timer interface
657 */
658
659 static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
660 {
661 struct snd_cs4231 *chip = snd_timer_chip(timer);
662
663 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
664 }
665
666 static int snd_cs4231_timer_start(struct snd_timer *timer)
667 {
668 unsigned long flags;
669 unsigned int ticks;
670 struct snd_cs4231 *chip = snd_timer_chip(timer);
671
672 spin_lock_irqsave(&chip->lock, flags);
673 ticks = timer->sticks;
674 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
675 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
676 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
677 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
678 chip->image[CS4231_TIMER_HIGH] =
679 (unsigned char) (ticks >> 8));
680 snd_cs4231_out(chip, CS4231_TIMER_LOW,
681 chip->image[CS4231_TIMER_LOW] =
682 (unsigned char) ticks);
683 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
684 chip->image[CS4231_ALT_FEATURE_1] |
685 CS4231_TIMER_ENABLE);
686 }
687 spin_unlock_irqrestore(&chip->lock, flags);
688
689 return 0;
690 }
691
692 static int snd_cs4231_timer_stop(struct snd_timer *timer)
693 {
694 unsigned long flags;
695 struct snd_cs4231 *chip = snd_timer_chip(timer);
696
697 spin_lock_irqsave(&chip->lock, flags);
698 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
699 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
700 chip->image[CS4231_ALT_FEATURE_1]);
701 spin_unlock_irqrestore(&chip->lock, flags);
702
703 return 0;
704 }
705
706 static void __init snd_cs4231_init(struct snd_cs4231 *chip)
707 {
708 unsigned long flags;
709
710 snd_cs4231_mce_down(chip);
711
712 #ifdef SNDRV_DEBUG_MCE
713 snd_printdd("init: (1)\n");
714 #endif
715 snd_cs4231_mce_up(chip);
716 spin_lock_irqsave(&chip->lock, flags);
717 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
718 CS4231_PLAYBACK_PIO |
719 CS4231_RECORD_ENABLE |
720 CS4231_RECORD_PIO |
721 CS4231_CALIB_MODE);
722 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
723 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
724 spin_unlock_irqrestore(&chip->lock, flags);
725 snd_cs4231_mce_down(chip);
726
727 #ifdef SNDRV_DEBUG_MCE
728 snd_printdd("init: (2)\n");
729 #endif
730
731 snd_cs4231_mce_up(chip);
732 spin_lock_irqsave(&chip->lock, flags);
733 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
734 chip->image[CS4231_ALT_FEATURE_1]);
735 spin_unlock_irqrestore(&chip->lock, flags);
736 snd_cs4231_mce_down(chip);
737
738 #ifdef SNDRV_DEBUG_MCE
739 snd_printdd("init: (3) - afei = 0x%x\n",
740 chip->image[CS4231_ALT_FEATURE_1]);
741 #endif
742
743 spin_lock_irqsave(&chip->lock, flags);
744 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
745 chip->image[CS4231_ALT_FEATURE_2]);
746 spin_unlock_irqrestore(&chip->lock, flags);
747
748 snd_cs4231_mce_up(chip);
749 spin_lock_irqsave(&chip->lock, flags);
750 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
751 chip->image[CS4231_PLAYBK_FORMAT]);
752 spin_unlock_irqrestore(&chip->lock, flags);
753 snd_cs4231_mce_down(chip);
754
755 #ifdef SNDRV_DEBUG_MCE
756 snd_printdd("init: (4)\n");
757 #endif
758
759 snd_cs4231_mce_up(chip);
760 spin_lock_irqsave(&chip->lock, flags);
761 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
762 spin_unlock_irqrestore(&chip->lock, flags);
763 snd_cs4231_mce_down(chip);
764
765 #ifdef SNDRV_DEBUG_MCE
766 snd_printdd("init: (5)\n");
767 #endif
768 }
769
770 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
771 {
772 unsigned long flags;
773
774 mutex_lock(&chip->open_mutex);
775 if ((chip->mode & mode)) {
776 mutex_unlock(&chip->open_mutex);
777 return -EAGAIN;
778 }
779 if (chip->mode & CS4231_MODE_OPEN) {
780 chip->mode |= mode;
781 mutex_unlock(&chip->open_mutex);
782 return 0;
783 }
784 /* ok. now enable and ack CODEC IRQ */
785 spin_lock_irqsave(&chip->lock, flags);
786 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
787 CS4231_RECORD_IRQ |
788 CS4231_TIMER_IRQ);
789 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
790 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
791 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
792
793 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
794 CS4231_RECORD_IRQ |
795 CS4231_TIMER_IRQ);
796 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
797
798 spin_unlock_irqrestore(&chip->lock, flags);
799
800 chip->mode = mode;
801 mutex_unlock(&chip->open_mutex);
802 return 0;
803 }
804
805 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
806 {
807 unsigned long flags;
808
809 mutex_lock(&chip->open_mutex);
810 chip->mode &= ~mode;
811 if (chip->mode & CS4231_MODE_OPEN) {
812 mutex_unlock(&chip->open_mutex);
813 return;
814 }
815 snd_cs4231_calibrate_mute(chip, 1);
816
817 /* disable IRQ */
818 spin_lock_irqsave(&chip->lock, flags);
819 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
820 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
821 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
822
823 /* now disable record & playback */
824
825 if (chip->image[CS4231_IFACE_CTRL] &
826 (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
827 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
828 spin_unlock_irqrestore(&chip->lock, flags);
829 snd_cs4231_mce_up(chip);
830 spin_lock_irqsave(&chip->lock, flags);
831 chip->image[CS4231_IFACE_CTRL] &=
832 ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
833 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
834 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
835 chip->image[CS4231_IFACE_CTRL]);
836 spin_unlock_irqrestore(&chip->lock, flags);
837 snd_cs4231_mce_down(chip);
838 spin_lock_irqsave(&chip->lock, flags);
839 }
840
841 /* clear IRQ again */
842 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
843 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
844 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
845 spin_unlock_irqrestore(&chip->lock, flags);
846
847 snd_cs4231_calibrate_mute(chip, 0);
848
849 chip->mode = 0;
850 mutex_unlock(&chip->open_mutex);
851 }
852
853 /*
854 * timer open/close
855 */
856
857 static int snd_cs4231_timer_open(struct snd_timer *timer)
858 {
859 struct snd_cs4231 *chip = snd_timer_chip(timer);
860 snd_cs4231_open(chip, CS4231_MODE_TIMER);
861 return 0;
862 }
863
864 static int snd_cs4231_timer_close(struct snd_timer *timer)
865 {
866 struct snd_cs4231 *chip = snd_timer_chip(timer);
867 snd_cs4231_close(chip, CS4231_MODE_TIMER);
868 return 0;
869 }
870
871 static struct snd_timer_hardware snd_cs4231_timer_table = {
872 .flags = SNDRV_TIMER_HW_AUTO,
873 .resolution = 9945,
874 .ticks = 65535,
875 .open = snd_cs4231_timer_open,
876 .close = snd_cs4231_timer_close,
877 .c_resolution = snd_cs4231_timer_resolution,
878 .start = snd_cs4231_timer_start,
879 .stop = snd_cs4231_timer_stop,
880 };
881
882 /*
883 * ok.. exported functions..
884 */
885
886 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
887 struct snd_pcm_hw_params *hw_params)
888 {
889 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
890 unsigned char new_pdfr;
891 int err;
892
893 err = snd_pcm_lib_malloc_pages(substream,
894 params_buffer_bytes(hw_params));
895 if (err < 0)
896 return err;
897 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
898 params_channels(hw_params)) |
899 snd_cs4231_get_rate(params_rate(hw_params));
900 snd_cs4231_playback_format(chip, hw_params, new_pdfr);
901
902 return 0;
903 }
904
905 static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
906 {
907 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
908 struct snd_pcm_runtime *runtime = substream->runtime;
909 unsigned long flags;
910
911 spin_lock_irqsave(&chip->lock, flags);
912
913 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
914 CS4231_PLAYBACK_PIO);
915
916 BUG_ON(runtime->period_size > 0xffff + 1);
917
918 chip->p_periods_sent = 0;
919 spin_unlock_irqrestore(&chip->lock, flags);
920
921 return 0;
922 }
923
924 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
925 struct snd_pcm_hw_params *hw_params)
926 {
927 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
928 unsigned char new_cdfr;
929 int err;
930
931 err = snd_pcm_lib_malloc_pages(substream,
932 params_buffer_bytes(hw_params));
933 if (err < 0)
934 return err;
935 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
936 params_channels(hw_params)) |
937 snd_cs4231_get_rate(params_rate(hw_params));
938 snd_cs4231_capture_format(chip, hw_params, new_cdfr);
939
940 return 0;
941 }
942
943 static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
944 {
945 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
946 unsigned long flags;
947
948 spin_lock_irqsave(&chip->lock, flags);
949 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
950 CS4231_RECORD_PIO);
951
952
953 chip->c_periods_sent = 0;
954 spin_unlock_irqrestore(&chip->lock, flags);
955
956 return 0;
957 }
958
959 static void snd_cs4231_overrange(struct snd_cs4231 *chip)
960 {
961 unsigned long flags;
962 unsigned char res;
963
964 spin_lock_irqsave(&chip->lock, flags);
965 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
966 spin_unlock_irqrestore(&chip->lock, flags);
967
968 /* detect overrange only above 0dB; may be user selectable? */
969 if (res & (0x08 | 0x02))
970 chip->capture_substream->runtime->overrange++;
971 }
972
973 static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
974 {
975 if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
976 snd_pcm_period_elapsed(chip->playback_substream);
977 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
978 &chip->p_periods_sent);
979 }
980 }
981
982 static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
983 {
984 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
985 snd_pcm_period_elapsed(chip->capture_substream);
986 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
987 &chip->c_periods_sent);
988 }
989 }
990
991 static snd_pcm_uframes_t snd_cs4231_playback_pointer(
992 struct snd_pcm_substream *substream)
993 {
994 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
995 struct cs4231_dma_control *dma_cont = &chip->p_dma;
996 size_t ptr;
997
998 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
999 return 0;
1000 ptr = dma_cont->address(dma_cont);
1001 if (ptr != 0)
1002 ptr -= substream->runtime->dma_addr;
1003
1004 return bytes_to_frames(substream->runtime, ptr);
1005 }
1006
1007 static snd_pcm_uframes_t snd_cs4231_capture_pointer(
1008 struct snd_pcm_substream *substream)
1009 {
1010 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1011 struct cs4231_dma_control *dma_cont = &chip->c_dma;
1012 size_t ptr;
1013
1014 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1015 return 0;
1016 ptr = dma_cont->address(dma_cont);
1017 if (ptr != 0)
1018 ptr -= substream->runtime->dma_addr;
1019
1020 return bytes_to_frames(substream->runtime, ptr);
1021 }
1022
1023 static int __init snd_cs4231_probe(struct snd_cs4231 *chip)
1024 {
1025 unsigned long flags;
1026 int i;
1027 int id = 0;
1028 int vers = 0;
1029 unsigned char *ptr;
1030
1031 for (i = 0; i < 50; i++) {
1032 mb();
1033 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
1034 msleep(2);
1035 else {
1036 spin_lock_irqsave(&chip->lock, flags);
1037 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1038 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1039 vers = snd_cs4231_in(chip, CS4231_VERSION);
1040 spin_unlock_irqrestore(&chip->lock, flags);
1041 if (id == 0x0a)
1042 break; /* this is valid value */
1043 }
1044 }
1045 snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1046 if (id != 0x0a)
1047 return -ENODEV; /* no valid device found */
1048
1049 spin_lock_irqsave(&chip->lock, flags);
1050
1051 /* clear any pendings IRQ */
1052 __cs4231_readb(chip, CS4231U(chip, STATUS));
1053 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
1054 mb();
1055
1056 spin_unlock_irqrestore(&chip->lock, flags);
1057
1058 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1059 chip->image[CS4231_IFACE_CTRL] =
1060 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1061 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1062 chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1063 if (vers & 0x20)
1064 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1065
1066 ptr = (unsigned char *) &chip->image;
1067
1068 snd_cs4231_mce_down(chip);
1069
1070 spin_lock_irqsave(&chip->lock, flags);
1071
1072 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1073 snd_cs4231_out(chip, i, *ptr++);
1074
1075 spin_unlock_irqrestore(&chip->lock, flags);
1076
1077 snd_cs4231_mce_up(chip);
1078
1079 snd_cs4231_mce_down(chip);
1080
1081 mdelay(2);
1082
1083 return 0; /* all things are ok.. */
1084 }
1085
1086 static struct snd_pcm_hardware snd_cs4231_playback = {
1087 .info = SNDRV_PCM_INFO_MMAP |
1088 SNDRV_PCM_INFO_INTERLEAVED |
1089 SNDRV_PCM_INFO_MMAP_VALID |
1090 SNDRV_PCM_INFO_SYNC_START,
1091 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1092 SNDRV_PCM_FMTBIT_A_LAW |
1093 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1094 SNDRV_PCM_FMTBIT_U8 |
1095 SNDRV_PCM_FMTBIT_S16_LE |
1096 SNDRV_PCM_FMTBIT_S16_BE,
1097 .rates = SNDRV_PCM_RATE_KNOT |
1098 SNDRV_PCM_RATE_8000_48000,
1099 .rate_min = 5510,
1100 .rate_max = 48000,
1101 .channels_min = 1,
1102 .channels_max = 2,
1103 .buffer_bytes_max = 32 * 1024,
1104 .period_bytes_min = 64,
1105 .period_bytes_max = 32 * 1024,
1106 .periods_min = 1,
1107 .periods_max = 1024,
1108 };
1109
1110 static struct snd_pcm_hardware snd_cs4231_capture = {
1111 .info = SNDRV_PCM_INFO_MMAP |
1112 SNDRV_PCM_INFO_INTERLEAVED |
1113 SNDRV_PCM_INFO_MMAP_VALID |
1114 SNDRV_PCM_INFO_SYNC_START,
1115 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1116 SNDRV_PCM_FMTBIT_A_LAW |
1117 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1118 SNDRV_PCM_FMTBIT_U8 |
1119 SNDRV_PCM_FMTBIT_S16_LE |
1120 SNDRV_PCM_FMTBIT_S16_BE,
1121 .rates = SNDRV_PCM_RATE_KNOT |
1122 SNDRV_PCM_RATE_8000_48000,
1123 .rate_min = 5510,
1124 .rate_max = 48000,
1125 .channels_min = 1,
1126 .channels_max = 2,
1127 .buffer_bytes_max = 32 * 1024,
1128 .period_bytes_min = 64,
1129 .period_bytes_max = 32 * 1024,
1130 .periods_min = 1,
1131 .periods_max = 1024,
1132 };
1133
1134 static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1135 {
1136 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1137 struct snd_pcm_runtime *runtime = substream->runtime;
1138 int err;
1139
1140 runtime->hw = snd_cs4231_playback;
1141
1142 err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
1143 if (err < 0) {
1144 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1145 return err;
1146 }
1147 chip->playback_substream = substream;
1148 chip->p_periods_sent = 0;
1149 snd_pcm_set_sync(substream);
1150 snd_cs4231_xrate(runtime);
1151
1152 return 0;
1153 }
1154
1155 static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1156 {
1157 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1158 struct snd_pcm_runtime *runtime = substream->runtime;
1159 int err;
1160
1161 runtime->hw = snd_cs4231_capture;
1162
1163 err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
1164 if (err < 0) {
1165 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1166 return err;
1167 }
1168 chip->capture_substream = substream;
1169 chip->c_periods_sent = 0;
1170 snd_pcm_set_sync(substream);
1171 snd_cs4231_xrate(runtime);
1172
1173 return 0;
1174 }
1175
1176 static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1177 {
1178 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1179
1180 snd_cs4231_close(chip, CS4231_MODE_PLAY);
1181 chip->playback_substream = NULL;
1182
1183 return 0;
1184 }
1185
1186 static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1187 {
1188 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1189
1190 snd_cs4231_close(chip, CS4231_MODE_RECORD);
1191 chip->capture_substream = NULL;
1192
1193 return 0;
1194 }
1195
1196 /* XXX We can do some power-management, in particular on EBUS using
1197 * XXX the audio AUXIO register...
1198 */
1199
1200 static struct snd_pcm_ops snd_cs4231_playback_ops = {
1201 .open = snd_cs4231_playback_open,
1202 .close = snd_cs4231_playback_close,
1203 .ioctl = snd_pcm_lib_ioctl,
1204 .hw_params = snd_cs4231_playback_hw_params,
1205 .hw_free = snd_pcm_lib_free_pages,
1206 .prepare = snd_cs4231_playback_prepare,
1207 .trigger = snd_cs4231_trigger,
1208 .pointer = snd_cs4231_playback_pointer,
1209 };
1210
1211 static struct snd_pcm_ops snd_cs4231_capture_ops = {
1212 .open = snd_cs4231_capture_open,
1213 .close = snd_cs4231_capture_close,
1214 .ioctl = snd_pcm_lib_ioctl,
1215 .hw_params = snd_cs4231_capture_hw_params,
1216 .hw_free = snd_pcm_lib_free_pages,
1217 .prepare = snd_cs4231_capture_prepare,
1218 .trigger = snd_cs4231_trigger,
1219 .pointer = snd_cs4231_capture_pointer,
1220 };
1221
1222 static int __init snd_cs4231_pcm(struct snd_card *card)
1223 {
1224 struct snd_cs4231 *chip = card->private_data;
1225 struct snd_pcm *pcm;
1226 int err;
1227
1228 err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
1229 if (err < 0)
1230 return err;
1231
1232 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1233 &snd_cs4231_playback_ops);
1234 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1235 &snd_cs4231_capture_ops);
1236
1237 /* global setup */
1238 pcm->private_data = chip;
1239 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1240 strcpy(pcm->name, "CS4231");
1241
1242 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1243 &chip->op->dev,
1244 64 * 1024, 128 * 1024);
1245
1246 chip->pcm = pcm;
1247
1248 return 0;
1249 }
1250
1251 static int __init snd_cs4231_timer(struct snd_card *card)
1252 {
1253 struct snd_cs4231 *chip = card->private_data;
1254 struct snd_timer *timer;
1255 struct snd_timer_id tid;
1256 int err;
1257
1258 /* Timer initialization */
1259 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1260 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1261 tid.card = card->number;
1262 tid.device = 0;
1263 tid.subdevice = 0;
1264 err = snd_timer_new(card, "CS4231", &tid, &timer);
1265 if (err < 0)
1266 return err;
1267 strcpy(timer->name, "CS4231");
1268 timer->private_data = chip;
1269 timer->hw = snd_cs4231_timer_table;
1270 chip->timer = timer;
1271
1272 return 0;
1273 }
1274
1275 /*
1276 * MIXER part
1277 */
1278
1279 static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1280 struct snd_ctl_elem_info *uinfo)
1281 {
1282 static char *texts[4] = {
1283 "Line", "CD", "Mic", "Mix"
1284 };
1285
1286 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1287 uinfo->count = 2;
1288 uinfo->value.enumerated.items = 4;
1289 if (uinfo->value.enumerated.item > 3)
1290 uinfo->value.enumerated.item = 3;
1291 strcpy(uinfo->value.enumerated.name,
1292 texts[uinfo->value.enumerated.item]);
1293
1294 return 0;
1295 }
1296
1297 static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1298 struct snd_ctl_elem_value *ucontrol)
1299 {
1300 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1301 unsigned long flags;
1302
1303 spin_lock_irqsave(&chip->lock, flags);
1304 ucontrol->value.enumerated.item[0] =
1305 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1306 ucontrol->value.enumerated.item[1] =
1307 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1308 spin_unlock_irqrestore(&chip->lock, flags);
1309
1310 return 0;
1311 }
1312
1313 static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1314 struct snd_ctl_elem_value *ucontrol)
1315 {
1316 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1317 unsigned long flags;
1318 unsigned short left, right;
1319 int change;
1320
1321 if (ucontrol->value.enumerated.item[0] > 3 ||
1322 ucontrol->value.enumerated.item[1] > 3)
1323 return -EINVAL;
1324 left = ucontrol->value.enumerated.item[0] << 6;
1325 right = ucontrol->value.enumerated.item[1] << 6;
1326
1327 spin_lock_irqsave(&chip->lock, flags);
1328
1329 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1330 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1331 change = left != chip->image[CS4231_LEFT_INPUT] ||
1332 right != chip->image[CS4231_RIGHT_INPUT];
1333 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1334 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1335
1336 spin_unlock_irqrestore(&chip->lock, flags);
1337
1338 return change;
1339 }
1340
1341 static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1342 struct snd_ctl_elem_info *uinfo)
1343 {
1344 int mask = (kcontrol->private_value >> 16) & 0xff;
1345
1346 uinfo->type = (mask == 1) ?
1347 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1348 uinfo->count = 1;
1349 uinfo->value.integer.min = 0;
1350 uinfo->value.integer.max = mask;
1351
1352 return 0;
1353 }
1354
1355 static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1356 struct snd_ctl_elem_value *ucontrol)
1357 {
1358 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1359 unsigned long flags;
1360 int reg = kcontrol->private_value & 0xff;
1361 int shift = (kcontrol->private_value >> 8) & 0xff;
1362 int mask = (kcontrol->private_value >> 16) & 0xff;
1363 int invert = (kcontrol->private_value >> 24) & 0xff;
1364
1365 spin_lock_irqsave(&chip->lock, flags);
1366
1367 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1368
1369 spin_unlock_irqrestore(&chip->lock, flags);
1370
1371 if (invert)
1372 ucontrol->value.integer.value[0] =
1373 (mask - ucontrol->value.integer.value[0]);
1374
1375 return 0;
1376 }
1377
1378 static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1379 struct snd_ctl_elem_value *ucontrol)
1380 {
1381 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1382 unsigned long flags;
1383 int reg = kcontrol->private_value & 0xff;
1384 int shift = (kcontrol->private_value >> 8) & 0xff;
1385 int mask = (kcontrol->private_value >> 16) & 0xff;
1386 int invert = (kcontrol->private_value >> 24) & 0xff;
1387 int change;
1388 unsigned short val;
1389
1390 val = (ucontrol->value.integer.value[0] & mask);
1391 if (invert)
1392 val = mask - val;
1393 val <<= shift;
1394
1395 spin_lock_irqsave(&chip->lock, flags);
1396
1397 val = (chip->image[reg] & ~(mask << shift)) | val;
1398 change = val != chip->image[reg];
1399 snd_cs4231_out(chip, reg, val);
1400
1401 spin_unlock_irqrestore(&chip->lock, flags);
1402
1403 return change;
1404 }
1405
1406 static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1407 struct snd_ctl_elem_info *uinfo)
1408 {
1409 int mask = (kcontrol->private_value >> 24) & 0xff;
1410
1411 uinfo->type = mask == 1 ?
1412 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1413 uinfo->count = 2;
1414 uinfo->value.integer.min = 0;
1415 uinfo->value.integer.max = mask;
1416
1417 return 0;
1418 }
1419
1420 static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1421 struct snd_ctl_elem_value *ucontrol)
1422 {
1423 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1424 unsigned long flags;
1425 int left_reg = kcontrol->private_value & 0xff;
1426 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1427 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1428 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1429 int mask = (kcontrol->private_value >> 24) & 0xff;
1430 int invert = (kcontrol->private_value >> 22) & 1;
1431
1432 spin_lock_irqsave(&chip->lock, flags);
1433
1434 ucontrol->value.integer.value[0] =
1435 (chip->image[left_reg] >> shift_left) & mask;
1436 ucontrol->value.integer.value[1] =
1437 (chip->image[right_reg] >> shift_right) & mask;
1438
1439 spin_unlock_irqrestore(&chip->lock, flags);
1440
1441 if (invert) {
1442 ucontrol->value.integer.value[0] =
1443 (mask - ucontrol->value.integer.value[0]);
1444 ucontrol->value.integer.value[1] =
1445 (mask - ucontrol->value.integer.value[1]);
1446 }
1447
1448 return 0;
1449 }
1450
1451 static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1452 struct snd_ctl_elem_value *ucontrol)
1453 {
1454 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1455 unsigned long flags;
1456 int left_reg = kcontrol->private_value & 0xff;
1457 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1458 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1459 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1460 int mask = (kcontrol->private_value >> 24) & 0xff;
1461 int invert = (kcontrol->private_value >> 22) & 1;
1462 int change;
1463 unsigned short val1, val2;
1464
1465 val1 = ucontrol->value.integer.value[0] & mask;
1466 val2 = ucontrol->value.integer.value[1] & mask;
1467 if (invert) {
1468 val1 = mask - val1;
1469 val2 = mask - val2;
1470 }
1471 val1 <<= shift_left;
1472 val2 <<= shift_right;
1473
1474 spin_lock_irqsave(&chip->lock, flags);
1475
1476 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1477 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1478 change = val1 != chip->image[left_reg];
1479 change |= val2 != chip->image[right_reg];
1480 snd_cs4231_out(chip, left_reg, val1);
1481 snd_cs4231_out(chip, right_reg, val2);
1482
1483 spin_unlock_irqrestore(&chip->lock, flags);
1484
1485 return change;
1486 }
1487
1488 #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1489 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1490 .info = snd_cs4231_info_single, \
1491 .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1492 .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
1493
1494 #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
1495 shift_right, mask, invert) \
1496 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1497 .info = snd_cs4231_info_double, \
1498 .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1499 .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
1500 ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
1501
1502 static struct snd_kcontrol_new snd_cs4231_controls[] __initdata = {
1503 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
1504 CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1505 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
1506 CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1507 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
1508 CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1509 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
1510 CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1511 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
1512 CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1513 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
1514 CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1515 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
1516 CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1517 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
1518 CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1519 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1520 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1521 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1522 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1523 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
1524 15, 0),
1525 {
1526 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1527 .name = "Capture Source",
1528 .info = snd_cs4231_info_mux,
1529 .get = snd_cs4231_get_mux,
1530 .put = snd_cs4231_put_mux,
1531 },
1532 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
1533 1, 0),
1534 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1535 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1536 /* SPARC specific uses of XCTL{0,1} general purpose outputs. */
1537 CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1538 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1539 };
1540
1541 static int __init snd_cs4231_mixer(struct snd_card *card)
1542 {
1543 struct snd_cs4231 *chip = card->private_data;
1544 int err, idx;
1545
1546 if (snd_BUG_ON(!chip || !chip->pcm))
1547 return -EINVAL;
1548
1549 strcpy(card->mixername, chip->pcm->name);
1550
1551 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1552 err = snd_ctl_add(card,
1553 snd_ctl_new1(&snd_cs4231_controls[idx], chip));
1554 if (err < 0)
1555 return err;
1556 }
1557 return 0;
1558 }
1559
1560 static int dev;
1561
1562 static int __init cs4231_attach_begin(struct snd_card **rcard)
1563 {
1564 struct snd_card *card;
1565 struct snd_cs4231 *chip;
1566
1567 *rcard = NULL;
1568
1569 if (dev >= SNDRV_CARDS)
1570 return -ENODEV;
1571
1572 if (!enable[dev]) {
1573 dev++;
1574 return -ENOENT;
1575 }
1576
1577 card = snd_card_new(index[dev], id[dev], THIS_MODULE,
1578 sizeof(struct snd_cs4231));
1579 if (card == NULL)
1580 return -ENOMEM;
1581
1582 strcpy(card->driver, "CS4231");
1583 strcpy(card->shortname, "Sun CS4231");
1584
1585 chip = card->private_data;
1586 chip->card = card;
1587
1588 *rcard = card;
1589 return 0;
1590 }
1591
1592 static int __init cs4231_attach_finish(struct snd_card *card)
1593 {
1594 struct snd_cs4231 *chip = card->private_data;
1595 int err;
1596
1597 err = snd_cs4231_pcm(card);
1598 if (err < 0)
1599 goto out_err;
1600
1601 err = snd_cs4231_mixer(card);
1602 if (err < 0)
1603 goto out_err;
1604
1605 err = snd_cs4231_timer(card);
1606 if (err < 0)
1607 goto out_err;
1608
1609 err = snd_card_register(card);
1610 if (err < 0)
1611 goto out_err;
1612
1613 dev_set_drvdata(&chip->op->dev, chip);
1614
1615 dev++;
1616 return 0;
1617
1618 out_err:
1619 snd_card_free(card);
1620 return err;
1621 }
1622
1623 #ifdef SBUS_SUPPORT
1624
1625 static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
1626 {
1627 unsigned long flags;
1628 unsigned char status;
1629 u32 csr;
1630 struct snd_cs4231 *chip = dev_id;
1631
1632 /*This is IRQ is not raised by the cs4231*/
1633 if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
1634 return IRQ_NONE;
1635
1636 /* ACK the APC interrupt. */
1637 csr = sbus_readl(chip->port + APCCSR);
1638
1639 sbus_writel(csr, chip->port + APCCSR);
1640
1641 if ((csr & APC_PDMA_READY) &&
1642 (csr & APC_PLAY_INT) &&
1643 (csr & APC_XINT_PNVA) &&
1644 !(csr & APC_XINT_EMPT))
1645 snd_cs4231_play_callback(chip);
1646
1647 if ((csr & APC_CDMA_READY) &&
1648 (csr & APC_CAPT_INT) &&
1649 (csr & APC_XINT_CNVA) &&
1650 !(csr & APC_XINT_EMPT))
1651 snd_cs4231_capture_callback(chip);
1652
1653 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1654
1655 if (status & CS4231_TIMER_IRQ) {
1656 if (chip->timer)
1657 snd_timer_interrupt(chip->timer, chip->timer->sticks);
1658 }
1659
1660 if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1661 snd_cs4231_overrange(chip);
1662
1663 /* ACK the CS4231 interrupt. */
1664 spin_lock_irqsave(&chip->lock, flags);
1665 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1666 spin_unlock_irqrestore(&chip->lock, flags);
1667
1668 return IRQ_HANDLED;
1669 }
1670
1671 /*
1672 * SBUS DMA routines
1673 */
1674
1675 static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
1676 dma_addr_t bus_addr, size_t len)
1677 {
1678 unsigned long flags;
1679 u32 test, csr;
1680 int err;
1681 struct sbus_dma_info *base = &dma_cont->sbus_info;
1682
1683 if (len >= (1 << 24))
1684 return -EINVAL;
1685 spin_lock_irqsave(&base->lock, flags);
1686 csr = sbus_readl(base->regs + APCCSR);
1687 err = -EINVAL;
1688 test = APC_CDMA_READY;
1689 if (base->dir == APC_PLAY)
1690 test = APC_PDMA_READY;
1691 if (!(csr & test))
1692 goto out;
1693 err = -EBUSY;
1694 test = APC_XINT_CNVA;
1695 if (base->dir == APC_PLAY)
1696 test = APC_XINT_PNVA;
1697 if (!(csr & test))
1698 goto out;
1699 err = 0;
1700 sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1701 sbus_writel(len, base->regs + base->dir + APCNC);
1702 out:
1703 spin_unlock_irqrestore(&base->lock, flags);
1704 return err;
1705 }
1706
1707 static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
1708 {
1709 unsigned long flags;
1710 u32 csr, test;
1711 struct sbus_dma_info *base = &dma_cont->sbus_info;
1712
1713 spin_lock_irqsave(&base->lock, flags);
1714 csr = sbus_readl(base->regs + APCCSR);
1715 test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1716 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1717 APC_XINT_PENA;
1718 if (base->dir == APC_RECORD)
1719 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1720 APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1721 csr |= test;
1722 sbus_writel(csr, base->regs + APCCSR);
1723 spin_unlock_irqrestore(&base->lock, flags);
1724 }
1725
1726 static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1727 {
1728 unsigned long flags;
1729 u32 csr, shift;
1730 struct sbus_dma_info *base = &dma_cont->sbus_info;
1731
1732 spin_lock_irqsave(&base->lock, flags);
1733 if (!on) {
1734 sbus_writel(0, base->regs + base->dir + APCNC);
1735 sbus_writel(0, base->regs + base->dir + APCNVA);
1736 if (base->dir == APC_PLAY) {
1737 sbus_writel(0, base->regs + base->dir + APCC);
1738 sbus_writel(0, base->regs + base->dir + APCVA);
1739 }
1740
1741 udelay(1200);
1742 }
1743 csr = sbus_readl(base->regs + APCCSR);
1744 shift = 0;
1745 if (base->dir == APC_PLAY)
1746 shift = 1;
1747 if (on)
1748 csr &= ~(APC_CPAUSE << shift);
1749 else
1750 csr |= (APC_CPAUSE << shift);
1751 sbus_writel(csr, base->regs + APCCSR);
1752 if (on)
1753 csr |= (APC_CDMA_READY << shift);
1754 else
1755 csr &= ~(APC_CDMA_READY << shift);
1756 sbus_writel(csr, base->regs + APCCSR);
1757
1758 spin_unlock_irqrestore(&base->lock, flags);
1759 }
1760
1761 static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
1762 {
1763 struct sbus_dma_info *base = &dma_cont->sbus_info;
1764
1765 return sbus_readl(base->regs + base->dir + APCVA);
1766 }
1767
1768 /*
1769 * Init and exit routines
1770 */
1771
1772 static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1773 {
1774 struct of_device *op = chip->op;
1775
1776 if (chip->irq[0])
1777 free_irq(chip->irq[0], chip);
1778
1779 if (chip->port)
1780 of_iounmap(&op->resource[0], chip->port, chip->regs_size);
1781
1782 return 0;
1783 }
1784
1785 static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1786 {
1787 struct snd_cs4231 *cp = device->device_data;
1788
1789 return snd_cs4231_sbus_free(cp);
1790 }
1791
1792 static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1793 .dev_free = snd_cs4231_sbus_dev_free,
1794 };
1795
1796 static int __init snd_cs4231_sbus_create(struct snd_card *card,
1797 struct of_device *op,
1798 int dev)
1799 {
1800 struct snd_cs4231 *chip = card->private_data;
1801 int err;
1802
1803 spin_lock_init(&chip->lock);
1804 spin_lock_init(&chip->c_dma.sbus_info.lock);
1805 spin_lock_init(&chip->p_dma.sbus_info.lock);
1806 mutex_init(&chip->mce_mutex);
1807 mutex_init(&chip->open_mutex);
1808 chip->op = op;
1809 chip->regs_size = resource_size(&op->resource[0]);
1810 memcpy(&chip->image, &snd_cs4231_original_image,
1811 sizeof(snd_cs4231_original_image));
1812
1813 chip->port = of_ioremap(&op->resource[0], 0,
1814 chip->regs_size, "cs4231");
1815 if (!chip->port) {
1816 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1817 return -EIO;
1818 }
1819
1820 chip->c_dma.sbus_info.regs = chip->port;
1821 chip->p_dma.sbus_info.regs = chip->port;
1822 chip->c_dma.sbus_info.dir = APC_RECORD;
1823 chip->p_dma.sbus_info.dir = APC_PLAY;
1824
1825 chip->p_dma.prepare = sbus_dma_prepare;
1826 chip->p_dma.enable = sbus_dma_enable;
1827 chip->p_dma.request = sbus_dma_request;
1828 chip->p_dma.address = sbus_dma_addr;
1829
1830 chip->c_dma.prepare = sbus_dma_prepare;
1831 chip->c_dma.enable = sbus_dma_enable;
1832 chip->c_dma.request = sbus_dma_request;
1833 chip->c_dma.address = sbus_dma_addr;
1834
1835 if (request_irq(op->irqs[0], snd_cs4231_sbus_interrupt,
1836 IRQF_SHARED, "cs4231", chip)) {
1837 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
1838 dev, op->irqs[0]);
1839 snd_cs4231_sbus_free(chip);
1840 return -EBUSY;
1841 }
1842 chip->irq[0] = op->irqs[0];
1843
1844 if (snd_cs4231_probe(chip) < 0) {
1845 snd_cs4231_sbus_free(chip);
1846 return -ENODEV;
1847 }
1848 snd_cs4231_init(chip);
1849
1850 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1851 chip, &snd_cs4231_sbus_dev_ops)) < 0) {
1852 snd_cs4231_sbus_free(chip);
1853 return err;
1854 }
1855
1856 return 0;
1857 }
1858
1859 static int __devinit cs4231_sbus_probe(struct of_device *op, const struct of_device_id *match)
1860 {
1861 struct resource *rp = &op->resource[0];
1862 struct snd_card *card;
1863 int err;
1864
1865 err = cs4231_attach_begin(&card);
1866 if (err)
1867 return err;
1868
1869 sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
1870 card->shortname,
1871 rp->flags & 0xffL,
1872 (unsigned long long)rp->start,
1873 op->irqs[0]);
1874
1875 err = snd_cs4231_sbus_create(card, op, dev);
1876 if (err < 0) {
1877 snd_card_free(card);
1878 return err;
1879 }
1880
1881 return cs4231_attach_finish(card);
1882 }
1883 #endif
1884
1885 #ifdef EBUS_SUPPORT
1886
1887 static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
1888 void *cookie)
1889 {
1890 struct snd_cs4231 *chip = cookie;
1891
1892 snd_cs4231_play_callback(chip);
1893 }
1894
1895 static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
1896 int event, void *cookie)
1897 {
1898 struct snd_cs4231 *chip = cookie;
1899
1900 snd_cs4231_capture_callback(chip);
1901 }
1902
1903 /*
1904 * EBUS DMA wrappers
1905 */
1906
1907 static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
1908 dma_addr_t bus_addr, size_t len)
1909 {
1910 return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
1911 }
1912
1913 static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1914 {
1915 ebus_dma_enable(&dma_cont->ebus_info, on);
1916 }
1917
1918 static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
1919 {
1920 ebus_dma_prepare(&dma_cont->ebus_info, dir);
1921 }
1922
1923 static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
1924 {
1925 return ebus_dma_addr(&dma_cont->ebus_info);
1926 }
1927
1928 /*
1929 * Init and exit routines
1930 */
1931
1932 static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
1933 {
1934 struct of_device *op = chip->op;
1935
1936 if (chip->c_dma.ebus_info.regs) {
1937 ebus_dma_unregister(&chip->c_dma.ebus_info);
1938 of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10);
1939 }
1940 if (chip->p_dma.ebus_info.regs) {
1941 ebus_dma_unregister(&chip->p_dma.ebus_info);
1942 of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10);
1943 }
1944
1945 if (chip->port)
1946 of_iounmap(&op->resource[0], chip->port, 0x10);
1947
1948 return 0;
1949 }
1950
1951 static int snd_cs4231_ebus_dev_free(struct snd_device *device)
1952 {
1953 struct snd_cs4231 *cp = device->device_data;
1954
1955 return snd_cs4231_ebus_free(cp);
1956 }
1957
1958 static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
1959 .dev_free = snd_cs4231_ebus_dev_free,
1960 };
1961
1962 static int __init snd_cs4231_ebus_create(struct snd_card *card,
1963 struct of_device *op,
1964 int dev)
1965 {
1966 struct snd_cs4231 *chip = card->private_data;
1967 int err;
1968
1969 spin_lock_init(&chip->lock);
1970 spin_lock_init(&chip->c_dma.ebus_info.lock);
1971 spin_lock_init(&chip->p_dma.ebus_info.lock);
1972 mutex_init(&chip->mce_mutex);
1973 mutex_init(&chip->open_mutex);
1974 chip->flags |= CS4231_FLAG_EBUS;
1975 chip->op = op;
1976 memcpy(&chip->image, &snd_cs4231_original_image,
1977 sizeof(snd_cs4231_original_image));
1978 strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
1979 chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1980 chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
1981 chip->c_dma.ebus_info.client_cookie = chip;
1982 chip->c_dma.ebus_info.irq = op->irqs[0];
1983 strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
1984 chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1985 chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
1986 chip->p_dma.ebus_info.client_cookie = chip;
1987 chip->p_dma.ebus_info.irq = op->irqs[1];
1988
1989 chip->p_dma.prepare = _ebus_dma_prepare;
1990 chip->p_dma.enable = _ebus_dma_enable;
1991 chip->p_dma.request = _ebus_dma_request;
1992 chip->p_dma.address = _ebus_dma_addr;
1993
1994 chip->c_dma.prepare = _ebus_dma_prepare;
1995 chip->c_dma.enable = _ebus_dma_enable;
1996 chip->c_dma.request = _ebus_dma_request;
1997 chip->c_dma.address = _ebus_dma_addr;
1998
1999 chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231");
2000 chip->p_dma.ebus_info.regs =
2001 of_ioremap(&op->resource[1], 0, 0x10, "cs4231_pdma");
2002 chip->c_dma.ebus_info.regs =
2003 of_ioremap(&op->resource[2], 0, 0x10, "cs4231_cdma");
2004 if (!chip->port || !chip->p_dma.ebus_info.regs ||
2005 !chip->c_dma.ebus_info.regs) {
2006 snd_cs4231_ebus_free(chip);
2007 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
2008 return -EIO;
2009 }
2010
2011 if (ebus_dma_register(&chip->c_dma.ebus_info)) {
2012 snd_cs4231_ebus_free(chip);
2013 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
2014 dev);
2015 return -EBUSY;
2016 }
2017 if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
2018 snd_cs4231_ebus_free(chip);
2019 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
2020 dev);
2021 return -EBUSY;
2022 }
2023
2024 if (ebus_dma_register(&chip->p_dma.ebus_info)) {
2025 snd_cs4231_ebus_free(chip);
2026 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
2027 dev);
2028 return -EBUSY;
2029 }
2030 if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
2031 snd_cs4231_ebus_free(chip);
2032 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2033 return -EBUSY;
2034 }
2035
2036 if (snd_cs4231_probe(chip) < 0) {
2037 snd_cs4231_ebus_free(chip);
2038 return -ENODEV;
2039 }
2040 snd_cs4231_init(chip);
2041
2042 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2043 chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2044 snd_cs4231_ebus_free(chip);
2045 return err;
2046 }
2047
2048 return 0;
2049 }
2050
2051 static int __devinit cs4231_ebus_probe(struct of_device *op, const struct of_device_id *match)
2052 {
2053 struct snd_card *card;
2054 int err;
2055
2056 err = cs4231_attach_begin(&card);
2057 if (err)
2058 return err;
2059
2060 sprintf(card->longname, "%s at 0x%llx, irq %d",
2061 card->shortname,
2062 op->resource[0].start,
2063 op->irqs[0]);
2064
2065 err = snd_cs4231_ebus_create(card, op, dev);
2066 if (err < 0) {
2067 snd_card_free(card);
2068 return err;
2069 }
2070
2071 return cs4231_attach_finish(card);
2072 }
2073 #endif
2074
2075 static int __devinit cs4231_probe(struct of_device *op, const struct of_device_id *match)
2076 {
2077 #ifdef EBUS_SUPPORT
2078 if (!strcmp(op->node->parent->name, "ebus"))
2079 return cs4231_ebus_probe(op, match);
2080 #endif
2081 #ifdef SBUS_SUPPORT
2082 if (!strcmp(op->node->parent->name, "sbus") ||
2083 !strcmp(op->node->parent->name, "sbi"))
2084 return cs4231_sbus_probe(op, match);
2085 #endif
2086 return -ENODEV;
2087 }
2088
2089 static int __devexit cs4231_remove(struct of_device *op)
2090 {
2091 struct snd_cs4231 *chip = dev_get_drvdata(&op->dev);
2092
2093 snd_card_free(chip->card);
2094
2095 return 0;
2096 }
2097
2098 static const struct of_device_id cs4231_match[] = {
2099 {
2100 .name = "SUNW,CS4231",
2101 },
2102 {
2103 .name = "audio",
2104 .compatible = "SUNW,CS4231",
2105 },
2106 {},
2107 };
2108
2109 MODULE_DEVICE_TABLE(of, cs4231_match);
2110
2111 static struct of_platform_driver cs4231_driver = {
2112 .name = "audio",
2113 .match_table = cs4231_match,
2114 .probe = cs4231_probe,
2115 .remove = __devexit_p(cs4231_remove),
2116 };
2117
2118 static int __init cs4231_init(void)
2119 {
2120 return of_register_driver(&cs4231_driver, &of_bus_type);
2121 }
2122
2123 static void __exit cs4231_exit(void)
2124 {
2125 of_unregister_driver(&cs4231_driver);
2126 }
2127
2128 module_init(cs4231_init);
2129 module_exit(cs4231_exit);
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