arch/powerpc/kernel/pci_32.c

   1 /*
   2  * Common pmac/prep/chrp pci routines. -- Cort
   3  */
   4
   5 #include <linux/kernel.h>
   6 #include <linux/pci.h>
   7 #include <linux/delay.h>
   8 #include <linux/string.h>
   9 #include <linux/init.h>
  10 #include <linux/capability.h>
  11 #include <linux/sched.h>
  12 #include <linux/errno.h>
  13 #include <linux/bootmem.h>
  14 #include <linux/irq.h>
  15 #include <linux/list.h>
  16
  17 #include <asm/processor.h>
  18 #include <asm/io.h>
  19 #include <asm/prom.h>
  20 #include <asm/sections.h>
  21 #include <asm/pci-bridge.h>
  22 #include <asm/byteorder.h>
  23 #include <asm/uaccess.h>
  24 #include <asm/machdep.h>
  25
  26 #undef DEBUG
  27
  28 #ifdef DEBUG
  29 #define DBG(x...) printk(x)
  30 #else
  31 #define DBG(x...)
  32 #endif
  33
  34 unsigned long isa_io_base     = 0;
  35 unsigned long pci_dram_offset = 0;
  36 int pcibios_assign_bus_offset = 1;
  37
  38 void pcibios_make_OF_bus_map(void);
  39
  40 static void fixup_broken_pcnet32(struct pci_dev* dev);
  41 static void fixup_cpc710_pci64(struct pci_dev* dev);
  42 #ifdef CONFIG_PPC_OF
  43 static u8* pci_to_OF_bus_map;
  44 #endif
  45
  46 /* By default, we don't re-assign bus numbers. We do this only on
  47  * some pmacs
  48  */
  49 static int pci_assign_all_buses;
  50
  51 LIST_HEAD(hose_list);
  52
  53 static int pci_bus_count;
  54
  55 static void
  56 fixup_hide_host_resource_fsl(struct pci_dev* dev)
  57 {
  58         int i, class = dev->class >> 8;
  59
  60         if ((class == PCI_CLASS_PROCESSOR_POWERPC) &&
  61                 (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
  62                 (dev->bus->parent == NULL)) {
  63                 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  64                         dev->resource[i].start = 0;
  65                         dev->resource[i].end = 0;
  66                         dev->resource[i].flags = 0;
  67                 }
  68         }
  69 }
  70 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl);
  71 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl);
  72
  73 static void
  74 fixup_broken_pcnet32(struct pci_dev* dev)
  75 {
  76         if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) {
  77                 dev->vendor = PCI_VENDOR_ID_AMD;
  78                 pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD);
  79         }
  80 }
  81 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID,                     fixup_broken_pcnet32);
  82
  83 static void
  84 fixup_cpc710_pci64(struct pci_dev* dev)
  85 {
  86         /* Hide the PCI64 BARs from the kernel as their content doesn't
  87          * fit well in the resource management
  88          */
  89         dev->resource[0].start = dev->resource[0].end = 0;
  90         dev->resource[0].flags = 0;
  91         dev->resource[1].start = dev->resource[1].end = 0;
  92         dev->resource[1].flags = 0;
  93 }
  94 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM,     PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64);
  95
  96
  97 void __init
  98 update_bridge_resource(struct pci_dev *dev, struct resource *res)
  99 {
 100         u8 io_base_lo, io_limit_lo;
 101         u16 mem_base, mem_limit;
 102         u16 cmd;
 103         resource_size_t start, end, off;
 104         struct pci_controller *hose = dev->sysdata;
 105
 106         if (!hose) {
 107                 printk("update_bridge_base: no hose?\n");
 108                 return;
 109         }
 110         pci_read_config_word(dev, PCI_COMMAND, &cmd);
 111         pci_write_config_word(dev, PCI_COMMAND,
 112                               cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
 113         if (res->flags & IORESOURCE_IO) {
 114                 off = (unsigned long) hose->io_base_virt - isa_io_base;
 115                 start = res->start - off;
 116                 end = res->end - off;
 117                 io_base_lo = (start >> 8) & PCI_IO_RANGE_MASK;
 118                 io_limit_lo = (end >> 8) & PCI_IO_RANGE_MASK;
 119                 if (end > 0xffff)
 120                         io_base_lo |= PCI_IO_RANGE_TYPE_32;
 121                 else
 122                         io_base_lo |= PCI_IO_RANGE_TYPE_16;
 123                 pci_write_config_word(dev, PCI_IO_BASE_UPPER16,
 124                                 start >> 16);
 125                 pci_write_config_word(dev, PCI_IO_LIMIT_UPPER16,
 126                                 end >> 16);
 127                 pci_write_config_byte(dev, PCI_IO_BASE, io_base_lo);
 128                 pci_write_config_byte(dev, PCI_IO_LIMIT, io_limit_lo);
 129
 130         } else if ((res->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH))
 131                    == IORESOURCE_MEM) {
 132                 off = hose->pci_mem_offset;
 133                 mem_base = ((res->start - off) >> 16) & PCI_MEMORY_RANGE_MASK;
 134                 mem_limit = ((res->end - off) >> 16) & PCI_MEMORY_RANGE_MASK;
 135                 pci_write_config_word(dev, PCI_MEMORY_BASE, mem_base);
 136                 pci_write_config_word(dev, PCI_MEMORY_LIMIT, mem_limit);
 137
 138         } else if ((res->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH))
 139                    == (IORESOURCE_MEM | IORESOURCE_PREFETCH)) {
 140                 off = hose->pci_mem_offset;
 141                 mem_base = ((res->start - off) >> 16) & PCI_PREF_RANGE_MASK;
 142                 mem_limit = ((res->end - off) >> 16) & PCI_PREF_RANGE_MASK;
 143                 pci_write_config_word(dev, PCI_PREF_MEMORY_BASE, mem_base);
 144                 pci_write_config_word(dev, PCI_PREF_MEMORY_LIMIT, mem_limit);
 145
 146         } else {
 147                 DBG(KERN_ERR "PCI: ugh, bridge %s res has flags=%lx\n",
 148                     pci_name(dev), res->flags);
 149         }
 150         pci_write_config_word(dev, PCI_COMMAND, cmd);
 151 }
 152
 153
 154 #ifdef CONFIG_PPC_OF
 155 /*
 156  * Functions below are used on OpenFirmware machines.
 157  */
 158 static void
 159 make_one_node_map(struct device_node* node, u8 pci_bus)
 160 {
 161         const int *bus_range;
 162         int len;
 163
 164         if (pci_bus >= pci_bus_count)
 165                 return;
 166         bus_range = of_get_property(node, "bus-range", &len);
 167         if (bus_range == NULL || len < 2 * sizeof(int)) {
 168                 printk(KERN_WARNING "Can't get bus-range for %s, "
 169                        "assuming it starts at 0\n", node->full_name);
 170                 pci_to_OF_bus_map[pci_bus] = 0;
 171         } else
 172                 pci_to_OF_bus_map[pci_bus] = bus_range[0];
 173
 174         for (node=node->child; node != 0;node = node->sibling) {
 175                 struct pci_dev* dev;
 176                 const unsigned int *class_code, *reg;
 177
 178                 class_code = of_get_property(node, "class-code", NULL);
 179                 if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
 180                         (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))
 181                         continue;
 182                 reg = of_get_property(node, "reg", NULL);
 183                 if (!reg)
 184                         continue;
 185                 dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff));
 186                 if (!dev || !dev->subordinate) {
 187                         pci_dev_put(dev);
 188                         continue;
 189                 }
 190                 make_one_node_map(node, dev->subordinate->number);
 191                 pci_dev_put(dev);
 192         }
 193 }
 194
 195 void
 196 pcibios_make_OF_bus_map(void)
 197 {
 198         int i;
 199         struct pci_controller *hose, *tmp;
 200         struct property *map_prop;
 201         struct device_node *dn;
 202
 203         pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL);
 204         if (!pci_to_OF_bus_map) {
 205                 printk(KERN_ERR "Can't allocate OF bus map !\n");
 206                 return;
 207         }
 208
 209         /* We fill the bus map with invalid values, that helps
 210          * debugging.
 211          */
 212         for (i=0; i<pci_bus_count; i++)
 213                 pci_to_OF_bus_map[i] = 0xff;
 214
 215         /* For each hose, we begin searching bridges */
 216         list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
 217                 struct device_node* node = hose->dn;
 218
 219                 if (!node)
 220                         continue;
 221                 make_one_node_map(node, hose->first_busno);
 222         }
 223         dn = of_find_node_by_path("/");
 224         map_prop = of_find_property(dn, "pci-OF-bus-map", NULL);
 225         if (map_prop) {
 226                 BUG_ON(pci_bus_count > map_prop->length);
 227                 memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count);
 228         }
 229         of_node_put(dn);
 230 #ifdef DEBUG
 231         printk("PCI->OF bus map:\n");
 232         for (i=0; i<pci_bus_count; i++) {
 233                 if (pci_to_OF_bus_map[i] == 0xff)
 234                         continue;
 235                 printk("%d -> %d\n", i, pci_to_OF_bus_map[i]);
 236         }
 237 #endif
 238 }
 239
 240 typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data);
 241
 242 static struct device_node*
 243 scan_OF_pci_childs(struct device_node* node, pci_OF_scan_iterator filter, void* data)
 244 {
 245         struct device_node* sub_node;
 246
 247         for (; node != 0;node = node->sibling) {
 248                 const unsigned int *class_code;
 249
 250                 if (filter(node, data))
 251                         return node;
 252
 253                 /* For PCI<->PCI bridges or CardBus bridges, we go down
 254                  * Note: some OFs create a parent node "multifunc-device" as
 255                  * a fake root for all functions of a multi-function device,
 256                  * we go down them as well.
 257                  */
 258                 class_code = of_get_property(node, "class-code", NULL);
 259                 if ((!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
 260                         (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) &&
 261                         strcmp(node->name, "multifunc-device"))
 262                         continue;
 263                 sub_node = scan_OF_pci_childs(node->child, filter, data);
 264                 if (sub_node)
 265                         return sub_node;
 266         }
 267         return NULL;
 268 }
 269
 270 static struct device_node *scan_OF_for_pci_dev(struct device_node *parent,
 271                                                unsigned int devfn)
 272 {
 273         struct device_node *np = NULL;
 274         const u32 *reg;
 275         unsigned int psize;
 276
 277         while ((np = of_get_next_child(parent, np)) != NULL) {
 278                 reg = of_get_property(np, "reg", &psize);
 279                 if (reg == NULL || psize < 4)
 280                         continue;
 281                 if (((reg[0] >> 8) & 0xff) == devfn)
 282                         return np;
 283         }
 284         return NULL;
 285 }
 286
 287
 288 static struct device_node *scan_OF_for_pci_bus(struct pci_bus *bus)
 289 {
 290         struct device_node *parent, *np;
 291
 292         /* Are we a root bus ? */
 293         if (bus->self == NULL || bus->parent == NULL) {
 294                 struct pci_controller *hose = pci_bus_to_host(bus);
 295                 if (hose == NULL)
 296                         return NULL;
 297                 return of_node_get(hose->dn);
 298         }
 299
 300         /* not a root bus, we need to get our parent */
 301         parent = scan_OF_for_pci_bus(bus->parent);
 302         if (parent == NULL)
 303                 return NULL;
 304
 305         /* now iterate for children for a match */
 306         np = scan_OF_for_pci_dev(parent, bus->self->devfn);
 307         of_node_put(parent);
 308
 309         return np;
 310 }
 311
 312 /*
 313  * Scans the OF tree for a device node matching a PCI device
 314  */
 315 struct device_node *
 316 pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
 317 {
 318         struct device_node *parent, *np;
 319
 320         if (!have_of)
 321                 return NULL;
 322
 323         DBG("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn);
 324         parent = scan_OF_for_pci_bus(bus);
 325         if (parent == NULL)
 326                 return NULL;
 327         DBG(" parent is %s\n", parent ? parent->full_name : "<NULL>");
 328         np = scan_OF_for_pci_dev(parent, devfn);
 329         of_node_put(parent);
 330         DBG(" result is %s\n", np ? np->full_name : "<NULL>");
 331
 332         /* XXX most callers don't release the returned node
 333          * mostly because ppc64 doesn't increase the refcount,
 334          * we need to fix that.
 335          */
 336         return np;
 337 }
 338 EXPORT_SYMBOL(pci_busdev_to_OF_node);
 339
 340 struct device_node*
 341 pci_device_to_OF_node(struct pci_dev *dev)
 342 {
 343         return pci_busdev_to_OF_node(dev->bus, dev->devfn);
 344 }
 345 EXPORT_SYMBOL(pci_device_to_OF_node);
 346
 347 static int
 348 find_OF_pci_device_filter(struct device_node* node, void* data)
 349 {
 350         return ((void *)node == data);
 351 }
 352
 353 /*
 354  * Returns the PCI device matching a given OF node
 355  */
 356 int
 357 pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn)
 358 {
 359         const unsigned int *reg;
 360         struct pci_controller* hose;
 361         struct pci_dev* dev = NULL;
 362
 363         if (!have_of)
 364                 return -ENODEV;
 365         /* Make sure it's really a PCI device */
 366         hose = pci_find_hose_for_OF_device(node);
 367         if (!hose || !hose->dn)
 368                 return -ENODEV;
 369         if (!scan_OF_pci_childs(hose->dn->child,
 370                         find_OF_pci_device_filter, (void *)node))
 371                 return -ENODEV;
 372         reg = of_get_property(node, "reg", NULL);
 373         if (!reg)
 374                 return -ENODEV;
 375         *bus = (reg[0] >> 16) & 0xff;
 376         *devfn = ((reg[0] >> 8) & 0xff);
 377
 378         /* Ok, here we need some tweak. If we have already renumbered
 379          * all busses, we can't rely on the OF bus number any more.
 380          * the pci_to_OF_bus_map is not enough as several PCI busses
 381          * may match the same OF bus number.
 382          */
 383         if (!pci_to_OF_bus_map)
 384                 return 0;
 385
 386         for_each_pci_dev(dev)
 387                 if (pci_to_OF_bus_map[dev->bus->number] == *bus &&
 388                                 dev->devfn == *devfn) {
 389                         *bus = dev->bus->number;
 390                         pci_dev_put(dev);
 391                         return 0;
 392                 }
 393
 394         return -ENODEV;
 395 }
 396 EXPORT_SYMBOL(pci_device_from_OF_node);
 397
 398 /* We create the "pci-OF-bus-map" property now so it appears in the
 399  * /proc device tree
 400  */
 401 void __init
 402 pci_create_OF_bus_map(void)
 403 {
 404         struct property* of_prop;
 405         struct device_node *dn;
 406
 407         of_prop = (struct property*) alloc_bootmem(sizeof(struct property) + 256);
 408         if (!of_prop)
 409                 return;
 410         dn = of_find_node_by_path("/");
 411         if (dn) {
 412                 memset(of_prop, -1, sizeof(struct property) + 256);
 413                 of_prop->name = "pci-OF-bus-map";
 414                 of_prop->length = 256;
 415                 of_prop->value = &of_prop[1];
 416                 prom_add_property(dn, of_prop);
 417                 of_node_put(dn);
 418         }
 419 }
 420
 421 #else /* CONFIG_PPC_OF */
 422 void pcibios_make_OF_bus_map(void)
 423 {
 424 }
 425 #endif /* CONFIG_PPC_OF */
 426
 427 static int __init pcibios_init(void)
 428 {
 429         struct pci_controller *hose, *tmp;
 430         struct pci_bus *bus;
 431         int next_busno = 0;
 432
 433         printk(KERN_INFO "PCI: Probing PCI hardware\n");
 434
 435         if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS)
 436                 pci_assign_all_buses = 1;
 437
 438         /* Scan all of the recorded PCI controllers.  */
 439         list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
 440                 if (pci_assign_all_buses)
 441                         hose->first_busno = next_busno;
 442                 hose->last_busno = 0xff;
 443                 bus = pci_scan_bus_parented(hose->parent, hose->first_busno,
 444                                             hose->ops, hose);
 445                 if (bus)
 446                         pci_bus_add_devices(bus);
 447                 hose->last_busno = bus->subordinate;
 448                 if (pci_assign_all_buses || next_busno <= hose->last_busno)
 449                         next_busno = hose->last_busno + pcibios_assign_bus_offset;
 450         }
 451         pci_bus_count = next_busno;
 452
 453         /* OpenFirmware based machines need a map of OF bus
 454          * numbers vs. kernel bus numbers since we may have to
 455          * remap them.
 456          */
 457         if (pci_assign_all_buses && have_of)
 458                 pcibios_make_OF_bus_map();
 459
 460         /* Call common code to handle resource allocation */
 461         pcibios_resource_survey();
 462
 463         /* Call machine dependent post-init code */
 464         if (ppc_md.pcibios_after_init)
 465                 ppc_md.pcibios_after_init();
 466
 467         return 0;
 468 }
 469
 470 subsys_initcall(pcibios_init);
 471
 472 void __devinit pcibios_do_bus_setup(struct pci_bus *bus)
 473 {
 474         struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
 475         unsigned long io_offset;
 476         struct resource *res;
 477         int i;
 478
 479         /* Hookup PHB resources */
 480         io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
 481         if (bus->parent == NULL) {
 482                 /* This is a host bridge - fill in its resources */
 483                 hose->bus = bus;
 484
 485                 bus->resource[0] = res = &hose->io_resource;
 486                 if (!res->flags) {
 487                         if (io_offset)
 488                                 printk(KERN_ERR "I/O resource not set for host"
 489                                        " bridge %d\n", hose->global_number);
 490                         res->start = 0;
 491                         res->end = IO_SPACE_LIMIT;
 492                         res->flags = IORESOURCE_IO;
 493                 }
 494                 res->start = (res->start + io_offset) & 0xffffffffu;
 495                 res->end = (res->end + io_offset) & 0xffffffffu;
 496
 497                 for (i = 0; i < 3; ++i) {
 498                         res = &hose->mem_resources[i];
 499                         if (!res->flags) {
 500                                 if (i > 0)
 501                                         continue;
 502                                 printk(KERN_ERR "Memory resource not set for "
 503                                        "host bridge %d\n", hose->global_number);
 504                                 res->start = hose->pci_mem_offset;
 505                                 res->end = ~0U;
 506                                 res->flags = IORESOURCE_MEM;
 507                         }
 508                         bus->resource[i+1] = res;
 509                 }
 510         }
 511 }
 512
 513 /* the next one is stolen from the alpha port... */
 514 void __init
 515 pcibios_update_irq(struct pci_dev *dev, int irq)
 516 {
 517         pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
 518         /* XXX FIXME - update OF device tree node interrupt property */
 519 }
 520
 521 int pcibios_enable_device(struct pci_dev *dev, int mask)
 522 {
 523         u16 cmd, old_cmd;
 524         int idx;
 525         struct resource *r;
 526
 527         if (ppc_md.pcibios_enable_device_hook)
 528                 if (ppc_md.pcibios_enable_device_hook(dev, 0))
 529                         return -EINVAL;
 530
 531         pci_read_config_word(dev, PCI_COMMAND, &cmd);
 532         old_cmd = cmd;
 533         for (idx=0; idx<6; idx++) {
 534                 r = &dev->resource[idx];
 535                 if (r->flags & IORESOURCE_UNSET) {
 536                         printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev));
 537                         return -EINVAL;
 538                 }
 539                 if (r->flags & IORESOURCE_IO)
 540                         cmd |= PCI_COMMAND_IO;
 541                 if (r->flags & IORESOURCE_MEM)
 542                         cmd |= PCI_COMMAND_MEMORY;
 543         }
 544         if (cmd != old_cmd) {
 545                 printk("PCI: Enabling device %s (%04x -> %04x)\n",
 546                        pci_name(dev), old_cmd, cmd);
 547                 pci_write_config_word(dev, PCI_COMMAND, cmd);
 548         }
 549         return 0;
 550 }
 551
 552 static struct pci_controller*
 553 pci_bus_to_hose(int bus)
 554 {
 555         struct pci_controller *hose, *tmp;
 556
 557         list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
 558                 if (bus >= hose->first_busno && bus <= hose->last_busno)
 559                         return hose;
 560         return NULL;
 561 }
 562
 563 /* Provide information on locations of various I/O regions in physical
 564  * memory.  Do this on a per-card basis so that we choose the right
 565  * root bridge.
 566  * Note that the returned IO or memory base is a physical address
 567  */
 568
 569 long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
 570 {
 571         struct pci_controller* hose;
 572         long result = -EOPNOTSUPP;
 573
 574         hose = pci_bus_to_hose(bus);
 575         if (!hose)
 576                 return -ENODEV;
 577
 578         switch (which) {
 579         case IOBASE_BRIDGE_NUMBER:
 580                 return (long)hose->first_busno;
 581         case IOBASE_MEMORY:
 582                 return (long)hose->pci_mem_offset;
 583         case IOBASE_IO:
 584                 return (long)hose->io_base_phys;
 585         case IOBASE_ISA_IO:
 586                 return (long)isa_io_base;
 587         case IOBASE_ISA_MEM:
 588                 return (long)isa_mem_base;
 589         }
 590
 591         return result;
 592 }
 593
 594 unsigned long pci_address_to_pio(phys_addr_t address)
 595 {
 596         struct pci_controller *hose, *tmp;
 597
 598         list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
 599                 unsigned int size = hose->io_resource.end -
 600                         hose->io_resource.start + 1;
 601                 if (address >= hose->io_base_phys &&
 602                     address < (hose->io_base_phys + size)) {
 603                         unsigned long base =
 604                                 (unsigned long)hose->io_base_virt - _IO_BASE;
 605                         return base + (address - hose->io_base_phys);
 606                 }
 607         }
 608         return (unsigned int)-1;
 609 }
 610 EXPORT_SYMBOL(pci_address_to_pio);
 611
 612 /*
 613  * Null PCI config access functions, for the case when we can't
 614  * find a hose.
 615  */
 616 #define NULL_PCI_OP(rw, size, type)                                     \
 617 static int                                                              \
 618 null_##rw##_config_##size(struct pci_dev *dev, int offset, type val)    \
 619 {                                                                       \
 620         return PCIBIOS_DEVICE_NOT_FOUND;                                \
 621 }
 622
 623 static int
 624 null_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
 625                  int len, u32 *val)
 626 {
 627         return PCIBIOS_DEVICE_NOT_FOUND;
 628 }
 629
 630 static int
 631 null_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
 632                   int len, u32 val)
 633 {
 634         return PCIBIOS_DEVICE_NOT_FOUND;
 635 }
 636
 637 static struct pci_ops null_pci_ops =
 638 {
 639         .read = null_read_config,
 640         .write = null_write_config,
 641 };
 642
 643 /*
 644  * These functions are used early on before PCI scanning is done
 645  * and all of the pci_dev and pci_bus structures have been created.
 646  */
 647 static struct pci_bus *
 648 fake_pci_bus(struct pci_controller *hose, int busnr)
 649 {
 650         static struct pci_bus bus;
 651
 652         if (hose == 0) {
 653                 hose = pci_bus_to_hose(busnr);
 654                 if (hose == 0)
 655                         printk(KERN_ERR "Can't find hose for PCI bus %d!\n", busnr);
 656         }
 657         bus.number = busnr;
 658         bus.sysdata = hose;
 659         bus.ops = hose? hose->ops: &null_pci_ops;
 660         return &bus;
 661 }
 662
 663 #define EARLY_PCI_OP(rw, size, type)                                    \
 664 int early_##rw##_config_##size(struct pci_controller *hose, int bus,    \
 665                                int devfn, int offset, type value)       \
 666 {                                                                       \
 667         return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus),    \
 668                                             devfn, offset, value);      \
 669 }
 670
 671 EARLY_PCI_OP(read, byte, u8 *)
 672 EARLY_PCI_OP(read, word, u16 *)
 673 EARLY_PCI_OP(read, dword, u32 *)
 674 EARLY_PCI_OP(write, byte, u8)
 675 EARLY_PCI_OP(write, word, u16)
 676 EARLY_PCI_OP(write, dword, u32)
 677
 678 extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);
 679 int early_find_capability(struct pci_controller *hose, int bus, int devfn,
 680                           int cap)
 681 {
 682         return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap);
 683 }