2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
19 #include <linux/cache.h>
20 #include <linux/dma-mapping.h>
22 #include <linux/module.h>
23 #include <linux/spinlock.h>
24 #include <linux/string.h>
25 #include <linux/types.h>
26 #include <linux/ctype.h>
30 #include <asm/scatterlist.h>
31 #include <asm/swiotlb.h>
33 #include <linux/init.h>
34 #include <linux/bootmem.h>
36 #define OFFSET(val,align) ((unsigned long) \
37 ( (val) & ( (align) - 1)))
39 #ifndef SG_ENT_VIRT_ADDRESS
40 #define SG_ENT_VIRT_ADDRESS(sg) (page_address((sg)->page) + (sg)->offset)
41 #define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
45 * Maximum allowable number of contiguous slabs to map,
46 * must be a power of 2. What is the appropriate value ?
47 * The complexity of {map,unmap}_single is linearly dependent on this value.
49 #define IO_TLB_SEGSIZE 128
52 * log of the size of each IO TLB slab. The number of slabs is command line
55 #define IO_TLB_SHIFT 11
57 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
60 * Minimum IO TLB size to bother booting with. Systems with mainly
61 * 64bit capable cards will only lightly use the swiotlb. If we can't
62 * allocate a contiguous 1MB, we're probably in trouble anyway.
64 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
67 * Enumeration for sync targets
69 enum dma_sync_target
{
77 * Used to do a quick range check in swiotlb_unmap_single and
78 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
81 static char *io_tlb_start
, *io_tlb_end
;
84 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
85 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
87 static unsigned long io_tlb_nslabs
;
90 * When the IOMMU overflows we return a fallback buffer. This sets the size.
92 static unsigned long io_tlb_overflow
= 32*1024;
94 void *io_tlb_overflow_buffer
;
97 * This is a free list describing the number of free entries available from
100 static unsigned int *io_tlb_list
;
101 static unsigned int io_tlb_index
;
104 * We need to save away the original address corresponding to a mapped entry
105 * for the sync operations.
107 #ifndef SWIOTLB_ARCH_HAS_IO_TLB_ADDR_T
108 typedef char *io_tlb_addr_t
;
109 #define swiotlb_orig_addr_null(buffer) (!(buffer))
110 #define ptr_to_io_tlb_addr(ptr) (ptr)
111 #define page_to_io_tlb_addr(pg, off) (page_address(pg) + (off))
112 #define sg_to_io_tlb_addr(sg) SG_ENT_VIRT_ADDRESS(sg)
114 static io_tlb_addr_t
*io_tlb_orig_addr
;
117 * Protect the above data structures in the map and unmap calls
119 static DEFINE_SPINLOCK(io_tlb_lock
);
121 #ifdef SWIOTLB_EXTRA_VARIABLES
122 SWIOTLB_EXTRA_VARIABLES
;
125 #ifndef SWIOTLB_ARCH_HAS_SETUP_IO_TLB_NPAGES
127 setup_io_tlb_npages(char *str
)
130 io_tlb_nslabs
= simple_strtoul(str
, &str
, 0);
131 /* avoid tail segment of size < IO_TLB_SEGSIZE */
132 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
136 if (!strcmp(str
, "force"))
141 __setup("swiotlb=", setup_io_tlb_npages
);
142 /* make io_tlb_overflow tunable too? */
144 #ifndef swiotlb_adjust_size
145 #define swiotlb_adjust_size(size) ((void)0)
148 #ifndef swiotlb_adjust_seg
149 #define swiotlb_adjust_seg(start, size) ((void)0)
152 #ifndef swiotlb_print_info
153 #define swiotlb_print_info(bytes) \
154 printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - " \
155 "0x%lx\n", bytes >> 20, \
156 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end))
160 * Statically reserve bounce buffer space and initialize bounce buffer data
161 * structures for the software IO TLB used to implement the DMA API.
164 swiotlb_init_with_default_size(size_t default_size
)
166 unsigned long i
, bytes
;
168 if (!io_tlb_nslabs
) {
169 io_tlb_nslabs
= (default_size
>> IO_TLB_SHIFT
);
170 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
172 swiotlb_adjust_size(io_tlb_nslabs
);
173 swiotlb_adjust_size(io_tlb_overflow
);
175 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
178 * Get IO TLB memory from the low pages
180 io_tlb_start
= alloc_bootmem_low_pages(bytes
);
182 panic("Cannot allocate SWIOTLB buffer");
183 io_tlb_end
= io_tlb_start
+ bytes
;
186 * Allocate and initialize the free list array. This array is used
187 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
188 * between io_tlb_start and io_tlb_end.
190 io_tlb_list
= alloc_bootmem(io_tlb_nslabs
* sizeof(int));
191 for (i
= 0; i
< io_tlb_nslabs
; i
++) {
192 if ( !(i
% IO_TLB_SEGSIZE
) )
193 swiotlb_adjust_seg(io_tlb_start
+ (i
<< IO_TLB_SHIFT
),
194 IO_TLB_SEGSIZE
<< IO_TLB_SHIFT
);
195 io_tlb_list
[i
] = IO_TLB_SEGSIZE
- OFFSET(i
, IO_TLB_SEGSIZE
);
198 io_tlb_orig_addr
= alloc_bootmem(io_tlb_nslabs
* sizeof(io_tlb_addr_t
));
201 * Get the overflow emergency buffer
203 io_tlb_overflow_buffer
= alloc_bootmem_low(io_tlb_overflow
);
204 if (!io_tlb_overflow_buffer
)
205 panic("Cannot allocate SWIOTLB overflow buffer!\n");
206 swiotlb_adjust_seg(io_tlb_overflow_buffer
, io_tlb_overflow
);
208 swiotlb_print_info(bytes
);
210 #ifndef __swiotlb_init_with_default_size
211 #define __swiotlb_init_with_default_size swiotlb_init_with_default_size
217 __swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
220 #ifdef SWIOTLB_ARCH_NEED_LATE_INIT
222 * Systems with larger DMA zones (those that don't support ISA) can
223 * initialize the swiotlb later using the slab allocator if needed.
224 * This should be just like above, but with some error catching.
227 swiotlb_late_init_with_default_size(size_t default_size
)
229 unsigned long i
, bytes
, req_nslabs
= io_tlb_nslabs
;
232 if (!io_tlb_nslabs
) {
233 io_tlb_nslabs
= (default_size
>> IO_TLB_SHIFT
);
234 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
238 * Get IO TLB memory from the low pages
240 order
= get_order(io_tlb_nslabs
<< IO_TLB_SHIFT
);
241 io_tlb_nslabs
= SLABS_PER_PAGE
<< order
;
242 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
244 while ((SLABS_PER_PAGE
<< order
) > IO_TLB_MIN_SLABS
) {
245 io_tlb_start
= (char *)__get_free_pages(GFP_DMA
| __GFP_NOWARN
,
255 if (order
!= get_order(bytes
)) {
256 printk(KERN_WARNING
"Warning: only able to allocate %ld MB "
257 "for software IO TLB\n", (PAGE_SIZE
<< order
) >> 20);
258 io_tlb_nslabs
= SLABS_PER_PAGE
<< order
;
259 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
261 io_tlb_end
= io_tlb_start
+ bytes
;
262 memset(io_tlb_start
, 0, bytes
);
265 * Allocate and initialize the free list array. This array is used
266 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
267 * between io_tlb_start and io_tlb_end.
269 io_tlb_list
= (unsigned int *)__get_free_pages(GFP_KERNEL
,
270 get_order(io_tlb_nslabs
* sizeof(int)));
274 for (i
= 0; i
< io_tlb_nslabs
; i
++)
275 io_tlb_list
[i
] = IO_TLB_SEGSIZE
- OFFSET(i
, IO_TLB_SEGSIZE
);
278 io_tlb_orig_addr
= (io_tlb_addr_t
*)__get_free_pages(GFP_KERNEL
,
279 get_order(io_tlb_nslabs
* sizeof(io_tlb_addr_t
)));
280 if (!io_tlb_orig_addr
)
283 memset(io_tlb_orig_addr
, 0, io_tlb_nslabs
* sizeof(io_tlb_addr_t
));
286 * Get the overflow emergency buffer
288 io_tlb_overflow_buffer
= (void *)__get_free_pages(GFP_DMA
,
289 get_order(io_tlb_overflow
));
290 if (!io_tlb_overflow_buffer
)
293 swiotlb_print_info(bytes
);
298 free_pages((unsigned long)io_tlb_orig_addr
,
299 get_order(io_tlb_nslabs
* sizeof(io_tlb_addr_t
)));
300 io_tlb_orig_addr
= NULL
;
302 free_pages((unsigned long)io_tlb_list
,
303 get_order(io_tlb_nslabs
* sizeof(int)));
307 free_pages((unsigned long)io_tlb_start
, order
);
310 io_tlb_nslabs
= req_nslabs
;
315 #ifndef SWIOTLB_ARCH_HAS_NEEDS_MAPPING
317 address_needs_mapping(struct device
*hwdev
, dma_addr_t addr
)
319 dma_addr_t mask
= 0xffffffff;
320 /* If the device has a mask, use it, otherwise default to 32 bits */
321 if (hwdev
&& hwdev
->dma_mask
)
322 mask
= *hwdev
->dma_mask
;
323 return (addr
& ~mask
) != 0;
326 static inline int range_needs_mapping(const void *ptr
, size_t size
)
328 return swiotlb_force
;
331 static inline int order_needs_mapping(unsigned int order
)
338 __sync_single(io_tlb_addr_t buffer
, char *dma_addr
, size_t size
, int dir
)
340 #ifndef SWIOTLB_ARCH_HAS_SYNC_SINGLE
341 if (dir
== DMA_TO_DEVICE
)
342 memcpy(dma_addr
, buffer
, size
);
344 memcpy(buffer
, dma_addr
, size
);
346 __swiotlb_arch_sync_single(buffer
, dma_addr
, size
, dir
);
351 * Allocates bounce buffer and returns its kernel virtual address.
354 map_single(struct device
*hwdev
, io_tlb_addr_t buffer
, size_t size
, int dir
)
358 unsigned int nslots
, stride
, index
, wrap
;
362 * For mappings greater than a page, we limit the stride (and
363 * hence alignment) to a page size.
365 nslots
= ALIGN(size
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
366 if (size
> PAGE_SIZE
)
367 stride
= (1 << (PAGE_SHIFT
- IO_TLB_SHIFT
));
374 * Find suitable number of IO TLB entries size that will fit this
375 * request and allocate a buffer from that IO TLB pool.
377 spin_lock_irqsave(&io_tlb_lock
, flags
);
379 wrap
= index
= ALIGN(io_tlb_index
, stride
);
381 if (index
>= io_tlb_nslabs
)
386 * If we find a slot that indicates we have 'nslots'
387 * number of contiguous buffers, we allocate the
388 * buffers from that slot and mark the entries as '0'
389 * indicating unavailable.
391 if (io_tlb_list
[index
] >= nslots
) {
394 for (i
= index
; i
< (int) (index
+ nslots
); i
++)
396 for (i
= index
- 1; (OFFSET(i
, IO_TLB_SEGSIZE
) != IO_TLB_SEGSIZE
-1) && io_tlb_list
[i
]; i
--)
397 io_tlb_list
[i
] = ++count
;
398 dma_addr
= io_tlb_start
+ (index
<< IO_TLB_SHIFT
);
401 * Update the indices to avoid searching in
404 io_tlb_index
= ((index
+ nslots
) < io_tlb_nslabs
405 ? (index
+ nslots
) : 0);
410 if (index
>= io_tlb_nslabs
)
412 } while (index
!= wrap
);
414 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
418 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
421 * Save away the mapping from the original address to the DMA address.
422 * This is needed when we sync the memory. Then we sync the buffer if
425 io_tlb_orig_addr
[index
] = buffer
;
426 if (dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
)
427 __sync_single(buffer
, dma_addr
, size
, DMA_TO_DEVICE
);
433 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
436 unmap_single(struct device
*hwdev
, char *dma_addr
, size_t size
, int dir
)
439 int i
, count
, nslots
= ALIGN(size
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
440 int index
= (dma_addr
- io_tlb_start
) >> IO_TLB_SHIFT
;
441 io_tlb_addr_t buffer
= io_tlb_orig_addr
[index
];
444 * First, sync the memory before unmapping the entry
446 if (!swiotlb_orig_addr_null(buffer
)
447 && ((dir
== DMA_FROM_DEVICE
) || (dir
== DMA_BIDIRECTIONAL
)))
449 * bounce... copy the data back into the original buffer * and
450 * delete the bounce buffer.
452 __sync_single(buffer
, dma_addr
, size
, DMA_FROM_DEVICE
);
455 * Return the buffer to the free list by setting the corresponding
456 * entries to indicate the number of contigous entries available.
457 * While returning the entries to the free list, we merge the entries
458 * with slots below and above the pool being returned.
460 spin_lock_irqsave(&io_tlb_lock
, flags
);
462 count
= ((index
+ nslots
) < ALIGN(index
+ 1, IO_TLB_SEGSIZE
) ?
463 io_tlb_list
[index
+ nslots
] : 0);
465 * Step 1: return the slots to the free list, merging the
466 * slots with superceeding slots
468 for (i
= index
+ nslots
- 1; i
>= index
; i
--)
469 io_tlb_list
[i
] = ++count
;
471 * Step 2: merge the returned slots with the preceding slots,
472 * if available (non zero)
474 for (i
= index
- 1; (OFFSET(i
, IO_TLB_SEGSIZE
) != IO_TLB_SEGSIZE
-1) && io_tlb_list
[i
]; i
--)
475 io_tlb_list
[i
] = ++count
;
477 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
481 sync_single(struct device
*hwdev
, char *dma_addr
, size_t size
,
484 int index
= (dma_addr
- io_tlb_start
) >> IO_TLB_SHIFT
;
485 io_tlb_addr_t buffer
= io_tlb_orig_addr
[index
];
489 if (likely(dir
== DMA_FROM_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
490 __sync_single(buffer
, dma_addr
, size
, DMA_FROM_DEVICE
);
492 BUG_ON(dir
!= DMA_TO_DEVICE
);
494 case SYNC_FOR_DEVICE
:
495 if (likely(dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
496 __sync_single(buffer
, dma_addr
, size
, DMA_TO_DEVICE
);
498 BUG_ON(dir
!= DMA_FROM_DEVICE
);
505 #ifdef SWIOTLB_ARCH_NEED_ALLOC
508 swiotlb_alloc_coherent(struct device
*hwdev
, size_t size
,
509 dma_addr_t
*dma_handle
, gfp_t flags
)
513 int order
= get_order(size
);
516 * XXX fix me: the DMA API should pass us an explicit DMA mask
517 * instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32
518 * bit range instead of a 16MB one).
522 if (!order_needs_mapping(order
))
523 ret
= (void *)__get_free_pages(flags
, order
);
526 if (ret
&& address_needs_mapping(hwdev
, virt_to_bus(ret
))) {
528 * The allocated memory isn't reachable by the device.
529 * Fall back on swiotlb_map_single().
531 free_pages((unsigned long) ret
, order
);
536 * We are either out of memory or the device can't DMA
537 * to GFP_DMA memory; fall back on
538 * swiotlb_map_single(), which will grab memory from
539 * the lowest available address range.
542 handle
= swiotlb_map_single(NULL
, NULL
, size
, DMA_FROM_DEVICE
);
543 if (swiotlb_dma_mapping_error(handle
))
546 ret
= bus_to_virt(handle
);
549 memset(ret
, 0, size
);
550 dev_addr
= virt_to_bus(ret
);
552 /* Confirm address can be DMA'd by device */
553 if (address_needs_mapping(hwdev
, dev_addr
)) {
554 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
555 (unsigned long long)*hwdev
->dma_mask
,
556 (unsigned long long)dev_addr
);
557 panic("swiotlb_alloc_coherent: allocated memory is out of "
560 *dma_handle
= dev_addr
;
563 EXPORT_SYMBOL(swiotlb_alloc_coherent
);
566 swiotlb_free_coherent(struct device
*hwdev
, size_t size
, void *vaddr
,
567 dma_addr_t dma_handle
)
569 if (!(vaddr
>= (void *)io_tlb_start
570 && vaddr
< (void *)io_tlb_end
))
571 free_pages((unsigned long) vaddr
, get_order(size
));
573 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
574 swiotlb_unmap_single (hwdev
, dma_handle
, size
, DMA_TO_DEVICE
);
576 EXPORT_SYMBOL(swiotlb_free_coherent
);
581 swiotlb_full(struct device
*dev
, size_t size
, int dir
, int do_panic
)
584 * Ran out of IOMMU space for this operation. This is very bad.
585 * Unfortunately the drivers cannot handle this operation properly.
586 * unless they check for dma_mapping_error (most don't)
587 * When the mapping is small enough return a static buffer to limit
588 * the damage, or panic when the transfer is too big.
590 printk(KERN_ERR
"DMA: Out of SW-IOMMU space for %zu bytes at "
591 "device %s\n", size
, dev
? dev
->bus_id
: "?");
593 if (size
> io_tlb_overflow
&& do_panic
) {
594 if (dir
== DMA_FROM_DEVICE
|| dir
== DMA_BIDIRECTIONAL
)
595 panic("DMA: Memory would be corrupted\n");
596 if (dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
)
597 panic("DMA: Random memory would be DMAed\n");
602 * Map a single buffer of the indicated size for DMA in streaming mode. The
603 * physical address to use is returned.
605 * Once the device is given the dma address, the device owns this memory until
606 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
609 swiotlb_map_single(struct device
*hwdev
, void *ptr
, size_t size
, int dir
)
611 dma_addr_t dev_addr
= virt_to_bus(ptr
);
614 BUG_ON(dir
== DMA_NONE
);
616 * If the pointer passed in happens to be in the device's DMA window,
617 * we can safely return the device addr and not worry about bounce
620 if (!range_needs_mapping(ptr
, size
)
621 && !address_needs_mapping(hwdev
, dev_addr
))
625 * Oh well, have to allocate and map a bounce buffer.
627 map
= map_single(hwdev
, ptr_to_io_tlb_addr(ptr
), size
, dir
);
629 swiotlb_full(hwdev
, size
, dir
, 1);
630 map
= io_tlb_overflow_buffer
;
633 dev_addr
= virt_to_bus(map
);
636 * Ensure that the address returned is DMA'ble
638 if (address_needs_mapping(hwdev
, dev_addr
))
639 panic("map_single: bounce buffer is not DMA'ble");
645 * Unmap a single streaming mode DMA translation. The dma_addr and size must
646 * match what was provided for in a previous swiotlb_map_single call. All
647 * other usages are undefined.
649 * After this call, reads by the cpu to the buffer are guaranteed to see
650 * whatever the device wrote there.
653 swiotlb_unmap_single(struct device
*hwdev
, dma_addr_t dev_addr
, size_t size
,
656 char *dma_addr
= bus_to_virt(dev_addr
);
658 BUG_ON(dir
== DMA_NONE
);
659 if (dma_addr
>= io_tlb_start
&& dma_addr
< io_tlb_end
)
660 unmap_single(hwdev
, dma_addr
, size
, dir
);
661 else if (dir
== DMA_FROM_DEVICE
)
662 dma_mark_clean(dma_addr
, size
);
666 * Make physical memory consistent for a single streaming mode DMA translation
669 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
670 * using the cpu, yet do not wish to teardown the dma mapping, you must
671 * call this function before doing so. At the next point you give the dma
672 * address back to the card, you must first perform a
673 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
676 swiotlb_sync_single(struct device
*hwdev
, dma_addr_t dev_addr
,
677 size_t size
, int dir
, int target
)
679 char *dma_addr
= bus_to_virt(dev_addr
);
681 BUG_ON(dir
== DMA_NONE
);
682 if (dma_addr
>= io_tlb_start
&& dma_addr
< io_tlb_end
)
683 sync_single(hwdev
, dma_addr
, size
, dir
, target
);
684 else if (dir
== DMA_FROM_DEVICE
)
685 dma_mark_clean(dma_addr
, size
);
689 swiotlb_sync_single_for_cpu(struct device
*hwdev
, dma_addr_t dev_addr
,
690 size_t size
, int dir
)
692 swiotlb_sync_single(hwdev
, dev_addr
, size
, dir
, SYNC_FOR_CPU
);
696 swiotlb_sync_single_for_device(struct device
*hwdev
, dma_addr_t dev_addr
,
697 size_t size
, int dir
)
699 swiotlb_sync_single(hwdev
, dev_addr
, size
, dir
, SYNC_FOR_DEVICE
);
703 * Same as above, but for a sub-range of the mapping.
706 swiotlb_sync_single_range(struct device
*hwdev
, dma_addr_t dev_addr
,
707 unsigned long offset
, size_t size
,
710 char *dma_addr
= bus_to_virt(dev_addr
) + offset
;
712 BUG_ON(dir
== DMA_NONE
);
713 if (dma_addr
>= io_tlb_start
&& dma_addr
< io_tlb_end
)
714 sync_single(hwdev
, dma_addr
, size
, dir
, target
);
715 else if (dir
== DMA_FROM_DEVICE
)
716 dma_mark_clean(dma_addr
, size
);
720 swiotlb_sync_single_range_for_cpu(struct device
*hwdev
, dma_addr_t dev_addr
,
721 unsigned long offset
, size_t size
, int dir
)
723 swiotlb_sync_single_range(hwdev
, dev_addr
, offset
, size
, dir
,
728 swiotlb_sync_single_range_for_device(struct device
*hwdev
, dma_addr_t dev_addr
,
729 unsigned long offset
, size_t size
, int dir
)
731 swiotlb_sync_single_range(hwdev
, dev_addr
, offset
, size
, dir
,
736 * Map a set of buffers described by scatterlist in streaming mode for DMA.
737 * This is the scatter-gather version of the above swiotlb_map_single
738 * interface. Here the scatter gather list elements are each tagged with the
739 * appropriate dma address and length. They are obtained via
740 * sg_dma_{address,length}(SG).
742 * NOTE: An implementation may be able to use a smaller number of
743 * DMA address/length pairs than there are SG table elements.
744 * (for example via virtual mapping capabilities)
745 * The routine returns the number of addr/length pairs actually
746 * used, at most nents.
748 * Device ownership issues as mentioned above for swiotlb_map_single are the
752 swiotlb_map_sg(struct device
*hwdev
, struct scatterlist
*sg
, int nelems
,
758 BUG_ON(dir
== DMA_NONE
);
760 for (i
= 0; i
< nelems
; i
++, sg
++) {
761 dev_addr
= SG_ENT_PHYS_ADDRESS(sg
);
762 if (range_needs_mapping(SG_ENT_VIRT_ADDRESS(sg
), sg
->length
)
763 || address_needs_mapping(hwdev
, dev_addr
)) {
764 void *map
= map_single(hwdev
, sg_to_io_tlb_addr(sg
), sg
->length
, dir
);
766 /* Don't panic here, we expect map_sg users
767 to do proper error handling. */
768 swiotlb_full(hwdev
, sg
->length
, dir
, 0);
769 swiotlb_unmap_sg(hwdev
, sg
- i
, i
, dir
);
770 sg
[0].dma_length
= 0;
773 sg
->dma_address
= virt_to_bus(map
);
775 sg
->dma_address
= dev_addr
;
776 sg
->dma_length
= sg
->length
;
782 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
783 * concerning calls here are the same as for swiotlb_unmap_single() above.
786 swiotlb_unmap_sg(struct device
*hwdev
, struct scatterlist
*sg
, int nelems
,
791 BUG_ON(dir
== DMA_NONE
);
793 for (i
= 0; i
< nelems
; i
++, sg
++)
794 if (sg
->dma_address
!= SG_ENT_PHYS_ADDRESS(sg
))
795 unmap_single(hwdev
, bus_to_virt(sg
->dma_address
),
796 sg
->dma_length
, dir
);
797 else if (dir
== DMA_FROM_DEVICE
)
798 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg
), sg
->dma_length
);
802 * Make physical memory consistent for a set of streaming mode DMA translations
805 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
809 swiotlb_sync_sg(struct device
*hwdev
, struct scatterlist
*sg
,
810 int nelems
, int dir
, int target
)
814 BUG_ON(dir
== DMA_NONE
);
816 for (i
= 0; i
< nelems
; i
++, sg
++)
817 if (sg
->dma_address
!= SG_ENT_PHYS_ADDRESS(sg
))
818 sync_single(hwdev
, bus_to_virt(sg
->dma_address
),
819 sg
->dma_length
, dir
, target
);
820 else if (dir
== DMA_FROM_DEVICE
)
821 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg
), sg
->dma_length
);
825 swiotlb_sync_sg_for_cpu(struct device
*hwdev
, struct scatterlist
*sg
,
828 swiotlb_sync_sg(hwdev
, sg
, nelems
, dir
, SYNC_FOR_CPU
);
832 swiotlb_sync_sg_for_device(struct device
*hwdev
, struct scatterlist
*sg
,
835 swiotlb_sync_sg(hwdev
, sg
, nelems
, dir
, SYNC_FOR_DEVICE
);
838 #ifdef SWIOTLB_ARCH_NEED_MAP_PAGE
841 swiotlb_map_page(struct device
*hwdev
, struct page
*page
,
842 unsigned long offset
, size_t size
,
843 enum dma_data_direction direction
)
848 dev_addr
= page_to_bus(page
) + offset
;
849 if (address_needs_mapping(hwdev
, dev_addr
)) {
850 map
= map_single(hwdev
, page_to_io_tlb_addr(page
, offset
), size
, direction
);
852 swiotlb_full(hwdev
, size
, direction
, 1);
853 map
= io_tlb_overflow_buffer
;
855 dev_addr
= virt_to_bus(map
);
862 swiotlb_unmap_page(struct device
*hwdev
, dma_addr_t dev_addr
,
863 size_t size
, enum dma_data_direction direction
)
865 char *dma_addr
= bus_to_virt(dev_addr
);
867 BUG_ON(direction
== DMA_NONE
);
868 if (dma_addr
>= io_tlb_start
&& dma_addr
< io_tlb_end
)
869 unmap_single(hwdev
, dma_addr
, size
, direction
);
870 else if (direction
== DMA_FROM_DEVICE
)
871 dma_mark_clean(dma_addr
, size
);
877 swiotlb_dma_mapping_error(dma_addr_t dma_addr
)
879 return (dma_addr
== virt_to_bus(io_tlb_overflow_buffer
));
883 * Return whether the given device DMA address mask can be supported
884 * properly. For example, if your device can only drive the low 24-bits
885 * during bus mastering, then you would pass 0x00ffffff as the mask to
888 #ifndef __swiotlb_dma_supported
889 #define __swiotlb_dma_supported(hwdev, mask) (virt_to_bus(io_tlb_end - 1) <= (mask))
892 swiotlb_dma_supported(struct device
*hwdev
, u64 mask
)
894 return __swiotlb_dma_supported(hwdev
, mask
);
897 EXPORT_SYMBOL(swiotlb_init
);
898 EXPORT_SYMBOL(swiotlb_map_single
);
899 EXPORT_SYMBOL(swiotlb_unmap_single
);
900 EXPORT_SYMBOL(swiotlb_map_sg
);
901 EXPORT_SYMBOL(swiotlb_unmap_sg
);
902 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu
);
903 EXPORT_SYMBOL(swiotlb_sync_single_for_device
);
904 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu
);
905 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device
);
906 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu
);
907 EXPORT_SYMBOL(swiotlb_sync_sg_for_device
);
908 EXPORT_SYMBOL(swiotlb_dma_mapping_error
);
909 EXPORT_SYMBOL(swiotlb_dma_supported
);