include/asm-x86/io_32.h

   1 #ifndef _ASM_IO_H
   2 #define _ASM_IO_H
   3
   4 #include <linux/string.h>
   5 #include <linux/compiler.h>
   6
   7 /*
   8  * This file contains the definitions for the x86 IO instructions
   9  * inb/inw/inl/outb/outw/outl and the "string versions" of the same
  10  * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
  11  * versions of the single-IO instructions (inb_p/inw_p/..).
  12  *
  13  * This file is not meant to be obfuscating: it's just complicated
  14  * to (a) handle it all in a way that makes gcc able to optimize it
  15  * as well as possible and (b) trying to avoid writing the same thing
  16  * over and over again with slight variations and possibly making a
  17  * mistake somewhere.
  18  */
  19
  20 /*
  21  * Thanks to James van Artsdalen for a better timing-fix than
  22  * the two short jumps: using outb's to a nonexistent port seems
  23  * to guarantee better timings even on fast machines.
  24  *
  25  * On the other hand, I'd like to be sure of a non-existent port:
  26  * I feel a bit unsafe about using 0x80 (should be safe, though)
  27  *
  28  *              Linus
  29  */
  30
  31  /*
  32   *  Bit simplified and optimized by Jan Hubicka
  33   *  Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
  34   *
  35   *  isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
  36   *  isa_read[wl] and isa_write[wl] fixed
  37   *  - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
  38   */
  39
  40 #define IO_SPACE_LIMIT 0xffff
  41
  42 #define XQUAD_PORTIO_BASE 0xfe400000
  43 #define XQUAD_PORTIO_QUAD 0x40000  /* 256k per quad. */
  44
  45 #ifdef __KERNEL__
  46
  47 #include <asm-generic/iomap.h>
  48
  49 #include <linux/vmalloc.h>
  50
  51 /*
  52  * Convert a virtual cached pointer to an uncached pointer
  53  */
  54 #define xlate_dev_kmem_ptr(p)   p
  55
  56 /**
  57  *      virt_to_phys    -       map virtual addresses to physical
  58  *      @address: address to remap
  59  *
  60  *      The returned physical address is the physical (CPU) mapping for
  61  *      the memory address given. It is only valid to use this function on
  62  *      addresses directly mapped or allocated via kmalloc.
  63  *
  64  *      This function does not give bus mappings for DMA transfers. In
  65  *      almost all conceivable cases a device driver should not be using
  66  *      this function
  67  */
  68
  69 static inline unsigned long virt_to_phys(volatile void *address)
  70 {
  71         return __pa(address);
  72 }
  73
  74 /**
  75  *      phys_to_virt    -       map physical address to virtual
  76  *      @address: address to remap
  77  *
  78  *      The returned virtual address is a current CPU mapping for
  79  *      the memory address given. It is only valid to use this function on
  80  *      addresses that have a kernel mapping
  81  *
  82  *      This function does not handle bus mappings for DMA transfers. In
  83  *      almost all conceivable cases a device driver should not be using
  84  *      this function
  85  */
  86
  87 static inline void *phys_to_virt(unsigned long address)
  88 {
  89         return __va(address);
  90 }
  91
  92 /*
  93  * Change "struct page" to physical address.
  94  */
  95 #define page_to_phys(page)    ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
  96
  97 /**
  98  * ioremap     -   map bus memory into CPU space
  99  * @offset:    bus address of the memory
 100  * @size:      size of the resource to map
 101  *
 102  * ioremap performs a platform specific sequence of operations to
 103  * make bus memory CPU accessible via the readb/readw/readl/writeb/
 104  * writew/writel functions and the other mmio helpers. The returned
 105  * address is not guaranteed to be usable directly as a virtual
 106  * address.
 107  *
 108  * If the area you are trying to map is a PCI BAR you should have a
 109  * look at pci_iomap().
 110  */
 111 extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
 112 extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
 113
 114 /*
 115  * The default ioremap() behavior is non-cached:
 116  */
 117 static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
 118 {
 119         return ioremap_nocache(offset, size);
 120 }
 121
 122 extern void iounmap(volatile void __iomem *addr);
 123
 124 /*
 125  * early_ioremap() and early_iounmap() are for temporary early boot-time
 126  * mappings, before the real ioremap() is functional.
 127  * A boot-time mapping is currently limited to at most 16 pages.
 128  */
 129 extern void early_ioremap_init(void);
 130 extern void early_ioremap_clear(void);
 131 extern void early_ioremap_reset(void);
 132 extern void *early_ioremap(unsigned long offset, unsigned long size);
 133 extern void early_iounmap(void *addr, unsigned long size);
 134 extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
 135
 136 /*
 137  * ISA I/O bus memory addresses are 1:1 with the physical address.
 138  */
 139 #define isa_virt_to_bus virt_to_phys
 140 #define isa_page_to_bus page_to_phys
 141 #define isa_bus_to_virt phys_to_virt
 142
 143 /*
 144  * However PCI ones are not necessarily 1:1 and therefore these interfaces
 145  * are forbidden in portable PCI drivers.
 146  *
 147  * Allow them on x86 for legacy drivers, though.
 148  */
 149 #define virt_to_bus virt_to_phys
 150 #define bus_to_virt phys_to_virt
 151
 152 /*
 153  * readX/writeX() are used to access memory mapped devices. On some
 154  * architectures the memory mapped IO stuff needs to be accessed
 155  * differently. On the x86 architecture, we just read/write the
 156  * memory location directly.
 157  */
 158
 159 static inline unsigned char readb(const volatile void __iomem *addr)
 160 {
 161         return *(volatile unsigned char __force *)addr;
 162 }
 163
 164 static inline unsigned short readw(const volatile void __iomem *addr)
 165 {
 166         return *(volatile unsigned short __force *)addr;
 167 }
 168
 169 static inline unsigned int readl(const volatile void __iomem *addr)
 170 {
 171         return *(volatile unsigned int __force *) addr;
 172 }
 173
 174 #define readb_relaxed(addr) readb(addr)
 175 #define readw_relaxed(addr) readw(addr)
 176 #define readl_relaxed(addr) readl(addr)
 177 #define __raw_readb readb
 178 #define __raw_readw readw
 179 #define __raw_readl readl
 180
 181 static inline void writeb(unsigned char b, volatile void __iomem *addr)
 182 {
 183         *(volatile unsigned char __force *)addr = b;
 184 }
 185
 186 static inline void writew(unsigned short b, volatile void __iomem *addr)
 187 {
 188         *(volatile unsigned short __force *)addr = b;
 189 }
 190
 191 static inline void writel(unsigned int b, volatile void __iomem *addr)
 192 {
 193         *(volatile unsigned int __force *)addr = b;
 194 }
 195 #define __raw_writeb writeb
 196 #define __raw_writew writew
 197 #define __raw_writel writel
 198
 199 #define mmiowb()
 200
 201 static inline void
 202 memset_io(volatile void __iomem *addr, unsigned char val, int count)
 203 {
 204         memset((void __force *)addr, val, count);
 205 }
 206
 207 static inline void
 208 memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
 209 {
 210         __memcpy(dst, (const void __force *)src, count);
 211 }
 212
 213 static inline void
 214 memcpy_toio(volatile void __iomem *dst, const void *src, int count)
 215 {
 216         __memcpy((void __force *)dst, src, count);
 217 }
 218
 219 /*
 220  * ISA space is 'always mapped' on a typical x86 system, no need to
 221  * explicitly ioremap() it. The fact that the ISA IO space is mapped
 222  * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
 223  * are physical addresses. The following constant pointer can be
 224  * used as the IO-area pointer (it can be iounmapped as well, so the
 225  * analogy with PCI is quite large):
 226  */
 227 #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
 228
 229 /*
 230  *      Cache management
 231  *
 232  *      This needed for two cases
 233  *      1. Out of order aware processors
 234  *      2. Accidentally out of order processors (PPro errata #51)
 235  */
 236
 237 #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
 238
 239 static inline void flush_write_buffers(void)
 240 {
 241         asm volatile("lock; addl $0,0(%%esp)": : :"memory");
 242 }
 243
 244 #else
 245
 246 #define flush_write_buffers() do { } while (0)
 247
 248 #endif
 249
 250 #endif /* __KERNEL__ */
 251
 252 extern void native_io_delay(void);
 253
 254 extern int io_delay_type;
 255 extern void io_delay_init(void);
 256
 257 #if defined(CONFIG_PARAVIRT)
 258 #include <asm/paravirt.h>
 259 #else
 260
 261 static inline void slow_down_io(void)
 262 {
 263         native_io_delay();
 264 #ifdef REALLY_SLOW_IO
 265         native_io_delay();
 266         native_io_delay();
 267         native_io_delay();
 268 #endif
 269 }
 270
 271 #endif
 272
 273 #define __BUILDIO(bwl, bw, type)                                \
 274 static inline void out##bwl(unsigned type value, int port)      \
 275 {                                                               \
 276         out##bwl##_local(value, port);                          \
 277 }                                                               \
 278                                                                 \
 279 static inline unsigned type in##bwl(int port)                   \
 280 {                                                               \
 281         return in##bwl##_local(port);                           \
 282 }
 283
 284 #define BUILDIO(bwl, bw, type)                                          \
 285 static inline void out##bwl##_local(unsigned type value, int port)      \
 286 {                                                                       \
 287         asm volatile("out" #bwl " %" #bw "0, %w1"               \
 288                      : : "a"(value), "Nd"(port));                       \
 289 }                                                                       \
 290                                                                         \
 291 static inline unsigned type in##bwl##_local(int port)                   \
 292 {                                                                       \
 293         unsigned type value;                                            \
 294         asm volatile("in" #bwl " %w1, %" #bw "0"                \
 295                      : "=a"(value) : "Nd"(port));                       \
 296         return value;                                                   \
 297 }                                                                       \
 298                                                                         \
 299 static inline void out##bwl##_local_p(unsigned type value, int port)    \
 300 {                                                                       \
 301         out##bwl##_local(value, port);                                  \
 302         slow_down_io();                                                 \
 303 }                                                                       \
 304                                                                         \
 305 static inline unsigned type in##bwl##_local_p(int port)                 \
 306 {                                                                       \
 307         unsigned type value = in##bwl##_local(port);                    \
 308         slow_down_io();                                                 \
 309         return value;                                                   \
 310 }                                                                       \
 311                                                                         \
 312 __BUILDIO(bwl, bw, type)                                                \
 313                                                                         \
 314 static inline void out##bwl##_p(unsigned type value, int port)          \
 315 {                                                                       \
 316         out##bwl(value, port);                                          \
 317         slow_down_io();                                                 \
 318 }                                                                       \
 319                                                                         \
 320 static inline unsigned type in##bwl##_p(int port)                       \
 321 {                                                                       \
 322         unsigned type value = in##bwl(port);                            \
 323         slow_down_io();                                                 \
 324         return value;                                                   \
 325 }                                                                       \
 326                                                                         \
 327 static inline void outs##bwl(int port, const void *addr, unsigned long count) \
 328 {                                                                       \
 329         asm volatile("rep; outs" #bwl                                   \
 330                      : "+S"(addr), "+c"(count) : "d"(port));            \
 331 }                                                                       \
 332                                                                         \
 333 static inline void ins##bwl(int port, void *addr, unsigned long count)  \
 334 {                                                                       \
 335         asm volatile("rep; ins" #bwl                                    \
 336                      : "+D"(addr), "+c"(count) : "d"(port));            \
 337 }
 338
 339 BUILDIO(b, b, char)
 340 BUILDIO(w, w, short)
 341 BUILDIO(l, , int)
 342
 343 #endif