2 * arch/arm/mach-ns9xxx/time.c
4 * Copyright (C) 2006 by Digi International Inc.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 #include <linux/jiffies.h>
12 #include <linux/interrupt.h>
13 #include <linux/irq.h>
14 #include <linux/stringify.h>
15 #include <linux/clocksource.h>
16 #include <linux/clockchips.h>
18 #include <asm/arch-ns9xxx/regs-sys.h>
19 #include <asm/arch-ns9xxx/clock.h>
20 #include <asm/arch-ns9xxx/irqs.h>
21 #include <asm/arch/system.h>
24 #define TIMER_CLOCKSOURCE 0
25 #define TIMER_CLOCKEVENT 1
28 static cycle_t
ns9xxx_clocksource_read(void)
30 return __raw_readl(SYS_TR(TIMER_CLOCKSOURCE
));
33 static struct clocksource ns9xxx_clocksource
= {
34 .name
= "ns9xxx-timer" __stringify(TIMER_CLOCKSOURCE
),
36 .read
= ns9xxx_clocksource_read
,
37 .mask
= CLOCKSOURCE_MASK(32),
39 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
42 static void ns9xxx_clockevent_setmode(enum clock_event_mode mode
,
43 struct clock_event_device
*clk
)
45 u32 tc
= __raw_readl(SYS_TC(TIMER_CLOCKEVENT
));
48 case CLOCK_EVT_MODE_PERIODIC
:
49 __raw_writel(latch
, SYS_TRC(TIMER_CLOCKEVENT
));
50 REGSET(tc
, SYS_TCx
, REN
, EN
);
51 REGSET(tc
, SYS_TCx
, INTS
, EN
);
52 REGSET(tc
, SYS_TCx
, TEN
, EN
);
55 case CLOCK_EVT_MODE_ONESHOT
:
56 REGSET(tc
, SYS_TCx
, REN
, DIS
);
57 REGSET(tc
, SYS_TCx
, INTS
, EN
);
61 case CLOCK_EVT_MODE_UNUSED
:
62 case CLOCK_EVT_MODE_SHUTDOWN
:
63 case CLOCK_EVT_MODE_RESUME
:
65 REGSET(tc
, SYS_TCx
, TEN
, DIS
);
69 __raw_writel(tc
, SYS_TC(TIMER_CLOCKEVENT
));
72 static int ns9xxx_clockevent_setnextevent(unsigned long evt
,
73 struct clock_event_device
*clk
)
75 u32 tc
= __raw_readl(SYS_TC(TIMER_CLOCKEVENT
));
77 if (REGGET(tc
, SYS_TCx
, TEN
)) {
78 REGSET(tc
, SYS_TCx
, TEN
, DIS
);
79 __raw_writel(tc
, SYS_TC(TIMER_CLOCKEVENT
));
82 REGSET(tc
, SYS_TCx
, TEN
, EN
);
84 __raw_writel(evt
, SYS_TRC(TIMER_CLOCKEVENT
));
86 __raw_writel(tc
, SYS_TC(TIMER_CLOCKEVENT
));
91 static struct clock_event_device ns9xxx_clockevent_device
= {
92 .name
= "ns9xxx-timer" __stringify(TIMER_CLOCKEVENT
),
94 .features
= CLOCK_EVT_FEAT_PERIODIC
| CLOCK_EVT_FEAT_ONESHOT
,
95 .set_mode
= ns9xxx_clockevent_setmode
,
96 .set_next_event
= ns9xxx_clockevent_setnextevent
,
99 static irqreturn_t
ns9xxx_clockevent_handler(int irq
, void *dev_id
)
101 int timerno
= irq
- IRQ_TIMER0
;
104 struct clock_event_device
*evt
= &ns9xxx_clockevent_device
;
107 tc
= __raw_readl(SYS_TC(timerno
));
108 if (REGGET(tc
, SYS_TCx
, REN
) == SYS_TCx_REN_DIS
) {
109 REGSET(tc
, SYS_TCx
, TEN
, DIS
);
110 __raw_writel(tc
, SYS_TC(timerno
));
112 REGSET(tc
, SYS_TCx
, INTC
, SET
);
113 __raw_writel(tc
, SYS_TC(timerno
));
114 REGSET(tc
, SYS_TCx
, INTC
, UNSET
);
115 __raw_writel(tc
, SYS_TC(timerno
));
117 evt
->event_handler(evt
);
122 static struct irqaction ns9xxx_clockevent_action
= {
123 .name
= "ns9xxx-timer" __stringify(TIMER_CLOCKEVENT
),
124 .flags
= IRQF_DISABLED
| IRQF_TIMER
| IRQF_IRQPOLL
,
125 .handler
= ns9xxx_clockevent_handler
,
128 static void __init
ns9xxx_timer_init(void)
132 tc
= __raw_readl(SYS_TC(TIMER_CLOCKSOURCE
));
133 if (REGGET(tc
, SYS_TCx
, TEN
)) {
134 REGSET(tc
, SYS_TCx
, TEN
, DIS
);
135 __raw_writel(tc
, SYS_TC(TIMER_CLOCKSOURCE
));
138 __raw_writel(0, SYS_TRC(TIMER_CLOCKSOURCE
));
140 REGSET(tc
, SYS_TCx
, TEN
, EN
);
141 REGSET(tc
, SYS_TCx
, TDBG
, STOP
);
142 REGSET(tc
, SYS_TCx
, TLCS
, CPU
);
143 REGSET(tc
, SYS_TCx
, TM
, IEE
);
144 REGSET(tc
, SYS_TCx
, INTS
, DIS
);
145 REGSET(tc
, SYS_TCx
, UDS
, UP
);
146 REGSET(tc
, SYS_TCx
, TSZ
, 32);
147 REGSET(tc
, SYS_TCx
, REN
, EN
);
149 __raw_writel(tc
, SYS_TC(TIMER_CLOCKSOURCE
));
151 ns9xxx_clocksource
.mult
= clocksource_hz2mult(ns9xxx_cpuclock(),
152 ns9xxx_clocksource
.shift
);
154 clocksource_register(&ns9xxx_clocksource
);
156 latch
= SH_DIV(ns9xxx_cpuclock(), HZ
, 0);
158 tc
= __raw_readl(SYS_TC(TIMER_CLOCKEVENT
));
159 REGSET(tc
, SYS_TCx
, TEN
, DIS
);
160 REGSET(tc
, SYS_TCx
, TDBG
, STOP
);
161 REGSET(tc
, SYS_TCx
, TLCS
, CPU
);
162 REGSET(tc
, SYS_TCx
, TM
, IEE
);
163 REGSET(tc
, SYS_TCx
, INTS
, DIS
);
164 REGSET(tc
, SYS_TCx
, UDS
, DOWN
);
165 REGSET(tc
, SYS_TCx
, TSZ
, 32);
166 REGSET(tc
, SYS_TCx
, REN
, EN
);
167 __raw_writel(tc
, SYS_TC(TIMER_CLOCKEVENT
));
169 ns9xxx_clockevent_device
.mult
= div_sc(ns9xxx_cpuclock(),
170 NSEC_PER_SEC
, ns9xxx_clockevent_device
.shift
);
171 ns9xxx_clockevent_device
.max_delta_ns
=
172 clockevent_delta2ns(-1, &ns9xxx_clockevent_device
);
173 ns9xxx_clockevent_device
.min_delta_ns
=
174 clockevent_delta2ns(1, &ns9xxx_clockevent_device
);
176 ns9xxx_clockevent_device
.cpumask
= cpumask_of_cpu(0);
177 clockevents_register_device(&ns9xxx_clockevent_device
);
179 setup_irq(IRQ_TIMER0
+ TIMER_CLOCKEVENT
, &ns9xxx_clockevent_action
);
182 struct sys_timer ns9xxx_timer
= {
183 .init
= ns9xxx_timer_init
,