2 * arch/ppc/platforms/setup.c
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
10 * bootup setup stuff..
13 #include <linux/config.h>
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
18 #include <linux/stddef.h>
19 #include <linux/unistd.h>
20 #include <linux/ptrace.h>
21 #include <linux/slab.h>
22 #include <linux/user.h>
23 #include <linux/a.out.h>
24 #include <linux/tty.h>
25 #include <linux/major.h>
26 #include <linux/interrupt.h>
27 #include <linux/reboot.h>
28 #include <linux/init.h>
29 #include <linux/pci.h>
30 #include <linux/version.h>
31 #include <linux/adb.h>
32 #include <linux/module.h>
33 #include <linux/delay.h>
34 #include <linux/ide.h>
35 #include <linux/console.h>
36 #include <linux/seq_file.h>
37 #include <linux/root_dev.h>
38 #include <linux/initrd.h>
39 #include <linux/module.h>
42 #include <asm/pgtable.h>
45 #include <asm/pci-bridge.h>
47 #include <asm/machdep.h>
49 #include <asm/hydra.h>
50 #include <asm/sections.h>
52 #include <asm/btext.h>
53 #include <asm/i8259.h>
60 void rtas_indicator_progress(char *, unsigned short);
61 void btext_progress(char *, unsigned short);
64 EXPORT_SYMBOL(_chrp_type
);
66 struct mpic
*chrp_mpic
;
69 * XXX this should be in xmon.h, but putting it there means xmon.h
70 * has to include <linux/interrupt.h> (to get irqreturn_t), which
71 * causes all sorts of problems. -- paulus
73 extern irqreturn_t
xmon_irq(int, void *, struct pt_regs
*);
75 extern unsigned long loops_per_jiffy
;
78 extern struct smp_ops_t chrp_smp_ops
;
81 static const char *gg2_memtypes
[4] = {
82 "FPM", "SDRAM", "EDO", "BEDO"
84 static const char *gg2_cachesizes
[4] = {
85 "256 KB", "512 KB", "1 MB", "Reserved"
87 static const char *gg2_cachetypes
[4] = {
88 "Asynchronous", "Reserved", "Flow-Through Synchronous",
89 "Pipelined Synchronous"
91 static const char *gg2_cachemodes
[4] = {
92 "Disabled", "Write-Through", "Copy-Back", "Transparent Mode"
95 void chrp_show_cpuinfo(struct seq_file
*m
)
99 struct device_node
*root
;
100 const char *model
= "";
102 root
= find_path_device("/");
104 model
= get_property(root
, "model", NULL
);
105 seq_printf(m
, "machine\t\t: CHRP %s\n", model
);
107 /* longtrail (goldengate) stuff */
108 if (!strncmp(model
, "IBM,LongTrail", 13)) {
109 /* VLSI VAS96011/12 `Golden Gate 2' */
111 sdramen
= (in_le32(gg2_pci_config_base
+ GG2_PCI_DRAM_CTRL
)
113 for (i
= 0; i
< (sdramen
? 4 : 6); i
++) {
114 t
= in_le32(gg2_pci_config_base
+
119 switch ((t
>>8) & 0x1f) {
142 seq_printf(m
, "memory bank %d\t: %s %s\n", i
, model
,
143 gg2_memtypes
[sdramen
? 1 : ((t
>>1) & 3)]);
146 t
= in_le32(gg2_pci_config_base
+GG2_PCI_CC_CTRL
);
147 seq_printf(m
, "board l2\t: %s %s (%s)\n",
148 gg2_cachesizes
[(t
>>7) & 3],
149 gg2_cachetypes
[(t
>>2) & 3],
150 gg2_cachemodes
[t
& 3]);
155 * Fixes for the National Semiconductor PC78308VUL SuperI/O
157 * Some versions of Open Firmware incorrectly initialize the IRQ settings
158 * for keyboard and mouse
160 static inline void __init
sio_write(u8 val
, u8 index
)
166 static inline u8 __init
sio_read(u8 index
)
172 static void __init
sio_fixup_irq(const char *name
, u8 device
, u8 level
,
175 u8 level0
, type0
, active
;
177 /* select logical device */
178 sio_write(device
, 0x07);
179 active
= sio_read(0x30);
180 level0
= sio_read(0x70);
181 type0
= sio_read(0x71);
182 if (level0
!= level
|| type0
!= type
|| !active
) {
183 printk(KERN_WARNING
"sio: %s irq level %d, type %d, %sactive: "
184 "remapping to level %d, type %d, active\n",
185 name
, level0
, type0
, !active
? "in" : "", level
, type
);
186 sio_write(0x01, 0x30);
187 sio_write(level
, 0x70);
188 sio_write(type
, 0x71);
192 static void __init
sio_init(void)
194 struct device_node
*root
;
196 if ((root
= find_path_device("/")) &&
197 !strncmp(get_property(root
, "model", NULL
), "IBM,LongTrail", 13)) {
198 /* logical device 0 (KBC/Keyboard) */
199 sio_fixup_irq("keyboard", 0, 1, 2);
200 /* select logical device 1 (KBC/Mouse) */
201 sio_fixup_irq("mouse", 1, 12, 2);
206 static void __init
pegasos_set_l2cr(void)
208 struct device_node
*np
;
210 /* On Pegasos, enable the l2 cache if needed, as the OF forgets it */
211 if (_chrp_type
!= _CHRP_Pegasos
)
214 /* Enable L2 cache if needed */
215 np
= find_type_devices("cpu");
217 unsigned int *l2cr
= (unsigned int *)
218 get_property (np
, "l2cr", NULL
);
220 printk ("Pegasos l2cr : no cpu l2cr property found\n");
223 if (!((*l2cr
) & 0x80000000)) {
224 printk ("Pegasos l2cr : L2 cache was not active, "
227 _set_L2CR((*l2cr
) | 0x80000000);
232 void __init
chrp_setup_arch(void)
234 struct device_node
*root
= find_path_device ("/");
235 char *machine
= NULL
;
236 struct device_node
*device
;
237 unsigned int *p
= NULL
;
239 /* init to some ~sane value until calibrate_delay() runs */
240 loops_per_jiffy
= 50000000/HZ
;
243 machine
= get_property(root
, "model", NULL
);
244 if (machine
&& strncmp(machine
, "Pegasos", 7) == 0) {
245 _chrp_type
= _CHRP_Pegasos
;
246 } else if (machine
&& strncmp(machine
, "IBM", 3) == 0) {
247 _chrp_type
= _CHRP_IBM
;
248 } else if (machine
&& strncmp(machine
, "MOT", 3) == 0) {
249 _chrp_type
= _CHRP_Motorola
;
251 /* Let's assume it is an IBM chrp if all else fails */
252 _chrp_type
= _CHRP_IBM
;
254 printk("chrp type = %x\n", _chrp_type
);
257 if (rtas_token("display-character") >= 0)
258 ppc_md
.progress
= rtas_progress
;
260 #ifdef CONFIG_BOOTX_TEXT
261 if (ppc_md
.progress
== NULL
&& boot_text_mapped
)
262 ppc_md
.progress
= btext_progress
;
265 #ifdef CONFIG_BLK_DEV_INITRD
266 /* this is fine for chrp */
267 initrd_below_start_ok
= 1;
270 ROOT_DEV
= Root_RAM0
;
273 ROOT_DEV
= Root_SDA2
; /* sda2 (sda1 is for the kernel) */
275 /* On pegasos, enable the L2 cache if not already done by OF */
278 /* Lookup PCI host bridges */
282 * Temporary fixes for PCI devices.
285 hydra_init(); /* Mac I/O */
288 * Fix the Super I/O configuration
292 /* Get the event scan rate for the rtas so we know how
293 * often it expects a heartbeat. -- Cort
295 device
= find_devices("rtas");
297 p
= (unsigned int *) get_property
298 (device
, "rtas-event-scan-rate", NULL
);
300 ppc_md
.heartbeat
= chrp_event_scan
;
301 ppc_md
.heartbeat_reset
= HZ
/ (*p
* 30) - 1;
302 ppc_md
.heartbeat_count
= 1;
303 printk("RTAS Event Scan Rate: %u (%lu jiffies)\n",
304 *p
, ppc_md
.heartbeat_reset
);
307 pci_create_OF_bus_map();
310 * Print the banner, then scroll down so boot progress
311 * can be printed. -- Cort
313 if (ppc_md
.progress
) ppc_md
.progress("Linux/PPC "UTS_RELEASE
"\n", 0x0);
317 chrp_event_scan(void)
319 unsigned char log
[1024];
322 /* XXX: we should loop until the hardware says no more error logs -- Cort */
323 rtas_call(rtas_token("event-scan"), 4, 1, &ret
, 0xffffffff, 0,
325 ppc_md
.heartbeat_count
= ppc_md
.heartbeat_reset
;
329 * Finds the open-pic node and sets up the mpic driver.
331 static void __init
chrp_find_openpic(void)
333 struct device_node
*np
, *root
;
334 int len
, i
, j
, irq_count
;
335 int isu_size
, idu_size
;
336 unsigned int *iranges
, *opprop
= NULL
;
338 unsigned long opaddr
;
340 unsigned char init_senses
[NR_IRQS
- NUM_8259_INTERRUPTS
];
342 np
= find_type_devices("open-pic");
345 root
= find_path_device("/");
347 opprop
= (unsigned int *) get_property
348 (root
, "platform-open-pic", &oplen
);
349 na
= prom_n_addr_cells(root
);
351 if (opprop
&& oplen
>= na
* sizeof(unsigned int)) {
352 opaddr
= opprop
[na
-1]; /* assume 32-bit */
353 oplen
/= na
* sizeof(unsigned int);
355 if (np
->n_addrs
== 0)
357 opaddr
= np
->addrs
[0].address
;
361 printk(KERN_INFO
"OpenPIC at %lx\n", opaddr
);
363 irq_count
= NR_IRQS
- NUM_ISA_INTERRUPTS
- 4; /* leave room for IPIs */
364 prom_get_irq_senses(init_senses
, NUM_8259_INTERRUPTS
, NR_IRQS
- 4);
366 iranges
= (unsigned int *) get_property(np
, "interrupt-ranges", &len
);
368 len
= 0; /* non-distributed mpic */
370 len
/= 2 * sizeof(unsigned int);
373 * The first pair of cells in interrupt-ranges refers to the
374 * IDU; subsequent pairs refer to the ISUs.
377 printk(KERN_ERR
"Insufficient addresses for distributed"
378 " OpenPIC (%d < %d)\n", np
->n_addrs
, len
);
384 if (len
> 0 && iranges
[1] != 0) {
385 printk(KERN_INFO
"OpenPIC irqs %d..%d in IDU\n",
386 iranges
[0], iranges
[0] + iranges
[1] - 1);
387 idu_size
= iranges
[1];
390 isu_size
= iranges
[3];
392 chrp_mpic
= mpic_alloc(opaddr
, MPIC_PRIMARY
,
393 isu_size
, NUM_ISA_INTERRUPTS
, irq_count
,
394 NR_IRQS
- 4, init_senses
, irq_count
,
396 if (chrp_mpic
== NULL
) {
397 printk(KERN_ERR
"Failed to allocate MPIC structure\n");
402 for (i
= 1; i
< len
; ++i
) {
405 printk(KERN_INFO
"OpenPIC irqs %d..%d in ISU at %x\n",
406 iranges
[0], iranges
[0] + iranges
[1] - 1,
408 mpic_assign_isu(chrp_mpic
, i
- 1, opprop
[j
]);
411 mpic_init(chrp_mpic
);
412 mpic_setup_cascade(NUM_ISA_INTERRUPTS
, i8259_irq_cascade
, NULL
);
415 #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
416 static struct irqaction xmon_irqaction
= {
418 .mask
= CPU_MASK_NONE
,
419 .name
= "XMON break",
423 void __init
chrp_init_IRQ(void)
425 struct device_node
*np
;
426 unsigned long chrp_int_ack
= 0;
427 #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
428 struct device_node
*kbd
;
431 for (np
= find_devices("pci"); np
!= NULL
; np
= np
->next
) {
432 unsigned int *addrp
= (unsigned int *)
433 get_property(np
, "8259-interrupt-acknowledge", NULL
);
437 chrp_int_ack
= addrp
[prom_n_addr_cells(np
)-1];
441 printk(KERN_ERR
"Cannot find PCI interrupt acknowledge address\n");
445 i8259_init(chrp_int_ack
, 0);
447 if (_chrp_type
== _CHRP_Pegasos
)
448 ppc_md
.get_irq
= i8259_irq
;
450 ppc_md
.get_irq
= mpic_get_irq
;
452 #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
453 /* see if there is a keyboard in the device tree
454 with a parent of type "adb" */
455 for (kbd
= find_devices("keyboard"); kbd
; kbd
= kbd
->next
)
456 if (kbd
->parent
&& kbd
->parent
->type
457 && strcmp(kbd
->parent
->type
, "adb") == 0)
460 setup_irq(HYDRA_INT_ADB_NMI
, &xmon_irqaction
);
471 request_region(0x20,0x20,"pic1");
472 request_region(0xa0,0x20,"pic2");
473 request_region(0x00,0x20,"dma1");
474 request_region(0x40,0x20,"timer");
475 request_region(0x80,0x10,"dma page reg");
476 request_region(0xc0,0x20,"dma2");
479 ppc_md
.progress(" Have fun! ", 0x7777);
482 void __init
chrp_init(void)
484 ISA_DMA_THRESHOLD
= ~0L;
485 DMA_MODE_READ
= 0x44;
486 DMA_MODE_WRITE
= 0x48;
487 isa_io_base
= CHRP_ISA_IO_BASE
; /* default value */
488 ppc_do_canonicalize_irqs
= 1;
490 /* Assume we have an 8259... */
491 __irq_offset_value
= NUM_ISA_INTERRUPTS
;
493 ppc_md
.setup_arch
= chrp_setup_arch
;
494 ppc_md
.show_cpuinfo
= chrp_show_cpuinfo
;
496 ppc_md
.init_IRQ
= chrp_init_IRQ
;
497 ppc_md
.init
= chrp_init2
;
499 ppc_md
.phys_mem_access_prot
= pci_phys_mem_access_prot
;
501 ppc_md
.restart
= rtas_restart
;
502 ppc_md
.power_off
= rtas_power_off
;
503 ppc_md
.halt
= rtas_halt
;
505 ppc_md
.time_init
= chrp_time_init
;
506 ppc_md
.set_rtc_time
= chrp_set_rtc_time
;
507 ppc_md
.get_rtc_time
= chrp_get_rtc_time
;
508 ppc_md
.calibrate_decr
= chrp_calibrate_decr
;
511 smp_ops
= &chrp_smp_ops
;
512 #endif /* CONFIG_SMP */
515 #ifdef CONFIG_BOOTX_TEXT
517 btext_progress(char *s
, unsigned short hex
)
520 btext_drawstring("\n");
522 #endif /* CONFIG_BOOTX_TEXT */