2 * Copyright (c) 2000-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/dmapool.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/ioport.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <linux/errno.h>
28 #include <linux/init.h>
29 #include <linux/timer.h>
30 #include <linux/list.h>
31 #include <linux/interrupt.h>
32 #include <linux/reboot.h>
33 #include <linux/usb.h>
34 #include <linux/moduleparam.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/debugfs.h>
38 #include "../core/hcd.h"
40 #include <asm/byteorder.h>
43 #include <asm/system.h>
44 #include <asm/unaligned.h>
46 /*-------------------------------------------------------------------------*/
49 * EHCI hc_driver implementation ... experimental, incomplete.
50 * Based on the final 1.0 register interface specification.
52 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
53 * First was PCMCIA, like ISA; then CardBus, which is PCI.
54 * Next comes "CardBay", using USB 2.0 signals.
56 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
57 * Special thanks to Intel and VIA for providing host controllers to
58 * test this driver on, and Cypress (including In-System Design) for
59 * providing early devices for those host controllers to talk to!
62 #define DRIVER_VERSION "10 Dec 2004"
63 #define DRIVER_AUTHOR "David Brownell"
64 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
66 static const char hcd_name
[] = "ehci_hcd";
76 /* magic numbers that can affect system performance */
77 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
78 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
79 #define EHCI_TUNE_RL_TT 0
80 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
81 #define EHCI_TUNE_MULT_TT 1
82 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
84 #define EHCI_IAA_MSECS 10 /* arbitrary */
85 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
86 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
87 #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */
89 /* Initial IRQ latency: faster than hw default */
90 static int log2_irq_thresh
= 0; // 0 to 6
91 module_param (log2_irq_thresh
, int, S_IRUGO
);
92 MODULE_PARM_DESC (log2_irq_thresh
, "log2 IRQ latency, 1-64 microframes");
94 /* initial park setting: slower than hw default */
95 static unsigned park
= 0;
96 module_param (park
, uint
, S_IRUGO
);
97 MODULE_PARM_DESC (park
, "park setting; 1-3 back-to-back async packets");
99 /* for flakey hardware, ignore overcurrent indicators */
100 static int ignore_oc
= 0;
101 module_param (ignore_oc
, bool, S_IRUGO
);
102 MODULE_PARM_DESC (ignore_oc
, "ignore bogus hardware overcurrent indications");
104 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
106 /*-------------------------------------------------------------------------*/
109 #include "ehci-dbg.c"
111 /*-------------------------------------------------------------------------*/
114 * handshake - spin reading hc until handshake completes or fails
115 * @ptr: address of hc register to be read
116 * @mask: bits to look at in result of read
117 * @done: value of those bits when handshake succeeds
118 * @usec: timeout in microseconds
120 * Returns negative errno, or zero on success
122 * Success happens when the "mask" bits have the specified value (hardware
123 * handshake done). There are two failure modes: "usec" have passed (major
124 * hardware flakeout), or the register reads as all-ones (hardware removed).
126 * That last failure should_only happen in cases like physical cardbus eject
127 * before driver shutdown. But it also seems to be caused by bugs in cardbus
128 * bridge shutdown: shutting down the bridge before the devices using it.
130 static int handshake (struct ehci_hcd
*ehci
, void __iomem
*ptr
,
131 u32 mask
, u32 done
, int usec
)
136 result
= ehci_readl(ehci
, ptr
);
137 if (result
== ~(u32
)0) /* card removed */
148 static int handshake_on_error_set_halt(struct ehci_hcd
*ehci
, void __iomem
*ptr
,
149 u32 mask
, u32 done
, int usec
)
151 int error
= handshake(ehci
, ptr
, mask
, done
, usec
);
153 ehci_to_hcd(ehci
)->state
= HC_STATE_HALT
;
158 /* force HC to halt state from unknown (EHCI spec section 2.3) */
159 static int ehci_halt (struct ehci_hcd
*ehci
)
161 u32 temp
= ehci_readl(ehci
, &ehci
->regs
->status
);
163 /* disable any irqs left enabled by previous code */
164 ehci_writel(ehci
, 0, &ehci
->regs
->intr_enable
);
166 if ((temp
& STS_HALT
) != 0)
169 temp
= ehci_readl(ehci
, &ehci
->regs
->command
);
171 ehci_writel(ehci
, temp
, &ehci
->regs
->command
);
172 return handshake (ehci
, &ehci
->regs
->status
,
173 STS_HALT
, STS_HALT
, 16 * 125);
176 /* put TDI/ARC silicon into EHCI mode */
177 static void tdi_reset (struct ehci_hcd
*ehci
)
179 u32 __iomem
*reg_ptr
;
182 reg_ptr
= (u32 __iomem
*)(((u8 __iomem
*)ehci
->regs
) + USBMODE
);
183 tmp
= ehci_readl(ehci
, reg_ptr
);
184 tmp
|= USBMODE_CM_HC
;
185 /* The default byte access to MMR space is LE after
186 * controller reset. Set the required endian mode
187 * for transfer buffers to match the host microprocessor
189 if (ehci_big_endian_mmio(ehci
))
191 ehci_writel(ehci
, tmp
, reg_ptr
);
194 /* reset a non-running (STS_HALT == 1) controller */
195 static int ehci_reset (struct ehci_hcd
*ehci
)
198 u32 command
= ehci_readl(ehci
, &ehci
->regs
->command
);
200 command
|= CMD_RESET
;
201 dbg_cmd (ehci
, "reset", command
);
202 ehci_writel(ehci
, command
, &ehci
->regs
->command
);
203 ehci_to_hcd(ehci
)->state
= HC_STATE_HALT
;
204 ehci
->next_statechange
= jiffies
;
205 retval
= handshake (ehci
, &ehci
->regs
->command
,
206 CMD_RESET
, 0, 250 * 1000);
211 if (ehci_is_TDI(ehci
))
217 /* idle the controller (from running) */
218 static void ehci_quiesce (struct ehci_hcd
*ehci
)
223 if (!HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
))
227 /* wait for any schedule enables/disables to take effect */
228 temp
= ehci_readl(ehci
, &ehci
->regs
->command
) << 10;
229 temp
&= STS_ASS
| STS_PSS
;
230 if (handshake_on_error_set_halt(ehci
, &ehci
->regs
->status
,
231 STS_ASS
| STS_PSS
, temp
, 16 * 125))
234 /* then disable anything that's still active */
235 temp
= ehci_readl(ehci
, &ehci
->regs
->command
);
236 temp
&= ~(CMD_ASE
| CMD_IAAD
| CMD_PSE
);
237 ehci_writel(ehci
, temp
, &ehci
->regs
->command
);
239 /* hardware can take 16 microframes to turn off ... */
240 handshake_on_error_set_halt(ehci
, &ehci
->regs
->status
,
241 STS_ASS
| STS_PSS
, 0, 16 * 125);
244 /*-------------------------------------------------------------------------*/
246 static void end_unlink_async(struct ehci_hcd
*ehci
);
247 static void ehci_work(struct ehci_hcd
*ehci
);
249 #include "ehci-hub.c"
250 #include "ehci-mem.c"
252 #include "ehci-sched.c"
254 /*-------------------------------------------------------------------------*/
256 static void ehci_iaa_watchdog(unsigned long param
)
258 struct ehci_hcd
*ehci
= (struct ehci_hcd
*) param
;
261 spin_lock_irqsave (&ehci
->lock
, flags
);
263 /* Lost IAA irqs wedge things badly; seen first with a vt8235.
264 * So we need this watchdog, but must protect it against both
265 * (a) SMP races against real IAA firing and retriggering, and
266 * (b) clean HC shutdown, when IAA watchdog was pending.
269 && !timer_pending(&ehci
->iaa_watchdog
)
270 && HC_IS_RUNNING(ehci_to_hcd(ehci
)->state
)) {
273 /* If we get here, IAA is *REALLY* late. It's barely
274 * conceivable that the system is so busy that CMD_IAAD
275 * is still legitimately set, so let's be sure it's
276 * clear before we read STS_IAA. (The HC should clear
277 * CMD_IAAD when it sets STS_IAA.)
279 cmd
= ehci_readl(ehci
, &ehci
->regs
->command
);
281 ehci_writel(ehci
, cmd
& ~CMD_IAAD
,
282 &ehci
->regs
->command
);
284 /* If IAA is set here it either legitimately triggered
285 * before we cleared IAAD above (but _way_ late, so we'll
286 * still count it as lost) ... or a silicon erratum:
287 * - VIA seems to set IAA without triggering the IRQ;
288 * - IAAD potentially cleared without setting IAA.
290 status
= ehci_readl(ehci
, &ehci
->regs
->status
);
291 if ((status
& STS_IAA
) || !(cmd
& CMD_IAAD
)) {
292 COUNT (ehci
->stats
.lost_iaa
);
293 ehci_writel(ehci
, STS_IAA
, &ehci
->regs
->status
);
296 ehci_vdbg(ehci
, "IAA watchdog: status %x cmd %x\n",
298 end_unlink_async(ehci
);
301 spin_unlock_irqrestore(&ehci
->lock
, flags
);
304 static void ehci_watchdog(unsigned long param
)
306 struct ehci_hcd
*ehci
= (struct ehci_hcd
*) param
;
309 spin_lock_irqsave(&ehci
->lock
, flags
);
311 /* stop async processing after it's idled a bit */
312 if (test_bit (TIMER_ASYNC_OFF
, &ehci
->actions
))
313 start_unlink_async (ehci
, ehci
->async
);
315 /* ehci could run by timer, without IRQs ... */
318 spin_unlock_irqrestore (&ehci
->lock
, flags
);
321 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
322 * The firmware seems to think that powering off is a wakeup event!
323 * This routine turns off remote wakeup and everything else, on all ports.
325 static void ehci_turn_off_all_ports(struct ehci_hcd
*ehci
)
327 int port
= HCS_N_PORTS(ehci
->hcs_params
);
330 ehci_writel(ehci
, PORT_RWC_BITS
,
331 &ehci
->regs
->port_status
[port
]);
334 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
335 * This forcibly disables dma and IRQs, helping kexec and other cases
336 * where the next system software may expect clean state.
339 ehci_shutdown (struct usb_hcd
*hcd
)
341 struct ehci_hcd
*ehci
;
343 ehci
= hcd_to_ehci (hcd
);
344 (void) ehci_halt (ehci
);
345 ehci_turn_off_all_ports(ehci
);
347 /* make BIOS/etc use companion controller during reboot */
348 ehci_writel(ehci
, 0, &ehci
->regs
->configured_flag
);
350 /* unblock posted writes */
351 ehci_readl(ehci
, &ehci
->regs
->configured_flag
);
354 static void ehci_port_power (struct ehci_hcd
*ehci
, int is_on
)
358 if (!HCS_PPC (ehci
->hcs_params
))
361 ehci_dbg (ehci
, "...power%s ports...\n", is_on
? "up" : "down");
362 for (port
= HCS_N_PORTS (ehci
->hcs_params
); port
> 0; )
363 (void) ehci_hub_control(ehci_to_hcd(ehci
),
364 is_on
? SetPortFeature
: ClearPortFeature
,
367 /* Flush those writes */
368 ehci_readl(ehci
, &ehci
->regs
->command
);
372 /*-------------------------------------------------------------------------*/
375 * ehci_work is called from some interrupts, timers, and so on.
376 * it calls driver completion functions, after dropping ehci->lock.
378 static void ehci_work (struct ehci_hcd
*ehci
)
380 timer_action_done (ehci
, TIMER_IO_WATCHDOG
);
382 /* another CPU may drop ehci->lock during a schedule scan while
383 * it reports urb completions. this flag guards against bogus
384 * attempts at re-entrant schedule scanning.
390 if (ehci
->next_uframe
!= -1)
391 scan_periodic (ehci
);
394 /* the IO watchdog guards against hardware or driver bugs that
395 * misplace IRQs, and should let us run completely without IRQs.
396 * such lossage has been observed on both VT6202 and VT8235.
398 if (HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
) &&
399 (ehci
->async
->qh_next
.ptr
!= NULL
||
400 ehci
->periodic_sched
!= 0))
401 timer_action (ehci
, TIMER_IO_WATCHDOG
);
404 static void ehci_stop (struct usb_hcd
*hcd
)
406 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
408 ehci_dbg (ehci
, "stop\n");
410 /* Turn off port power on all root hub ports. */
411 ehci_port_power (ehci
, 0);
413 /* no more interrupts ... */
414 del_timer_sync (&ehci
->watchdog
);
415 del_timer_sync(&ehci
->iaa_watchdog
);
417 spin_lock_irq(&ehci
->lock
);
418 if (HC_IS_RUNNING (hcd
->state
))
422 ehci_writel(ehci
, 0, &ehci
->regs
->intr_enable
);
423 spin_unlock_irq(&ehci
->lock
);
425 /* let companion controllers work when we aren't */
426 ehci_writel(ehci
, 0, &ehci
->regs
->configured_flag
);
428 remove_companion_file(ehci
);
429 remove_debug_files (ehci
);
431 /* root hub is shut down separately (first, when possible) */
432 spin_lock_irq (&ehci
->lock
);
435 spin_unlock_irq (&ehci
->lock
);
436 ehci_mem_cleanup (ehci
);
439 ehci_dbg (ehci
, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
440 ehci
->stats
.normal
, ehci
->stats
.error
, ehci
->stats
.reclaim
,
441 ehci
->stats
.lost_iaa
);
442 ehci_dbg (ehci
, "complete %ld unlink %ld\n",
443 ehci
->stats
.complete
, ehci
->stats
.unlink
);
446 dbg_status (ehci
, "ehci_stop completed",
447 ehci_readl(ehci
, &ehci
->regs
->status
));
450 /* one-time init, only for memory state */
451 static int ehci_init(struct usb_hcd
*hcd
)
453 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
458 spin_lock_init(&ehci
->lock
);
460 init_timer(&ehci
->watchdog
);
461 ehci
->watchdog
.function
= ehci_watchdog
;
462 ehci
->watchdog
.data
= (unsigned long) ehci
;
464 init_timer(&ehci
->iaa_watchdog
);
465 ehci
->iaa_watchdog
.function
= ehci_iaa_watchdog
;
466 ehci
->iaa_watchdog
.data
= (unsigned long) ehci
;
469 * hw default: 1K periodic list heads, one per frame.
470 * periodic_size can shrink by USBCMD update if hcc_params allows.
472 ehci
->periodic_size
= DEFAULT_I_TDPS
;
473 if ((retval
= ehci_mem_init(ehci
, GFP_KERNEL
)) < 0)
476 /* controllers may cache some of the periodic schedule ... */
477 hcc_params
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
478 if (HCC_ISOC_CACHE(hcc_params
)) // full frame cache
480 else // N microframes cached
481 ehci
->i_thresh
= 2 + HCC_ISOC_THRES(hcc_params
);
483 ehci
->reclaim
= NULL
;
484 ehci
->next_uframe
= -1;
487 * dedicate a qh for the async ring head, since we couldn't unlink
488 * a 'real' qh without stopping the async schedule [4.8]. use it
489 * as the 'reclamation list head' too.
490 * its dummy is used in hw_alt_next of many tds, to prevent the qh
491 * from automatically advancing to the next td after short reads.
493 ehci
->async
->qh_next
.qh
= NULL
;
494 ehci
->async
->hw_next
= QH_NEXT(ehci
, ehci
->async
->qh_dma
);
495 ehci
->async
->hw_info1
= cpu_to_hc32(ehci
, QH_HEAD
);
496 ehci
->async
->hw_token
= cpu_to_hc32(ehci
, QTD_STS_HALT
);
497 ehci
->async
->hw_qtd_next
= EHCI_LIST_END(ehci
);
498 ehci
->async
->qh_state
= QH_STATE_LINKED
;
499 ehci
->async
->hw_alt_next
= QTD_NEXT(ehci
, ehci
->async
->dummy
->qtd_dma
);
501 /* clear interrupt enables, set irq latency */
502 if (log2_irq_thresh
< 0 || log2_irq_thresh
> 6)
504 temp
= 1 << (16 + log2_irq_thresh
);
505 if (HCC_CANPARK(hcc_params
)) {
506 /* HW default park == 3, on hardware that supports it (like
507 * NVidia and ALI silicon), maximizes throughput on the async
508 * schedule by avoiding QH fetches between transfers.
510 * With fast usb storage devices and NForce2, "park" seems to
511 * make problems: throughput reduction (!), data errors...
514 park
= min(park
, (unsigned) 3);
518 ehci_dbg(ehci
, "park %d\n", park
);
520 if (HCC_PGM_FRAMELISTLEN(hcc_params
)) {
521 /* periodic schedule size can be smaller than default */
523 temp
|= (EHCI_TUNE_FLS
<< 2);
524 switch (EHCI_TUNE_FLS
) {
525 case 0: ehci
->periodic_size
= 1024; break;
526 case 1: ehci
->periodic_size
= 512; break;
527 case 2: ehci
->periodic_size
= 256; break;
531 ehci
->command
= temp
;
536 /* start HC running; it's halted, ehci_init() has been run (once) */
537 static int ehci_run (struct usb_hcd
*hcd
)
539 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
544 hcd
->uses_new_polling
= 1;
547 /* EHCI spec section 4.1 */
548 if ((retval
= ehci_reset(ehci
)) != 0) {
549 ehci_mem_cleanup(ehci
);
552 ehci_writel(ehci
, ehci
->periodic_dma
, &ehci
->regs
->frame_list
);
553 ehci_writel(ehci
, (u32
)ehci
->async
->qh_dma
, &ehci
->regs
->async_next
);
556 * hcc_params controls whether ehci->regs->segment must (!!!)
557 * be used; it constrains QH/ITD/SITD and QTD locations.
558 * pci_pool consistent memory always uses segment zero.
559 * streaming mappings for I/O buffers, like pci_map_single(),
560 * can return segments above 4GB, if the device allows.
562 * NOTE: the dma mask is visible through dma_supported(), so
563 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
564 * Scsi_Host.highmem_io, and so forth. It's readonly to all
565 * host side drivers though.
567 hcc_params
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
568 if (HCC_64BIT_ADDR(hcc_params
)) {
569 ehci_writel(ehci
, 0, &ehci
->regs
->segment
);
571 // this is deeply broken on almost all architectures
572 if (!dma_set_mask(hcd
->self
.controller
, DMA_64BIT_MASK
))
573 ehci_info(ehci
, "enabled 64bit DMA\n");
578 // Philips, Intel, and maybe others need CMD_RUN before the
579 // root hub will detect new devices (why?); NEC doesn't
580 ehci
->command
&= ~(CMD_LRESET
|CMD_IAAD
|CMD_PSE
|CMD_ASE
|CMD_RESET
);
581 ehci
->command
|= CMD_RUN
;
582 ehci_writel(ehci
, ehci
->command
, &ehci
->regs
->command
);
583 dbg_cmd (ehci
, "init", ehci
->command
);
586 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
587 * are explicitly handed to companion controller(s), so no TT is
588 * involved with the root hub. (Except where one is integrated,
589 * and there's no companion controller unless maybe for USB OTG.)
591 * Turning on the CF flag will transfer ownership of all ports
592 * from the companions to the EHCI controller. If any of the
593 * companions are in the middle of a port reset at the time, it
594 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
595 * guarantees that no resets are in progress. After we set CF,
596 * a short delay lets the hardware catch up; new resets shouldn't
597 * be started before the port switching actions could complete.
599 down_write(&ehci_cf_port_reset_rwsem
);
600 hcd
->state
= HC_STATE_RUNNING
;
601 ehci_writel(ehci
, FLAG_CF
, &ehci
->regs
->configured_flag
);
602 ehci_readl(ehci
, &ehci
->regs
->command
); /* unblock posted writes */
604 up_write(&ehci_cf_port_reset_rwsem
);
606 temp
= HC_VERSION(ehci_readl(ehci
, &ehci
->caps
->hc_capbase
));
608 "USB %x.%x started, EHCI %x.%02x, driver %s%s\n",
609 ((ehci
->sbrn
& 0xf0)>>4), (ehci
->sbrn
& 0x0f),
610 temp
>> 8, temp
& 0xff, DRIVER_VERSION
,
611 ignore_oc
? ", overcurrent ignored" : "");
613 ehci_writel(ehci
, INTR_MASK
,
614 &ehci
->regs
->intr_enable
); /* Turn On Interrupts */
616 /* GRR this is run-once init(), being done every time the HC starts.
617 * So long as they're part of class devices, we can't do it init()
618 * since the class device isn't created that early.
620 create_debug_files(ehci
);
621 create_companion_file(ehci
);
626 /*-------------------------------------------------------------------------*/
628 static irqreturn_t
ehci_irq (struct usb_hcd
*hcd
)
630 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
631 u32 status
, pcd_status
= 0, cmd
;
634 spin_lock (&ehci
->lock
);
636 status
= ehci_readl(ehci
, &ehci
->regs
->status
);
638 /* e.g. cardbus physical eject */
639 if (status
== ~(u32
) 0) {
640 ehci_dbg (ehci
, "device removed\n");
645 if (!status
) { /* irq sharing? */
646 spin_unlock(&ehci
->lock
);
650 /* clear (just) interrupts */
651 ehci_writel(ehci
, status
, &ehci
->regs
->status
);
652 cmd
= ehci_readl(ehci
, &ehci
->regs
->command
);
656 /* unrequested/ignored: Frame List Rollover */
657 dbg_status (ehci
, "irq", status
);
660 /* INT, ERR, and IAA interrupt rates can be throttled */
662 /* normal [4.15.1.2] or error [4.15.1.1] completion */
663 if (likely ((status
& (STS_INT
|STS_ERR
)) != 0)) {
664 if (likely ((status
& STS_ERR
) == 0))
665 COUNT (ehci
->stats
.normal
);
667 COUNT (ehci
->stats
.error
);
671 /* complete the unlinking of some qh [4.15.2.3] */
672 if (status
& STS_IAA
) {
673 /* guard against (alleged) silicon errata */
674 if (cmd
& CMD_IAAD
) {
675 ehci_writel(ehci
, cmd
& ~CMD_IAAD
,
676 &ehci
->regs
->command
);
677 ehci_dbg(ehci
, "IAA with IAAD still set?\n");
680 COUNT(ehci
->stats
.reclaim
);
681 end_unlink_async(ehci
);
683 ehci_dbg(ehci
, "IAA with nothing to reclaim?\n");
686 /* remote wakeup [4.3.1] */
687 if (status
& STS_PCD
) {
688 unsigned i
= HCS_N_PORTS (ehci
->hcs_params
);
690 /* kick root hub later */
693 /* resume root hub? */
694 if (!(ehci_readl(ehci
, &ehci
->regs
->command
) & CMD_RUN
))
695 usb_hcd_resume_root_hub(hcd
);
698 int pstatus
= ehci_readl(ehci
,
699 &ehci
->regs
->port_status
[i
]);
701 if (pstatus
& PORT_OWNER
)
703 if (!(pstatus
& PORT_RESUME
)
704 || ehci
->reset_done
[i
] != 0)
707 /* start 20 msec resume signaling from this port,
708 * and make khubd collect PORT_STAT_C_SUSPEND to
709 * stop that signaling.
711 ehci
->reset_done
[i
] = jiffies
+ msecs_to_jiffies (20);
712 ehci_dbg (ehci
, "port %d remote wakeup\n", i
+ 1);
713 mod_timer(&hcd
->rh_timer
, ehci
->reset_done
[i
]);
717 /* PCI errors [4.15.2.4] */
718 if (unlikely ((status
& STS_FATAL
) != 0)) {
719 dbg_cmd (ehci
, "fatal", ehci_readl(ehci
,
720 &ehci
->regs
->command
));
721 dbg_status (ehci
, "fatal", status
);
722 if (status
& STS_HALT
) {
723 ehci_err (ehci
, "fatal error\n");
726 ehci_writel(ehci
, 0, &ehci
->regs
->configured_flag
);
727 /* generic layer kills/unlinks all urbs, then
728 * uses ehci_stop to clean up the rest
736 spin_unlock (&ehci
->lock
);
738 usb_hcd_poll_rh_status(hcd
);
742 /*-------------------------------------------------------------------------*/
745 * non-error returns are a promise to giveback() the urb later
746 * we drop ownership so next owner (or urb unlink) can get it
748 * urb + dev is in hcd.self.controller.urb_list
749 * we're queueing TDs onto software and hardware lists
751 * hcd-specific init for hcpriv hasn't been done yet
753 * NOTE: control, bulk, and interrupt share the same code to append TDs
754 * to a (possibly active) QH, and the same QH scanning code.
756 static int ehci_urb_enqueue (
761 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
762 struct list_head qtd_list
;
764 INIT_LIST_HEAD (&qtd_list
);
766 switch (usb_pipetype (urb
->pipe
)) {
768 /* qh_completions() code doesn't handle all the fault cases
769 * in multi-TD control transfers. Even 1KB is rare anyway.
771 if (urb
->transfer_buffer_length
> (16 * 1024))
774 /* case PIPE_BULK: */
776 if (!qh_urb_transaction (ehci
, urb
, &qtd_list
, mem_flags
))
778 return submit_async(ehci
, urb
, &qtd_list
, mem_flags
);
781 if (!qh_urb_transaction (ehci
, urb
, &qtd_list
, mem_flags
))
783 return intr_submit(ehci
, urb
, &qtd_list
, mem_flags
);
785 case PIPE_ISOCHRONOUS
:
786 if (urb
->dev
->speed
== USB_SPEED_HIGH
)
787 return itd_submit (ehci
, urb
, mem_flags
);
789 return sitd_submit (ehci
, urb
, mem_flags
);
793 static void unlink_async (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
796 if (!HC_IS_RUNNING(ehci_to_hcd(ehci
)->state
) && ehci
->reclaim
)
797 end_unlink_async(ehci
);
799 /* if it's not linked then there's nothing to do */
800 if (qh
->qh_state
!= QH_STATE_LINKED
)
803 /* defer till later if busy */
804 else if (ehci
->reclaim
) {
805 struct ehci_qh
*last
;
807 for (last
= ehci
->reclaim
;
809 last
= last
->reclaim
)
811 qh
->qh_state
= QH_STATE_UNLINK_WAIT
;
814 /* start IAA cycle */
816 start_unlink_async (ehci
, qh
);
819 /* remove from hardware lists
820 * completions normally happen asynchronously
823 static int ehci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
825 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
830 spin_lock_irqsave (&ehci
->lock
, flags
);
831 rc
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
835 switch (usb_pipetype (urb
->pipe
)) {
836 // case PIPE_CONTROL:
839 qh
= (struct ehci_qh
*) urb
->hcpriv
;
842 switch (qh
->qh_state
) {
843 case QH_STATE_LINKED
:
844 case QH_STATE_COMPLETING
:
845 unlink_async(ehci
, qh
);
847 case QH_STATE_UNLINK
:
848 case QH_STATE_UNLINK_WAIT
:
849 /* already started */
858 qh
= (struct ehci_qh
*) urb
->hcpriv
;
861 switch (qh
->qh_state
) {
862 case QH_STATE_LINKED
:
863 intr_deschedule (ehci
, qh
);
866 qh_completions (ehci
, qh
);
869 ehci_dbg (ehci
, "bogus qh %p state %d\n",
874 /* reschedule QH iff another request is queued */
875 if (!list_empty (&qh
->qtd_list
)
876 && HC_IS_RUNNING (hcd
->state
)) {
877 rc
= qh_schedule(ehci
, qh
);
879 /* An error here likely indicates handshake failure
880 * or no space left in the schedule. Neither fault
881 * should happen often ...
883 * FIXME kill the now-dysfunctional queued urbs
887 "can't reschedule qh %p, err %d",
892 case PIPE_ISOCHRONOUS
:
895 // wait till next completion, do it then.
896 // completion irqs can wait up to 1024 msec,
900 spin_unlock_irqrestore (&ehci
->lock
, flags
);
904 /*-------------------------------------------------------------------------*/
906 // bulk qh holds the data toggle
909 ehci_endpoint_disable (struct usb_hcd
*hcd
, struct usb_host_endpoint
*ep
)
911 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
913 struct ehci_qh
*qh
, *tmp
;
915 /* ASSERT: any requests/urbs are being unlinked */
916 /* ASSERT: nobody can be submitting urbs for this any more */
919 spin_lock_irqsave (&ehci
->lock
, flags
);
924 /* endpoints can be iso streams. for now, we don't
925 * accelerate iso completions ... so spin a while.
927 if (qh
->hw_info1
== 0) {
928 ehci_vdbg (ehci
, "iso delay\n");
932 if (!HC_IS_RUNNING (hcd
->state
))
933 qh
->qh_state
= QH_STATE_IDLE
;
934 switch (qh
->qh_state
) {
935 case QH_STATE_LINKED
:
936 for (tmp
= ehci
->async
->qh_next
.qh
;
938 tmp
= tmp
->qh_next
.qh
)
940 /* periodic qh self-unlinks on empty */
943 unlink_async (ehci
, qh
);
945 case QH_STATE_UNLINK
: /* wait for hw to finish? */
946 case QH_STATE_UNLINK_WAIT
:
948 spin_unlock_irqrestore (&ehci
->lock
, flags
);
949 schedule_timeout_uninterruptible(1);
951 case QH_STATE_IDLE
: /* fully unlinked */
952 if (list_empty (&qh
->qtd_list
)) {
956 /* else FALL THROUGH */
959 /* caller was supposed to have unlinked any requests;
960 * that's not our job. just leak this memory.
962 ehci_err (ehci
, "qh %p (#%02x) state %d%s\n",
963 qh
, ep
->desc
.bEndpointAddress
, qh
->qh_state
,
964 list_empty (&qh
->qtd_list
) ? "" : "(has tds)");
969 spin_unlock_irqrestore (&ehci
->lock
, flags
);
973 static int ehci_get_frame (struct usb_hcd
*hcd
)
975 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
976 return (ehci_readl(ehci
, &ehci
->regs
->frame_index
) >> 3) %
980 /*-------------------------------------------------------------------------*/
982 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
984 MODULE_DESCRIPTION (DRIVER_INFO
);
985 MODULE_AUTHOR (DRIVER_AUTHOR
);
986 MODULE_LICENSE ("GPL");
989 #include "ehci-pci.c"
990 #define PCI_DRIVER ehci_pci_driver
993 #ifdef CONFIG_USB_EHCI_FSL
994 #include "ehci-fsl.c"
995 #define PLATFORM_DRIVER ehci_fsl_driver
998 #ifdef CONFIG_SOC_AU1200
999 #include "ehci-au1xxx.c"
1000 #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver
1003 #ifdef CONFIG_PPC_PS3
1004 #include "ehci-ps3.c"
1005 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver
1008 #if defined(CONFIG_440EPX) && !defined(CONFIG_PPC_MERGE)
1009 #include "ehci-ppc-soc.c"
1010 #define PLATFORM_DRIVER ehci_ppc_soc_driver
1013 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1014 #include "ehci-ppc-of.c"
1015 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver
1018 #ifdef CONFIG_PLAT_ORION
1019 #include "ehci-orion.c"
1020 #define PLATFORM_DRIVER ehci_orion_driver
1023 #ifdef CONFIG_ARCH_IXP4XX
1024 #include "ehci-ixp4xx.c"
1025 #define PLATFORM_DRIVER ixp4xx_ehci_driver
1028 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1029 !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
1030 #error "missing bus glue for ehci-hcd"
1033 static int __init
ehci_hcd_init(void)
1037 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1039 sizeof(struct ehci_qh
), sizeof(struct ehci_qtd
),
1040 sizeof(struct ehci_itd
), sizeof(struct ehci_sitd
));
1043 ehci_debug_root
= debugfs_create_dir("ehci", NULL
);
1044 if (!ehci_debug_root
)
1048 #ifdef PLATFORM_DRIVER
1049 retval
= platform_driver_register(&PLATFORM_DRIVER
);
1055 retval
= pci_register_driver(&PCI_DRIVER
);
1060 #ifdef PS3_SYSTEM_BUS_DRIVER
1061 retval
= ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER
);
1066 #ifdef OF_PLATFORM_DRIVER
1067 retval
= of_register_platform_driver(&OF_PLATFORM_DRIVER
);
1073 #ifdef OF_PLATFORM_DRIVER
1074 /* of_unregister_platform_driver(&OF_PLATFORM_DRIVER); */
1077 #ifdef PS3_SYSTEM_BUS_DRIVER
1078 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER
);
1082 pci_unregister_driver(&PCI_DRIVER
);
1085 #ifdef PLATFORM_DRIVER
1086 platform_driver_unregister(&PLATFORM_DRIVER
);
1090 debugfs_remove(ehci_debug_root
);
1091 ehci_debug_root
= NULL
;
1095 module_init(ehci_hcd_init
);
1097 static void __exit
ehci_hcd_cleanup(void)
1099 #ifdef OF_PLATFORM_DRIVER
1100 of_unregister_platform_driver(&OF_PLATFORM_DRIVER
);
1102 #ifdef PLATFORM_DRIVER
1103 platform_driver_unregister(&PLATFORM_DRIVER
);
1106 pci_unregister_driver(&PCI_DRIVER
);
1108 #ifdef PS3_SYSTEM_BUS_DRIVER
1109 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER
);
1112 debugfs_remove(ehci_debug_root
);
1115 module_exit(ehci_hcd_cleanup
);