arch/x86/include/asm/pgtable_32.h

   1 #ifndef _ASM_X86_PGTABLE_32_H
   2 #define _ASM_X86_PGTABLE_32_H
   3
   4
   5 /*
   6  * The Linux memory management assumes a three-level page table setup. On
   7  * the i386, we use that, but "fold" the mid level into the top-level page
   8  * table, so that we physically have the same two-level page table as the
   9  * i386 mmu expects.
  10  *
  11  * This file contains the functions and defines necessary to modify and use
  12  * the i386 page table tree.
  13  */
  14 #ifndef __ASSEMBLY__
  15 #include <asm/processor.h>
  16 #include <asm/fixmap.h>
  17 #include <linux/threads.h>
  18 #include <asm/paravirt.h>
  19
  20 #include <linux/bitops.h>
  21 #include <linux/slab.h>
  22 #include <linux/list.h>
  23 #include <linux/spinlock.h>
  24
  25 struct mm_struct;
  26 struct vm_area_struct;
  27
  28 extern pgd_t swapper_pg_dir[1024];
  29
  30 static inline void pgtable_cache_init(void) { }
  31 static inline void check_pgt_cache(void) { }
  32 void paging_init(void);
  33
  34 extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);
  35
  36 /*
  37  * The Linux x86 paging architecture is 'compile-time dual-mode', it
  38  * implements both the traditional 2-level x86 page tables and the
  39  * newer 3-level PAE-mode page tables.
  40  */
  41 #ifdef CONFIG_X86_PAE
  42 # include <asm/pgtable-3level-defs.h>
  43 # define PMD_SIZE       (1UL << PMD_SHIFT)
  44 # define PMD_MASK       (~(PMD_SIZE - 1))
  45 #else
  46 # include <asm/pgtable-2level-defs.h>
  47 #endif
  48
  49 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
  50 #define PGDIR_MASK      (~(PGDIR_SIZE - 1))
  51
  52 /* Just any arbitrary offset to the start of the vmalloc VM area: the
  53  * current 8MB value just means that there will be a 8MB "hole" after the
  54  * physical memory until the kernel virtual memory starts.  That means that
  55  * any out-of-bounds memory accesses will hopefully be caught.
  56  * The vmalloc() routines leaves a hole of 4kB between each vmalloced
  57  * area for the same reason. ;)
  58  */
  59 #define VMALLOC_OFFSET  (8 * 1024 * 1024)
  60 #define VMALLOC_START   ((unsigned long)high_memory + VMALLOC_OFFSET)
  61 #ifdef CONFIG_X86_PAE
  62 #define LAST_PKMAP 512
  63 #else
  64 #define LAST_PKMAP 1024
  65 #endif
  66
  67 #define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \
  68                     & PMD_MASK)
  69
  70 #ifdef CONFIG_HIGHMEM
  71 # define VMALLOC_END    (PKMAP_BASE - 2 * PAGE_SIZE)
  72 #else
  73 # define VMALLOC_END    (FIXADDR_START - 2 * PAGE_SIZE)
  74 #endif
  75
  76 #define MAXMEM  (VMALLOC_END - PAGE_OFFSET - __VMALLOC_RESERVE)
  77
  78 /*
  79  * Define this if things work differently on an i386 and an i486:
  80  * it will (on an i486) warn about kernel memory accesses that are
  81  * done without a 'access_ok(VERIFY_WRITE,..)'
  82  */
  83 #undef TEST_ACCESS_OK
  84
  85 /* The boot page tables (all created as a single array) */
  86 extern unsigned long pg0[];
  87
  88 #define pmd_bad(x) ((pmd_val(x) & (PTE_FLAGS_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
  89
  90 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
  91
  92 #ifdef CONFIG_X86_PAE
  93 # include <asm/pgtable-3level.h>
  94 #else
  95 # include <asm/pgtable-2level.h>
  96 #endif
  97
  98 /*
  99  * Conversion functions: convert a page and protection to a page entry,
 100  * and a page entry and page directory to the page they refer to.
 101  */
 102 #define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
 103
 104
 105 static inline int pud_large(pud_t pud) { return 0; }
 106
 107 /*
 108  * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
 109  *
 110  * this macro returns the index of the entry in the pmd page which would
 111  * control the given virtual address
 112  */
 113 #define pmd_index(address)                              \
 114         (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
 115
 116 /*
 117  * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
 118  *
 119  * this macro returns the index of the entry in the pte page which would
 120  * control the given virtual address
 121  */
 122 #define pte_index(address)                                      \
 123         (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 124 #define pte_offset_kernel(dir, address)                         \
 125         ((pte_t *)pmd_page_vaddr(*(dir)) +  pte_index((address)))
 126
 127 #if defined(CONFIG_HIGHPTE)
 128 #define pte_offset_map(dir, address)                                    \
 129         ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE0) +          \
 130          pte_index((address)))
 131 #define pte_offset_map_nested(dir, address)                             \
 132         ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE1) +          \
 133          pte_index((address)))
 134 #define pte_unmap(pte) kunmap_atomic((pte), KM_PTE0)
 135 #define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
 136 #else
 137 #define pte_offset_map(dir, address)                                    \
 138         ((pte_t *)page_address(pmd_page(*(dir))) + pte_index((address)))
 139 #define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
 140 #define pte_unmap(pte) do { } while (0)
 141 #define pte_unmap_nested(pte) do { } while (0)
 142 #endif
 143
 144 /* Clear a kernel PTE and flush it from the TLB */
 145 #define kpte_clear_flush(ptep, vaddr)           \
 146 do {                                            \
 147         pte_clear(&init_mm, (vaddr), (ptep));   \
 148         __flush_tlb_one((vaddr));               \
 149 } while (0)
 150
 151 /*
 152  * The i386 doesn't have any external MMU info: the kernel page
 153  * tables contain all the necessary information.
 154  */
 155 #define update_mmu_cache(vma, address, pte) do { } while (0)
 156
 157 #endif /* !__ASSEMBLY__ */
 158
 159 /*
 160  * kern_addr_valid() is (1) for FLATMEM and (0) for
 161  * SPARSEMEM and DISCONTIGMEM
 162  */
 163 #ifdef CONFIG_FLATMEM
 164 #define kern_addr_valid(addr)   (1)
 165 #else
 166 #define kern_addr_valid(kaddr)  (0)
 167 #endif
 168
 169 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
 170         remap_pfn_range(vma, vaddr, pfn, size, prot)
 171
 172 #endif /* _ASM_X86_PGTABLE_32_H */