intel-iommu: Clean up handling of "caching mode" vs. IOTLB flushing.
[linux-2.6/linux-2.6-openrd.git] / sound / aoa / codecs / tas.h
blobae177e3466e6db229f9ea05969ec99b4be9c78c9
1 /*
2 * Apple Onboard Audio driver for tas codec (header)
4 * Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
6 * GPL v2, can be found in COPYING.
7 */
8 #ifndef __SND_AOA_CODECTASH
9 #define __SND_AOA_CODECTASH
11 #define TAS_REG_MCS 0x01 /* main control */
12 # define TAS_MCS_FASTLOAD (1<<7)
13 # define TAS_MCS_SCLK64 (1<<6)
14 # define TAS_MCS_SPORT_MODE_MASK (3<<4)
15 # define TAS_MCS_SPORT_MODE_I2S (2<<4)
16 # define TAS_MCS_SPORT_MODE_RJ (1<<4)
17 # define TAS_MCS_SPORT_MODE_LJ (0<<4)
18 # define TAS_MCS_SPORT_WL_MASK (3<<0)
19 # define TAS_MCS_SPORT_WL_16BIT (0<<0)
20 # define TAS_MCS_SPORT_WL_18BIT (1<<0)
21 # define TAS_MCS_SPORT_WL_20BIT (2<<0)
22 # define TAS_MCS_SPORT_WL_24BIT (3<<0)
24 #define TAS_REG_DRC 0x02
25 #define TAS_REG_VOL 0x04
26 #define TAS_REG_TREBLE 0x05
27 #define TAS_REG_BASS 0x06
28 #define TAS_REG_LMIX 0x07
29 #define TAS_REG_RMIX 0x08
31 #define TAS_REG_ACR 0x40 /* analog control */
32 # define TAS_ACR_B_MONAUREAL (1<<7)
33 # define TAS_ACR_B_MON_SEL_RIGHT (1<<6)
34 # define TAS_ACR_DEEMPH_MASK (3<<2)
35 # define TAS_ACR_DEEMPH_OFF (0<<2)
36 # define TAS_ACR_DEEMPH_48KHz (1<<2)
37 # define TAS_ACR_DEEMPH_44KHz (2<<2)
38 # define TAS_ACR_INPUT_B (1<<1)
39 # define TAS_ACR_ANALOG_PDOWN (1<<0)
41 #define TAS_REG_MCS2 0x43 /* main control 2 */
42 # define TAS_MCS2_ALLPASS (1<<1)
44 #define TAS_REG_LEFT_BIQUAD6 0x10
45 #define TAS_REG_RIGHT_BIQUAD6 0x19
47 #define TAS_REG_LEFT_LOUDNESS 0x21
48 #define TAS_REG_RIGHT_LOUDNESS 0x22
49 #define TAS_REG_LEFT_LOUDNESS_GAIN 0x23
50 #define TAS_REG_RIGHT_LOUDNESS_GAIN 0x24
52 #define TAS3001_DRC_MAX 0x5f
53 #define TAS3004_DRC_MAX 0xef
55 #endif /* __SND_AOA_CODECTASH */