2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <trace/events/kvm.h>
42 #undef TRACE_INCLUDE_FILE
43 #define CREATE_TRACE_POINTS
46 #include <asm/debugreg.h>
47 #include <asm/uaccess.h>
53 #define MAX_IO_MSRS 256
54 #define CR0_RESERVED_BITS \
55 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
56 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
57 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
58 #define CR4_RESERVED_BITS \
59 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
60 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
61 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
62 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
64 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
66 #define KVM_MAX_MCE_BANKS 32
67 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
70 * - enable syscall per default because its emulated by KVM
71 * - enable LME and LMA per default on 64 bit KVM
74 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
76 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
79 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
80 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
82 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
83 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
84 struct kvm_cpuid_entry2 __user
*entries
);
86 struct kvm_x86_ops
*kvm_x86_ops
;
87 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
90 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
92 #define KVM_NR_SHARED_MSRS 16
94 struct kvm_shared_msrs_global
{
96 struct kvm_shared_msr
{
99 } msrs
[KVM_NR_SHARED_MSRS
];
102 struct kvm_shared_msrs
{
103 struct user_return_notifier urn
;
105 u64 current_value
[KVM_NR_SHARED_MSRS
];
108 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
109 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
111 struct kvm_stats_debugfs_item debugfs_entries
[] = {
112 { "pf_fixed", VCPU_STAT(pf_fixed
) },
113 { "pf_guest", VCPU_STAT(pf_guest
) },
114 { "tlb_flush", VCPU_STAT(tlb_flush
) },
115 { "invlpg", VCPU_STAT(invlpg
) },
116 { "exits", VCPU_STAT(exits
) },
117 { "io_exits", VCPU_STAT(io_exits
) },
118 { "mmio_exits", VCPU_STAT(mmio_exits
) },
119 { "signal_exits", VCPU_STAT(signal_exits
) },
120 { "irq_window", VCPU_STAT(irq_window_exits
) },
121 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
122 { "halt_exits", VCPU_STAT(halt_exits
) },
123 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
124 { "hypercalls", VCPU_STAT(hypercalls
) },
125 { "request_irq", VCPU_STAT(request_irq_exits
) },
126 { "irq_exits", VCPU_STAT(irq_exits
) },
127 { "host_state_reload", VCPU_STAT(host_state_reload
) },
128 { "efer_reload", VCPU_STAT(efer_reload
) },
129 { "fpu_reload", VCPU_STAT(fpu_reload
) },
130 { "insn_emulation", VCPU_STAT(insn_emulation
) },
131 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
132 { "irq_injections", VCPU_STAT(irq_injections
) },
133 { "nmi_injections", VCPU_STAT(nmi_injections
) },
134 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
135 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
136 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
137 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
138 { "mmu_flooded", VM_STAT(mmu_flooded
) },
139 { "mmu_recycled", VM_STAT(mmu_recycled
) },
140 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
141 { "mmu_unsync", VM_STAT(mmu_unsync
) },
142 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
143 { "largepages", VM_STAT(lpages
) },
147 static void kvm_on_user_return(struct user_return_notifier
*urn
)
150 struct kvm_shared_msr
*global
;
151 struct kvm_shared_msrs
*locals
152 = container_of(urn
, struct kvm_shared_msrs
, urn
);
154 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
155 global
= &shared_msrs_global
.msrs
[slot
];
156 if (global
->value
!= locals
->current_value
[slot
]) {
157 wrmsrl(global
->msr
, global
->value
);
158 locals
->current_value
[slot
] = global
->value
;
161 locals
->registered
= false;
162 user_return_notifier_unregister(urn
);
165 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
170 if (slot
>= shared_msrs_global
.nr
)
171 shared_msrs_global
.nr
= slot
+ 1;
172 shared_msrs_global
.msrs
[slot
].msr
= msr
;
173 rdmsrl_safe(msr
, &value
);
174 shared_msrs_global
.msrs
[slot
].value
= value
;
175 for_each_online_cpu(cpu
)
176 per_cpu(shared_msrs
, cpu
).current_value
[slot
] = value
;
178 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
180 static void kvm_shared_msr_cpu_online(void)
183 struct kvm_shared_msrs
*locals
= &__get_cpu_var(shared_msrs
);
185 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
186 locals
->current_value
[i
] = shared_msrs_global
.msrs
[i
].value
;
189 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
191 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
193 if (((value
^ smsr
->current_value
[slot
]) & mask
) == 0)
195 smsr
->current_value
[slot
] = value
;
196 wrmsrl(shared_msrs_global
.msrs
[slot
].msr
, value
);
197 if (!smsr
->registered
) {
198 smsr
->urn
.on_user_return
= kvm_on_user_return
;
199 user_return_notifier_register(&smsr
->urn
);
200 smsr
->registered
= true;
203 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
205 static void drop_user_return_notifiers(void *ignore
)
207 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
209 if (smsr
->registered
)
210 kvm_on_user_return(&smsr
->urn
);
213 unsigned long segment_base(u16 selector
)
215 struct descriptor_table gdt
;
216 struct desc_struct
*d
;
217 unsigned long table_base
;
224 table_base
= gdt
.base
;
226 if (selector
& 4) { /* from ldt */
227 u16 ldt_selector
= kvm_read_ldt();
229 table_base
= segment_base(ldt_selector
);
231 d
= (struct desc_struct
*)(table_base
+ (selector
& ~7));
232 v
= get_desc_base(d
);
234 if (d
->s
== 0 && (d
->type
== 2 || d
->type
== 9 || d
->type
== 11))
235 v
|= ((unsigned long)((struct ldttss_desc64
*)d
)->base3
) << 32;
239 EXPORT_SYMBOL_GPL(segment_base
);
241 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
243 if (irqchip_in_kernel(vcpu
->kvm
))
244 return vcpu
->arch
.apic_base
;
246 return vcpu
->arch
.apic_base
;
248 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
250 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
252 /* TODO: reserve bits check */
253 if (irqchip_in_kernel(vcpu
->kvm
))
254 kvm_lapic_set_base(vcpu
, data
);
256 vcpu
->arch
.apic_base
= data
;
258 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
260 #define EXCPT_BENIGN 0
261 #define EXCPT_CONTRIBUTORY 1
264 static int exception_class(int vector
)
274 return EXCPT_CONTRIBUTORY
;
281 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
282 unsigned nr
, bool has_error
, u32 error_code
)
287 if (!vcpu
->arch
.exception
.pending
) {
289 vcpu
->arch
.exception
.pending
= true;
290 vcpu
->arch
.exception
.has_error_code
= has_error
;
291 vcpu
->arch
.exception
.nr
= nr
;
292 vcpu
->arch
.exception
.error_code
= error_code
;
296 /* to check exception */
297 prev_nr
= vcpu
->arch
.exception
.nr
;
298 if (prev_nr
== DF_VECTOR
) {
299 /* triple fault -> shutdown */
300 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
303 class1
= exception_class(prev_nr
);
304 class2
= exception_class(nr
);
305 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
306 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
307 /* generate double fault per SDM Table 5-5 */
308 vcpu
->arch
.exception
.pending
= true;
309 vcpu
->arch
.exception
.has_error_code
= true;
310 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
311 vcpu
->arch
.exception
.error_code
= 0;
313 /* replace previous exception with a new one in a hope
314 that instruction re-execution will regenerate lost
319 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
321 kvm_multiple_exception(vcpu
, nr
, false, 0);
323 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
325 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, unsigned long addr
,
328 ++vcpu
->stat
.pf_guest
;
329 vcpu
->arch
.cr2
= addr
;
330 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
333 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
335 vcpu
->arch
.nmi_pending
= 1;
337 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
339 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
341 kvm_multiple_exception(vcpu
, nr
, true, error_code
);
343 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
346 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
347 * a #GP and return false.
349 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
351 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
353 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
356 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
359 * Load the pae pdptrs. Return true is they are all valid.
361 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
363 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
364 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
367 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
369 ret
= kvm_read_guest_page(vcpu
->kvm
, pdpt_gfn
, pdpte
,
370 offset
* sizeof(u64
), sizeof(pdpte
));
375 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
376 if (is_present_gpte(pdpte
[i
]) &&
377 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
384 memcpy(vcpu
->arch
.pdptrs
, pdpte
, sizeof(vcpu
->arch
.pdptrs
));
385 __set_bit(VCPU_EXREG_PDPTR
,
386 (unsigned long *)&vcpu
->arch
.regs_avail
);
387 __set_bit(VCPU_EXREG_PDPTR
,
388 (unsigned long *)&vcpu
->arch
.regs_dirty
);
393 EXPORT_SYMBOL_GPL(load_pdptrs
);
395 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
397 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
401 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
404 if (!test_bit(VCPU_EXREG_PDPTR
,
405 (unsigned long *)&vcpu
->arch
.regs_avail
))
408 r
= kvm_read_guest(vcpu
->kvm
, vcpu
->arch
.cr3
& ~31u, pdpte
, sizeof(pdpte
));
411 changed
= memcmp(pdpte
, vcpu
->arch
.pdptrs
, sizeof(pdpte
)) != 0;
417 void kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
419 if (cr0
& CR0_RESERVED_BITS
) {
420 printk(KERN_DEBUG
"set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
421 cr0
, vcpu
->arch
.cr0
);
422 kvm_inject_gp(vcpu
, 0);
426 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
)) {
427 printk(KERN_DEBUG
"set_cr0: #GP, CD == 0 && NW == 1\n");
428 kvm_inject_gp(vcpu
, 0);
432 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
)) {
433 printk(KERN_DEBUG
"set_cr0: #GP, set PG flag "
434 "and a clear PE flag\n");
435 kvm_inject_gp(vcpu
, 0);
439 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
441 if ((vcpu
->arch
.shadow_efer
& EFER_LME
)) {
445 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
446 "in long mode while PAE is disabled\n");
447 kvm_inject_gp(vcpu
, 0);
450 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
452 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
453 "in long mode while CS.L == 1\n");
454 kvm_inject_gp(vcpu
, 0);
460 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
461 printk(KERN_DEBUG
"set_cr0: #GP, pdptrs "
463 kvm_inject_gp(vcpu
, 0);
469 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
470 vcpu
->arch
.cr0
= cr0
;
472 kvm_mmu_reset_context(vcpu
);
475 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
477 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
479 kvm_set_cr0(vcpu
, (vcpu
->arch
.cr0
& ~0x0ful
) | (msw
& 0x0f));
481 EXPORT_SYMBOL_GPL(kvm_lmsw
);
483 void kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
485 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
486 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
488 if (cr4
& CR4_RESERVED_BITS
) {
489 printk(KERN_DEBUG
"set_cr4: #GP, reserved bits\n");
490 kvm_inject_gp(vcpu
, 0);
494 if (is_long_mode(vcpu
)) {
495 if (!(cr4
& X86_CR4_PAE
)) {
496 printk(KERN_DEBUG
"set_cr4: #GP, clearing PAE while "
498 kvm_inject_gp(vcpu
, 0);
501 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
502 && ((cr4
^ old_cr4
) & pdptr_bits
)
503 && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
504 printk(KERN_DEBUG
"set_cr4: #GP, pdptrs reserved bits\n");
505 kvm_inject_gp(vcpu
, 0);
509 if (cr4
& X86_CR4_VMXE
) {
510 printk(KERN_DEBUG
"set_cr4: #GP, setting VMXE\n");
511 kvm_inject_gp(vcpu
, 0);
514 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
515 vcpu
->arch
.cr4
= cr4
;
516 vcpu
->arch
.mmu
.base_role
.cr4_pge
= (cr4
& X86_CR4_PGE
) && !tdp_enabled
;
517 kvm_mmu_reset_context(vcpu
);
519 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
521 void kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
523 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
524 kvm_mmu_sync_roots(vcpu
);
525 kvm_mmu_flush_tlb(vcpu
);
529 if (is_long_mode(vcpu
)) {
530 if (cr3
& CR3_L_MODE_RESERVED_BITS
) {
531 printk(KERN_DEBUG
"set_cr3: #GP, reserved bits\n");
532 kvm_inject_gp(vcpu
, 0);
537 if (cr3
& CR3_PAE_RESERVED_BITS
) {
539 "set_cr3: #GP, reserved bits\n");
540 kvm_inject_gp(vcpu
, 0);
543 if (is_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
)) {
544 printk(KERN_DEBUG
"set_cr3: #GP, pdptrs "
546 kvm_inject_gp(vcpu
, 0);
551 * We don't check reserved bits in nonpae mode, because
552 * this isn't enforced, and VMware depends on this.
557 * Does the new cr3 value map to physical memory? (Note, we
558 * catch an invalid cr3 even in real-mode, because it would
559 * cause trouble later on when we turn on paging anyway.)
561 * A real CPU would silently accept an invalid cr3 and would
562 * attempt to use it - with largely undefined (and often hard
563 * to debug) behavior on the guest side.
565 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
566 kvm_inject_gp(vcpu
, 0);
568 vcpu
->arch
.cr3
= cr3
;
569 vcpu
->arch
.mmu
.new_cr3(vcpu
);
572 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
574 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
576 if (cr8
& CR8_RESERVED_BITS
) {
577 printk(KERN_DEBUG
"set_cr8: #GP, reserved bits 0x%lx\n", cr8
);
578 kvm_inject_gp(vcpu
, 0);
581 if (irqchip_in_kernel(vcpu
->kvm
))
582 kvm_lapic_set_tpr(vcpu
, cr8
);
584 vcpu
->arch
.cr8
= cr8
;
586 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
588 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
590 if (irqchip_in_kernel(vcpu
->kvm
))
591 return kvm_lapic_get_cr8(vcpu
);
593 return vcpu
->arch
.cr8
;
595 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
597 static inline u32
bit(int bitno
)
599 return 1 << (bitno
& 31);
603 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
604 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
606 * This list is modified at module load time to reflect the
607 * capabilities of the host cpu. This capabilities test skips MSRs that are
608 * kvm-specific. Those are put in the beginning of the list.
611 #define KVM_SAVE_MSRS_BEGIN 2
612 static u32 msrs_to_save
[] = {
613 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
614 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
617 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
619 MSR_IA32_TSC
, MSR_IA32_PERF_STATUS
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
622 static unsigned num_msrs_to_save
;
624 static u32 emulated_msrs
[] = {
625 MSR_IA32_MISC_ENABLE
,
628 static void set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
630 if (efer
& efer_reserved_bits
) {
631 printk(KERN_DEBUG
"set_efer: 0x%llx #GP, reserved bits\n",
633 kvm_inject_gp(vcpu
, 0);
638 && (vcpu
->arch
.shadow_efer
& EFER_LME
) != (efer
& EFER_LME
)) {
639 printk(KERN_DEBUG
"set_efer: #GP, change LME while paging\n");
640 kvm_inject_gp(vcpu
, 0);
644 if (efer
& EFER_FFXSR
) {
645 struct kvm_cpuid_entry2
*feat
;
647 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
648 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
))) {
649 printk(KERN_DEBUG
"set_efer: #GP, enable FFXSR w/o CPUID capability\n");
650 kvm_inject_gp(vcpu
, 0);
655 if (efer
& EFER_SVME
) {
656 struct kvm_cpuid_entry2
*feat
;
658 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
659 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
))) {
660 printk(KERN_DEBUG
"set_efer: #GP, enable SVM w/o SVM\n");
661 kvm_inject_gp(vcpu
, 0);
666 kvm_x86_ops
->set_efer(vcpu
, efer
);
669 efer
|= vcpu
->arch
.shadow_efer
& EFER_LMA
;
671 vcpu
->arch
.shadow_efer
= efer
;
673 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
674 kvm_mmu_reset_context(vcpu
);
677 void kvm_enable_efer_bits(u64 mask
)
679 efer_reserved_bits
&= ~mask
;
681 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
685 * Writes msr value into into the appropriate "register".
686 * Returns 0 on success, non-0 otherwise.
687 * Assumes vcpu_load() was already called.
689 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
691 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
695 * Adapt set_msr() to msr_io()'s calling convention
697 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
699 return kvm_set_msr(vcpu
, index
, *data
);
702 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
705 struct pvclock_wall_clock wc
;
706 struct timespec boot
;
713 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
716 * The guest calculates current wall clock time by adding
717 * system time (updated by kvm_write_guest_time below) to the
718 * wall clock specified here. guest system time equals host
719 * system time for us, thus we must fill in host boot time here.
723 wc
.sec
= boot
.tv_sec
;
724 wc
.nsec
= boot
.tv_nsec
;
725 wc
.version
= version
;
727 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
730 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
733 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
735 uint32_t quotient
, remainder
;
737 /* Don't try to replace with do_div(), this one calculates
738 * "(dividend << 32) / divisor" */
740 : "=a" (quotient
), "=d" (remainder
)
741 : "0" (0), "1" (dividend
), "r" (divisor
) );
745 static void kvm_set_time_scale(uint32_t tsc_khz
, struct pvclock_vcpu_time_info
*hv_clock
)
747 uint64_t nsecs
= 1000000000LL;
752 tps64
= tsc_khz
* 1000LL;
753 while (tps64
> nsecs
*2) {
758 tps32
= (uint32_t)tps64
;
759 while (tps32
<= (uint32_t)nsecs
) {
764 hv_clock
->tsc_shift
= shift
;
765 hv_clock
->tsc_to_system_mul
= div_frac(nsecs
, tps32
);
767 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
768 __func__
, tsc_khz
, hv_clock
->tsc_shift
,
769 hv_clock
->tsc_to_system_mul
);
772 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
774 static void kvm_write_guest_time(struct kvm_vcpu
*v
)
778 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
780 unsigned long this_tsc_khz
;
782 if ((!vcpu
->time_page
))
785 this_tsc_khz
= get_cpu_var(cpu_tsc_khz
);
786 if (unlikely(vcpu
->hv_clock_tsc_khz
!= this_tsc_khz
)) {
787 kvm_set_time_scale(this_tsc_khz
, &vcpu
->hv_clock
);
788 vcpu
->hv_clock_tsc_khz
= this_tsc_khz
;
790 put_cpu_var(cpu_tsc_khz
);
792 /* Keep irq disabled to prevent changes to the clock */
793 local_irq_save(flags
);
794 kvm_get_msr(v
, MSR_IA32_TSC
, &vcpu
->hv_clock
.tsc_timestamp
);
796 monotonic_to_bootbased(&ts
);
797 local_irq_restore(flags
);
799 /* With all the info we got, fill in the values */
801 vcpu
->hv_clock
.system_time
= ts
.tv_nsec
+
802 (NSEC_PER_SEC
* (u64
)ts
.tv_sec
) + v
->kvm
->arch
.kvmclock_offset
;
805 * The interface expects us to write an even number signaling that the
806 * update is finished. Since the guest won't see the intermediate
807 * state, we just increase by 2 at the end.
809 vcpu
->hv_clock
.version
+= 2;
811 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
813 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
814 sizeof(vcpu
->hv_clock
));
816 kunmap_atomic(shared_kaddr
, KM_USER0
);
818 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
821 static int kvm_request_guest_time_update(struct kvm_vcpu
*v
)
823 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
825 if (!vcpu
->time_page
)
827 set_bit(KVM_REQ_KVMCLOCK_UPDATE
, &v
->requests
);
831 static bool msr_mtrr_valid(unsigned msr
)
834 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
835 case MSR_MTRRfix64K_00000
:
836 case MSR_MTRRfix16K_80000
:
837 case MSR_MTRRfix16K_A0000
:
838 case MSR_MTRRfix4K_C0000
:
839 case MSR_MTRRfix4K_C8000
:
840 case MSR_MTRRfix4K_D0000
:
841 case MSR_MTRRfix4K_D8000
:
842 case MSR_MTRRfix4K_E0000
:
843 case MSR_MTRRfix4K_E8000
:
844 case MSR_MTRRfix4K_F0000
:
845 case MSR_MTRRfix4K_F8000
:
846 case MSR_MTRRdefType
:
847 case MSR_IA32_CR_PAT
:
855 static bool valid_pat_type(unsigned t
)
857 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
860 static bool valid_mtrr_type(unsigned t
)
862 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
865 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
869 if (!msr_mtrr_valid(msr
))
872 if (msr
== MSR_IA32_CR_PAT
) {
873 for (i
= 0; i
< 8; i
++)
874 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
877 } else if (msr
== MSR_MTRRdefType
) {
880 return valid_mtrr_type(data
& 0xff);
881 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
882 for (i
= 0; i
< 8 ; i
++)
883 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
889 return valid_mtrr_type(data
& 0xff);
892 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
894 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
896 if (!mtrr_valid(vcpu
, msr
, data
))
899 if (msr
== MSR_MTRRdefType
) {
900 vcpu
->arch
.mtrr_state
.def_type
= data
;
901 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
902 } else if (msr
== MSR_MTRRfix64K_00000
)
904 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
905 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
906 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
907 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
908 else if (msr
== MSR_IA32_CR_PAT
)
909 vcpu
->arch
.pat
= data
;
910 else { /* Variable MTRRs */
911 int idx
, is_mtrr_mask
;
914 idx
= (msr
- 0x200) / 2;
915 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
918 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
921 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
925 kvm_mmu_reset_context(vcpu
);
929 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
931 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
932 unsigned bank_num
= mcg_cap
& 0xff;
935 case MSR_IA32_MCG_STATUS
:
936 vcpu
->arch
.mcg_status
= data
;
938 case MSR_IA32_MCG_CTL
:
939 if (!(mcg_cap
& MCG_CTL_P
))
941 if (data
!= 0 && data
!= ~(u64
)0)
943 vcpu
->arch
.mcg_ctl
= data
;
946 if (msr
>= MSR_IA32_MC0_CTL
&&
947 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
948 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
949 /* only 0 or all 1s can be written to IA32_MCi_CTL */
950 if ((offset
& 0x3) == 0 &&
951 data
!= 0 && data
!= ~(u64
)0)
953 vcpu
->arch
.mce_banks
[offset
] = data
;
961 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
963 struct kvm
*kvm
= vcpu
->kvm
;
964 int lm
= is_long_mode(vcpu
);
965 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
966 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
967 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
968 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
969 u32 page_num
= data
& ~PAGE_MASK
;
970 u64 page_addr
= data
& PAGE_MASK
;
975 if (page_num
>= blob_size
)
978 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
982 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
984 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
993 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
997 set_efer(vcpu
, data
);
1000 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1002 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1007 case MSR_FAM10H_MMIO_CONF_BASE
:
1009 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1014 case MSR_AMD64_NB_CFG
:
1016 case MSR_IA32_DEBUGCTLMSR
:
1018 /* We support the non-activated case already */
1020 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1021 /* Values other than LBR and BTF are vendor-specific,
1022 thus reserved and should throw a #GP */
1025 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1028 case MSR_IA32_UCODE_REV
:
1029 case MSR_IA32_UCODE_WRITE
:
1030 case MSR_VM_HSAVE_PA
:
1031 case MSR_AMD64_PATCH_LOADER
:
1033 case 0x200 ... 0x2ff:
1034 return set_msr_mtrr(vcpu
, msr
, data
);
1035 case MSR_IA32_APICBASE
:
1036 kvm_set_apic_base(vcpu
, data
);
1038 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1039 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1040 case MSR_IA32_MISC_ENABLE
:
1041 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1043 case MSR_KVM_WALL_CLOCK
:
1044 vcpu
->kvm
->arch
.wall_clock
= data
;
1045 kvm_write_wall_clock(vcpu
->kvm
, data
);
1047 case MSR_KVM_SYSTEM_TIME
: {
1048 if (vcpu
->arch
.time_page
) {
1049 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1050 vcpu
->arch
.time_page
= NULL
;
1053 vcpu
->arch
.time
= data
;
1055 /* we verify if the enable bit is set... */
1059 /* ...but clean it before doing the actual write */
1060 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1062 vcpu
->arch
.time_page
=
1063 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1065 if (is_error_page(vcpu
->arch
.time_page
)) {
1066 kvm_release_page_clean(vcpu
->arch
.time_page
);
1067 vcpu
->arch
.time_page
= NULL
;
1070 kvm_request_guest_time_update(vcpu
);
1073 case MSR_IA32_MCG_CTL
:
1074 case MSR_IA32_MCG_STATUS
:
1075 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1076 return set_msr_mce(vcpu
, msr
, data
);
1078 /* Performance counters are not protected by a CPUID bit,
1079 * so we should check all of them in the generic path for the sake of
1080 * cross vendor migration.
1081 * Writing a zero into the event select MSRs disables them,
1082 * which we perfectly emulate ;-). Any other value should be at least
1083 * reported, some guests depend on them.
1085 case MSR_P6_EVNTSEL0
:
1086 case MSR_P6_EVNTSEL1
:
1087 case MSR_K7_EVNTSEL0
:
1088 case MSR_K7_EVNTSEL1
:
1089 case MSR_K7_EVNTSEL2
:
1090 case MSR_K7_EVNTSEL3
:
1092 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1093 "0x%x data 0x%llx\n", msr
, data
);
1095 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1096 * so we ignore writes to make it happy.
1098 case MSR_P6_PERFCTR0
:
1099 case MSR_P6_PERFCTR1
:
1100 case MSR_K7_PERFCTR0
:
1101 case MSR_K7_PERFCTR1
:
1102 case MSR_K7_PERFCTR2
:
1103 case MSR_K7_PERFCTR3
:
1104 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1105 "0x%x data 0x%llx\n", msr
, data
);
1108 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1109 return xen_hvm_config(vcpu
, data
);
1111 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1115 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1122 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1126 * Reads an msr value (of 'msr_index') into 'pdata'.
1127 * Returns 0 on success, non-0 otherwise.
1128 * Assumes vcpu_load() was already called.
1130 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1132 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1135 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1137 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1139 if (!msr_mtrr_valid(msr
))
1142 if (msr
== MSR_MTRRdefType
)
1143 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1144 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1145 else if (msr
== MSR_MTRRfix64K_00000
)
1147 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1148 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1149 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1150 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1151 else if (msr
== MSR_IA32_CR_PAT
)
1152 *pdata
= vcpu
->arch
.pat
;
1153 else { /* Variable MTRRs */
1154 int idx
, is_mtrr_mask
;
1157 idx
= (msr
- 0x200) / 2;
1158 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1161 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1164 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1171 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1174 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1175 unsigned bank_num
= mcg_cap
& 0xff;
1178 case MSR_IA32_P5_MC_ADDR
:
1179 case MSR_IA32_P5_MC_TYPE
:
1182 case MSR_IA32_MCG_CAP
:
1183 data
= vcpu
->arch
.mcg_cap
;
1185 case MSR_IA32_MCG_CTL
:
1186 if (!(mcg_cap
& MCG_CTL_P
))
1188 data
= vcpu
->arch
.mcg_ctl
;
1190 case MSR_IA32_MCG_STATUS
:
1191 data
= vcpu
->arch
.mcg_status
;
1194 if (msr
>= MSR_IA32_MC0_CTL
&&
1195 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1196 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1197 data
= vcpu
->arch
.mce_banks
[offset
];
1206 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1211 case MSR_IA32_PLATFORM_ID
:
1212 case MSR_IA32_UCODE_REV
:
1213 case MSR_IA32_EBL_CR_POWERON
:
1214 case MSR_IA32_DEBUGCTLMSR
:
1215 case MSR_IA32_LASTBRANCHFROMIP
:
1216 case MSR_IA32_LASTBRANCHTOIP
:
1217 case MSR_IA32_LASTINTFROMIP
:
1218 case MSR_IA32_LASTINTTOIP
:
1221 case MSR_VM_HSAVE_PA
:
1222 case MSR_P6_PERFCTR0
:
1223 case MSR_P6_PERFCTR1
:
1224 case MSR_P6_EVNTSEL0
:
1225 case MSR_P6_EVNTSEL1
:
1226 case MSR_K7_EVNTSEL0
:
1227 case MSR_K7_PERFCTR0
:
1228 case MSR_K8_INT_PENDING_MSG
:
1229 case MSR_AMD64_NB_CFG
:
1230 case MSR_FAM10H_MMIO_CONF_BASE
:
1234 data
= 0x500 | KVM_NR_VAR_MTRR
;
1236 case 0x200 ... 0x2ff:
1237 return get_msr_mtrr(vcpu
, msr
, pdata
);
1238 case 0xcd: /* fsb frequency */
1241 case MSR_IA32_APICBASE
:
1242 data
= kvm_get_apic_base(vcpu
);
1244 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1245 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1247 case MSR_IA32_MISC_ENABLE
:
1248 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1250 case MSR_IA32_PERF_STATUS
:
1251 /* TSC increment by tick */
1253 /* CPU multiplier */
1254 data
|= (((uint64_t)4ULL) << 40);
1257 data
= vcpu
->arch
.shadow_efer
;
1259 case MSR_KVM_WALL_CLOCK
:
1260 data
= vcpu
->kvm
->arch
.wall_clock
;
1262 case MSR_KVM_SYSTEM_TIME
:
1263 data
= vcpu
->arch
.time
;
1265 case MSR_IA32_P5_MC_ADDR
:
1266 case MSR_IA32_P5_MC_TYPE
:
1267 case MSR_IA32_MCG_CAP
:
1268 case MSR_IA32_MCG_CTL
:
1269 case MSR_IA32_MCG_STATUS
:
1270 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1271 return get_msr_mce(vcpu
, msr
, pdata
);
1274 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1277 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1285 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1288 * Read or write a bunch of msrs. All parameters are kernel addresses.
1290 * @return number of msrs set successfully.
1292 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1293 struct kvm_msr_entry
*entries
,
1294 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1295 unsigned index
, u64
*data
))
1301 down_read(&vcpu
->kvm
->slots_lock
);
1302 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1303 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1305 up_read(&vcpu
->kvm
->slots_lock
);
1313 * Read or write a bunch of msrs. Parameters are user addresses.
1315 * @return number of msrs set successfully.
1317 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1318 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1319 unsigned index
, u64
*data
),
1322 struct kvm_msrs msrs
;
1323 struct kvm_msr_entry
*entries
;
1328 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1332 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1336 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1337 entries
= vmalloc(size
);
1342 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1345 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1350 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1361 int kvm_dev_ioctl_check_extension(long ext
)
1366 case KVM_CAP_IRQCHIP
:
1368 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1369 case KVM_CAP_SET_TSS_ADDR
:
1370 case KVM_CAP_EXT_CPUID
:
1371 case KVM_CAP_CLOCKSOURCE
:
1373 case KVM_CAP_NOP_IO_DELAY
:
1374 case KVM_CAP_MP_STATE
:
1375 case KVM_CAP_SYNC_MMU
:
1376 case KVM_CAP_REINJECT_CONTROL
:
1377 case KVM_CAP_IRQ_INJECT_STATUS
:
1378 case KVM_CAP_ASSIGN_DEV_IRQ
:
1380 case KVM_CAP_IOEVENTFD
:
1382 case KVM_CAP_PIT_STATE2
:
1383 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1384 case KVM_CAP_XEN_HVM
:
1385 case KVM_CAP_ADJUST_CLOCK
:
1386 case KVM_CAP_VCPU_EVENTS
:
1389 case KVM_CAP_COALESCED_MMIO
:
1390 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1393 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1395 case KVM_CAP_NR_VCPUS
:
1398 case KVM_CAP_NR_MEMSLOTS
:
1399 r
= KVM_MEMORY_SLOTS
;
1401 case KVM_CAP_PV_MMU
: /* obsolete */
1408 r
= KVM_MAX_MCE_BANKS
;
1418 long kvm_arch_dev_ioctl(struct file
*filp
,
1419 unsigned int ioctl
, unsigned long arg
)
1421 void __user
*argp
= (void __user
*)arg
;
1425 case KVM_GET_MSR_INDEX_LIST
: {
1426 struct kvm_msr_list __user
*user_msr_list
= argp
;
1427 struct kvm_msr_list msr_list
;
1431 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1434 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1435 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1438 if (n
< msr_list
.nmsrs
)
1441 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1442 num_msrs_to_save
* sizeof(u32
)))
1444 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1446 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1451 case KVM_GET_SUPPORTED_CPUID
: {
1452 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1453 struct kvm_cpuid2 cpuid
;
1456 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1458 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
1459 cpuid_arg
->entries
);
1464 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1469 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
1472 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
1474 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
1486 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
1488 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
1489 if (unlikely(per_cpu(cpu_tsc_khz
, cpu
) == 0)) {
1490 unsigned long khz
= cpufreq_quick_get(cpu
);
1493 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
1495 kvm_request_guest_time_update(vcpu
);
1498 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
1500 kvm_x86_ops
->vcpu_put(vcpu
);
1501 kvm_put_guest_fpu(vcpu
);
1504 static int is_efer_nx(void)
1506 unsigned long long efer
= 0;
1508 rdmsrl_safe(MSR_EFER
, &efer
);
1509 return efer
& EFER_NX
;
1512 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
1515 struct kvm_cpuid_entry2
*e
, *entry
;
1518 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
1519 e
= &vcpu
->arch
.cpuid_entries
[i
];
1520 if (e
->function
== 0x80000001) {
1525 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
1526 entry
->edx
&= ~(1 << 20);
1527 printk(KERN_INFO
"kvm: guest NX capability removed\n");
1531 /* when an old userspace process fills a new kernel module */
1532 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
1533 struct kvm_cpuid
*cpuid
,
1534 struct kvm_cpuid_entry __user
*entries
)
1537 struct kvm_cpuid_entry
*cpuid_entries
;
1540 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1543 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
1547 if (copy_from_user(cpuid_entries
, entries
,
1548 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
1550 for (i
= 0; i
< cpuid
->nent
; i
++) {
1551 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
1552 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
1553 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
1554 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
1555 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
1556 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
1557 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
1558 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
1559 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
1560 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
1562 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1563 cpuid_fix_nx_cap(vcpu
);
1565 kvm_apic_set_version(vcpu
);
1568 vfree(cpuid_entries
);
1573 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
1574 struct kvm_cpuid2
*cpuid
,
1575 struct kvm_cpuid_entry2 __user
*entries
)
1580 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1583 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
1584 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
1586 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1587 kvm_apic_set_version(vcpu
);
1594 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
1595 struct kvm_cpuid2
*cpuid
,
1596 struct kvm_cpuid_entry2 __user
*entries
)
1601 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
1604 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
1605 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
1610 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
1614 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1617 entry
->function
= function
;
1618 entry
->index
= index
;
1619 cpuid_count(entry
->function
, entry
->index
,
1620 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
1624 #define F(x) bit(X86_FEATURE_##x)
1626 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1627 u32 index
, int *nent
, int maxnent
)
1629 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
1630 unsigned f_gbpages
= kvm_x86_ops
->gb_page_enable() ? F(GBPAGES
) : 0;
1631 #ifdef CONFIG_X86_64
1632 unsigned f_lm
= F(LM
);
1638 const u32 kvm_supported_word0_x86_features
=
1639 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1640 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1641 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
1642 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1643 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
1644 0 /* Reserved, DS, ACPI */ | F(MMX
) |
1645 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
1646 0 /* HTT, TM, Reserved, PBE */;
1647 /* cpuid 0x80000001.edx */
1648 const u32 kvm_supported_word1_x86_features
=
1649 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1650 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1651 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
1652 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1653 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
1654 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
1655 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| 0 /* RDTSCP */ |
1656 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
1658 const u32 kvm_supported_word4_x86_features
=
1659 F(XMM3
) | 0 /* Reserved, DTES64, MONITOR */ |
1660 0 /* DS-CPL, VMX, SMX, EST */ |
1661 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1662 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
1663 0 /* Reserved, DCA */ | F(XMM4_1
) |
1664 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
1665 0 /* Reserved, XSAVE, OSXSAVE */;
1666 /* cpuid 0x80000001.ecx */
1667 const u32 kvm_supported_word6_x86_features
=
1668 F(LAHF_LM
) | F(CMP_LEGACY
) | F(SVM
) | 0 /* ExtApicSpace */ |
1669 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
1670 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5
) |
1671 0 /* SKINIT */ | 0 /* WDT */;
1673 /* all calls to cpuid_count() should be made on the same cpu */
1675 do_cpuid_1_ent(entry
, function
, index
);
1680 entry
->eax
= min(entry
->eax
, (u32
)0xb);
1683 entry
->edx
&= kvm_supported_word0_x86_features
;
1684 entry
->ecx
&= kvm_supported_word4_x86_features
;
1685 /* we support x2apic emulation even if host does not support
1686 * it since we emulate x2apic in software */
1687 entry
->ecx
|= F(X2APIC
);
1689 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1690 * may return different values. This forces us to get_cpu() before
1691 * issuing the first command, and also to emulate this annoying behavior
1692 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1694 int t
, times
= entry
->eax
& 0xff;
1696 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1697 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
1698 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
1699 do_cpuid_1_ent(&entry
[t
], function
, 0);
1700 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1705 /* function 4 and 0xb have additional index. */
1709 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1710 /* read more entries until cache_type is zero */
1711 for (i
= 1; *nent
< maxnent
; ++i
) {
1712 cache_type
= entry
[i
- 1].eax
& 0x1f;
1715 do_cpuid_1_ent(&entry
[i
], function
, i
);
1717 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1725 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1726 /* read more entries until level_type is zero */
1727 for (i
= 1; *nent
< maxnent
; ++i
) {
1728 level_type
= entry
[i
- 1].ecx
& 0xff00;
1731 do_cpuid_1_ent(&entry
[i
], function
, i
);
1733 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1739 entry
->eax
= min(entry
->eax
, 0x8000001a);
1742 entry
->edx
&= kvm_supported_word1_x86_features
;
1743 entry
->ecx
&= kvm_supported_word6_x86_features
;
1751 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
1752 struct kvm_cpuid_entry2 __user
*entries
)
1754 struct kvm_cpuid_entry2
*cpuid_entries
;
1755 int limit
, nent
= 0, r
= -E2BIG
;
1758 if (cpuid
->nent
< 1)
1760 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1761 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
1763 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
1767 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
1768 limit
= cpuid_entries
[0].eax
;
1769 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1770 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1771 &nent
, cpuid
->nent
);
1773 if (nent
>= cpuid
->nent
)
1776 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
1777 limit
= cpuid_entries
[nent
- 1].eax
;
1778 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1779 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1780 &nent
, cpuid
->nent
);
1782 if (nent
>= cpuid
->nent
)
1786 if (copy_to_user(entries
, cpuid_entries
,
1787 nent
* sizeof(struct kvm_cpuid_entry2
)))
1793 vfree(cpuid_entries
);
1798 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
1799 struct kvm_lapic_state
*s
)
1802 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
1808 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
1809 struct kvm_lapic_state
*s
)
1812 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
1813 kvm_apic_post_state_restore(vcpu
);
1814 update_cr8_intercept(vcpu
);
1820 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
1821 struct kvm_interrupt
*irq
)
1823 if (irq
->irq
< 0 || irq
->irq
>= 256)
1825 if (irqchip_in_kernel(vcpu
->kvm
))
1829 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
1836 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
1839 kvm_inject_nmi(vcpu
);
1845 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
1846 struct kvm_tpr_access_ctl
*tac
)
1850 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
1854 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
1858 unsigned bank_num
= mcg_cap
& 0xff, bank
;
1861 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
1863 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
1866 vcpu
->arch
.mcg_cap
= mcg_cap
;
1867 /* Init IA32_MCG_CTL to all 1s */
1868 if (mcg_cap
& MCG_CTL_P
)
1869 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
1870 /* Init IA32_MCi_CTL to all 1s */
1871 for (bank
= 0; bank
< bank_num
; bank
++)
1872 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
1877 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
1878 struct kvm_x86_mce
*mce
)
1880 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1881 unsigned bank_num
= mcg_cap
& 0xff;
1882 u64
*banks
= vcpu
->arch
.mce_banks
;
1884 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
1887 * if IA32_MCG_CTL is not all 1s, the uncorrected error
1888 * reporting is disabled
1890 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
1891 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
1893 banks
+= 4 * mce
->bank
;
1895 * if IA32_MCi_CTL is not all 1s, the uncorrected error
1896 * reporting is disabled for the bank
1898 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
1900 if (mce
->status
& MCI_STATUS_UC
) {
1901 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
1902 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
1903 printk(KERN_DEBUG
"kvm: set_mce: "
1904 "injects mce exception while "
1905 "previous one is in progress!\n");
1906 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
1909 if (banks
[1] & MCI_STATUS_VAL
)
1910 mce
->status
|= MCI_STATUS_OVER
;
1911 banks
[2] = mce
->addr
;
1912 banks
[3] = mce
->misc
;
1913 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
1914 banks
[1] = mce
->status
;
1915 kvm_queue_exception(vcpu
, MC_VECTOR
);
1916 } else if (!(banks
[1] & MCI_STATUS_VAL
)
1917 || !(banks
[1] & MCI_STATUS_UC
)) {
1918 if (banks
[1] & MCI_STATUS_VAL
)
1919 mce
->status
|= MCI_STATUS_OVER
;
1920 banks
[2] = mce
->addr
;
1921 banks
[3] = mce
->misc
;
1922 banks
[1] = mce
->status
;
1924 banks
[1] |= MCI_STATUS_OVER
;
1928 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
1929 struct kvm_vcpu_events
*events
)
1933 events
->exception
.injected
= vcpu
->arch
.exception
.pending
;
1934 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
1935 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
1936 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
1938 events
->interrupt
.injected
= vcpu
->arch
.interrupt
.pending
;
1939 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
1940 events
->interrupt
.soft
= vcpu
->arch
.interrupt
.soft
;
1942 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
1943 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
;
1944 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
1946 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
1948 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
1949 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
);
1954 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
1955 struct kvm_vcpu_events
*events
)
1957 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
1958 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
))
1963 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
1964 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
1965 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
1966 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
1968 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
1969 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
1970 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
1971 if (vcpu
->arch
.interrupt
.pending
&& irqchip_in_kernel(vcpu
->kvm
))
1972 kvm_pic_clear_isr_ack(vcpu
->kvm
);
1974 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
1975 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
1976 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
1977 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
1979 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
1980 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
1987 long kvm_arch_vcpu_ioctl(struct file
*filp
,
1988 unsigned int ioctl
, unsigned long arg
)
1990 struct kvm_vcpu
*vcpu
= filp
->private_data
;
1991 void __user
*argp
= (void __user
*)arg
;
1993 struct kvm_lapic_state
*lapic
= NULL
;
1996 case KVM_GET_LAPIC
: {
1998 if (!vcpu
->arch
.apic
)
2000 lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2005 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, lapic
);
2009 if (copy_to_user(argp
, lapic
, sizeof(struct kvm_lapic_state
)))
2014 case KVM_SET_LAPIC
: {
2016 if (!vcpu
->arch
.apic
)
2018 lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2023 if (copy_from_user(lapic
, argp
, sizeof(struct kvm_lapic_state
)))
2025 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, lapic
);
2031 case KVM_INTERRUPT
: {
2032 struct kvm_interrupt irq
;
2035 if (copy_from_user(&irq
, argp
, sizeof irq
))
2037 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2044 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2050 case KVM_SET_CPUID
: {
2051 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2052 struct kvm_cpuid cpuid
;
2055 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2057 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2062 case KVM_SET_CPUID2
: {
2063 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2064 struct kvm_cpuid2 cpuid
;
2067 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2069 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2070 cpuid_arg
->entries
);
2075 case KVM_GET_CPUID2
: {
2076 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2077 struct kvm_cpuid2 cpuid
;
2080 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2082 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2083 cpuid_arg
->entries
);
2087 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2093 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2096 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2098 case KVM_TPR_ACCESS_REPORTING
: {
2099 struct kvm_tpr_access_ctl tac
;
2102 if (copy_from_user(&tac
, argp
, sizeof tac
))
2104 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2108 if (copy_to_user(argp
, &tac
, sizeof tac
))
2113 case KVM_SET_VAPIC_ADDR
: {
2114 struct kvm_vapic_addr va
;
2117 if (!irqchip_in_kernel(vcpu
->kvm
))
2120 if (copy_from_user(&va
, argp
, sizeof va
))
2123 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2126 case KVM_X86_SETUP_MCE
: {
2130 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2132 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2135 case KVM_X86_SET_MCE
: {
2136 struct kvm_x86_mce mce
;
2139 if (copy_from_user(&mce
, argp
, sizeof mce
))
2141 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2144 case KVM_GET_VCPU_EVENTS
: {
2145 struct kvm_vcpu_events events
;
2147 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2150 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2155 case KVM_SET_VCPU_EVENTS
: {
2156 struct kvm_vcpu_events events
;
2159 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2162 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2173 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
2177 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
2179 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
2183 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
2186 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
2190 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
2191 u32 kvm_nr_mmu_pages
)
2193 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
2196 down_write(&kvm
->slots_lock
);
2197 spin_lock(&kvm
->mmu_lock
);
2199 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
2200 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
2202 spin_unlock(&kvm
->mmu_lock
);
2203 up_write(&kvm
->slots_lock
);
2207 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
2209 return kvm
->arch
.n_alloc_mmu_pages
;
2212 gfn_t
unalias_gfn(struct kvm
*kvm
, gfn_t gfn
)
2215 struct kvm_mem_alias
*alias
;
2217 for (i
= 0; i
< kvm
->arch
.naliases
; ++i
) {
2218 alias
= &kvm
->arch
.aliases
[i
];
2219 if (gfn
>= alias
->base_gfn
2220 && gfn
< alias
->base_gfn
+ alias
->npages
)
2221 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
2227 * Set a new alias region. Aliases map a portion of physical memory into
2228 * another portion. This is useful for memory windows, for example the PC
2231 static int kvm_vm_ioctl_set_memory_alias(struct kvm
*kvm
,
2232 struct kvm_memory_alias
*alias
)
2235 struct kvm_mem_alias
*p
;
2238 /* General sanity checks */
2239 if (alias
->memory_size
& (PAGE_SIZE
- 1))
2241 if (alias
->guest_phys_addr
& (PAGE_SIZE
- 1))
2243 if (alias
->slot
>= KVM_ALIAS_SLOTS
)
2245 if (alias
->guest_phys_addr
+ alias
->memory_size
2246 < alias
->guest_phys_addr
)
2248 if (alias
->target_phys_addr
+ alias
->memory_size
2249 < alias
->target_phys_addr
)
2252 down_write(&kvm
->slots_lock
);
2253 spin_lock(&kvm
->mmu_lock
);
2255 p
= &kvm
->arch
.aliases
[alias
->slot
];
2256 p
->base_gfn
= alias
->guest_phys_addr
>> PAGE_SHIFT
;
2257 p
->npages
= alias
->memory_size
>> PAGE_SHIFT
;
2258 p
->target_gfn
= alias
->target_phys_addr
>> PAGE_SHIFT
;
2260 for (n
= KVM_ALIAS_SLOTS
; n
> 0; --n
)
2261 if (kvm
->arch
.aliases
[n
- 1].npages
)
2263 kvm
->arch
.naliases
= n
;
2265 spin_unlock(&kvm
->mmu_lock
);
2266 kvm_mmu_zap_all(kvm
);
2268 up_write(&kvm
->slots_lock
);
2276 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2281 switch (chip
->chip_id
) {
2282 case KVM_IRQCHIP_PIC_MASTER
:
2283 memcpy(&chip
->chip
.pic
,
2284 &pic_irqchip(kvm
)->pics
[0],
2285 sizeof(struct kvm_pic_state
));
2287 case KVM_IRQCHIP_PIC_SLAVE
:
2288 memcpy(&chip
->chip
.pic
,
2289 &pic_irqchip(kvm
)->pics
[1],
2290 sizeof(struct kvm_pic_state
));
2292 case KVM_IRQCHIP_IOAPIC
:
2293 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
2302 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2307 switch (chip
->chip_id
) {
2308 case KVM_IRQCHIP_PIC_MASTER
:
2309 spin_lock(&pic_irqchip(kvm
)->lock
);
2310 memcpy(&pic_irqchip(kvm
)->pics
[0],
2312 sizeof(struct kvm_pic_state
));
2313 spin_unlock(&pic_irqchip(kvm
)->lock
);
2315 case KVM_IRQCHIP_PIC_SLAVE
:
2316 spin_lock(&pic_irqchip(kvm
)->lock
);
2317 memcpy(&pic_irqchip(kvm
)->pics
[1],
2319 sizeof(struct kvm_pic_state
));
2320 spin_unlock(&pic_irqchip(kvm
)->lock
);
2322 case KVM_IRQCHIP_IOAPIC
:
2323 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
2329 kvm_pic_update_irq(pic_irqchip(kvm
));
2333 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2337 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2338 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
2339 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2343 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2347 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2348 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
2349 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
2350 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2354 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2358 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2359 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
2360 sizeof(ps
->channels
));
2361 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
2362 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2366 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2368 int r
= 0, start
= 0;
2369 u32 prev_legacy
, cur_legacy
;
2370 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2371 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2372 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2373 if (!prev_legacy
&& cur_legacy
)
2375 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
2376 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
2377 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
2378 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
2379 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2383 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
2384 struct kvm_reinject_control
*control
)
2386 if (!kvm
->arch
.vpit
)
2388 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2389 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
2390 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2395 * Get (and clear) the dirty memory log for a memory slot.
2397 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
2398 struct kvm_dirty_log
*log
)
2402 struct kvm_memory_slot
*memslot
;
2405 down_write(&kvm
->slots_lock
);
2407 r
= kvm_get_dirty_log(kvm
, log
, &is_dirty
);
2411 /* If nothing is dirty, don't bother messing with page tables. */
2413 spin_lock(&kvm
->mmu_lock
);
2414 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
2415 spin_unlock(&kvm
->mmu_lock
);
2416 memslot
= &kvm
->memslots
[log
->slot
];
2417 n
= ALIGN(memslot
->npages
, BITS_PER_LONG
) / 8;
2418 memset(memslot
->dirty_bitmap
, 0, n
);
2422 up_write(&kvm
->slots_lock
);
2426 long kvm_arch_vm_ioctl(struct file
*filp
,
2427 unsigned int ioctl
, unsigned long arg
)
2429 struct kvm
*kvm
= filp
->private_data
;
2430 void __user
*argp
= (void __user
*)arg
;
2433 * This union makes it completely explicit to gcc-3.x
2434 * that these two variables' stack usage should be
2435 * combined, not added together.
2438 struct kvm_pit_state ps
;
2439 struct kvm_pit_state2 ps2
;
2440 struct kvm_memory_alias alias
;
2441 struct kvm_pit_config pit_config
;
2445 case KVM_SET_TSS_ADDR
:
2446 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
2450 case KVM_SET_IDENTITY_MAP_ADDR
: {
2454 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
2456 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
2461 case KVM_SET_MEMORY_REGION
: {
2462 struct kvm_memory_region kvm_mem
;
2463 struct kvm_userspace_memory_region kvm_userspace_mem
;
2466 if (copy_from_user(&kvm_mem
, argp
, sizeof kvm_mem
))
2468 kvm_userspace_mem
.slot
= kvm_mem
.slot
;
2469 kvm_userspace_mem
.flags
= kvm_mem
.flags
;
2470 kvm_userspace_mem
.guest_phys_addr
= kvm_mem
.guest_phys_addr
;
2471 kvm_userspace_mem
.memory_size
= kvm_mem
.memory_size
;
2472 r
= kvm_vm_ioctl_set_memory_region(kvm
, &kvm_userspace_mem
, 0);
2477 case KVM_SET_NR_MMU_PAGES
:
2478 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
2482 case KVM_GET_NR_MMU_PAGES
:
2483 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
2485 case KVM_SET_MEMORY_ALIAS
:
2487 if (copy_from_user(&u
.alias
, argp
, sizeof(struct kvm_memory_alias
)))
2489 r
= kvm_vm_ioctl_set_memory_alias(kvm
, &u
.alias
);
2493 case KVM_CREATE_IRQCHIP
: {
2494 struct kvm_pic
*vpic
;
2496 mutex_lock(&kvm
->lock
);
2499 goto create_irqchip_unlock
;
2501 vpic
= kvm_create_pic(kvm
);
2503 r
= kvm_ioapic_init(kvm
);
2506 goto create_irqchip_unlock
;
2509 goto create_irqchip_unlock
;
2511 kvm
->arch
.vpic
= vpic
;
2513 r
= kvm_setup_default_irq_routing(kvm
);
2515 mutex_lock(&kvm
->irq_lock
);
2516 kfree(kvm
->arch
.vpic
);
2517 kfree(kvm
->arch
.vioapic
);
2518 kvm
->arch
.vpic
= NULL
;
2519 kvm
->arch
.vioapic
= NULL
;
2520 mutex_unlock(&kvm
->irq_lock
);
2522 create_irqchip_unlock
:
2523 mutex_unlock(&kvm
->lock
);
2526 case KVM_CREATE_PIT
:
2527 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
2529 case KVM_CREATE_PIT2
:
2531 if (copy_from_user(&u
.pit_config
, argp
,
2532 sizeof(struct kvm_pit_config
)))
2535 down_write(&kvm
->slots_lock
);
2538 goto create_pit_unlock
;
2540 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
2544 up_write(&kvm
->slots_lock
);
2546 case KVM_IRQ_LINE_STATUS
:
2547 case KVM_IRQ_LINE
: {
2548 struct kvm_irq_level irq_event
;
2551 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
2553 if (irqchip_in_kernel(kvm
)) {
2555 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
2556 irq_event
.irq
, irq_event
.level
);
2557 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
2558 irq_event
.status
= status
;
2559 if (copy_to_user(argp
, &irq_event
,
2567 case KVM_GET_IRQCHIP
: {
2568 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2569 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2575 if (copy_from_user(chip
, argp
, sizeof *chip
))
2576 goto get_irqchip_out
;
2578 if (!irqchip_in_kernel(kvm
))
2579 goto get_irqchip_out
;
2580 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
2582 goto get_irqchip_out
;
2584 if (copy_to_user(argp
, chip
, sizeof *chip
))
2585 goto get_irqchip_out
;
2593 case KVM_SET_IRQCHIP
: {
2594 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2595 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2601 if (copy_from_user(chip
, argp
, sizeof *chip
))
2602 goto set_irqchip_out
;
2604 if (!irqchip_in_kernel(kvm
))
2605 goto set_irqchip_out
;
2606 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
2608 goto set_irqchip_out
;
2618 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
2621 if (!kvm
->arch
.vpit
)
2623 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
2627 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
2634 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
2637 if (!kvm
->arch
.vpit
)
2639 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
2645 case KVM_GET_PIT2
: {
2647 if (!kvm
->arch
.vpit
)
2649 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
2653 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
2658 case KVM_SET_PIT2
: {
2660 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
2663 if (!kvm
->arch
.vpit
)
2665 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
2671 case KVM_REINJECT_CONTROL
: {
2672 struct kvm_reinject_control control
;
2674 if (copy_from_user(&control
, argp
, sizeof(control
)))
2676 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
2682 case KVM_XEN_HVM_CONFIG
: {
2684 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
2685 sizeof(struct kvm_xen_hvm_config
)))
2688 if (kvm
->arch
.xen_hvm_config
.flags
)
2693 case KVM_SET_CLOCK
: {
2694 struct timespec now
;
2695 struct kvm_clock_data user_ns
;
2700 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
2709 now_ns
= timespec_to_ns(&now
);
2710 delta
= user_ns
.clock
- now_ns
;
2711 kvm
->arch
.kvmclock_offset
= delta
;
2714 case KVM_GET_CLOCK
: {
2715 struct timespec now
;
2716 struct kvm_clock_data user_ns
;
2720 now_ns
= timespec_to_ns(&now
);
2721 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
2725 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
2738 static void kvm_init_msr_list(void)
2743 /* skip the first msrs in the list. KVM-specific */
2744 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
2745 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
2748 msrs_to_save
[j
] = msrs_to_save
[i
];
2751 num_msrs_to_save
= j
;
2754 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
2757 if (vcpu
->arch
.apic
&&
2758 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2761 return kvm_io_bus_write(&vcpu
->kvm
->mmio_bus
, addr
, len
, v
);
2764 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
2766 if (vcpu
->arch
.apic
&&
2767 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2770 return kvm_io_bus_read(&vcpu
->kvm
->mmio_bus
, addr
, len
, v
);
2773 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2774 struct kvm_vcpu
*vcpu
)
2777 int r
= X86EMUL_CONTINUE
;
2780 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2781 unsigned offset
= addr
& (PAGE_SIZE
-1);
2782 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2785 if (gpa
== UNMAPPED_GVA
) {
2786 r
= X86EMUL_PROPAGATE_FAULT
;
2789 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
2791 r
= X86EMUL_UNHANDLEABLE
;
2803 static int kvm_write_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2804 struct kvm_vcpu
*vcpu
)
2807 int r
= X86EMUL_CONTINUE
;
2810 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2811 unsigned offset
= addr
& (PAGE_SIZE
-1);
2812 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2815 if (gpa
== UNMAPPED_GVA
) {
2816 r
= X86EMUL_PROPAGATE_FAULT
;
2819 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
2821 r
= X86EMUL_UNHANDLEABLE
;
2834 static int emulator_read_emulated(unsigned long addr
,
2837 struct kvm_vcpu
*vcpu
)
2841 if (vcpu
->mmio_read_completed
) {
2842 memcpy(val
, vcpu
->mmio_data
, bytes
);
2843 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
2844 vcpu
->mmio_phys_addr
, *(u64
*)val
);
2845 vcpu
->mmio_read_completed
= 0;
2846 return X86EMUL_CONTINUE
;
2849 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2851 /* For APIC access vmexit */
2852 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2855 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
)
2856 == X86EMUL_CONTINUE
)
2857 return X86EMUL_CONTINUE
;
2858 if (gpa
== UNMAPPED_GVA
)
2859 return X86EMUL_PROPAGATE_FAULT
;
2863 * Is this MMIO handled locally?
2865 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
2866 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
2867 return X86EMUL_CONTINUE
;
2870 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
2872 vcpu
->mmio_needed
= 1;
2873 vcpu
->mmio_phys_addr
= gpa
;
2874 vcpu
->mmio_size
= bytes
;
2875 vcpu
->mmio_is_write
= 0;
2877 return X86EMUL_UNHANDLEABLE
;
2880 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
2881 const void *val
, int bytes
)
2885 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
2888 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
2892 static int emulator_write_emulated_onepage(unsigned long addr
,
2895 struct kvm_vcpu
*vcpu
)
2899 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2901 if (gpa
== UNMAPPED_GVA
) {
2902 kvm_inject_page_fault(vcpu
, addr
, 2);
2903 return X86EMUL_PROPAGATE_FAULT
;
2906 /* For APIC access vmexit */
2907 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2910 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
2911 return X86EMUL_CONTINUE
;
2914 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
2916 * Is this MMIO handled locally?
2918 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
2919 return X86EMUL_CONTINUE
;
2921 vcpu
->mmio_needed
= 1;
2922 vcpu
->mmio_phys_addr
= gpa
;
2923 vcpu
->mmio_size
= bytes
;
2924 vcpu
->mmio_is_write
= 1;
2925 memcpy(vcpu
->mmio_data
, val
, bytes
);
2927 return X86EMUL_CONTINUE
;
2930 int emulator_write_emulated(unsigned long addr
,
2933 struct kvm_vcpu
*vcpu
)
2935 /* Crossing a page boundary? */
2936 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
2939 now
= -addr
& ~PAGE_MASK
;
2940 rc
= emulator_write_emulated_onepage(addr
, val
, now
, vcpu
);
2941 if (rc
!= X86EMUL_CONTINUE
)
2947 return emulator_write_emulated_onepage(addr
, val
, bytes
, vcpu
);
2949 EXPORT_SYMBOL_GPL(emulator_write_emulated
);
2951 static int emulator_cmpxchg_emulated(unsigned long addr
,
2955 struct kvm_vcpu
*vcpu
)
2957 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
2958 #ifndef CONFIG_X86_64
2959 /* guests cmpxchg8b have to be emulated atomically */
2966 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2968 if (gpa
== UNMAPPED_GVA
||
2969 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2972 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
2977 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
2979 kaddr
= kmap_atomic(page
, KM_USER0
);
2980 set_64bit((u64
*)(kaddr
+ offset_in_page(gpa
)), val
);
2981 kunmap_atomic(kaddr
, KM_USER0
);
2982 kvm_release_page_dirty(page
);
2987 return emulator_write_emulated(addr
, new, bytes
, vcpu
);
2990 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
2992 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
2995 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
2997 kvm_mmu_invlpg(vcpu
, address
);
2998 return X86EMUL_CONTINUE
;
3001 int emulate_clts(struct kvm_vcpu
*vcpu
)
3003 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
& ~X86_CR0_TS
);
3004 return X86EMUL_CONTINUE
;
3007 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
3009 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
3013 *dest
= kvm_x86_ops
->get_dr(vcpu
, dr
);
3014 return X86EMUL_CONTINUE
;
3016 pr_unimpl(vcpu
, "%s: unexpected dr %u\n", __func__
, dr
);
3017 return X86EMUL_UNHANDLEABLE
;
3021 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
3023 unsigned long mask
= (ctxt
->mode
== X86EMUL_MODE_PROT64
) ? ~0ULL : ~0U;
3026 kvm_x86_ops
->set_dr(ctxt
->vcpu
, dr
, value
& mask
, &exception
);
3028 /* FIXME: better handling */
3029 return X86EMUL_UNHANDLEABLE
;
3031 return X86EMUL_CONTINUE
;
3034 void kvm_report_emulation_failure(struct kvm_vcpu
*vcpu
, const char *context
)
3037 unsigned long rip
= kvm_rip_read(vcpu
);
3038 unsigned long rip_linear
;
3040 if (!printk_ratelimit())
3043 rip_linear
= rip
+ get_segment_base(vcpu
, VCPU_SREG_CS
);
3045 kvm_read_guest_virt(rip_linear
, (void *)opcodes
, 4, vcpu
);
3047 printk(KERN_ERR
"emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3048 context
, rip
, opcodes
[0], opcodes
[1], opcodes
[2], opcodes
[3]);
3050 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure
);
3052 static struct x86_emulate_ops emulate_ops
= {
3053 .read_std
= kvm_read_guest_virt
,
3054 .read_emulated
= emulator_read_emulated
,
3055 .write_emulated
= emulator_write_emulated
,
3056 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
3059 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
3061 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3062 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
3063 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
3064 vcpu
->arch
.regs_dirty
= ~0;
3067 int emulate_instruction(struct kvm_vcpu
*vcpu
,
3073 struct decode_cache
*c
;
3074 struct kvm_run
*run
= vcpu
->run
;
3076 kvm_clear_exception_queue(vcpu
);
3077 vcpu
->arch
.mmio_fault_cr2
= cr2
;
3079 * TODO: fix emulate.c to use guest_read/write_register
3080 * instead of direct ->regs accesses, can save hundred cycles
3081 * on Intel for instructions that don't read/change RSP, for
3084 cache_all_regs(vcpu
);
3086 vcpu
->mmio_is_write
= 0;
3087 vcpu
->arch
.pio
.string
= 0;
3089 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
3091 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
3093 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
3094 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_get_rflags(vcpu
);
3095 vcpu
->arch
.emulate_ctxt
.mode
=
3096 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
3097 ? X86EMUL_MODE_REAL
: cs_l
3098 ? X86EMUL_MODE_PROT64
: cs_db
3099 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
3101 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
3103 /* Only allow emulation of specific instructions on #UD
3104 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3105 c
= &vcpu
->arch
.emulate_ctxt
.decode
;
3106 if (emulation_type
& EMULTYPE_TRAP_UD
) {
3108 return EMULATE_FAIL
;
3110 case 0x01: /* VMMCALL */
3111 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
3112 return EMULATE_FAIL
;
3114 case 0x34: /* sysenter */
3115 case 0x35: /* sysexit */
3116 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
3117 return EMULATE_FAIL
;
3119 case 0x05: /* syscall */
3120 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
3121 return EMULATE_FAIL
;
3124 return EMULATE_FAIL
;
3127 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
3128 return EMULATE_FAIL
;
3131 ++vcpu
->stat
.insn_emulation
;
3133 ++vcpu
->stat
.insn_emulation_fail
;
3134 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
3135 return EMULATE_DONE
;
3136 return EMULATE_FAIL
;
3140 if (emulation_type
& EMULTYPE_SKIP
) {
3141 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
3142 return EMULATE_DONE
;
3145 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
3146 shadow_mask
= vcpu
->arch
.emulate_ctxt
.interruptibility
;
3149 kvm_x86_ops
->set_interrupt_shadow(vcpu
, shadow_mask
);
3151 if (vcpu
->arch
.pio
.string
)
3152 return EMULATE_DO_MMIO
;
3154 if ((r
|| vcpu
->mmio_is_write
) && run
) {
3155 run
->exit_reason
= KVM_EXIT_MMIO
;
3156 run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
;
3157 memcpy(run
->mmio
.data
, vcpu
->mmio_data
, 8);
3158 run
->mmio
.len
= vcpu
->mmio_size
;
3159 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
3163 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
3164 return EMULATE_DONE
;
3165 if (!vcpu
->mmio_needed
) {
3166 kvm_report_emulation_failure(vcpu
, "mmio");
3167 return EMULATE_FAIL
;
3169 return EMULATE_DO_MMIO
;
3172 kvm_set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
3174 if (vcpu
->mmio_is_write
) {
3175 vcpu
->mmio_needed
= 0;
3176 return EMULATE_DO_MMIO
;
3179 return EMULATE_DONE
;
3181 EXPORT_SYMBOL_GPL(emulate_instruction
);
3183 static int pio_copy_data(struct kvm_vcpu
*vcpu
)
3185 void *p
= vcpu
->arch
.pio_data
;
3186 gva_t q
= vcpu
->arch
.pio
.guest_gva
;
3190 bytes
= vcpu
->arch
.pio
.size
* vcpu
->arch
.pio
.cur_count
;
3191 if (vcpu
->arch
.pio
.in
)
3192 ret
= kvm_write_guest_virt(q
, p
, bytes
, vcpu
);
3194 ret
= kvm_read_guest_virt(q
, p
, bytes
, vcpu
);
3198 int complete_pio(struct kvm_vcpu
*vcpu
)
3200 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
3207 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3208 memcpy(&val
, vcpu
->arch
.pio_data
, io
->size
);
3209 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
3213 r
= pio_copy_data(vcpu
);
3220 delta
*= io
->cur_count
;
3222 * The size of the register should really depend on
3223 * current address size.
3225 val
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3227 kvm_register_write(vcpu
, VCPU_REGS_RCX
, val
);
3233 val
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
3235 kvm_register_write(vcpu
, VCPU_REGS_RDI
, val
);
3237 val
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3239 kvm_register_write(vcpu
, VCPU_REGS_RSI
, val
);
3243 io
->count
-= io
->cur_count
;
3249 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3251 /* TODO: String I/O for in kernel device */
3254 if (vcpu
->arch
.pio
.in
)
3255 r
= kvm_io_bus_read(&vcpu
->kvm
->pio_bus
, vcpu
->arch
.pio
.port
,
3256 vcpu
->arch
.pio
.size
, pd
);
3258 r
= kvm_io_bus_write(&vcpu
->kvm
->pio_bus
, vcpu
->arch
.pio
.port
,
3259 vcpu
->arch
.pio
.size
, pd
);
3263 static int pio_string_write(struct kvm_vcpu
*vcpu
)
3265 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
3266 void *pd
= vcpu
->arch
.pio_data
;
3269 for (i
= 0; i
< io
->cur_count
; i
++) {
3270 if (kvm_io_bus_write(&vcpu
->kvm
->pio_bus
,
3271 io
->port
, io
->size
, pd
)) {
3280 int kvm_emulate_pio(struct kvm_vcpu
*vcpu
, int in
, int size
, unsigned port
)
3284 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3285 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3286 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3287 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3288 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= 1;
3289 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3290 vcpu
->arch
.pio
.in
= in
;
3291 vcpu
->arch
.pio
.string
= 0;
3292 vcpu
->arch
.pio
.down
= 0;
3293 vcpu
->arch
.pio
.rep
= 0;
3295 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
3298 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3299 memcpy(vcpu
->arch
.pio_data
, &val
, 4);
3301 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3307 EXPORT_SYMBOL_GPL(kvm_emulate_pio
);
3309 int kvm_emulate_pio_string(struct kvm_vcpu
*vcpu
, int in
,
3310 int size
, unsigned long count
, int down
,
3311 gva_t address
, int rep
, unsigned port
)
3313 unsigned now
, in_page
;
3316 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3317 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3318 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3319 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3320 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= count
;
3321 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3322 vcpu
->arch
.pio
.in
= in
;
3323 vcpu
->arch
.pio
.string
= 1;
3324 vcpu
->arch
.pio
.down
= down
;
3325 vcpu
->arch
.pio
.rep
= rep
;
3327 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
3331 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3336 in_page
= PAGE_SIZE
- offset_in_page(address
);
3338 in_page
= offset_in_page(address
) + size
;
3339 now
= min(count
, (unsigned long)in_page
/ size
);
3344 * String I/O in reverse. Yuck. Kill the guest, fix later.
3346 pr_unimpl(vcpu
, "guest string pio down\n");
3347 kvm_inject_gp(vcpu
, 0);
3350 vcpu
->run
->io
.count
= now
;
3351 vcpu
->arch
.pio
.cur_count
= now
;
3353 if (vcpu
->arch
.pio
.cur_count
== vcpu
->arch
.pio
.count
)
3354 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3356 vcpu
->arch
.pio
.guest_gva
= address
;
3358 if (!vcpu
->arch
.pio
.in
) {
3359 /* string PIO write */
3360 ret
= pio_copy_data(vcpu
);
3361 if (ret
== X86EMUL_PROPAGATE_FAULT
) {
3362 kvm_inject_gp(vcpu
, 0);
3365 if (ret
== 0 && !pio_string_write(vcpu
)) {
3367 if (vcpu
->arch
.pio
.count
== 0)
3371 /* no string PIO read support yet */
3375 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string
);
3377 static void bounce_off(void *info
)
3382 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
3385 struct cpufreq_freqs
*freq
= data
;
3387 struct kvm_vcpu
*vcpu
;
3388 int i
, send_ipi
= 0;
3390 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
3392 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
3394 per_cpu(cpu_tsc_khz
, freq
->cpu
) = freq
->new;
3396 spin_lock(&kvm_lock
);
3397 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3398 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3399 if (vcpu
->cpu
!= freq
->cpu
)
3401 if (!kvm_request_guest_time_update(vcpu
))
3403 if (vcpu
->cpu
!= smp_processor_id())
3407 spin_unlock(&kvm_lock
);
3409 if (freq
->old
< freq
->new && send_ipi
) {
3411 * We upscale the frequency. Must make the guest
3412 * doesn't see old kvmclock values while running with
3413 * the new frequency, otherwise we risk the guest sees
3414 * time go backwards.
3416 * In case we update the frequency for another cpu
3417 * (which might be in guest context) send an interrupt
3418 * to kick the cpu out of guest context. Next time
3419 * guest context is entered kvmclock will be updated,
3420 * so the guest will not see stale values.
3422 smp_call_function_single(freq
->cpu
, bounce_off
, NULL
, 1);
3427 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
3428 .notifier_call
= kvmclock_cpufreq_notifier
3431 static void kvm_timer_init(void)
3435 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
3436 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
3437 CPUFREQ_TRANSITION_NOTIFIER
);
3438 for_each_online_cpu(cpu
) {
3439 unsigned long khz
= cpufreq_get(cpu
);
3442 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
3445 for_each_possible_cpu(cpu
)
3446 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
3450 int kvm_arch_init(void *opaque
)
3453 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
3456 printk(KERN_ERR
"kvm: already loaded the other module\n");
3461 if (!ops
->cpu_has_kvm_support()) {
3462 printk(KERN_ERR
"kvm: no hardware support\n");
3466 if (ops
->disabled_by_bios()) {
3467 printk(KERN_ERR
"kvm: disabled by bios\n");
3472 r
= kvm_mmu_module_init();
3476 kvm_init_msr_list();
3479 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3480 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
3481 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
3482 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
3492 void kvm_arch_exit(void)
3494 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
3495 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
3496 CPUFREQ_TRANSITION_NOTIFIER
);
3498 kvm_mmu_module_exit();
3501 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
3503 ++vcpu
->stat
.halt_exits
;
3504 if (irqchip_in_kernel(vcpu
->kvm
)) {
3505 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
3508 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
3512 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
3514 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
3517 if (is_long_mode(vcpu
))
3520 return a0
| ((gpa_t
)a1
<< 32);
3523 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
3525 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
3528 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3529 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3530 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3531 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3532 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3534 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
3536 if (!is_long_mode(vcpu
)) {
3544 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
3550 case KVM_HC_VAPIC_POLL_IRQ
:
3554 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
3561 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
3562 ++vcpu
->stat
.hypercalls
;
3565 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
3567 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
3569 char instruction
[3];
3571 unsigned long rip
= kvm_rip_read(vcpu
);
3575 * Blow out the MMU to ensure that no other VCPU has an active mapping
3576 * to ensure that the updated hypercall appears atomically across all
3579 kvm_mmu_zap_all(vcpu
->kvm
);
3581 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
3582 if (emulator_write_emulated(rip
, instruction
, 3, vcpu
)
3583 != X86EMUL_CONTINUE
)
3589 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
3591 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
3594 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3596 struct descriptor_table dt
= { limit
, base
};
3598 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
3601 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3603 struct descriptor_table dt
= { limit
, base
};
3605 kvm_x86_ops
->set_idt(vcpu
, &dt
);
3608 void realmode_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
,
3609 unsigned long *rflags
)
3611 kvm_lmsw(vcpu
, msw
);
3612 *rflags
= kvm_get_rflags(vcpu
);
3615 unsigned long realmode_get_cr(struct kvm_vcpu
*vcpu
, int cr
)
3617 unsigned long value
;
3621 value
= vcpu
->arch
.cr0
;
3624 value
= vcpu
->arch
.cr2
;
3627 value
= vcpu
->arch
.cr3
;
3630 value
= kvm_read_cr4(vcpu
);
3633 value
= kvm_get_cr8(vcpu
);
3636 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3643 void realmode_set_cr(struct kvm_vcpu
*vcpu
, int cr
, unsigned long val
,
3644 unsigned long *rflags
)
3648 kvm_set_cr0(vcpu
, mk_cr_64(vcpu
->arch
.cr0
, val
));
3649 *rflags
= kvm_get_rflags(vcpu
);
3652 vcpu
->arch
.cr2
= val
;
3655 kvm_set_cr3(vcpu
, val
);
3658 kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
3661 kvm_set_cr8(vcpu
, val
& 0xfUL
);
3664 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3668 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
3670 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
3671 int j
, nent
= vcpu
->arch
.cpuid_nent
;
3673 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
3674 /* when no next entry is found, the current entry[i] is reselected */
3675 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
3676 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
3677 if (ej
->function
== e
->function
) {
3678 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
3682 return 0; /* silence gcc, even though control never reaches here */
3685 /* find an entry with matching function, matching index (if needed), and that
3686 * should be read next (if it's stateful) */
3687 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
3688 u32 function
, u32 index
)
3690 if (e
->function
!= function
)
3692 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
3694 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
3695 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
3700 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
3701 u32 function
, u32 index
)
3704 struct kvm_cpuid_entry2
*best
= NULL
;
3706 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
3707 struct kvm_cpuid_entry2
*e
;
3709 e
= &vcpu
->arch
.cpuid_entries
[i
];
3710 if (is_matching_cpuid_entry(e
, function
, index
)) {
3711 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
3712 move_to_next_stateful_cpuid_entry(vcpu
, i
);
3717 * Both basic or both extended?
3719 if (((e
->function
^ function
) & 0x80000000) == 0)
3720 if (!best
|| e
->function
> best
->function
)
3726 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
3728 struct kvm_cpuid_entry2
*best
;
3730 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
3732 return best
->eax
& 0xff;
3736 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
3738 u32 function
, index
;
3739 struct kvm_cpuid_entry2
*best
;
3741 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3742 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3743 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
3744 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
3745 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
3746 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
3747 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
3749 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
3750 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
3751 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
3752 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
3754 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3755 trace_kvm_cpuid(function
,
3756 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
3757 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
3758 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
3759 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
3761 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
3764 * Check if userspace requested an interrupt window, and that the
3765 * interrupt window is open.
3767 * No need to exit to userspace if we already have an interrupt queued.
3769 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
3771 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
3772 vcpu
->run
->request_interrupt_window
&&
3773 kvm_arch_interrupt_allowed(vcpu
));
3776 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
3778 struct kvm_run
*kvm_run
= vcpu
->run
;
3780 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
3781 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
3782 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
3783 if (irqchip_in_kernel(vcpu
->kvm
))
3784 kvm_run
->ready_for_interrupt_injection
= 1;
3786 kvm_run
->ready_for_interrupt_injection
=
3787 kvm_arch_interrupt_allowed(vcpu
) &&
3788 !kvm_cpu_has_interrupt(vcpu
) &&
3789 !kvm_event_needs_reinjection(vcpu
);
3792 static void vapic_enter(struct kvm_vcpu
*vcpu
)
3794 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3797 if (!apic
|| !apic
->vapic_addr
)
3800 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3802 vcpu
->arch
.apic
->vapic_page
= page
;
3805 static void vapic_exit(struct kvm_vcpu
*vcpu
)
3807 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3809 if (!apic
|| !apic
->vapic_addr
)
3812 down_read(&vcpu
->kvm
->slots_lock
);
3813 kvm_release_page_dirty(apic
->vapic_page
);
3814 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3815 up_read(&vcpu
->kvm
->slots_lock
);
3818 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
3822 if (!kvm_x86_ops
->update_cr8_intercept
)
3825 if (!vcpu
->arch
.apic
)
3828 if (!vcpu
->arch
.apic
->vapic_addr
)
3829 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
3836 tpr
= kvm_lapic_get_cr8(vcpu
);
3838 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
3841 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
3843 /* try to reinject previous events if any */
3844 if (vcpu
->arch
.exception
.pending
) {
3845 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
3846 vcpu
->arch
.exception
.has_error_code
,
3847 vcpu
->arch
.exception
.error_code
);
3851 if (vcpu
->arch
.nmi_injected
) {
3852 kvm_x86_ops
->set_nmi(vcpu
);
3856 if (vcpu
->arch
.interrupt
.pending
) {
3857 kvm_x86_ops
->set_irq(vcpu
);
3861 /* try to inject new event if pending */
3862 if (vcpu
->arch
.nmi_pending
) {
3863 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
3864 vcpu
->arch
.nmi_pending
= false;
3865 vcpu
->arch
.nmi_injected
= true;
3866 kvm_x86_ops
->set_nmi(vcpu
);
3868 } else if (kvm_cpu_has_interrupt(vcpu
)) {
3869 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
3870 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
3872 kvm_x86_ops
->set_irq(vcpu
);
3877 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
3880 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
3881 vcpu
->run
->request_interrupt_window
;
3884 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD
, &vcpu
->requests
))
3885 kvm_mmu_unload(vcpu
);
3887 r
= kvm_mmu_reload(vcpu
);
3891 if (vcpu
->requests
) {
3892 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
))
3893 __kvm_migrate_timers(vcpu
);
3894 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE
, &vcpu
->requests
))
3895 kvm_write_guest_time(vcpu
);
3896 if (test_and_clear_bit(KVM_REQ_MMU_SYNC
, &vcpu
->requests
))
3897 kvm_mmu_sync_roots(vcpu
);
3898 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH
, &vcpu
->requests
))
3899 kvm_x86_ops
->tlb_flush(vcpu
);
3900 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS
,
3902 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
3906 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
)) {
3907 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
3915 kvm_x86_ops
->prepare_guest_switch(vcpu
);
3916 kvm_load_guest_fpu(vcpu
);
3918 local_irq_disable();
3920 clear_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3921 smp_mb__after_clear_bit();
3923 if (vcpu
->requests
|| need_resched() || signal_pending(current
)) {
3924 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3931 inject_pending_event(vcpu
);
3933 /* enable NMI/IRQ window open exits if needed */
3934 if (vcpu
->arch
.nmi_pending
)
3935 kvm_x86_ops
->enable_nmi_window(vcpu
);
3936 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
3937 kvm_x86_ops
->enable_irq_window(vcpu
);
3939 if (kvm_lapic_enabled(vcpu
)) {
3940 update_cr8_intercept(vcpu
);
3941 kvm_lapic_sync_to_vapic(vcpu
);
3944 up_read(&vcpu
->kvm
->slots_lock
);
3948 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
3950 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
3951 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
3952 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
3953 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
3956 trace_kvm_entry(vcpu
->vcpu_id
);
3957 kvm_x86_ops
->run(vcpu
);
3960 * If the guest has used debug registers, at least dr7
3961 * will be disabled while returning to the host.
3962 * If we don't have active breakpoints in the host, we don't
3963 * care about the messed up debug address registers. But if
3964 * we have some of them active, restore the old state.
3966 if (hw_breakpoint_active())
3967 hw_breakpoint_restore();
3969 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3975 * We must have an instruction between local_irq_enable() and
3976 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3977 * the interrupt shadow. The stat.exits increment will do nicely.
3978 * But we need to prevent reordering, hence this barrier():
3986 down_read(&vcpu
->kvm
->slots_lock
);
3989 * Profile KVM exit RIPs:
3991 if (unlikely(prof_on
== KVM_PROFILING
)) {
3992 unsigned long rip
= kvm_rip_read(vcpu
);
3993 profile_hit(KVM_PROFILING
, (void *)rip
);
3997 kvm_lapic_sync_from_vapic(vcpu
);
3999 r
= kvm_x86_ops
->handle_exit(vcpu
);
4005 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
4009 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
4010 pr_debug("vcpu %d received sipi with vector # %x\n",
4011 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
4012 kvm_lapic_reset(vcpu
);
4013 r
= kvm_arch_vcpu_reset(vcpu
);
4016 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4019 down_read(&vcpu
->kvm
->slots_lock
);
4024 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
)
4025 r
= vcpu_enter_guest(vcpu
);
4027 up_read(&vcpu
->kvm
->slots_lock
);
4028 kvm_vcpu_block(vcpu
);
4029 down_read(&vcpu
->kvm
->slots_lock
);
4030 if (test_and_clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
))
4032 switch(vcpu
->arch
.mp_state
) {
4033 case KVM_MP_STATE_HALTED
:
4034 vcpu
->arch
.mp_state
=
4035 KVM_MP_STATE_RUNNABLE
;
4036 case KVM_MP_STATE_RUNNABLE
:
4038 case KVM_MP_STATE_SIPI_RECEIVED
:
4049 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
4050 if (kvm_cpu_has_pending_timer(vcpu
))
4051 kvm_inject_pending_timer_irqs(vcpu
);
4053 if (dm_request_for_irq_injection(vcpu
)) {
4055 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
4056 ++vcpu
->stat
.request_irq_exits
;
4058 if (signal_pending(current
)) {
4060 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
4061 ++vcpu
->stat
.signal_exits
;
4063 if (need_resched()) {
4064 up_read(&vcpu
->kvm
->slots_lock
);
4066 down_read(&vcpu
->kvm
->slots_lock
);
4070 up_read(&vcpu
->kvm
->slots_lock
);
4071 post_kvm_run_save(vcpu
);
4078 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
4085 if (vcpu
->sigset_active
)
4086 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
4088 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
4089 kvm_vcpu_block(vcpu
);
4090 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
4095 /* re-sync apic's tpr */
4096 if (!irqchip_in_kernel(vcpu
->kvm
))
4097 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
4099 if (vcpu
->arch
.pio
.cur_count
) {
4100 r
= complete_pio(vcpu
);
4104 if (vcpu
->mmio_needed
) {
4105 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
4106 vcpu
->mmio_read_completed
= 1;
4107 vcpu
->mmio_needed
= 0;
4109 down_read(&vcpu
->kvm
->slots_lock
);
4110 r
= emulate_instruction(vcpu
, vcpu
->arch
.mmio_fault_cr2
, 0,
4111 EMULTYPE_NO_DECODE
);
4112 up_read(&vcpu
->kvm
->slots_lock
);
4113 if (r
== EMULATE_DO_MMIO
) {
4115 * Read-modify-write. Back to userspace.
4121 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
4122 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
4123 kvm_run
->hypercall
.ret
);
4125 r
= __vcpu_run(vcpu
);
4128 if (vcpu
->sigset_active
)
4129 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
4135 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
4139 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4140 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4141 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4142 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4143 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4144 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4145 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4146 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4147 #ifdef CONFIG_X86_64
4148 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4149 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
4150 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
4151 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
4152 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
4153 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
4154 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
4155 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
4158 regs
->rip
= kvm_rip_read(vcpu
);
4159 regs
->rflags
= kvm_get_rflags(vcpu
);
4166 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
4170 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
4171 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
4172 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
4173 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
4174 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
4175 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
4176 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
4177 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
4178 #ifdef CONFIG_X86_64
4179 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
4180 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
4181 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
4182 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
4183 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
4184 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
4185 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
4186 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
4189 kvm_rip_write(vcpu
, regs
->rip
);
4190 kvm_set_rflags(vcpu
, regs
->rflags
);
4192 vcpu
->arch
.exception
.pending
= false;
4199 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4200 struct kvm_segment
*var
, int seg
)
4202 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4205 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
4207 struct kvm_segment cs
;
4209 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
4213 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
4215 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
4216 struct kvm_sregs
*sregs
)
4218 struct descriptor_table dt
;
4222 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4223 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4224 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4225 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4226 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4227 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4229 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4230 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4232 kvm_x86_ops
->get_idt(vcpu
, &dt
);
4233 sregs
->idt
.limit
= dt
.limit
;
4234 sregs
->idt
.base
= dt
.base
;
4235 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
4236 sregs
->gdt
.limit
= dt
.limit
;
4237 sregs
->gdt
.base
= dt
.base
;
4239 sregs
->cr0
= vcpu
->arch
.cr0
;
4240 sregs
->cr2
= vcpu
->arch
.cr2
;
4241 sregs
->cr3
= vcpu
->arch
.cr3
;
4242 sregs
->cr4
= kvm_read_cr4(vcpu
);
4243 sregs
->cr8
= kvm_get_cr8(vcpu
);
4244 sregs
->efer
= vcpu
->arch
.shadow_efer
;
4245 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
4247 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
4249 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
4250 set_bit(vcpu
->arch
.interrupt
.nr
,
4251 (unsigned long *)sregs
->interrupt_bitmap
);
4258 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
4259 struct kvm_mp_state
*mp_state
)
4262 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
4267 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
4268 struct kvm_mp_state
*mp_state
)
4271 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
4276 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4277 struct kvm_segment
*var
, int seg
)
4279 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4282 static void seg_desct_to_kvm_desct(struct desc_struct
*seg_desc
, u16 selector
,
4283 struct kvm_segment
*kvm_desct
)
4285 kvm_desct
->base
= get_desc_base(seg_desc
);
4286 kvm_desct
->limit
= get_desc_limit(seg_desc
);
4288 kvm_desct
->limit
<<= 12;
4289 kvm_desct
->limit
|= 0xfff;
4291 kvm_desct
->selector
= selector
;
4292 kvm_desct
->type
= seg_desc
->type
;
4293 kvm_desct
->present
= seg_desc
->p
;
4294 kvm_desct
->dpl
= seg_desc
->dpl
;
4295 kvm_desct
->db
= seg_desc
->d
;
4296 kvm_desct
->s
= seg_desc
->s
;
4297 kvm_desct
->l
= seg_desc
->l
;
4298 kvm_desct
->g
= seg_desc
->g
;
4299 kvm_desct
->avl
= seg_desc
->avl
;
4301 kvm_desct
->unusable
= 1;
4303 kvm_desct
->unusable
= 0;
4304 kvm_desct
->padding
= 0;
4307 static void get_segment_descriptor_dtable(struct kvm_vcpu
*vcpu
,
4309 struct descriptor_table
*dtable
)
4311 if (selector
& 1 << 2) {
4312 struct kvm_segment kvm_seg
;
4314 kvm_get_segment(vcpu
, &kvm_seg
, VCPU_SREG_LDTR
);
4316 if (kvm_seg
.unusable
)
4319 dtable
->limit
= kvm_seg
.limit
;
4320 dtable
->base
= kvm_seg
.base
;
4323 kvm_x86_ops
->get_gdt(vcpu
, dtable
);
4326 /* allowed just for 8 bytes segments */
4327 static int load_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4328 struct desc_struct
*seg_desc
)
4330 struct descriptor_table dtable
;
4331 u16 index
= selector
>> 3;
4333 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4335 if (dtable
.limit
< index
* 8 + 7) {
4336 kvm_queue_exception_e(vcpu
, GP_VECTOR
, selector
& 0xfffc);
4339 return kvm_read_guest_virt(dtable
.base
+ index
*8, seg_desc
, sizeof(*seg_desc
), vcpu
);
4342 /* allowed just for 8 bytes segments */
4343 static int save_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4344 struct desc_struct
*seg_desc
)
4346 struct descriptor_table dtable
;
4347 u16 index
= selector
>> 3;
4349 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4351 if (dtable
.limit
< index
* 8 + 7)
4353 return kvm_write_guest_virt(dtable
.base
+ index
*8, seg_desc
, sizeof(*seg_desc
), vcpu
);
4356 static gpa_t
get_tss_base_addr(struct kvm_vcpu
*vcpu
,
4357 struct desc_struct
*seg_desc
)
4359 u32 base_addr
= get_desc_base(seg_desc
);
4361 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, base_addr
);
4364 static u16
get_segment_selector(struct kvm_vcpu
*vcpu
, int seg
)
4366 struct kvm_segment kvm_seg
;
4368 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4369 return kvm_seg
.selector
;
4372 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu
*vcpu
,
4374 struct kvm_segment
*kvm_seg
)
4376 struct desc_struct seg_desc
;
4378 if (load_guest_segment_descriptor(vcpu
, selector
, &seg_desc
))
4380 seg_desct_to_kvm_desct(&seg_desc
, selector
, kvm_seg
);
4384 static int kvm_load_realmode_segment(struct kvm_vcpu
*vcpu
, u16 selector
, int seg
)
4386 struct kvm_segment segvar
= {
4387 .base
= selector
<< 4,
4389 .selector
= selector
,
4400 kvm_x86_ops
->set_segment(vcpu
, &segvar
, seg
);
4404 static int is_vm86_segment(struct kvm_vcpu
*vcpu
, int seg
)
4406 return (seg
!= VCPU_SREG_LDTR
) &&
4407 (seg
!= VCPU_SREG_TR
) &&
4408 (kvm_get_rflags(vcpu
) & X86_EFLAGS_VM
);
4411 static void kvm_check_segment_descriptor(struct kvm_vcpu
*vcpu
, int seg
,
4414 /* NULL selector is not valid for CS and SS */
4415 if (seg
== VCPU_SREG_CS
|| seg
== VCPU_SREG_SS
)
4417 kvm_queue_exception_e(vcpu
, TS_VECTOR
, selector
>> 3);
4420 int kvm_load_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4421 int type_bits
, int seg
)
4423 struct kvm_segment kvm_seg
;
4425 if (is_vm86_segment(vcpu
, seg
) || !(vcpu
->arch
.cr0
& X86_CR0_PE
))
4426 return kvm_load_realmode_segment(vcpu
, selector
, seg
);
4427 if (load_segment_descriptor_to_kvm_desct(vcpu
, selector
, &kvm_seg
))
4430 kvm_check_segment_descriptor(vcpu
, seg
, selector
);
4431 kvm_seg
.type
|= type_bits
;
4433 if (seg
!= VCPU_SREG_SS
&& seg
!= VCPU_SREG_CS
&&
4434 seg
!= VCPU_SREG_LDTR
)
4436 kvm_seg
.unusable
= 1;
4438 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4442 static void save_state_to_tss32(struct kvm_vcpu
*vcpu
,
4443 struct tss_segment_32
*tss
)
4445 tss
->cr3
= vcpu
->arch
.cr3
;
4446 tss
->eip
= kvm_rip_read(vcpu
);
4447 tss
->eflags
= kvm_get_rflags(vcpu
);
4448 tss
->eax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4449 tss
->ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4450 tss
->edx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4451 tss
->ebx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4452 tss
->esp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4453 tss
->ebp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4454 tss
->esi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4455 tss
->edi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4456 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4457 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4458 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4459 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4460 tss
->fs
= get_segment_selector(vcpu
, VCPU_SREG_FS
);
4461 tss
->gs
= get_segment_selector(vcpu
, VCPU_SREG_GS
);
4462 tss
->ldt_selector
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4465 static int load_state_from_tss32(struct kvm_vcpu
*vcpu
,
4466 struct tss_segment_32
*tss
)
4468 kvm_set_cr3(vcpu
, tss
->cr3
);
4470 kvm_rip_write(vcpu
, tss
->eip
);
4471 kvm_set_rflags(vcpu
, tss
->eflags
| 2);
4473 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->eax
);
4474 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->ecx
);
4475 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->edx
);
4476 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->ebx
);
4477 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->esp
);
4478 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->ebp
);
4479 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->esi
);
4480 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->edi
);
4482 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt_selector
, 0, VCPU_SREG_LDTR
))
4485 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4488 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4491 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4494 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4497 if (kvm_load_segment_descriptor(vcpu
, tss
->fs
, 1, VCPU_SREG_FS
))
4500 if (kvm_load_segment_descriptor(vcpu
, tss
->gs
, 1, VCPU_SREG_GS
))
4505 static void save_state_to_tss16(struct kvm_vcpu
*vcpu
,
4506 struct tss_segment_16
*tss
)
4508 tss
->ip
= kvm_rip_read(vcpu
);
4509 tss
->flag
= kvm_get_rflags(vcpu
);
4510 tss
->ax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4511 tss
->cx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4512 tss
->dx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4513 tss
->bx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4514 tss
->sp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4515 tss
->bp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4516 tss
->si
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4517 tss
->di
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4519 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4520 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4521 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4522 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4523 tss
->ldt
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4526 static int load_state_from_tss16(struct kvm_vcpu
*vcpu
,
4527 struct tss_segment_16
*tss
)
4529 kvm_rip_write(vcpu
, tss
->ip
);
4530 kvm_set_rflags(vcpu
, tss
->flag
| 2);
4531 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->ax
);
4532 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->cx
);
4533 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->dx
);
4534 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->bx
);
4535 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->sp
);
4536 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->bp
);
4537 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->si
);
4538 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->di
);
4540 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt
, 0, VCPU_SREG_LDTR
))
4543 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4546 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4549 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4552 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4557 static int kvm_task_switch_16(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4558 u16 old_tss_sel
, u32 old_tss_base
,
4559 struct desc_struct
*nseg_desc
)
4561 struct tss_segment_16 tss_segment_16
;
4564 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4565 sizeof tss_segment_16
))
4568 save_state_to_tss16(vcpu
, &tss_segment_16
);
4570 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4571 sizeof tss_segment_16
))
4574 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4575 &tss_segment_16
, sizeof tss_segment_16
))
4578 if (old_tss_sel
!= 0xffff) {
4579 tss_segment_16
.prev_task_link
= old_tss_sel
;
4581 if (kvm_write_guest(vcpu
->kvm
,
4582 get_tss_base_addr(vcpu
, nseg_desc
),
4583 &tss_segment_16
.prev_task_link
,
4584 sizeof tss_segment_16
.prev_task_link
))
4588 if (load_state_from_tss16(vcpu
, &tss_segment_16
))
4596 static int kvm_task_switch_32(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4597 u16 old_tss_sel
, u32 old_tss_base
,
4598 struct desc_struct
*nseg_desc
)
4600 struct tss_segment_32 tss_segment_32
;
4603 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4604 sizeof tss_segment_32
))
4607 save_state_to_tss32(vcpu
, &tss_segment_32
);
4609 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4610 sizeof tss_segment_32
))
4613 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4614 &tss_segment_32
, sizeof tss_segment_32
))
4617 if (old_tss_sel
!= 0xffff) {
4618 tss_segment_32
.prev_task_link
= old_tss_sel
;
4620 if (kvm_write_guest(vcpu
->kvm
,
4621 get_tss_base_addr(vcpu
, nseg_desc
),
4622 &tss_segment_32
.prev_task_link
,
4623 sizeof tss_segment_32
.prev_task_link
))
4627 if (load_state_from_tss32(vcpu
, &tss_segment_32
))
4635 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
)
4637 struct kvm_segment tr_seg
;
4638 struct desc_struct cseg_desc
;
4639 struct desc_struct nseg_desc
;
4641 u32 old_tss_base
= get_segment_base(vcpu
, VCPU_SREG_TR
);
4642 u16 old_tss_sel
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
4644 old_tss_base
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, old_tss_base
);
4646 /* FIXME: Handle errors. Failure to read either TSS or their
4647 * descriptors should generate a pagefault.
4649 if (load_guest_segment_descriptor(vcpu
, tss_selector
, &nseg_desc
))
4652 if (load_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
))
4655 if (reason
!= TASK_SWITCH_IRET
) {
4658 cpl
= kvm_x86_ops
->get_cpl(vcpu
);
4659 if ((tss_selector
& 3) > nseg_desc
.dpl
|| cpl
> nseg_desc
.dpl
) {
4660 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
4665 if (!nseg_desc
.p
|| get_desc_limit(&nseg_desc
) < 0x67) {
4666 kvm_queue_exception_e(vcpu
, TS_VECTOR
, tss_selector
& 0xfffc);
4670 if (reason
== TASK_SWITCH_IRET
|| reason
== TASK_SWITCH_JMP
) {
4671 cseg_desc
.type
&= ~(1 << 1); //clear the B flag
4672 save_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
);
4675 if (reason
== TASK_SWITCH_IRET
) {
4676 u32 eflags
= kvm_get_rflags(vcpu
);
4677 kvm_set_rflags(vcpu
, eflags
& ~X86_EFLAGS_NT
);
4680 /* set back link to prev task only if NT bit is set in eflags
4681 note that old_tss_sel is not used afetr this point */
4682 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4683 old_tss_sel
= 0xffff;
4685 if (nseg_desc
.type
& 8)
4686 ret
= kvm_task_switch_32(vcpu
, tss_selector
, old_tss_sel
,
4687 old_tss_base
, &nseg_desc
);
4689 ret
= kvm_task_switch_16(vcpu
, tss_selector
, old_tss_sel
,
4690 old_tss_base
, &nseg_desc
);
4692 if (reason
== TASK_SWITCH_CALL
|| reason
== TASK_SWITCH_GATE
) {
4693 u32 eflags
= kvm_get_rflags(vcpu
);
4694 kvm_set_rflags(vcpu
, eflags
| X86_EFLAGS_NT
);
4697 if (reason
!= TASK_SWITCH_IRET
) {
4698 nseg_desc
.type
|= (1 << 1);
4699 save_guest_segment_descriptor(vcpu
, tss_selector
,
4703 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
| X86_CR0_TS
);
4704 seg_desct_to_kvm_desct(&nseg_desc
, tss_selector
, &tr_seg
);
4706 kvm_set_segment(vcpu
, &tr_seg
, VCPU_SREG_TR
);
4710 EXPORT_SYMBOL_GPL(kvm_task_switch
);
4712 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
4713 struct kvm_sregs
*sregs
)
4715 int mmu_reset_needed
= 0;
4716 int pending_vec
, max_bits
;
4717 struct descriptor_table dt
;
4721 dt
.limit
= sregs
->idt
.limit
;
4722 dt
.base
= sregs
->idt
.base
;
4723 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4724 dt
.limit
= sregs
->gdt
.limit
;
4725 dt
.base
= sregs
->gdt
.base
;
4726 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4728 vcpu
->arch
.cr2
= sregs
->cr2
;
4729 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
4730 vcpu
->arch
.cr3
= sregs
->cr3
;
4732 kvm_set_cr8(vcpu
, sregs
->cr8
);
4734 mmu_reset_needed
|= vcpu
->arch
.shadow_efer
!= sregs
->efer
;
4735 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
4736 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
4738 mmu_reset_needed
|= vcpu
->arch
.cr0
!= sregs
->cr0
;
4739 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
4740 vcpu
->arch
.cr0
= sregs
->cr0
;
4742 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
4743 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
4744 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
4745 load_pdptrs(vcpu
, vcpu
->arch
.cr3
);
4746 mmu_reset_needed
= 1;
4749 if (mmu_reset_needed
)
4750 kvm_mmu_reset_context(vcpu
);
4752 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
4753 pending_vec
= find_first_bit(
4754 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
4755 if (pending_vec
< max_bits
) {
4756 kvm_queue_interrupt(vcpu
, pending_vec
, false);
4757 pr_debug("Set back pending irq %d\n", pending_vec
);
4758 if (irqchip_in_kernel(vcpu
->kvm
))
4759 kvm_pic_clear_isr_ack(vcpu
->kvm
);
4762 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4763 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4764 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4765 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4766 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4767 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4769 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4770 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4772 update_cr8_intercept(vcpu
);
4774 /* Older userspace won't unhalt the vcpu on reset. */
4775 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
4776 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
4777 !(vcpu
->arch
.cr0
& X86_CR0_PE
))
4778 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4785 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
4786 struct kvm_guest_debug
*dbg
)
4788 unsigned long rflags
;
4793 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
4795 if (vcpu
->arch
.exception
.pending
)
4797 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
4798 kvm_queue_exception(vcpu
, DB_VECTOR
);
4800 kvm_queue_exception(vcpu
, BP_VECTOR
);
4804 * Read rflags as long as potentially injected trace flags are still
4807 rflags
= kvm_get_rflags(vcpu
);
4809 vcpu
->guest_debug
= dbg
->control
;
4810 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
4811 vcpu
->guest_debug
= 0;
4813 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
4814 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
4815 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
4816 vcpu
->arch
.switch_db_regs
=
4817 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
4819 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
4820 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
4821 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
4824 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
4825 vcpu
->arch
.singlestep_cs
=
4826 get_segment_selector(vcpu
, VCPU_SREG_CS
);
4827 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
);
4831 * Trigger an rflags update that will inject or remove the trace
4834 kvm_set_rflags(vcpu
, rflags
);
4836 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
4847 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4848 * we have asm/x86/processor.h
4859 u32 st_space
[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4860 #ifdef CONFIG_X86_64
4861 u32 xmm_space
[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4863 u32 xmm_space
[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4868 * Translate a guest virtual address to a guest physical address.
4870 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
4871 struct kvm_translation
*tr
)
4873 unsigned long vaddr
= tr
->linear_address
;
4877 down_read(&vcpu
->kvm
->slots_lock
);
4878 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, vaddr
);
4879 up_read(&vcpu
->kvm
->slots_lock
);
4880 tr
->physical_address
= gpa
;
4881 tr
->valid
= gpa
!= UNMAPPED_GVA
;
4889 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4891 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4895 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
4896 fpu
->fcw
= fxsave
->cwd
;
4897 fpu
->fsw
= fxsave
->swd
;
4898 fpu
->ftwx
= fxsave
->twd
;
4899 fpu
->last_opcode
= fxsave
->fop
;
4900 fpu
->last_ip
= fxsave
->rip
;
4901 fpu
->last_dp
= fxsave
->rdp
;
4902 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
4909 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4911 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4915 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
4916 fxsave
->cwd
= fpu
->fcw
;
4917 fxsave
->swd
= fpu
->fsw
;
4918 fxsave
->twd
= fpu
->ftwx
;
4919 fxsave
->fop
= fpu
->last_opcode
;
4920 fxsave
->rip
= fpu
->last_ip
;
4921 fxsave
->rdp
= fpu
->last_dp
;
4922 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
4929 void fx_init(struct kvm_vcpu
*vcpu
)
4931 unsigned after_mxcsr_mask
;
4934 * Touch the fpu the first time in non atomic context as if
4935 * this is the first fpu instruction the exception handler
4936 * will fire before the instruction returns and it'll have to
4937 * allocate ram with GFP_KERNEL.
4940 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4942 /* Initialize guest FPU by resetting ours and saving into guest's */
4944 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4946 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4947 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4950 vcpu
->arch
.cr0
|= X86_CR0_ET
;
4951 after_mxcsr_mask
= offsetof(struct i387_fxsave_struct
, st_space
);
4952 vcpu
->arch
.guest_fx_image
.mxcsr
= 0x1f80;
4953 memset((void *)&vcpu
->arch
.guest_fx_image
+ after_mxcsr_mask
,
4954 0, sizeof(struct i387_fxsave_struct
) - after_mxcsr_mask
);
4956 EXPORT_SYMBOL_GPL(fx_init
);
4958 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
4960 if (!vcpu
->fpu_active
|| vcpu
->guest_fpu_loaded
)
4963 vcpu
->guest_fpu_loaded
= 1;
4964 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4965 kvm_fx_restore(&vcpu
->arch
.guest_fx_image
);
4967 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu
);
4969 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
4971 if (!vcpu
->guest_fpu_loaded
)
4974 vcpu
->guest_fpu_loaded
= 0;
4975 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4976 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4977 ++vcpu
->stat
.fpu_reload
;
4979 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu
);
4981 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
4983 if (vcpu
->arch
.time_page
) {
4984 kvm_release_page_dirty(vcpu
->arch
.time_page
);
4985 vcpu
->arch
.time_page
= NULL
;
4988 kvm_x86_ops
->vcpu_free(vcpu
);
4991 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
4994 return kvm_x86_ops
->vcpu_create(kvm
, id
);
4997 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
5001 /* We do fxsave: this must be aligned. */
5002 BUG_ON((unsigned long)&vcpu
->arch
.host_fx_image
& 0xF);
5004 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
5006 r
= kvm_arch_vcpu_reset(vcpu
);
5008 r
= kvm_mmu_setup(vcpu
);
5015 kvm_x86_ops
->vcpu_free(vcpu
);
5019 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
5022 kvm_mmu_unload(vcpu
);
5025 kvm_x86_ops
->vcpu_free(vcpu
);
5028 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
5030 vcpu
->arch
.nmi_pending
= false;
5031 vcpu
->arch
.nmi_injected
= false;
5033 vcpu
->arch
.switch_db_regs
= 0;
5034 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
5035 vcpu
->arch
.dr6
= DR6_FIXED_1
;
5036 vcpu
->arch
.dr7
= DR7_FIXED_1
;
5038 return kvm_x86_ops
->vcpu_reset(vcpu
);
5041 int kvm_arch_hardware_enable(void *garbage
)
5044 * Since this may be called from a hotplug notifcation,
5045 * we can't get the CPU frequency directly.
5047 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5048 int cpu
= raw_smp_processor_id();
5049 per_cpu(cpu_tsc_khz
, cpu
) = 0;
5052 kvm_shared_msr_cpu_online();
5054 return kvm_x86_ops
->hardware_enable(garbage
);
5057 void kvm_arch_hardware_disable(void *garbage
)
5059 kvm_x86_ops
->hardware_disable(garbage
);
5060 drop_user_return_notifiers(garbage
);
5063 int kvm_arch_hardware_setup(void)
5065 return kvm_x86_ops
->hardware_setup();
5068 void kvm_arch_hardware_unsetup(void)
5070 kvm_x86_ops
->hardware_unsetup();
5073 void kvm_arch_check_processor_compat(void *rtn
)
5075 kvm_x86_ops
->check_processor_compatibility(rtn
);
5078 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
5084 BUG_ON(vcpu
->kvm
== NULL
);
5087 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
5088 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
5089 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5091 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
5093 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
5098 vcpu
->arch
.pio_data
= page_address(page
);
5100 r
= kvm_mmu_create(vcpu
);
5102 goto fail_free_pio_data
;
5104 if (irqchip_in_kernel(kvm
)) {
5105 r
= kvm_create_lapic(vcpu
);
5107 goto fail_mmu_destroy
;
5110 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
5112 if (!vcpu
->arch
.mce_banks
) {
5114 goto fail_free_lapic
;
5116 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
5120 kvm_free_lapic(vcpu
);
5122 kvm_mmu_destroy(vcpu
);
5124 free_page((unsigned long)vcpu
->arch
.pio_data
);
5129 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
5131 kfree(vcpu
->arch
.mce_banks
);
5132 kvm_free_lapic(vcpu
);
5133 down_read(&vcpu
->kvm
->slots_lock
);
5134 kvm_mmu_destroy(vcpu
);
5135 up_read(&vcpu
->kvm
->slots_lock
);
5136 free_page((unsigned long)vcpu
->arch
.pio_data
);
5139 struct kvm
*kvm_arch_create_vm(void)
5141 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
5144 return ERR_PTR(-ENOMEM
);
5146 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
5147 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
5149 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5150 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
5152 rdtscll(kvm
->arch
.vm_init_tsc
);
5157 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
5160 kvm_mmu_unload(vcpu
);
5164 static void kvm_free_vcpus(struct kvm
*kvm
)
5167 struct kvm_vcpu
*vcpu
;
5170 * Unpin any mmu pages first.
5172 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5173 kvm_unload_vcpu_mmu(vcpu
);
5174 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5175 kvm_arch_vcpu_free(vcpu
);
5177 mutex_lock(&kvm
->lock
);
5178 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
5179 kvm
->vcpus
[i
] = NULL
;
5181 atomic_set(&kvm
->online_vcpus
, 0);
5182 mutex_unlock(&kvm
->lock
);
5185 void kvm_arch_sync_events(struct kvm
*kvm
)
5187 kvm_free_all_assigned_devices(kvm
);
5190 void kvm_arch_destroy_vm(struct kvm
*kvm
)
5192 kvm_iommu_unmap_guest(kvm
);
5194 kfree(kvm
->arch
.vpic
);
5195 kfree(kvm
->arch
.vioapic
);
5196 kvm_free_vcpus(kvm
);
5197 kvm_free_physmem(kvm
);
5198 if (kvm
->arch
.apic_access_page
)
5199 put_page(kvm
->arch
.apic_access_page
);
5200 if (kvm
->arch
.ept_identity_pagetable
)
5201 put_page(kvm
->arch
.ept_identity_pagetable
);
5205 int kvm_arch_set_memory_region(struct kvm
*kvm
,
5206 struct kvm_userspace_memory_region
*mem
,
5207 struct kvm_memory_slot old
,
5210 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
5211 struct kvm_memory_slot
*memslot
= &kvm
->memslots
[mem
->slot
];
5213 /*To keep backward compatibility with older userspace,
5214 *x86 needs to hanlde !user_alloc case.
5217 if (npages
&& !old
.rmap
) {
5218 unsigned long userspace_addr
;
5220 down_write(¤t
->mm
->mmap_sem
);
5221 userspace_addr
= do_mmap(NULL
, 0,
5223 PROT_READ
| PROT_WRITE
,
5224 MAP_PRIVATE
| MAP_ANONYMOUS
,
5226 up_write(¤t
->mm
->mmap_sem
);
5228 if (IS_ERR((void *)userspace_addr
))
5229 return PTR_ERR((void *)userspace_addr
);
5231 /* set userspace_addr atomically for kvm_hva_to_rmapp */
5232 spin_lock(&kvm
->mmu_lock
);
5233 memslot
->userspace_addr
= userspace_addr
;
5234 spin_unlock(&kvm
->mmu_lock
);
5236 if (!old
.user_alloc
&& old
.rmap
) {
5239 down_write(¤t
->mm
->mmap_sem
);
5240 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
5241 old
.npages
* PAGE_SIZE
);
5242 up_write(¤t
->mm
->mmap_sem
);
5245 "kvm_vm_ioctl_set_memory_region: "
5246 "failed to munmap memory\n");
5251 spin_lock(&kvm
->mmu_lock
);
5252 if (!kvm
->arch
.n_requested_mmu_pages
) {
5253 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
5254 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
5257 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
5258 spin_unlock(&kvm
->mmu_lock
);
5263 void kvm_arch_flush_shadow(struct kvm
*kvm
)
5265 kvm_mmu_zap_all(kvm
);
5266 kvm_reload_remote_mmus(kvm
);
5269 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
5271 return vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
5272 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
5273 || vcpu
->arch
.nmi_pending
||
5274 (kvm_arch_interrupt_allowed(vcpu
) &&
5275 kvm_cpu_has_interrupt(vcpu
));
5278 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
5281 int cpu
= vcpu
->cpu
;
5283 if (waitqueue_active(&vcpu
->wq
)) {
5284 wake_up_interruptible(&vcpu
->wq
);
5285 ++vcpu
->stat
.halt_wakeup
;
5289 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
5290 if (!test_and_set_bit(KVM_REQ_KICK
, &vcpu
->requests
))
5291 smp_send_reschedule(cpu
);
5295 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
5297 return kvm_x86_ops
->interrupt_allowed(vcpu
);
5300 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
5302 unsigned long rflags
;
5304 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5305 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5306 rflags
&= ~(unsigned long)(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
5309 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
5311 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
5313 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
5314 vcpu
->arch
.singlestep_cs
==
5315 get_segment_selector(vcpu
, VCPU_SREG_CS
) &&
5316 vcpu
->arch
.singlestep_rip
== kvm_rip_read(vcpu
))
5317 rflags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
5318 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
5320 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
5322 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
5323 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
5324 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
5325 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
5326 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
5327 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
5328 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
5329 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
5330 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
5331 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
5332 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);