1 /************************************************************************
3 * ICP vortex GmbH: GDT ISA/EISA/PCI Disk Array Controllers *
4 * Intel Corporation: Storage RAID Controllers *
7 * Copyright (C) 1995-06 ICP vortex GmbH, Achim Leubner *
8 * Copyright (C) 2002-04 Intel Corporation *
9 * Copyright (C) 2003-06 Adaptec Inc. *
10 * <achim_leubner@adaptec.com> *
13 * Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com> *
14 * Johannes Dinner <johannes_dinner@adaptec.com> *
16 * This program is free software; you can redistribute it and/or modify *
17 * it under the terms of the GNU General Public License as published *
18 * by the Free Software Foundation; either version 2 of the License, *
19 * or (at your option) any later version. *
21 * This program is distributed in the hope that it will be useful, *
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
24 * GNU General Public License for more details. *
26 * You should have received a copy of the GNU General Public License *
27 * along with this kernel; if not, write to the Free Software *
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *
30 * Linux kernel 2.6.x supported *
32 ************************************************************************/
34 /* All GDT Disk Array Controllers are fully supported by this driver.
35 * This includes the PCI/EISA/ISA SCSI Disk Array Controllers and the
36 * PCI Fibre Channel Disk Array Controllers. See gdth.h for a complete
37 * list of all controller types.
39 * If you have one or more GDT3000/3020 EISA controllers with
40 * controller BIOS disabled, you have to set the IRQ values with the
41 * command line option "gdth=irq1,irq2,...", where the irq1,irq2,... are
42 * the IRQ values for the EISA controllers.
44 * After the optional list of IRQ values, other possible
45 * command line options are:
46 * disable:Y disable driver
47 * disable:N enable driver
48 * reserve_mode:0 reserve no drives for the raw service
49 * reserve_mode:1 reserve all not init., removable drives
50 * reserve_mode:2 reserve all not init. drives
51 * reserve_list:h,b,t,l,h,b,t,l,... reserve particular drive(s) with
52 * h- controller no., b- channel no.,
53 * t- target ID, l- LUN
54 * reverse_scan:Y reverse scan order for PCI controllers
55 * reverse_scan:N scan PCI controllers like BIOS
56 * max_ids:x x - target ID count per channel (1..MAXID)
57 * rescan:Y rescan all channels/IDs
58 * rescan:N use all devices found until now
59 * hdr_channel:x x - number of virtual bus for host drives
60 * shared_access:Y disable driver reserve/release protocol to
61 * access a shared resource from several nodes,
62 * appropriate controller firmware required
63 * shared_access:N enable driver reserve/release protocol
64 * probe_eisa_isa:Y scan for EISA/ISA controllers
65 * probe_eisa_isa:N do not scan for EISA/ISA controllers
66 * force_dma32:Y use only 32 bit DMA mode
67 * force_dma32:N use 64 bit DMA mode, if supported
69 * The default values are: "gdth=disable:N,reserve_mode:1,reverse_scan:N,
70 * max_ids:127,rescan:N,hdr_channel:0,
71 * shared_access:Y,probe_eisa_isa:N,force_dma32:N".
72 * Here is another example: "gdth=reserve_list:0,1,2,0,0,1,3,0,rescan:Y".
74 * When loading the gdth driver as a module, the same options are available.
75 * You can set the IRQs with "IRQ=...". However, the syntax to specify the
76 * options changes slightly. You must replace all ',' between options
77 * with ' ' and all ':' with '=' and you must use
78 * '1' in place of 'Y' and '0' in place of 'N'.
80 * Default: "modprobe gdth disable=0 reserve_mode=1 reverse_scan=0
81 * max_ids=127 rescan=0 hdr_channel=0 shared_access=0
82 * probe_eisa_isa=0 force_dma32=0"
83 * The other example: "modprobe gdth reserve_list=0,1,2,0,0,1,3,0 rescan=1".
86 /* The meaning of the Scsi_Pointer members in this driver is as follows:
88 * this_residual: unused
90 * dma_handle: will drop in !use_sg patch.
91 * buffers_residual: unused
92 * Status: DMA mem. mappings (FIXME: drop in !use_sg patch.)
94 * have_data_in: unused
95 * sent_command: unused
100 /* interrupt coalescing */
101 /* #define INT_COAL */
104 #define GDTH_STATISTICS
106 #include <linux/module.h>
108 #include <linux/version.h>
109 #include <linux/kernel.h>
110 #include <linux/types.h>
111 #include <linux/pci.h>
112 #include <linux/string.h>
113 #include <linux/ctype.h>
114 #include <linux/ioport.h>
115 #include <linux/delay.h>
116 #include <linux/interrupt.h>
117 #include <linux/in.h>
118 #include <linux/proc_fs.h>
119 #include <linux/time.h>
120 #include <linux/timer.h>
121 #include <linux/dma-mapping.h>
122 #include <linux/list.h>
125 #include <linux/mc146818rtc.h>
127 #include <linux/reboot.h>
130 #include <asm/system.h>
132 #include <asm/uaccess.h>
133 #include <linux/spinlock.h>
134 #include <linux/blkdev.h>
137 #include <scsi/scsi_host.h>
140 static void gdth_delay(int milliseconds
);
141 static void gdth_eval_mapping(ulong32 size
, ulong32
*cyls
, int *heads
, int *secs
);
142 static irqreturn_t
gdth_interrupt(int irq
, void *dev_id
);
143 static irqreturn_t
__gdth_interrupt(gdth_ha_str
*ha
, int irq
,
144 int gdth_from_wait
, int* pIndex
);
145 static int gdth_sync_event(gdth_ha_str
*ha
, int service
, unchar index
,
147 static int gdth_async_event(gdth_ha_str
*ha
);
148 static void gdth_log_event(gdth_evt_data
*dvr
, char *buffer
);
150 static void gdth_putq(gdth_ha_str
*ha
, Scsi_Cmnd
*scp
, unchar priority
);
151 static void gdth_next(gdth_ha_str
*ha
);
152 static int gdth_fill_raw_cmd(gdth_ha_str
*ha
, Scsi_Cmnd
*scp
, unchar b
);
153 static int gdth_special_cmd(gdth_ha_str
*ha
, Scsi_Cmnd
*scp
);
154 static gdth_evt_str
*gdth_store_event(gdth_ha_str
*ha
, ushort source
,
155 ushort idx
, gdth_evt_data
*evt
);
156 static int gdth_read_event(gdth_ha_str
*ha
, int handle
, gdth_evt_str
*estr
);
157 static void gdth_readapp_event(gdth_ha_str
*ha
, unchar application
,
159 static void gdth_clear_events(void);
161 static void gdth_copy_internal_data(gdth_ha_str
*ha
, Scsi_Cmnd
*scp
,
162 char *buffer
,ushort count
);
163 static int gdth_internal_cache_cmd(gdth_ha_str
*ha
, Scsi_Cmnd
*scp
);
164 static int gdth_fill_cache_cmd(gdth_ha_str
*ha
, Scsi_Cmnd
*scp
, ushort hdrive
);
166 static void gdth_enable_int(gdth_ha_str
*ha
);
167 static unchar
gdth_get_status(gdth_ha_str
*ha
, int irq
);
168 static int gdth_test_busy(gdth_ha_str
*ha
);
169 static int gdth_get_cmd_index(gdth_ha_str
*ha
);
170 static void gdth_release_event(gdth_ha_str
*ha
);
171 static int gdth_wait(gdth_ha_str
*ha
, int index
,ulong32 time
);
172 static int gdth_internal_cmd(gdth_ha_str
*ha
, unchar service
, ushort opcode
,
173 ulong32 p1
, ulong64 p2
,ulong64 p3
);
174 static int gdth_search_drives(gdth_ha_str
*ha
);
175 static int gdth_analyse_hdrive(gdth_ha_str
*ha
, ushort hdrive
);
177 static const char *gdth_ctr_name(gdth_ha_str
*ha
);
179 static int gdth_open(struct inode
*inode
, struct file
*filep
);
180 static int gdth_close(struct inode
*inode
, struct file
*filep
);
181 static int gdth_ioctl(struct inode
*inode
, struct file
*filep
,
182 unsigned int cmd
, unsigned long arg
);
184 static void gdth_flush(gdth_ha_str
*ha
);
185 static int gdth_halt(struct notifier_block
*nb
, ulong event
, void *buf
);
186 static int gdth_queuecommand(Scsi_Cmnd
*scp
,void (*done
)(Scsi_Cmnd
*));
187 static int __gdth_queuecommand(gdth_ha_str
*ha
, struct scsi_cmnd
*scp
,
188 struct gdth_cmndinfo
*cmndinfo
);
189 static void gdth_scsi_done(struct scsi_cmnd
*scp
);
192 static unchar DebugState
= DEBUG_GDTH
;
195 #define MAX_SERBUF 160
196 static void ser_init(void);
197 static void ser_puts(char *str
);
198 static void ser_putc(char c
);
199 static int ser_printk(const char *fmt
, ...);
200 static char strbuf
[MAX_SERBUF
+1];
202 #define COM_BASE 0x2f8
204 #define COM_BASE 0x3f8
206 static void ser_init()
208 unsigned port
=COM_BASE
;
212 /* 19200 Baud, if 9600: outb(12,port) */
222 static void ser_puts(char *str
)
227 for (ptr
=str
;*ptr
;++ptr
)
231 static void ser_putc(char c
)
233 unsigned port
=COM_BASE
;
235 while ((inb(port
+5) & 0x20)==0);
239 while ((inb(port
+5) & 0x20)==0);
244 static int ser_printk(const char *fmt
, ...)
250 i
= vsprintf(strbuf
,fmt
,args
);
256 #define TRACE(a) {if (DebugState==1) {ser_printk a;}}
257 #define TRACE2(a) {if (DebugState==1 || DebugState==2) {ser_printk a;}}
258 #define TRACE3(a) {if (DebugState!=0) {ser_printk a;}}
260 #else /* !__SERIAL__ */
261 #define TRACE(a) {if (DebugState==1) {printk a;}}
262 #define TRACE2(a) {if (DebugState==1 || DebugState==2) {printk a;}}
263 #define TRACE3(a) {if (DebugState!=0) {printk a;}}
272 #ifdef GDTH_STATISTICS
273 static ulong32 max_rq
=0, max_index
=0, max_sg
=0;
275 static ulong32 max_int_coal
=0;
277 static ulong32 act_ints
=0, act_ios
=0, act_stats
=0, act_rq
=0;
278 static struct timer_list gdth_timer
;
281 #define PTR2USHORT(a) (ushort)(ulong)(a)
282 #define GDTOFFSOF(a,b) (size_t)&(((a*)0)->b)
283 #define INDEX_OK(i,t) ((i)<ARRAY_SIZE(t))
285 #define BUS_L2P(a,b) ((b)>(a)->virt_bus ? (b-1):(b))
288 static unchar gdth_drq_tab
[4] = {5,6,7,7}; /* DRQ table */
291 static unchar gdth_irq_tab
[6] = {0,10,11,12,14,0}; /* IRQ table */
293 static unchar gdth_polling
; /* polling if TRUE */
294 static int gdth_ctr_count
= 0; /* controller count */
295 static LIST_HEAD(gdth_instances
); /* controller list */
296 static unchar gdth_write_through
= FALSE
; /* write through */
297 static gdth_evt_str ebuffer
[MAX_EVENTS
]; /* event buffer */
302 #define DIN 1 /* IN data direction */
303 #define DOU 2 /* OUT data direction */
304 #define DNO DIN /* no data transfer */
305 #define DUN DIN /* unknown data direction */
306 static unchar gdth_direction_tab
[0x100] = {
307 DNO
,DNO
,DIN
,DIN
,DOU
,DIN
,DIN
,DOU
,DIN
,DUN
,DOU
,DOU
,DUN
,DUN
,DUN
,DIN
,
308 DNO
,DIN
,DIN
,DOU
,DIN
,DOU
,DNO
,DNO
,DOU
,DNO
,DIN
,DNO
,DIN
,DOU
,DNO
,DUN
,
309 DIN
,DUN
,DIN
,DUN
,DOU
,DIN
,DUN
,DUN
,DIN
,DIN
,DOU
,DNO
,DUN
,DIN
,DOU
,DOU
,
310 DOU
,DOU
,DOU
,DNO
,DIN
,DNO
,DNO
,DIN
,DOU
,DOU
,DOU
,DOU
,DIN
,DOU
,DIN
,DOU
,
311 DOU
,DOU
,DIN
,DIN
,DIN
,DNO
,DUN
,DNO
,DNO
,DNO
,DUN
,DNO
,DOU
,DIN
,DUN
,DUN
,
312 DUN
,DUN
,DUN
,DUN
,DUN
,DOU
,DUN
,DUN
,DUN
,DUN
,DIN
,DUN
,DUN
,DUN
,DUN
,DUN
,
313 DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,
314 DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,
315 DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DIN
,DUN
,DOU
,DUN
,DUN
,DUN
,DUN
,DUN
,
316 DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DIN
,DUN
,
317 DUN
,DUN
,DUN
,DUN
,DUN
,DNO
,DNO
,DUN
,DIN
,DNO
,DOU
,DUN
,DNO
,DUN
,DOU
,DOU
,
318 DOU
,DOU
,DOU
,DNO
,DUN
,DIN
,DOU
,DIN
,DIN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,
319 DUN
,DUN
,DOU
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,
320 DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,
321 DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DOU
,DUN
,DUN
,DUN
,DUN
,DUN
,
322 DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
,DUN
325 /* LILO and modprobe/insmod parameters */
326 /* IRQ list for GDT3000/3020 EISA controllers */
327 static int irq
[MAXHA
] __initdata
=
328 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
329 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
330 /* disable driver flag */
331 static int disable __initdata
= 0;
333 static int reserve_mode
= 1;
335 static int reserve_list
[MAX_RES_ARGS
] =
336 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
337 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
338 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
339 /* scan order for PCI controllers */
340 static int reverse_scan
= 0;
341 /* virtual channel for the host drives */
342 static int hdr_channel
= 0;
343 /* max. IDs per channel */
344 static int max_ids
= MAXID
;
346 static int rescan
= 0;
348 static int shared_access
= 1;
349 /* enable support for EISA and ISA controllers */
350 static int probe_eisa_isa
= 0;
351 /* 64 bit DMA mode, support for drives > 2 TB, if force_dma32 = 0 */
352 static int force_dma32
= 0;
354 /* parameters for modprobe/insmod */
355 module_param_array(irq
, int, NULL
, 0);
356 module_param(disable
, int, 0);
357 module_param(reserve_mode
, int, 0);
358 module_param_array(reserve_list
, int, NULL
, 0);
359 module_param(reverse_scan
, int, 0);
360 module_param(hdr_channel
, int, 0);
361 module_param(max_ids
, int, 0);
362 module_param(rescan
, int, 0);
363 module_param(shared_access
, int, 0);
364 module_param(probe_eisa_isa
, int, 0);
365 module_param(force_dma32
, int, 0);
366 MODULE_AUTHOR("Achim Leubner");
367 MODULE_LICENSE("GPL");
369 /* ioctl interface */
370 static const struct file_operations gdth_fops
= {
373 .release
= gdth_close
,
376 #include "gdth_proc.h"
377 #include "gdth_proc.c"
379 /* notifier block to get a notify on system shutdown/halt/reboot */
380 static struct notifier_block gdth_notifier
= {
383 static int notifier_disabled
= 0;
385 static gdth_ha_str
*gdth_find_ha(int hanum
)
389 list_for_each_entry(ha
, &gdth_instances
, list
)
390 if (hanum
== ha
->hanum
)
396 static struct gdth_cmndinfo
*gdth_get_cmndinfo(gdth_ha_str
*ha
)
398 struct gdth_cmndinfo
*priv
= NULL
;
402 spin_lock_irqsave(&ha
->smp_lock
, flags
);
404 for (i
=0; i
<GDTH_MAXCMDS
; ++i
) {
405 if (ha
->cmndinfo
[i
].index
== 0) {
406 priv
= &ha
->cmndinfo
[i
];
408 memset(priv
, 0, sizeof(*priv
));
413 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
418 static void gdth_put_cmndinfo(struct gdth_cmndinfo
*priv
)
424 static void gdth_delay(int milliseconds
)
426 if (milliseconds
== 0) {
429 mdelay(milliseconds
);
433 static void gdth_scsi_done(struct scsi_cmnd
*scp
)
435 struct gdth_cmndinfo
*cmndinfo
= gdth_cmnd_priv(scp
);
436 int internal_command
= cmndinfo
->internal_command
;
438 TRACE2(("gdth_scsi_done()\n"));
440 gdth_put_cmndinfo(cmndinfo
);
441 scp
->host_scribble
= NULL
;
443 if (internal_command
)
444 complete((struct completion
*)scp
->request
);
449 int __gdth_execute(struct scsi_device
*sdev
, gdth_cmd_str
*gdtcmd
, char *cmnd
,
450 int timeout
, u32
*info
)
452 gdth_ha_str
*ha
= shost_priv(sdev
->host
);
454 struct gdth_cmndinfo cmndinfo
;
455 DECLARE_COMPLETION_ONSTACK(wait
);
458 scp
= kzalloc(sizeof(*scp
), GFP_KERNEL
);
463 memset(&cmndinfo
, 0, sizeof(cmndinfo
));
465 /* use request field to save the ptr. to completion struct. */
466 scp
->request
= (struct request
*)&wait
;
467 scp
->timeout_per_command
= timeout
*HZ
;
468 scp
->request_buffer
= gdtcmd
;
470 memcpy(scp
->cmnd
, cmnd
, 12);
471 cmndinfo
.priority
= IOCTL_PRI
;
472 cmndinfo
.internal_command
= 1;
474 TRACE(("__gdth_execute() cmd 0x%x\n", scp
->cmnd
[0]));
475 __gdth_queuecommand(ha
, scp
, &cmndinfo
);
477 wait_for_completion(&wait
);
479 rval
= cmndinfo
.status
;
481 *info
= cmndinfo
.info
;
486 int gdth_execute(struct Scsi_Host
*shost
, gdth_cmd_str
*gdtcmd
, char *cmnd
,
487 int timeout
, u32
*info
)
489 struct scsi_device
*sdev
= scsi_get_host_dev(shost
);
490 int rval
= __gdth_execute(sdev
, gdtcmd
, cmnd
, timeout
, info
);
492 scsi_free_host_dev(sdev
);
496 static void gdth_eval_mapping(ulong32 size
, ulong32
*cyls
, int *heads
, int *secs
)
498 *cyls
= size
/HEADS
/SECS
;
499 if (*cyls
<= MAXCYLS
) {
502 } else { /* too high for 64*32 */
503 *cyls
= size
/MEDHEADS
/MEDSECS
;
504 if (*cyls
<= MAXCYLS
) {
507 } else { /* too high for 127*63 */
508 *cyls
= size
/BIGHEADS
/BIGSECS
;
515 /* controller search and initialization functions */
517 static int __init
gdth_search_eisa(ushort eisa_adr
)
521 TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr
));
522 id
= inl(eisa_adr
+ID0REG
);
523 if (id
== GDT3A_ID
|| id
== GDT3B_ID
) { /* GDT3000A or GDT3000B */
524 if ((inb(eisa_adr
+EISAREG
) & 8) == 0)
525 return 0; /* not EISA configured */
528 if (id
== GDT3_ID
) /* GDT3000 */
533 #endif /* CONFIG_EISA */
536 static int __init
gdth_search_isa(ulong32 bios_adr
)
541 TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr
));
542 if ((addr
= ioremap(bios_adr
+BIOS_ID_OFFS
, sizeof(ulong32
))) != NULL
) {
545 if (id
== GDT2_ID
) /* GDT2000 */
550 #endif /* CONFIG_ISA */
553 static void gdth_search_dev(gdth_pci_str
*pcistr
, ushort
*cnt
,
554 ushort vendor
, ushort dev
);
556 static int __init
gdth_search_pci(gdth_pci_str
*pcistr
)
560 TRACE(("gdth_search_pci()\n"));
563 for (device
= 0; device
<= PCI_DEVICE_ID_VORTEX_GDT6555
; ++device
)
564 gdth_search_dev(pcistr
, &cnt
, PCI_VENDOR_ID_VORTEX
, device
);
565 for (device
= PCI_DEVICE_ID_VORTEX_GDT6x17RP
;
566 device
<= PCI_DEVICE_ID_VORTEX_GDTMAXRP
; ++device
)
567 gdth_search_dev(pcistr
, &cnt
, PCI_VENDOR_ID_VORTEX
, device
);
568 gdth_search_dev(pcistr
, &cnt
, PCI_VENDOR_ID_VORTEX
,
569 PCI_DEVICE_ID_VORTEX_GDTNEWRX
);
570 gdth_search_dev(pcistr
, &cnt
, PCI_VENDOR_ID_VORTEX
,
571 PCI_DEVICE_ID_VORTEX_GDTNEWRX2
);
572 gdth_search_dev(pcistr
, &cnt
, PCI_VENDOR_ID_INTEL
,
573 PCI_DEVICE_ID_INTEL_SRC
);
574 gdth_search_dev(pcistr
, &cnt
, PCI_VENDOR_ID_INTEL
,
575 PCI_DEVICE_ID_INTEL_SRC_XSCALE
);
579 /* Vortex only makes RAID controllers.
580 * We do not really want to specify all 550 ids here, so wildcard match.
582 static struct pci_device_id gdthtable
[] __maybe_unused
= {
583 {PCI_VENDOR_ID_VORTEX
,PCI_ANY_ID
,PCI_ANY_ID
, PCI_ANY_ID
},
584 {PCI_VENDOR_ID_INTEL
,PCI_DEVICE_ID_INTEL_SRC
,PCI_ANY_ID
,PCI_ANY_ID
},
585 {PCI_VENDOR_ID_INTEL
,PCI_DEVICE_ID_INTEL_SRC_XSCALE
,PCI_ANY_ID
,PCI_ANY_ID
},
588 MODULE_DEVICE_TABLE(pci
,gdthtable
);
590 static void __init
gdth_search_dev(gdth_pci_str
*pcistr
, ushort
*cnt
,
591 ushort vendor
, ushort device
)
593 ulong base0
, base1
, base2
;
594 struct pci_dev
*pdev
;
596 TRACE(("gdth_search_dev() cnt %d vendor %x device %x\n",
597 *cnt
, vendor
, device
));
600 while ((pdev
= pci_find_device(vendor
, device
, pdev
))
602 if (pci_enable_device(pdev
))
606 /* GDT PCI controller found, resources are already in pdev */
607 pcistr
[*cnt
].pdev
= pdev
;
608 pcistr
[*cnt
].irq
= pdev
->irq
;
609 base0
= pci_resource_flags(pdev
, 0);
610 base1
= pci_resource_flags(pdev
, 1);
611 base2
= pci_resource_flags(pdev
, 2);
612 if (device
<= PCI_DEVICE_ID_VORTEX_GDT6000B
|| /* GDT6000/B */
613 device
>= PCI_DEVICE_ID_VORTEX_GDT6x17RP
) { /* MPR */
614 if (!(base0
& IORESOURCE_MEM
))
616 pcistr
[*cnt
].dpmem
= pci_resource_start(pdev
, 0);
617 } else { /* GDT6110, GDT6120, .. */
618 if (!(base0
& IORESOURCE_MEM
) ||
619 !(base2
& IORESOURCE_MEM
) ||
620 !(base1
& IORESOURCE_IO
))
622 pcistr
[*cnt
].dpmem
= pci_resource_start(pdev
, 2);
623 pcistr
[*cnt
].io_mm
= pci_resource_start(pdev
, 0);
624 pcistr
[*cnt
].io
= pci_resource_start(pdev
, 1);
626 TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
627 pcistr
[*cnt
].pdev
->bus
->number
,
628 PCI_SLOT(pcistr
[*cnt
].pdev
->devfn
),
629 pcistr
[*cnt
].irq
, pcistr
[*cnt
].dpmem
));
634 static void __init
gdth_sort_pci(gdth_pci_str
*pcistr
, int cnt
)
639 TRACE(("gdth_sort_pci() cnt %d\n",cnt
));
645 for (i
= 0; i
< cnt
-1; ++i
) {
647 if ((pcistr
[i
].pdev
->bus
->number
> pcistr
[i
+1].pdev
->bus
->number
) ||
648 (pcistr
[i
].pdev
->bus
->number
== pcistr
[i
+1].pdev
->bus
->number
&&
649 PCI_SLOT(pcistr
[i
].pdev
->devfn
) >
650 PCI_SLOT(pcistr
[i
+1].pdev
->devfn
))) {
652 pcistr
[i
] = pcistr
[i
+1];
657 if ((pcistr
[i
].pdev
->bus
->number
< pcistr
[i
+1].pdev
->bus
->number
) ||
658 (pcistr
[i
].pdev
->bus
->number
== pcistr
[i
+1].pdev
->bus
->number
&&
659 PCI_SLOT(pcistr
[i
].pdev
->devfn
) <
660 PCI_SLOT(pcistr
[i
+1].pdev
->devfn
))) {
662 pcistr
[i
] = pcistr
[i
+1];
670 #endif /* CONFIG_PCI */
673 static int __init
gdth_init_eisa(ushort eisa_adr
,gdth_ha_str
*ha
)
676 unchar prot_ver
,eisacf
,i
,irq_found
;
678 TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr
));
680 /* disable board interrupts, deinitialize services */
681 outb(0xff,eisa_adr
+EDOORREG
);
682 outb(0x00,eisa_adr
+EDENABREG
);
683 outb(0x00,eisa_adr
+EINTENABREG
);
685 outb(0xff,eisa_adr
+LDOORREG
);
686 retries
= INIT_RETRIES
;
688 while (inb(eisa_adr
+EDOORREG
) != 0xff) {
689 if (--retries
== 0) {
690 printk("GDT-EISA: Initialization error (DEINIT failed)\n");
694 TRACE2(("wait for DEINIT: retries=%d\n",retries
));
696 prot_ver
= inb(eisa_adr
+MAILBOXREG
);
697 outb(0xff,eisa_adr
+EDOORREG
);
698 if (prot_ver
!= PROTOCOL_VERSION
) {
699 printk("GDT-EISA: Illegal protocol version\n");
703 ha
->brd_phys
= (ulong32
)eisa_adr
>> 12;
705 outl(0,eisa_adr
+MAILBOXREG
);
706 outl(0,eisa_adr
+MAILBOXREG
+4);
707 outl(0,eisa_adr
+MAILBOXREG
+8);
708 outl(0,eisa_adr
+MAILBOXREG
+12);
711 if ((id
= inl(eisa_adr
+ID0REG
)) == GDT3_ID
) {
712 ha
->oem_id
= OEM_ID_ICP
;
715 outl(1,eisa_adr
+MAILBOXREG
+8);
716 outb(0xfe,eisa_adr
+LDOORREG
);
717 retries
= INIT_RETRIES
;
719 while (inb(eisa_adr
+EDOORREG
) != 0xfe) {
720 if (--retries
== 0) {
721 printk("GDT-EISA: Initialization error (get IRQ failed)\n");
726 ha
->irq
= inb(eisa_adr
+MAILBOXREG
);
727 outb(0xff,eisa_adr
+EDOORREG
);
728 TRACE2(("GDT3000/3020: IRQ=%d\n",ha
->irq
));
729 /* check the result */
731 TRACE2(("Unknown IRQ, use IRQ table from cmd line !\n"));
732 for (i
= 0, irq_found
= FALSE
;
733 i
< MAXHA
&& irq
[i
] != 0xff; ++i
) {
734 if (irq
[i
]==10 || irq
[i
]==11 || irq
[i
]==12 || irq
[i
]==14) {
742 printk("GDT-EISA: Can not detect controller IRQ,\n");
743 printk("Use IRQ setting from command line (IRQ = %d)\n",
746 printk("GDT-EISA: Initialization error (unknown IRQ), Enable\n");
747 printk("the controller BIOS or use command line parameters\n");
752 eisacf
= inb(eisa_adr
+EISAREG
) & 7;
753 if (eisacf
> 4) /* level triggered */
755 ha
->irq
= gdth_irq_tab
[eisacf
];
756 ha
->oem_id
= OEM_ID_ICP
;
761 ha
->dma64_support
= 0;
764 #endif /* CONFIG_EISA */
767 static int __init
gdth_init_isa(ulong32 bios_adr
,gdth_ha_str
*ha
)
769 register gdt2_dpram_str __iomem
*dp2_ptr
;
771 unchar irq_drq
,prot_ver
;
774 TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr
));
776 ha
->brd
= ioremap(bios_adr
, sizeof(gdt2_dpram_str
));
777 if (ha
->brd
== NULL
) {
778 printk("GDT-ISA: Initialization error (DPMEM remap error)\n");
782 writeb(1, &dp2_ptr
->io
.memlock
); /* switch off write protection */
783 /* reset interface area */
784 memset_io(&dp2_ptr
->u
, 0, sizeof(dp2_ptr
->u
));
785 if (readl(&dp2_ptr
->u
) != 0) {
786 printk("GDT-ISA: Initialization error (DPMEM write error)\n");
791 /* disable board interrupts, read DRQ and IRQ */
792 writeb(0xff, &dp2_ptr
->io
.irqdel
);
793 writeb(0x00, &dp2_ptr
->io
.irqen
);
794 writeb(0x00, &dp2_ptr
->u
.ic
.S_Status
);
795 writeb(0x00, &dp2_ptr
->u
.ic
.Cmd_Index
);
797 irq_drq
= readb(&dp2_ptr
->io
.rq
);
798 for (i
=0; i
<3; ++i
) {
799 if ((irq_drq
& 1)==0)
803 ha
->drq
= gdth_drq_tab
[i
];
805 irq_drq
= readb(&dp2_ptr
->io
.rq
) >> 3;
806 for (i
=1; i
<5; ++i
) {
807 if ((irq_drq
& 1)==0)
811 ha
->irq
= gdth_irq_tab
[i
];
813 /* deinitialize services */
814 writel(bios_adr
, &dp2_ptr
->u
.ic
.S_Info
[0]);
815 writeb(0xff, &dp2_ptr
->u
.ic
.S_Cmd_Indx
);
816 writeb(0, &dp2_ptr
->io
.event
);
817 retries
= INIT_RETRIES
;
819 while (readb(&dp2_ptr
->u
.ic
.S_Status
) != 0xff) {
820 if (--retries
== 0) {
821 printk("GDT-ISA: Initialization error (DEINIT failed)\n");
827 prot_ver
= (unchar
)readl(&dp2_ptr
->u
.ic
.S_Info
[0]);
828 writeb(0, &dp2_ptr
->u
.ic
.Status
);
829 writeb(0xff, &dp2_ptr
->io
.irqdel
);
830 if (prot_ver
!= PROTOCOL_VERSION
) {
831 printk("GDT-ISA: Illegal protocol version\n");
836 ha
->oem_id
= OEM_ID_ICP
;
838 ha
->ic_all_size
= sizeof(dp2_ptr
->u
);
840 ha
->brd_phys
= bios_adr
>> 4;
842 /* special request to controller BIOS */
843 writel(0x00, &dp2_ptr
->u
.ic
.S_Info
[0]);
844 writel(0x00, &dp2_ptr
->u
.ic
.S_Info
[1]);
845 writel(0x01, &dp2_ptr
->u
.ic
.S_Info
[2]);
846 writel(0x00, &dp2_ptr
->u
.ic
.S_Info
[3]);
847 writeb(0xfe, &dp2_ptr
->u
.ic
.S_Cmd_Indx
);
848 writeb(0, &dp2_ptr
->io
.event
);
849 retries
= INIT_RETRIES
;
851 while (readb(&dp2_ptr
->u
.ic
.S_Status
) != 0xfe) {
852 if (--retries
== 0) {
853 printk("GDT-ISA: Initialization error\n");
859 writeb(0, &dp2_ptr
->u
.ic
.Status
);
860 writeb(0xff, &dp2_ptr
->io
.irqdel
);
862 ha
->dma64_support
= 0;
865 #endif /* CONFIG_ISA */
868 static int __init
gdth_init_pci(gdth_pci_str
*pcistr
,gdth_ha_str
*ha
)
870 register gdt6_dpram_str __iomem
*dp6_ptr
;
871 register gdt6c_dpram_str __iomem
*dp6c_ptr
;
872 register gdt6m_dpram_str __iomem
*dp6m_ptr
;
876 int i
, found
= FALSE
;
878 TRACE(("gdth_init_pci()\n"));
880 if (pcistr
->pdev
->vendor
== PCI_VENDOR_ID_INTEL
)
881 ha
->oem_id
= OEM_ID_INTEL
;
883 ha
->oem_id
= OEM_ID_ICP
;
884 ha
->brd_phys
= (pcistr
->pdev
->bus
->number
<< 8) | (pcistr
->pdev
->devfn
& 0xf8);
885 ha
->stype
= (ulong32
)pcistr
->pdev
->device
;
886 ha
->irq
= pcistr
->irq
;
887 ha
->pdev
= pcistr
->pdev
;
889 if (ha
->pdev
->device
<= PCI_DEVICE_ID_VORTEX_GDT6000B
) { /* GDT6000/B */
890 TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr
->dpmem
,ha
->irq
));
891 ha
->brd
= ioremap(pcistr
->dpmem
, sizeof(gdt6_dpram_str
));
892 if (ha
->brd
== NULL
) {
893 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
896 /* check and reset interface area */
898 writel(DPMEM_MAGIC
, &dp6_ptr
->u
);
899 if (readl(&dp6_ptr
->u
) != DPMEM_MAGIC
) {
900 printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
903 for (i
= 0xC8000; i
< 0xE8000; i
+= 0x4000) {
905 ha
->brd
= ioremap(i
, sizeof(ushort
));
906 if (ha
->brd
== NULL
) {
907 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
910 if (readw(ha
->brd
) != 0xffff) {
911 TRACE2(("init_pci_old() address 0x%x busy\n", i
));
915 pci_write_config_dword(pcistr
->pdev
,
916 PCI_BASE_ADDRESS_0
, i
);
917 ha
->brd
= ioremap(i
, sizeof(gdt6_dpram_str
));
918 if (ha
->brd
== NULL
) {
919 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
923 writel(DPMEM_MAGIC
, &dp6_ptr
->u
);
924 if (readl(&dp6_ptr
->u
) == DPMEM_MAGIC
) {
925 printk("GDT-PCI: Use free address at 0x%x\n", i
);
931 printk("GDT-PCI: No free address found!\n");
936 memset_io(&dp6_ptr
->u
, 0, sizeof(dp6_ptr
->u
));
937 if (readl(&dp6_ptr
->u
) != 0) {
938 printk("GDT-PCI: Initialization error (DPMEM write error)\n");
943 /* disable board interrupts, deinit services */
944 writeb(0xff, &dp6_ptr
->io
.irqdel
);
945 writeb(0x00, &dp6_ptr
->io
.irqen
);
946 writeb(0x00, &dp6_ptr
->u
.ic
.S_Status
);
947 writeb(0x00, &dp6_ptr
->u
.ic
.Cmd_Index
);
949 writel(pcistr
->dpmem
, &dp6_ptr
->u
.ic
.S_Info
[0]);
950 writeb(0xff, &dp6_ptr
->u
.ic
.S_Cmd_Indx
);
951 writeb(0, &dp6_ptr
->io
.event
);
952 retries
= INIT_RETRIES
;
954 while (readb(&dp6_ptr
->u
.ic
.S_Status
) != 0xff) {
955 if (--retries
== 0) {
956 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
962 prot_ver
= (unchar
)readl(&dp6_ptr
->u
.ic
.S_Info
[0]);
963 writeb(0, &dp6_ptr
->u
.ic
.S_Status
);
964 writeb(0xff, &dp6_ptr
->io
.irqdel
);
965 if (prot_ver
!= PROTOCOL_VERSION
) {
966 printk("GDT-PCI: Illegal protocol version\n");
972 ha
->ic_all_size
= sizeof(dp6_ptr
->u
);
974 /* special command to controller BIOS */
975 writel(0x00, &dp6_ptr
->u
.ic
.S_Info
[0]);
976 writel(0x00, &dp6_ptr
->u
.ic
.S_Info
[1]);
977 writel(0x00, &dp6_ptr
->u
.ic
.S_Info
[2]);
978 writel(0x00, &dp6_ptr
->u
.ic
.S_Info
[3]);
979 writeb(0xfe, &dp6_ptr
->u
.ic
.S_Cmd_Indx
);
980 writeb(0, &dp6_ptr
->io
.event
);
981 retries
= INIT_RETRIES
;
983 while (readb(&dp6_ptr
->u
.ic
.S_Status
) != 0xfe) {
984 if (--retries
== 0) {
985 printk("GDT-PCI: Initialization error\n");
991 writeb(0, &dp6_ptr
->u
.ic
.S_Status
);
992 writeb(0xff, &dp6_ptr
->io
.irqdel
);
994 ha
->dma64_support
= 0;
996 } else if (ha
->pdev
->device
<= PCI_DEVICE_ID_VORTEX_GDT6555
) { /* GDT6110, ... */
997 ha
->plx
= (gdt6c_plx_regs
*)pcistr
->io
;
998 TRACE2(("init_pci_new() dpmem %lx irq %d\n",
999 pcistr
->dpmem
,ha
->irq
));
1000 ha
->brd
= ioremap(pcistr
->dpmem
, sizeof(gdt6c_dpram_str
));
1001 if (ha
->brd
== NULL
) {
1002 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1006 /* check and reset interface area */
1008 writel(DPMEM_MAGIC
, &dp6c_ptr
->u
);
1009 if (readl(&dp6c_ptr
->u
) != DPMEM_MAGIC
) {
1010 printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1013 for (i
= 0xC8000; i
< 0xE8000; i
+= 0x4000) {
1015 ha
->brd
= ioremap(i
, sizeof(ushort
));
1016 if (ha
->brd
== NULL
) {
1017 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1020 if (readw(ha
->brd
) != 0xffff) {
1021 TRACE2(("init_pci_plx() address 0x%x busy\n", i
));
1025 pci_write_config_dword(pcistr
->pdev
,
1026 PCI_BASE_ADDRESS_2
, i
);
1027 ha
->brd
= ioremap(i
, sizeof(gdt6c_dpram_str
));
1028 if (ha
->brd
== NULL
) {
1029 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1033 writel(DPMEM_MAGIC
, &dp6c_ptr
->u
);
1034 if (readl(&dp6c_ptr
->u
) == DPMEM_MAGIC
) {
1035 printk("GDT-PCI: Use free address at 0x%x\n", i
);
1041 printk("GDT-PCI: No free address found!\n");
1046 memset_io(&dp6c_ptr
->u
, 0, sizeof(dp6c_ptr
->u
));
1047 if (readl(&dp6c_ptr
->u
) != 0) {
1048 printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1053 /* disable board interrupts, deinit services */
1054 outb(0x00,PTR2USHORT(&ha
->plx
->control1
));
1055 outb(0xff,PTR2USHORT(&ha
->plx
->edoor_reg
));
1057 writeb(0x00, &dp6c_ptr
->u
.ic
.S_Status
);
1058 writeb(0x00, &dp6c_ptr
->u
.ic
.Cmd_Index
);
1060 writel(pcistr
->dpmem
, &dp6c_ptr
->u
.ic
.S_Info
[0]);
1061 writeb(0xff, &dp6c_ptr
->u
.ic
.S_Cmd_Indx
);
1063 outb(1,PTR2USHORT(&ha
->plx
->ldoor_reg
));
1065 retries
= INIT_RETRIES
;
1067 while (readb(&dp6c_ptr
->u
.ic
.S_Status
) != 0xff) {
1068 if (--retries
== 0) {
1069 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1075 prot_ver
= (unchar
)readl(&dp6c_ptr
->u
.ic
.S_Info
[0]);
1076 writeb(0, &dp6c_ptr
->u
.ic
.Status
);
1077 if (prot_ver
!= PROTOCOL_VERSION
) {
1078 printk("GDT-PCI: Illegal protocol version\n");
1083 ha
->type
= GDT_PCINEW
;
1084 ha
->ic_all_size
= sizeof(dp6c_ptr
->u
);
1086 /* special command to controller BIOS */
1087 writel(0x00, &dp6c_ptr
->u
.ic
.S_Info
[0]);
1088 writel(0x00, &dp6c_ptr
->u
.ic
.S_Info
[1]);
1089 writel(0x00, &dp6c_ptr
->u
.ic
.S_Info
[2]);
1090 writel(0x00, &dp6c_ptr
->u
.ic
.S_Info
[3]);
1091 writeb(0xfe, &dp6c_ptr
->u
.ic
.S_Cmd_Indx
);
1093 outb(1,PTR2USHORT(&ha
->plx
->ldoor_reg
));
1095 retries
= INIT_RETRIES
;
1097 while (readb(&dp6c_ptr
->u
.ic
.S_Status
) != 0xfe) {
1098 if (--retries
== 0) {
1099 printk("GDT-PCI: Initialization error\n");
1105 writeb(0, &dp6c_ptr
->u
.ic
.S_Status
);
1107 ha
->dma64_support
= 0;
1110 TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr
->dpmem
,ha
->irq
));
1111 ha
->brd
= ioremap(pcistr
->dpmem
, sizeof(gdt6m_dpram_str
));
1112 if (ha
->brd
== NULL
) {
1113 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1117 /* manipulate config. space to enable DPMEM, start RP controller */
1118 pci_read_config_word(pcistr
->pdev
, PCI_COMMAND
, &command
);
1120 pci_write_config_word(pcistr
->pdev
, PCI_COMMAND
, command
);
1121 if (pci_resource_start(pcistr
->pdev
, 8) == 1UL)
1122 pci_resource_start(pcistr
->pdev
, 8) = 0UL;
1124 pci_write_config_dword(pcistr
->pdev
, PCI_ROM_ADDRESS
, i
);
1126 pci_write_config_dword(pcistr
->pdev
, PCI_ROM_ADDRESS
,
1127 pci_resource_start(pcistr
->pdev
, 8));
1131 /* Ensure that it is safe to access the non HW portions of DPMEM.
1132 * Aditional check needed for Xscale based RAID controllers */
1133 while( ((int)readb(&dp6m_ptr
->i960r
.sema0_reg
) ) & 3 )
1136 /* check and reset interface area */
1137 writel(DPMEM_MAGIC
, &dp6m_ptr
->u
);
1138 if (readl(&dp6m_ptr
->u
) != DPMEM_MAGIC
) {
1139 printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1142 for (i
= 0xC8000; i
< 0xE8000; i
+= 0x4000) {
1144 ha
->brd
= ioremap(i
, sizeof(ushort
));
1145 if (ha
->brd
== NULL
) {
1146 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1149 if (readw(ha
->brd
) != 0xffff) {
1150 TRACE2(("init_pci_mpr() address 0x%x busy\n", i
));
1154 pci_write_config_dword(pcistr
->pdev
,
1155 PCI_BASE_ADDRESS_0
, i
);
1156 ha
->brd
= ioremap(i
, sizeof(gdt6m_dpram_str
));
1157 if (ha
->brd
== NULL
) {
1158 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1162 writel(DPMEM_MAGIC
, &dp6m_ptr
->u
);
1163 if (readl(&dp6m_ptr
->u
) == DPMEM_MAGIC
) {
1164 printk("GDT-PCI: Use free address at 0x%x\n", i
);
1170 printk("GDT-PCI: No free address found!\n");
1175 memset_io(&dp6m_ptr
->u
, 0, sizeof(dp6m_ptr
->u
));
1177 /* disable board interrupts, deinit services */
1178 writeb(readb(&dp6m_ptr
->i960r
.edoor_en_reg
) | 4,
1179 &dp6m_ptr
->i960r
.edoor_en_reg
);
1180 writeb(0xff, &dp6m_ptr
->i960r
.edoor_reg
);
1181 writeb(0x00, &dp6m_ptr
->u
.ic
.S_Status
);
1182 writeb(0x00, &dp6m_ptr
->u
.ic
.Cmd_Index
);
1184 writel(pcistr
->dpmem
, &dp6m_ptr
->u
.ic
.S_Info
[0]);
1185 writeb(0xff, &dp6m_ptr
->u
.ic
.S_Cmd_Indx
);
1186 writeb(1, &dp6m_ptr
->i960r
.ldoor_reg
);
1187 retries
= INIT_RETRIES
;
1189 while (readb(&dp6m_ptr
->u
.ic
.S_Status
) != 0xff) {
1190 if (--retries
== 0) {
1191 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1197 prot_ver
= (unchar
)readl(&dp6m_ptr
->u
.ic
.S_Info
[0]);
1198 writeb(0, &dp6m_ptr
->u
.ic
.S_Status
);
1199 if (prot_ver
!= PROTOCOL_VERSION
) {
1200 printk("GDT-PCI: Illegal protocol version\n");
1205 ha
->type
= GDT_PCIMPR
;
1206 ha
->ic_all_size
= sizeof(dp6m_ptr
->u
);
1208 /* special command to controller BIOS */
1209 writel(0x00, &dp6m_ptr
->u
.ic
.S_Info
[0]);
1210 writel(0x00, &dp6m_ptr
->u
.ic
.S_Info
[1]);
1211 writel(0x00, &dp6m_ptr
->u
.ic
.S_Info
[2]);
1212 writel(0x00, &dp6m_ptr
->u
.ic
.S_Info
[3]);
1213 writeb(0xfe, &dp6m_ptr
->u
.ic
.S_Cmd_Indx
);
1214 writeb(1, &dp6m_ptr
->i960r
.ldoor_reg
);
1215 retries
= INIT_RETRIES
;
1217 while (readb(&dp6m_ptr
->u
.ic
.S_Status
) != 0xfe) {
1218 if (--retries
== 0) {
1219 printk("GDT-PCI: Initialization error\n");
1225 writeb(0, &dp6m_ptr
->u
.ic
.S_Status
);
1227 /* read FW version to detect 64-bit DMA support */
1228 writeb(0xfd, &dp6m_ptr
->u
.ic
.S_Cmd_Indx
);
1229 writeb(1, &dp6m_ptr
->i960r
.ldoor_reg
);
1230 retries
= INIT_RETRIES
;
1232 while (readb(&dp6m_ptr
->u
.ic
.S_Status
) != 0xfd) {
1233 if (--retries
== 0) {
1234 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1240 prot_ver
= (unchar
)(readl(&dp6m_ptr
->u
.ic
.S_Info
[0]) >> 16);
1241 writeb(0, &dp6m_ptr
->u
.ic
.S_Status
);
1242 if (prot_ver
< 0x2b) /* FW < x.43: no 64-bit DMA support */
1243 ha
->dma64_support
= 0;
1245 ha
->dma64_support
= 1;
1250 #endif /* CONFIG_PCI */
1252 /* controller protocol functions */
1254 static void __init
gdth_enable_int(gdth_ha_str
*ha
)
1257 gdt2_dpram_str __iomem
*dp2_ptr
;
1258 gdt6_dpram_str __iomem
*dp6_ptr
;
1259 gdt6m_dpram_str __iomem
*dp6m_ptr
;
1261 TRACE(("gdth_enable_int() hanum %d\n",ha
->hanum
));
1262 spin_lock_irqsave(&ha
->smp_lock
, flags
);
1264 if (ha
->type
== GDT_EISA
) {
1265 outb(0xff, ha
->bmic
+ EDOORREG
);
1266 outb(0xff, ha
->bmic
+ EDENABREG
);
1267 outb(0x01, ha
->bmic
+ EINTENABREG
);
1268 } else if (ha
->type
== GDT_ISA
) {
1270 writeb(1, &dp2_ptr
->io
.irqdel
);
1271 writeb(0, &dp2_ptr
->u
.ic
.Cmd_Index
);
1272 writeb(1, &dp2_ptr
->io
.irqen
);
1273 } else if (ha
->type
== GDT_PCI
) {
1275 writeb(1, &dp6_ptr
->io
.irqdel
);
1276 writeb(0, &dp6_ptr
->u
.ic
.Cmd_Index
);
1277 writeb(1, &dp6_ptr
->io
.irqen
);
1278 } else if (ha
->type
== GDT_PCINEW
) {
1279 outb(0xff, PTR2USHORT(&ha
->plx
->edoor_reg
));
1280 outb(0x03, PTR2USHORT(&ha
->plx
->control1
));
1281 } else if (ha
->type
== GDT_PCIMPR
) {
1283 writeb(0xff, &dp6m_ptr
->i960r
.edoor_reg
);
1284 writeb(readb(&dp6m_ptr
->i960r
.edoor_en_reg
) & ~4,
1285 &dp6m_ptr
->i960r
.edoor_en_reg
);
1287 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
1290 /* return IStatus if interrupt was from this card else 0 */
1291 static unchar
gdth_get_status(gdth_ha_str
*ha
, int irq
)
1295 TRACE(("gdth_get_status() irq %d ctr_count %d\n", irq
, gdth_ctr_count
));
1297 if (ha
->irq
!= (unchar
)irq
) /* check IRQ */
1299 if (ha
->type
== GDT_EISA
)
1300 IStatus
= inb((ushort
)ha
->bmic
+ EDOORREG
);
1301 else if (ha
->type
== GDT_ISA
)
1303 readb(&((gdt2_dpram_str __iomem
*)ha
->brd
)->u
.ic
.Cmd_Index
);
1304 else if (ha
->type
== GDT_PCI
)
1306 readb(&((gdt6_dpram_str __iomem
*)ha
->brd
)->u
.ic
.Cmd_Index
);
1307 else if (ha
->type
== GDT_PCINEW
)
1308 IStatus
= inb(PTR2USHORT(&ha
->plx
->edoor_reg
));
1309 else if (ha
->type
== GDT_PCIMPR
)
1311 readb(&((gdt6m_dpram_str __iomem
*)ha
->brd
)->i960r
.edoor_reg
);
1316 static int gdth_test_busy(gdth_ha_str
*ha
)
1318 register int gdtsema0
= 0;
1320 TRACE(("gdth_test_busy() hanum %d\n", ha
->hanum
));
1322 if (ha
->type
== GDT_EISA
)
1323 gdtsema0
= (int)inb(ha
->bmic
+ SEMA0REG
);
1324 else if (ha
->type
== GDT_ISA
)
1325 gdtsema0
= (int)readb(&((gdt2_dpram_str __iomem
*)ha
->brd
)->u
.ic
.Sema0
);
1326 else if (ha
->type
== GDT_PCI
)
1327 gdtsema0
= (int)readb(&((gdt6_dpram_str __iomem
*)ha
->brd
)->u
.ic
.Sema0
);
1328 else if (ha
->type
== GDT_PCINEW
)
1329 gdtsema0
= (int)inb(PTR2USHORT(&ha
->plx
->sema0_reg
));
1330 else if (ha
->type
== GDT_PCIMPR
)
1332 (int)readb(&((gdt6m_dpram_str __iomem
*)ha
->brd
)->i960r
.sema0_reg
);
1334 return (gdtsema0
& 1);
1338 static int gdth_get_cmd_index(gdth_ha_str
*ha
)
1342 TRACE(("gdth_get_cmd_index() hanum %d\n", ha
->hanum
));
1344 for (i
=0; i
<GDTH_MAXCMDS
; ++i
) {
1345 if (ha
->cmd_tab
[i
].cmnd
== UNUSED_CMND
) {
1346 ha
->cmd_tab
[i
].cmnd
= ha
->pccb
->RequestBuffer
;
1347 ha
->cmd_tab
[i
].service
= ha
->pccb
->Service
;
1348 ha
->pccb
->CommandIndex
= (ulong32
)i
+2;
1356 static void gdth_set_sema0(gdth_ha_str
*ha
)
1358 TRACE(("gdth_set_sema0() hanum %d\n", ha
->hanum
));
1360 if (ha
->type
== GDT_EISA
) {
1361 outb(1, ha
->bmic
+ SEMA0REG
);
1362 } else if (ha
->type
== GDT_ISA
) {
1363 writeb(1, &((gdt2_dpram_str __iomem
*)ha
->brd
)->u
.ic
.Sema0
);
1364 } else if (ha
->type
== GDT_PCI
) {
1365 writeb(1, &((gdt6_dpram_str __iomem
*)ha
->brd
)->u
.ic
.Sema0
);
1366 } else if (ha
->type
== GDT_PCINEW
) {
1367 outb(1, PTR2USHORT(&ha
->plx
->sema0_reg
));
1368 } else if (ha
->type
== GDT_PCIMPR
) {
1369 writeb(1, &((gdt6m_dpram_str __iomem
*)ha
->brd
)->i960r
.sema0_reg
);
1374 static void gdth_copy_command(gdth_ha_str
*ha
)
1376 register gdth_cmd_str
*cmd_ptr
;
1377 register gdt6m_dpram_str __iomem
*dp6m_ptr
;
1378 register gdt6c_dpram_str __iomem
*dp6c_ptr
;
1379 gdt6_dpram_str __iomem
*dp6_ptr
;
1380 gdt2_dpram_str __iomem
*dp2_ptr
;
1381 ushort cp_count
,dp_offset
,cmd_no
;
1383 TRACE(("gdth_copy_command() hanum %d\n", ha
->hanum
));
1385 cp_count
= ha
->cmd_len
;
1386 dp_offset
= ha
->cmd_offs_dpmem
;
1387 cmd_no
= ha
->cmd_cnt
;
1391 if (ha
->type
== GDT_EISA
)
1392 return; /* no DPMEM, no copy */
1394 /* set cpcount dword aligned */
1396 cp_count
+= (4 - (cp_count
& 3));
1398 ha
->cmd_offs_dpmem
+= cp_count
;
1400 /* set offset and service, copy command to DPMEM */
1401 if (ha
->type
== GDT_ISA
) {
1403 writew(dp_offset
+ DPMEM_COMMAND_OFFSET
,
1404 &dp2_ptr
->u
.ic
.comm_queue
[cmd_no
].offset
);
1405 writew((ushort
)cmd_ptr
->Service
,
1406 &dp2_ptr
->u
.ic
.comm_queue
[cmd_no
].serv_id
);
1407 memcpy_toio(&dp2_ptr
->u
.ic
.gdt_dpr_cmd
[dp_offset
],cmd_ptr
,cp_count
);
1408 } else if (ha
->type
== GDT_PCI
) {
1410 writew(dp_offset
+ DPMEM_COMMAND_OFFSET
,
1411 &dp6_ptr
->u
.ic
.comm_queue
[cmd_no
].offset
);
1412 writew((ushort
)cmd_ptr
->Service
,
1413 &dp6_ptr
->u
.ic
.comm_queue
[cmd_no
].serv_id
);
1414 memcpy_toio(&dp6_ptr
->u
.ic
.gdt_dpr_cmd
[dp_offset
],cmd_ptr
,cp_count
);
1415 } else if (ha
->type
== GDT_PCINEW
) {
1417 writew(dp_offset
+ DPMEM_COMMAND_OFFSET
,
1418 &dp6c_ptr
->u
.ic
.comm_queue
[cmd_no
].offset
);
1419 writew((ushort
)cmd_ptr
->Service
,
1420 &dp6c_ptr
->u
.ic
.comm_queue
[cmd_no
].serv_id
);
1421 memcpy_toio(&dp6c_ptr
->u
.ic
.gdt_dpr_cmd
[dp_offset
],cmd_ptr
,cp_count
);
1422 } else if (ha
->type
== GDT_PCIMPR
) {
1424 writew(dp_offset
+ DPMEM_COMMAND_OFFSET
,
1425 &dp6m_ptr
->u
.ic
.comm_queue
[cmd_no
].offset
);
1426 writew((ushort
)cmd_ptr
->Service
,
1427 &dp6m_ptr
->u
.ic
.comm_queue
[cmd_no
].serv_id
);
1428 memcpy_toio(&dp6m_ptr
->u
.ic
.gdt_dpr_cmd
[dp_offset
],cmd_ptr
,cp_count
);
1433 static void gdth_release_event(gdth_ha_str
*ha
)
1435 TRACE(("gdth_release_event() hanum %d\n", ha
->hanum
));
1437 #ifdef GDTH_STATISTICS
1440 for (i
=0,j
=0; j
<GDTH_MAXCMDS
; ++j
) {
1441 if (ha
->cmd_tab
[j
].cmnd
!= UNUSED_CMND
)
1444 if (max_index
< i
) {
1446 TRACE3(("GDT: max_index = %d\n",(ushort
)i
));
1451 if (ha
->pccb
->OpCode
== GDT_INIT
)
1452 ha
->pccb
->Service
|= 0x80;
1454 if (ha
->type
== GDT_EISA
) {
1455 if (ha
->pccb
->OpCode
== GDT_INIT
) /* store DMA buffer */
1456 outl(ha
->ccb_phys
, ha
->bmic
+ MAILBOXREG
);
1457 outb(ha
->pccb
->Service
, ha
->bmic
+ LDOORREG
);
1458 } else if (ha
->type
== GDT_ISA
) {
1459 writeb(0, &((gdt2_dpram_str __iomem
*)ha
->brd
)->io
.event
);
1460 } else if (ha
->type
== GDT_PCI
) {
1461 writeb(0, &((gdt6_dpram_str __iomem
*)ha
->brd
)->io
.event
);
1462 } else if (ha
->type
== GDT_PCINEW
) {
1463 outb(1, PTR2USHORT(&ha
->plx
->ldoor_reg
));
1464 } else if (ha
->type
== GDT_PCIMPR
) {
1465 writeb(1, &((gdt6m_dpram_str __iomem
*)ha
->brd
)->i960r
.ldoor_reg
);
1469 static int gdth_wait(gdth_ha_str
*ha
, int index
, ulong32 time
)
1471 int answer_found
= FALSE
;
1474 TRACE(("gdth_wait() hanum %d index %d time %d\n", ha
->hanum
, index
, time
));
1477 return 1; /* no wait required */
1480 __gdth_interrupt(ha
, (int)ha
->irq
, true, &wait_index
);
1481 if (wait_index
== index
) {
1482 answer_found
= TRUE
;
1488 while (gdth_test_busy(ha
))
1491 return (answer_found
);
1495 static int gdth_internal_cmd(gdth_ha_str
*ha
, unchar service
, ushort opcode
,
1496 ulong32 p1
, ulong64 p2
, ulong64 p3
)
1498 register gdth_cmd_str
*cmd_ptr
;
1501 TRACE2(("gdth_internal_cmd() service %d opcode %d\n",service
,opcode
));
1504 memset((char*)cmd_ptr
,0,sizeof(gdth_cmd_str
));
1507 for (retries
= INIT_RETRIES
;;) {
1508 cmd_ptr
->Service
= service
;
1509 cmd_ptr
->RequestBuffer
= INTERNAL_CMND
;
1510 if (!(index
=gdth_get_cmd_index(ha
))) {
1511 TRACE(("GDT: No free command index found\n"));
1515 cmd_ptr
->OpCode
= opcode
;
1516 cmd_ptr
->BoardNode
= LOCALBOARD
;
1517 if (service
== CACHESERVICE
) {
1518 if (opcode
== GDT_IOCTL
) {
1519 cmd_ptr
->u
.ioctl
.subfunc
= p1
;
1520 cmd_ptr
->u
.ioctl
.channel
= (ulong32
)p2
;
1521 cmd_ptr
->u
.ioctl
.param_size
= (ushort
)p3
;
1522 cmd_ptr
->u
.ioctl
.p_param
= ha
->scratch_phys
;
1524 if (ha
->cache_feat
& GDT_64BIT
) {
1525 cmd_ptr
->u
.cache64
.DeviceNo
= (ushort
)p1
;
1526 cmd_ptr
->u
.cache64
.BlockNo
= p2
;
1528 cmd_ptr
->u
.cache
.DeviceNo
= (ushort
)p1
;
1529 cmd_ptr
->u
.cache
.BlockNo
= (ulong32
)p2
;
1532 } else if (service
== SCSIRAWSERVICE
) {
1533 if (ha
->raw_feat
& GDT_64BIT
) {
1534 cmd_ptr
->u
.raw64
.direction
= p1
;
1535 cmd_ptr
->u
.raw64
.bus
= (unchar
)p2
;
1536 cmd_ptr
->u
.raw64
.target
= (unchar
)p3
;
1537 cmd_ptr
->u
.raw64
.lun
= (unchar
)(p3
>> 8);
1539 cmd_ptr
->u
.raw
.direction
= p1
;
1540 cmd_ptr
->u
.raw
.bus
= (unchar
)p2
;
1541 cmd_ptr
->u
.raw
.target
= (unchar
)p3
;
1542 cmd_ptr
->u
.raw
.lun
= (unchar
)(p3
>> 8);
1544 } else if (service
== SCREENSERVICE
) {
1545 if (opcode
== GDT_REALTIME
) {
1546 *(ulong32
*)&cmd_ptr
->u
.screen
.su
.data
[0] = p1
;
1547 *(ulong32
*)&cmd_ptr
->u
.screen
.su
.data
[4] = (ulong32
)p2
;
1548 *(ulong32
*)&cmd_ptr
->u
.screen
.su
.data
[8] = (ulong32
)p3
;
1551 ha
->cmd_len
= sizeof(gdth_cmd_str
);
1552 ha
->cmd_offs_dpmem
= 0;
1554 gdth_copy_command(ha
);
1555 gdth_release_event(ha
);
1557 if (!gdth_wait(ha
, index
, INIT_TIMEOUT
)) {
1558 printk("GDT: Initialization error (timeout service %d)\n",service
);
1561 if (ha
->status
!= S_BSY
|| --retries
== 0)
1566 return (ha
->status
!= S_OK
? 0:1);
1570 /* search for devices */
1572 static int __init
gdth_search_drives(gdth_ha_str
*ha
)
1576 ulong32 bus_no
, drv_cnt
, drv_no
, j
;
1577 gdth_getch_str
*chn
;
1578 gdth_drlist_str
*drl
;
1579 gdth_iochan_str
*ioc
;
1580 gdth_raw_iochan_str
*iocr
;
1581 gdth_arcdl_str
*alst
;
1582 gdth_alist_str
*alst2
;
1583 gdth_oem_str_ioctl
*oemstr
;
1585 gdth_perf_modes
*pmod
;
1593 TRACE(("gdth_search_drives() hanum %d\n", ha
->hanum
));
1596 /* initialize controller services, at first: screen service */
1597 ha
->screen_feat
= 0;
1599 ok
= gdth_internal_cmd(ha
, SCREENSERVICE
, GDT_X_INIT_SCR
, 0, 0, 0);
1601 ha
->screen_feat
= GDT_64BIT
;
1603 if (force_dma32
|| (!ok
&& ha
->status
== (ushort
)S_NOFUNC
))
1604 ok
= gdth_internal_cmd(ha
, SCREENSERVICE
, GDT_INIT
, 0, 0, 0);
1606 printk("GDT-HA %d: Initialization error screen service (code %d)\n",
1607 ha
->hanum
, ha
->status
);
1610 TRACE2(("gdth_search_drives(): SCREENSERVICE initialized\n"));
1613 /* read realtime clock info, send to controller */
1614 /* 1. wait for the falling edge of update flag */
1615 spin_lock_irqsave(&rtc_lock
, flags
);
1616 for (j
= 0; j
< 1000000; ++j
)
1617 if (CMOS_READ(RTC_FREQ_SELECT
) & RTC_UIP
)
1619 for (j
= 0; j
< 1000000; ++j
)
1620 if (!(CMOS_READ(RTC_FREQ_SELECT
) & RTC_UIP
))
1624 for (j
= 0; j
< 12; ++j
)
1625 rtc
[j
] = CMOS_READ(j
);
1626 } while (rtc
[0] != CMOS_READ(0));
1627 spin_unlock_irqrestore(&rtc_lock
, flags
);
1628 TRACE2(("gdth_search_drives(): RTC: %x/%x/%x\n",*(ulong32
*)&rtc
[0],
1629 *(ulong32
*)&rtc
[4], *(ulong32
*)&rtc
[8]));
1630 /* 3. send to controller firmware */
1631 gdth_internal_cmd(ha
, SCREENSERVICE
, GDT_REALTIME
, *(ulong32
*)&rtc
[0],
1632 *(ulong32
*)&rtc
[4], *(ulong32
*)&rtc
[8]);
1635 /* unfreeze all IOs */
1636 gdth_internal_cmd(ha
, CACHESERVICE
, GDT_UNFREEZE_IO
, 0, 0, 0);
1638 /* initialize cache service */
1641 ok
= gdth_internal_cmd(ha
, CACHESERVICE
, GDT_X_INIT_HOST
, LINUX_OS
,
1644 ha
->cache_feat
= GDT_64BIT
;
1646 if (force_dma32
|| (!ok
&& ha
->status
== (ushort
)S_NOFUNC
))
1647 ok
= gdth_internal_cmd(ha
, CACHESERVICE
, GDT_INIT
, LINUX_OS
, 0, 0);
1649 printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1650 ha
->hanum
, ha
->status
);
1653 TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n"));
1654 cdev_cnt
= (ushort
)ha
->info
;
1655 ha
->fw_vers
= ha
->service
;
1658 if (ha
->type
== GDT_PCIMPR
) {
1659 /* set perf. modes */
1660 pmod
= (gdth_perf_modes
*)ha
->pscratch
;
1662 pmod
->st_mode
= 1; /* enable one status buffer */
1663 *((ulong64
*)&pmod
->st_buff_addr1
) = ha
->coal_stat_phys
;
1664 pmod
->st_buff_indx1
= COALINDEX
;
1665 pmod
->st_buff_addr2
= 0;
1666 pmod
->st_buff_u_addr2
= 0;
1667 pmod
->st_buff_indx2
= 0;
1668 pmod
->st_buff_size
= sizeof(gdth_coal_status
) * MAXOFFSETS
;
1669 pmod
->cmd_mode
= 0; // disable all cmd buffers
1670 pmod
->cmd_buff_addr1
= 0;
1671 pmod
->cmd_buff_u_addr1
= 0;
1672 pmod
->cmd_buff_indx1
= 0;
1673 pmod
->cmd_buff_addr2
= 0;
1674 pmod
->cmd_buff_u_addr2
= 0;
1675 pmod
->cmd_buff_indx2
= 0;
1676 pmod
->cmd_buff_size
= 0;
1677 pmod
->reserved1
= 0;
1678 pmod
->reserved2
= 0;
1679 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_IOCTL
, SET_PERF_MODES
,
1680 INVALID_CHANNEL
,sizeof(gdth_perf_modes
))) {
1681 printk("GDT-HA %d: Interrupt coalescing activated\n", ha
->hanum
);
1686 /* detect number of buses - try new IOCTL */
1687 iocr
= (gdth_raw_iochan_str
*)ha
->pscratch
;
1688 iocr
->hdr
.version
= 0xffffffff;
1689 iocr
->hdr
.list_entries
= MAXBUS
;
1690 iocr
->hdr
.first_chan
= 0;
1691 iocr
->hdr
.last_chan
= MAXBUS
-1;
1692 iocr
->hdr
.list_offset
= GDTOFFSOF(gdth_raw_iochan_str
, list
[0]);
1693 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_IOCTL
, IOCHAN_RAW_DESC
,
1694 INVALID_CHANNEL
,sizeof(gdth_raw_iochan_str
))) {
1695 TRACE2(("IOCHAN_RAW_DESC supported!\n"));
1696 ha
->bus_cnt
= iocr
->hdr
.chan_count
;
1697 for (bus_no
= 0; bus_no
< ha
->bus_cnt
; ++bus_no
) {
1698 if (iocr
->list
[bus_no
].proc_id
< MAXID
)
1699 ha
->bus_id
[bus_no
] = iocr
->list
[bus_no
].proc_id
;
1701 ha
->bus_id
[bus_no
] = 0xff;
1705 chn
= (gdth_getch_str
*)ha
->pscratch
;
1706 for (bus_no
= 0; bus_no
< MAXBUS
; ++bus_no
) {
1707 chn
->channel_no
= bus_no
;
1708 if (!gdth_internal_cmd(ha
, CACHESERVICE
, GDT_IOCTL
,
1709 SCSI_CHAN_CNT
| L_CTRL_PATTERN
,
1710 IO_CHANNEL
| INVALID_CHANNEL
,
1711 sizeof(gdth_getch_str
))) {
1713 printk("GDT-HA %d: Error detecting channel count (0x%x)\n",
1714 ha
->hanum
, ha
->status
);
1719 if (chn
->siop_id
< MAXID
)
1720 ha
->bus_id
[bus_no
] = chn
->siop_id
;
1722 ha
->bus_id
[bus_no
] = 0xff;
1724 ha
->bus_cnt
= (unchar
)bus_no
;
1726 TRACE2(("gdth_search_drives() %d channels\n",ha
->bus_cnt
));
1728 /* read cache configuration */
1729 if (!gdth_internal_cmd(ha
, CACHESERVICE
, GDT_IOCTL
, CACHE_INFO
,
1730 INVALID_CHANNEL
,sizeof(gdth_cinfo_str
))) {
1731 printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1732 ha
->hanum
, ha
->status
);
1735 ha
->cpar
= ((gdth_cinfo_str
*)ha
->pscratch
)->cpar
;
1736 TRACE2(("gdth_search_drives() cinfo: vs %x sta %d str %d dw %d b %d\n",
1737 ha
->cpar
.version
,ha
->cpar
.state
,ha
->cpar
.strategy
,
1738 ha
->cpar
.write_back
,ha
->cpar
.block_size
));
1740 /* read board info and features */
1741 ha
->more_proc
= FALSE
;
1742 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_IOCTL
, BOARD_INFO
,
1743 INVALID_CHANNEL
,sizeof(gdth_binfo_str
))) {
1744 memcpy(&ha
->binfo
, (gdth_binfo_str
*)ha
->pscratch
,
1745 sizeof(gdth_binfo_str
));
1746 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_IOCTL
, BOARD_FEATURES
,
1747 INVALID_CHANNEL
,sizeof(gdth_bfeat_str
))) {
1748 TRACE2(("BOARD_INFO/BOARD_FEATURES supported\n"));
1749 ha
->bfeat
= *(gdth_bfeat_str
*)ha
->pscratch
;
1750 ha
->more_proc
= TRUE
;
1753 TRACE2(("BOARD_INFO requires firmware >= 1.10/2.08\n"));
1754 strcpy(ha
->binfo
.type_string
, gdth_ctr_name(ha
));
1756 TRACE2(("Controller name: %s\n",ha
->binfo
.type_string
));
1758 /* read more informations */
1759 if (ha
->more_proc
) {
1760 /* physical drives, channel addresses */
1761 ioc
= (gdth_iochan_str
*)ha
->pscratch
;
1762 ioc
->hdr
.version
= 0xffffffff;
1763 ioc
->hdr
.list_entries
= MAXBUS
;
1764 ioc
->hdr
.first_chan
= 0;
1765 ioc
->hdr
.last_chan
= MAXBUS
-1;
1766 ioc
->hdr
.list_offset
= GDTOFFSOF(gdth_iochan_str
, list
[0]);
1767 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_IOCTL
, IOCHAN_DESC
,
1768 INVALID_CHANNEL
,sizeof(gdth_iochan_str
))) {
1769 for (bus_no
= 0; bus_no
< ha
->bus_cnt
; ++bus_no
) {
1770 ha
->raw
[bus_no
].address
= ioc
->list
[bus_no
].address
;
1771 ha
->raw
[bus_no
].local_no
= ioc
->list
[bus_no
].local_no
;
1774 for (bus_no
= 0; bus_no
< ha
->bus_cnt
; ++bus_no
) {
1775 ha
->raw
[bus_no
].address
= IO_CHANNEL
;
1776 ha
->raw
[bus_no
].local_no
= bus_no
;
1779 for (bus_no
= 0; bus_no
< ha
->bus_cnt
; ++bus_no
) {
1780 chn
= (gdth_getch_str
*)ha
->pscratch
;
1781 chn
->channel_no
= ha
->raw
[bus_no
].local_no
;
1782 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_IOCTL
,
1783 SCSI_CHAN_CNT
| L_CTRL_PATTERN
,
1784 ha
->raw
[bus_no
].address
| INVALID_CHANNEL
,
1785 sizeof(gdth_getch_str
))) {
1786 ha
->raw
[bus_no
].pdev_cnt
= chn
->drive_cnt
;
1787 TRACE2(("Channel %d: %d phys. drives\n",
1788 bus_no
,chn
->drive_cnt
));
1790 if (ha
->raw
[bus_no
].pdev_cnt
> 0) {
1791 drl
= (gdth_drlist_str
*)ha
->pscratch
;
1792 drl
->sc_no
= ha
->raw
[bus_no
].local_no
;
1793 drl
->sc_cnt
= ha
->raw
[bus_no
].pdev_cnt
;
1794 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_IOCTL
,
1795 SCSI_DR_LIST
| L_CTRL_PATTERN
,
1796 ha
->raw
[bus_no
].address
| INVALID_CHANNEL
,
1797 sizeof(gdth_drlist_str
))) {
1798 for (j
= 0; j
< ha
->raw
[bus_no
].pdev_cnt
; ++j
)
1799 ha
->raw
[bus_no
].id_list
[j
] = drl
->sc_list
[j
];
1801 ha
->raw
[bus_no
].pdev_cnt
= 0;
1806 /* logical drives */
1807 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_IOCTL
, CACHE_DRV_CNT
,
1808 INVALID_CHANNEL
,sizeof(ulong32
))) {
1809 drv_cnt
= *(ulong32
*)ha
->pscratch
;
1810 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_IOCTL
, CACHE_DRV_LIST
,
1811 INVALID_CHANNEL
,drv_cnt
* sizeof(ulong32
))) {
1812 for (j
= 0; j
< drv_cnt
; ++j
) {
1813 drv_no
= ((ulong32
*)ha
->pscratch
)[j
];
1814 if (drv_no
< MAX_LDRIVES
) {
1815 ha
->hdr
[drv_no
].is_logdrv
= TRUE
;
1816 TRACE2(("Drive %d is log. drive\n",drv_no
));
1820 alst
= (gdth_arcdl_str
*)ha
->pscratch
;
1821 alst
->entries_avail
= MAX_LDRIVES
;
1822 alst
->first_entry
= 0;
1823 alst
->list_offset
= GDTOFFSOF(gdth_arcdl_str
, list
[0]);
1824 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_IOCTL
,
1825 ARRAY_DRV_LIST2
| LA_CTRL_PATTERN
,
1826 INVALID_CHANNEL
, sizeof(gdth_arcdl_str
) +
1827 (alst
->entries_avail
-1) * sizeof(gdth_alist_str
))) {
1828 for (j
= 0; j
< alst
->entries_init
; ++j
) {
1829 ha
->hdr
[j
].is_arraydrv
= alst
->list
[j
].is_arrayd
;
1830 ha
->hdr
[j
].is_master
= alst
->list
[j
].is_master
;
1831 ha
->hdr
[j
].is_parity
= alst
->list
[j
].is_parity
;
1832 ha
->hdr
[j
].is_hotfix
= alst
->list
[j
].is_hotfix
;
1833 ha
->hdr
[j
].master_no
= alst
->list
[j
].cd_handle
;
1835 } else if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_IOCTL
,
1836 ARRAY_DRV_LIST
| LA_CTRL_PATTERN
,
1837 0, 35 * sizeof(gdth_alist_str
))) {
1838 for (j
= 0; j
< 35; ++j
) {
1839 alst2
= &((gdth_alist_str
*)ha
->pscratch
)[j
];
1840 ha
->hdr
[j
].is_arraydrv
= alst2
->is_arrayd
;
1841 ha
->hdr
[j
].is_master
= alst2
->is_master
;
1842 ha
->hdr
[j
].is_parity
= alst2
->is_parity
;
1843 ha
->hdr
[j
].is_hotfix
= alst2
->is_hotfix
;
1844 ha
->hdr
[j
].master_no
= alst2
->cd_handle
;
1850 /* initialize raw service */
1853 ok
= gdth_internal_cmd(ha
, SCSIRAWSERVICE
, GDT_X_INIT_RAW
, 0, 0, 0);
1855 ha
->raw_feat
= GDT_64BIT
;
1857 if (force_dma32
|| (!ok
&& ha
->status
== (ushort
)S_NOFUNC
))
1858 ok
= gdth_internal_cmd(ha
, SCSIRAWSERVICE
, GDT_INIT
, 0, 0, 0);
1860 printk("GDT-HA %d: Initialization error raw service (code %d)\n",
1861 ha
->hanum
, ha
->status
);
1864 TRACE2(("gdth_search_drives(): RAWSERVICE initialized\n"));
1866 /* set/get features raw service (scatter/gather) */
1867 if (gdth_internal_cmd(ha
, SCSIRAWSERVICE
, GDT_SET_FEAT
, SCATTER_GATHER
,
1869 TRACE2(("gdth_search_drives(): set features RAWSERVICE OK\n"));
1870 if (gdth_internal_cmd(ha
, SCSIRAWSERVICE
, GDT_GET_FEAT
, 0, 0, 0)) {
1871 TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n",
1873 ha
->raw_feat
|= (ushort
)ha
->info
;
1877 /* set/get features cache service (equal to raw service) */
1878 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_SET_FEAT
, 0,
1879 SCATTER_GATHER
,0)) {
1880 TRACE2(("gdth_search_drives(): set features CACHESERVICE OK\n"));
1881 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_GET_FEAT
, 0, 0, 0)) {
1882 TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n",
1884 ha
->cache_feat
|= (ushort
)ha
->info
;
1888 /* reserve drives for raw service */
1889 if (reserve_mode
!= 0) {
1890 gdth_internal_cmd(ha
, SCSIRAWSERVICE
, GDT_RESERVE_ALL
,
1891 reserve_mode
== 1 ? 1 : 3, 0, 0);
1892 TRACE2(("gdth_search_drives(): RESERVE_ALL code %d\n",
1895 for (i
= 0; i
< MAX_RES_ARGS
; i
+= 4) {
1896 if (reserve_list
[i
] == ha
->hanum
&& reserve_list
[i
+1] < ha
->bus_cnt
&&
1897 reserve_list
[i
+2] < ha
->tid_cnt
&& reserve_list
[i
+3] < MAXLUN
) {
1898 TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n",
1899 reserve_list
[i
], reserve_list
[i
+1],
1900 reserve_list
[i
+2], reserve_list
[i
+3]));
1901 if (!gdth_internal_cmd(ha
, SCSIRAWSERVICE
, GDT_RESERVE
, 0,
1902 reserve_list
[i
+1], reserve_list
[i
+2] |
1903 (reserve_list
[i
+3] << 8))) {
1904 printk("GDT-HA %d: Error raw service (RESERVE, code %d)\n",
1905 ha
->hanum
, ha
->status
);
1910 /* Determine OEM string using IOCTL */
1911 oemstr
= (gdth_oem_str_ioctl
*)ha
->pscratch
;
1912 oemstr
->params
.ctl_version
= 0x01;
1913 oemstr
->params
.buffer_size
= sizeof(oemstr
->text
);
1914 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_IOCTL
,
1915 CACHE_READ_OEM_STRING_RECORD
,INVALID_CHANNEL
,
1916 sizeof(gdth_oem_str_ioctl
))) {
1917 TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD OK\n"));
1918 printk("GDT-HA %d: Vendor: %s Name: %s\n",
1919 ha
->hanum
, oemstr
->text
.oem_company_name
, ha
->binfo
.type_string
);
1920 /* Save the Host Drive inquiry data */
1921 strlcpy(ha
->oem_name
,oemstr
->text
.scsi_host_drive_inquiry_vendor_id
,
1922 sizeof(ha
->oem_name
));
1924 /* Old method, based on PCI ID */
1925 TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD failed\n"));
1926 printk("GDT-HA %d: Name: %s\n",
1927 ha
->hanum
, ha
->binfo
.type_string
);
1928 if (ha
->oem_id
== OEM_ID_INTEL
)
1929 strlcpy(ha
->oem_name
,"Intel ", sizeof(ha
->oem_name
));
1931 strlcpy(ha
->oem_name
,"ICP ", sizeof(ha
->oem_name
));
1934 /* scanning for host drives */
1935 for (i
= 0; i
< cdev_cnt
; ++i
)
1936 gdth_analyse_hdrive(ha
, i
);
1938 TRACE(("gdth_search_drives() OK\n"));
1942 static int gdth_analyse_hdrive(gdth_ha_str
*ha
, ushort hdrive
)
1945 int drv_hds
, drv_secs
;
1947 TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n", ha
->hanum
, hdrive
));
1948 if (hdrive
>= MAX_HDRIVES
)
1951 if (!gdth_internal_cmd(ha
, CACHESERVICE
, GDT_INFO
, hdrive
, 0, 0))
1953 ha
->hdr
[hdrive
].present
= TRUE
;
1954 ha
->hdr
[hdrive
].size
= ha
->info
;
1956 /* evaluate mapping (sectors per head, heads per cylinder) */
1957 ha
->hdr
[hdrive
].size
&= ~SECS32
;
1958 if (ha
->info2
== 0) {
1959 gdth_eval_mapping(ha
->hdr
[hdrive
].size
,&drv_cyls
,&drv_hds
,&drv_secs
);
1961 drv_hds
= ha
->info2
& 0xff;
1962 drv_secs
= (ha
->info2
>> 8) & 0xff;
1963 drv_cyls
= (ulong32
)ha
->hdr
[hdrive
].size
/ drv_hds
/ drv_secs
;
1965 ha
->hdr
[hdrive
].heads
= (unchar
)drv_hds
;
1966 ha
->hdr
[hdrive
].secs
= (unchar
)drv_secs
;
1968 ha
->hdr
[hdrive
].size
= drv_cyls
* drv_hds
* drv_secs
;
1970 if (ha
->cache_feat
& GDT_64BIT
) {
1971 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_X_INFO
, hdrive
, 0, 0)
1972 && ha
->info2
!= 0) {
1973 ha
->hdr
[hdrive
].size
= ((ulong64
)ha
->info2
<< 32) | ha
->info
;
1976 TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n",
1977 hdrive
,ha
->hdr
[hdrive
].size
,drv_hds
,drv_secs
));
1979 /* get informations about device */
1980 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_DEVTYPE
, hdrive
, 0, 0)) {
1981 TRACE2(("gdth_search_dr() cache drive %d devtype %d\n",
1983 ha
->hdr
[hdrive
].devtype
= (ushort
)ha
->info
;
1987 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_CLUST_INFO
, hdrive
, 0, 0)) {
1988 TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n",
1991 ha
->hdr
[hdrive
].cluster_type
= (unchar
)ha
->info
;
1994 /* R/W attributes */
1995 if (gdth_internal_cmd(ha
, CACHESERVICE
, GDT_RW_ATTRIBS
, hdrive
, 0, 0)) {
1996 TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n",
1998 ha
->hdr
[hdrive
].rw_attribs
= (unchar
)ha
->info
;
2005 /* command queueing/sending functions */
2007 static void gdth_putq(gdth_ha_str
*ha
, Scsi_Cmnd
*scp
, unchar priority
)
2009 struct gdth_cmndinfo
*cmndinfo
= gdth_cmnd_priv(scp
);
2010 register Scsi_Cmnd
*pscp
;
2011 register Scsi_Cmnd
*nscp
;
2015 TRACE(("gdth_putq() priority %d\n",priority
));
2016 spin_lock_irqsave(&ha
->smp_lock
, flags
);
2018 if (!cmndinfo
->internal_command
) {
2019 cmndinfo
->priority
= priority
;
2020 b
= scp
->device
->channel
;
2021 t
= scp
->device
->id
;
2022 if (priority
>= DEFAULT_PRI
) {
2023 if ((b
!= ha
->virt_bus
&& ha
->raw
[BUS_L2P(ha
,b
)].lock
) ||
2024 (b
==ha
->virt_bus
&& t
<MAX_HDRIVES
&& ha
->hdr
[t
].lock
)) {
2025 TRACE2(("gdth_putq(): locked IO ->update_timeout()\n"));
2026 cmndinfo
->timeout
= gdth_update_timeout(scp
, 0);
2031 if (ha
->req_first
==NULL
) {
2032 ha
->req_first
= scp
; /* queue was empty */
2033 scp
->SCp
.ptr
= NULL
;
2034 } else { /* queue not empty */
2035 pscp
= ha
->req_first
;
2036 nscp
= (Scsi_Cmnd
*)pscp
->SCp
.ptr
;
2037 /* priority: 0-highest,..,0xff-lowest */
2038 while (nscp
&& gdth_cmnd_priv(nscp
)->priority
<= priority
) {
2040 nscp
= (Scsi_Cmnd
*)pscp
->SCp
.ptr
;
2042 pscp
->SCp
.ptr
= (char *)scp
;
2043 scp
->SCp
.ptr
= (char *)nscp
;
2045 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
2047 #ifdef GDTH_STATISTICS
2049 for (nscp
=ha
->req_first
; nscp
; nscp
=(Scsi_Cmnd
*)nscp
->SCp
.ptr
)
2051 if (max_rq
< flags
) {
2053 TRACE3(("GDT: max_rq = %d\n",(ushort
)max_rq
));
2058 static void gdth_next(gdth_ha_str
*ha
)
2060 register Scsi_Cmnd
*pscp
;
2061 register Scsi_Cmnd
*nscp
;
2062 unchar b
, t
, l
, firsttime
;
2063 unchar this_cmd
, next_cmd
;
2067 TRACE(("gdth_next() hanum %d\n", ha
->hanum
));
2069 spin_lock_irqsave(&ha
->smp_lock
, flags
);
2071 ha
->cmd_cnt
= ha
->cmd_offs_dpmem
= 0;
2072 this_cmd
= firsttime
= TRUE
;
2073 next_cmd
= gdth_polling
? FALSE
:TRUE
;
2076 for (nscp
= pscp
= ha
->req_first
; nscp
; nscp
= (Scsi_Cmnd
*)nscp
->SCp
.ptr
) {
2077 struct gdth_cmndinfo
*nscp_cmndinfo
= gdth_cmnd_priv(nscp
);
2078 if (nscp
!= pscp
&& nscp
!= (Scsi_Cmnd
*)pscp
->SCp
.ptr
)
2079 pscp
= (Scsi_Cmnd
*)pscp
->SCp
.ptr
;
2080 if (!nscp_cmndinfo
->internal_command
) {
2081 b
= nscp
->device
->channel
;
2082 t
= nscp
->device
->id
;
2083 l
= nscp
->device
->lun
;
2084 if (nscp_cmndinfo
->priority
>= DEFAULT_PRI
) {
2085 if ((b
!= ha
->virt_bus
&& ha
->raw
[BUS_L2P(ha
,b
)].lock
) ||
2086 (b
== ha
->virt_bus
&& t
< MAX_HDRIVES
&& ha
->hdr
[t
].lock
))
2093 if (gdth_test_busy(ha
)) { /* controller busy ? */
2094 TRACE(("gdth_next() controller %d busy !\n", ha
->hanum
));
2095 if (!gdth_polling
) {
2096 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
2099 while (gdth_test_busy(ha
))
2105 if (!nscp_cmndinfo
->internal_command
) {
2106 if (nscp_cmndinfo
->phase
== -1) {
2107 nscp_cmndinfo
->phase
= CACHESERVICE
; /* default: cache svc. */
2108 if (nscp
->cmnd
[0] == TEST_UNIT_READY
) {
2109 TRACE2(("TEST_UNIT_READY Bus %d Id %d LUN %d\n",
2111 /* TEST_UNIT_READY -> set scan mode */
2112 if ((ha
->scan_mode
& 0x0f) == 0) {
2113 if (b
== 0 && t
== 0 && l
== 0) {
2115 TRACE2(("Scan mode: 0x%x\n", ha
->scan_mode
));
2117 } else if ((ha
->scan_mode
& 0x0f) == 1) {
2118 if (b
== 0 && ((t
== 0 && l
== 1) ||
2119 (t
== 1 && l
== 0))) {
2120 nscp_cmndinfo
->OpCode
= GDT_SCAN_START
;
2121 nscp_cmndinfo
->phase
= ((ha
->scan_mode
& 0x10 ? 1:0) << 8)
2123 ha
->scan_mode
= 0x12;
2124 TRACE2(("Scan mode: 0x%x (SCAN_START)\n",
2127 ha
->scan_mode
&= 0x10;
2128 TRACE2(("Scan mode: 0x%x\n", ha
->scan_mode
));
2130 } else if (ha
->scan_mode
== 0x12) {
2131 if (b
== ha
->bus_cnt
&& t
== ha
->tid_cnt
-1) {
2132 nscp_cmndinfo
->phase
= SCSIRAWSERVICE
;
2133 nscp_cmndinfo
->OpCode
= GDT_SCAN_END
;
2134 ha
->scan_mode
&= 0x10;
2135 TRACE2(("Scan mode: 0x%x (SCAN_END)\n",
2140 if (b
== ha
->virt_bus
&& nscp
->cmnd
[0] != INQUIRY
&&
2141 nscp
->cmnd
[0] != READ_CAPACITY
&& nscp
->cmnd
[0] != MODE_SENSE
&&
2142 (ha
->hdr
[t
].cluster_type
& CLUSTER_DRIVE
)) {
2143 /* always GDT_CLUST_INFO! */
2144 nscp_cmndinfo
->OpCode
= GDT_CLUST_INFO
;
2149 if (nscp_cmndinfo
->OpCode
!= -1) {
2150 if ((nscp_cmndinfo
->phase
& 0xff) == CACHESERVICE
) {
2151 if (!(cmd_index
=gdth_fill_cache_cmd(ha
, nscp
, t
)))
2154 } else if ((nscp_cmndinfo
->phase
& 0xff) == SCSIRAWSERVICE
) {
2155 if (!(cmd_index
=gdth_fill_raw_cmd(ha
, nscp
, BUS_L2P(ha
, b
))))
2159 memset((char*)nscp
->sense_buffer
,0,16);
2160 nscp
->sense_buffer
[0] = 0x70;
2161 nscp
->sense_buffer
[2] = NOT_READY
;
2162 nscp
->result
= (DID_OK
<< 16) | (CHECK_CONDITION
<< 1);
2163 if (!nscp_cmndinfo
->wait_for_completion
)
2164 nscp_cmndinfo
->wait_for_completion
++;
2166 gdth_scsi_done(nscp
);
2168 } else if (gdth_cmnd_priv(nscp
)->internal_command
) {
2169 if (!(cmd_index
=gdth_special_cmd(ha
, nscp
)))
2172 } else if (b
!= ha
->virt_bus
) {
2173 if (ha
->raw
[BUS_L2P(ha
,b
)].io_cnt
[t
] >= GDTH_MAX_RAW
||
2174 !(cmd_index
=gdth_fill_raw_cmd(ha
, nscp
, BUS_L2P(ha
, b
))))
2177 ha
->raw
[BUS_L2P(ha
,b
)].io_cnt
[t
]++;
2178 } else if (t
>= MAX_HDRIVES
|| !ha
->hdr
[t
].present
|| l
!= 0) {
2179 TRACE2(("Command 0x%x to bus %d id %d lun %d -> IGNORE\n",
2180 nscp
->cmnd
[0], b
, t
, l
));
2181 nscp
->result
= DID_BAD_TARGET
<< 16;
2182 if (!nscp_cmndinfo
->wait_for_completion
)
2183 nscp_cmndinfo
->wait_for_completion
++;
2185 gdth_scsi_done(nscp
);
2187 switch (nscp
->cmnd
[0]) {
2188 case TEST_UNIT_READY
:
2195 case SERVICE_ACTION_IN
:
2196 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp
->cmnd
[0],
2197 nscp
->cmnd
[1],nscp
->cmnd
[2],nscp
->cmnd
[3],
2198 nscp
->cmnd
[4],nscp
->cmnd
[5]));
2199 if (ha
->hdr
[t
].media_changed
&& nscp
->cmnd
[0] != INQUIRY
) {
2200 /* return UNIT_ATTENTION */
2201 TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2203 ha
->hdr
[t
].media_changed
= FALSE
;
2204 memset((char*)nscp
->sense_buffer
,0,16);
2205 nscp
->sense_buffer
[0] = 0x70;
2206 nscp
->sense_buffer
[2] = UNIT_ATTENTION
;
2207 nscp
->result
= (DID_OK
<< 16) | (CHECK_CONDITION
<< 1);
2208 if (!nscp_cmndinfo
->wait_for_completion
)
2209 nscp_cmndinfo
->wait_for_completion
++;
2211 gdth_scsi_done(nscp
);
2212 } else if (gdth_internal_cache_cmd(ha
, nscp
))
2213 gdth_scsi_done(nscp
);
2216 case ALLOW_MEDIUM_REMOVAL
:
2217 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp
->cmnd
[0],
2218 nscp
->cmnd
[1],nscp
->cmnd
[2],nscp
->cmnd
[3],
2219 nscp
->cmnd
[4],nscp
->cmnd
[5]));
2220 if ( (nscp
->cmnd
[4]&1) && !(ha
->hdr
[t
].devtype
&1) ) {
2221 TRACE(("Prevent r. nonremov. drive->do nothing\n"));
2222 nscp
->result
= DID_OK
<< 16;
2223 nscp
->sense_buffer
[0] = 0;
2224 if (!nscp_cmndinfo
->wait_for_completion
)
2225 nscp_cmndinfo
->wait_for_completion
++;
2227 gdth_scsi_done(nscp
);
2229 nscp
->cmnd
[3] = (ha
->hdr
[t
].devtype
&1) ? 1:0;
2230 TRACE(("Prevent/allow r. %d rem. drive %d\n",
2231 nscp
->cmnd
[4],nscp
->cmnd
[3]));
2232 if (!(cmd_index
=gdth_fill_cache_cmd(ha
, nscp
, t
)))
2239 TRACE2(("cache cmd %s\n",nscp
->cmnd
[0] == RESERVE
?
2240 "RESERVE" : "RELEASE"));
2241 if (!(cmd_index
=gdth_fill_cache_cmd(ha
, nscp
, t
)))
2251 if (ha
->hdr
[t
].media_changed
) {
2252 /* return UNIT_ATTENTION */
2253 TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2255 ha
->hdr
[t
].media_changed
= FALSE
;
2256 memset((char*)nscp
->sense_buffer
,0,16);
2257 nscp
->sense_buffer
[0] = 0x70;
2258 nscp
->sense_buffer
[2] = UNIT_ATTENTION
;
2259 nscp
->result
= (DID_OK
<< 16) | (CHECK_CONDITION
<< 1);
2260 if (!nscp_cmndinfo
->wait_for_completion
)
2261 nscp_cmndinfo
->wait_for_completion
++;
2263 gdth_scsi_done(nscp
);
2264 } else if (!(cmd_index
=gdth_fill_cache_cmd(ha
, nscp
, t
)))
2269 TRACE2(("cache cmd %x/%x/%x/%x/%x/%x unknown\n",nscp
->cmnd
[0],
2270 nscp
->cmnd
[1],nscp
->cmnd
[2],nscp
->cmnd
[3],
2271 nscp
->cmnd
[4],nscp
->cmnd
[5]));
2272 printk("GDT-HA %d: Unknown SCSI command 0x%x to cache service !\n",
2273 ha
->hanum
, nscp
->cmnd
[0]);
2274 nscp
->result
= DID_ABORT
<< 16;
2275 if (!nscp_cmndinfo
->wait_for_completion
)
2276 nscp_cmndinfo
->wait_for_completion
++;
2278 gdth_scsi_done(nscp
);
2285 if (nscp
== ha
->req_first
)
2286 ha
->req_first
= pscp
= (Scsi_Cmnd
*)nscp
->SCp
.ptr
;
2288 pscp
->SCp
.ptr
= nscp
->SCp
.ptr
;
2293 if (ha
->cmd_cnt
> 0) {
2294 gdth_release_event(ha
);
2298 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
2300 if (gdth_polling
&& ha
->cmd_cnt
> 0) {
2301 if (!gdth_wait(ha
, cmd_index
, POLL_TIMEOUT
))
2302 printk("GDT-HA %d: Command %d timed out !\n",
2303 ha
->hanum
, cmd_index
);
2307 static void gdth_copy_internal_data(gdth_ha_str
*ha
, Scsi_Cmnd
*scp
,
2308 char *buffer
,ushort count
)
2312 struct scatterlist
*sl
;
2315 cpcount
= count
<=(ushort
)scp
->request_bufflen
? count
:(ushort
)scp
->request_bufflen
;
2318 sl
= (struct scatterlist
*)scp
->request_buffer
;
2319 for (i
=0,cpsum
=0; i
<scp
->use_sg
; ++i
,++sl
) {
2320 unsigned long flags
;
2321 cpnow
= (ushort
)sl
->length
;
2322 TRACE(("copy_internal() now %d sum %d count %d %d\n",
2323 cpnow
,cpsum
,cpcount
,(ushort
)scp
->bufflen
));
2324 if (cpsum
+cpnow
> cpcount
)
2325 cpnow
= cpcount
- cpsum
;
2328 printk("GDT-HA %d: invalid sc/gt element in gdth_copy_internal_data()\n",
2332 local_irq_save(flags
);
2333 address
= kmap_atomic(sl
->page
, KM_BIO_SRC_IRQ
) + sl
->offset
;
2334 memcpy(address
,buffer
,cpnow
);
2335 flush_dcache_page(sl
->page
);
2336 kunmap_atomic(address
, KM_BIO_SRC_IRQ
);
2337 local_irq_restore(flags
);
2338 if (cpsum
== cpcount
)
2343 TRACE(("copy_internal() count %d\n",cpcount
));
2344 memcpy((char*)scp
->request_buffer
,buffer
,cpcount
);
2348 static int gdth_internal_cache_cmd(gdth_ha_str
*ha
, Scsi_Cmnd
*scp
)
2352 gdth_rdcap_data rdc
;
2354 gdth_modep_data mpd
;
2355 struct gdth_cmndinfo
*cmndinfo
= gdth_cmnd_priv(scp
);
2357 t
= scp
->device
->id
;
2358 TRACE(("gdth_internal_cache_cmd() cmd 0x%x hdrive %d\n",
2361 scp
->result
= DID_OK
<< 16;
2362 scp
->sense_buffer
[0] = 0;
2364 switch (scp
->cmnd
[0]) {
2365 case TEST_UNIT_READY
:
2368 TRACE2(("Test/Verify/Start hdrive %d\n",t
));
2372 TRACE2(("Inquiry hdrive %d devtype %d\n",
2373 t
,ha
->hdr
[t
].devtype
));
2374 inq
.type_qual
= (ha
->hdr
[t
].devtype
&4) ? TYPE_ROM
:TYPE_DISK
;
2375 /* you can here set all disks to removable, if you want to do
2376 a flush using the ALLOW_MEDIUM_REMOVAL command */
2377 inq
.modif_rmb
= 0x00;
2378 if ((ha
->hdr
[t
].devtype
& 1) ||
2379 (ha
->hdr
[t
].cluster_type
& CLUSTER_DRIVE
))
2380 inq
.modif_rmb
= 0x80;
2384 strcpy(inq
.vendor
,ha
->oem_name
);
2385 sprintf(inq
.product
,"Host Drive #%02d",t
);
2386 strcpy(inq
.revision
," ");
2387 gdth_copy_internal_data(ha
, scp
, (char*)&inq
, sizeof(gdth_inq_data
));
2391 TRACE2(("Request sense hdrive %d\n",t
));
2392 sd
.errorcode
= 0x70;
2397 gdth_copy_internal_data(ha
, scp
, (char*)&sd
, sizeof(gdth_sense_data
));
2401 TRACE2(("Mode sense hdrive %d\n",t
));
2402 memset((char*)&mpd
,0,sizeof(gdth_modep_data
));
2403 mpd
.hd
.data_length
= sizeof(gdth_modep_data
);
2404 mpd
.hd
.dev_par
= (ha
->hdr
[t
].devtype
&2) ? 0x80:0;
2405 mpd
.hd
.bd_length
= sizeof(mpd
.bd
);
2406 mpd
.bd
.block_length
[0] = (SECTOR_SIZE
& 0x00ff0000) >> 16;
2407 mpd
.bd
.block_length
[1] = (SECTOR_SIZE
& 0x0000ff00) >> 8;
2408 mpd
.bd
.block_length
[2] = (SECTOR_SIZE
& 0x000000ff);
2409 gdth_copy_internal_data(ha
, scp
, (char*)&mpd
, sizeof(gdth_modep_data
));
2413 TRACE2(("Read capacity hdrive %d\n",t
));
2414 if (ha
->hdr
[t
].size
> (ulong64
)0xffffffff)
2415 rdc
.last_block_no
= 0xffffffff;
2417 rdc
.last_block_no
= cpu_to_be32(ha
->hdr
[t
].size
-1);
2418 rdc
.block_length
= cpu_to_be32(SECTOR_SIZE
);
2419 gdth_copy_internal_data(ha
, scp
, (char*)&rdc
, sizeof(gdth_rdcap_data
));
2422 case SERVICE_ACTION_IN
:
2423 if ((scp
->cmnd
[1] & 0x1f) == SAI_READ_CAPACITY_16
&&
2424 (ha
->cache_feat
& GDT_64BIT
)) {
2425 gdth_rdcap16_data rdc16
;
2427 TRACE2(("Read capacity (16) hdrive %d\n",t
));
2428 rdc16
.last_block_no
= cpu_to_be64(ha
->hdr
[t
].size
-1);
2429 rdc16
.block_length
= cpu_to_be32(SECTOR_SIZE
);
2430 gdth_copy_internal_data(ha
, scp
, (char*)&rdc16
,
2431 sizeof(gdth_rdcap16_data
));
2433 scp
->result
= DID_ABORT
<< 16;
2438 TRACE2(("Internal cache cmd 0x%x unknown\n",scp
->cmnd
[0]));
2442 if (!cmndinfo
->wait_for_completion
)
2443 cmndinfo
->wait_for_completion
++;
2450 static int gdth_fill_cache_cmd(gdth_ha_str
*ha
, Scsi_Cmnd
*scp
, ushort hdrive
)
2452 register gdth_cmd_str
*cmdp
;
2453 struct gdth_cmndinfo
*cmndinfo
= gdth_cmnd_priv(scp
);
2454 struct scatterlist
*sl
;
2455 ulong32 cnt
, blockcnt
;
2456 ulong64 no
, blockno
;
2457 dma_addr_t phys_addr
;
2458 int i
, cmd_index
, read_write
, sgcnt
, mode64
;
2463 TRACE(("gdth_fill_cache_cmd() cmd 0x%x cmdsize %d hdrive %d\n",
2464 scp
->cmnd
[0],scp
->cmd_len
,hdrive
));
2466 if (ha
->type
==GDT_EISA
&& ha
->cmd_cnt
>0)
2469 mode64
= (ha
->cache_feat
& GDT_64BIT
) ? TRUE
: FALSE
;
2470 /* test for READ_16, WRITE_16 if !mode64 ? ---
2471 not required, should not occur due to error return on
2474 cmdp
->Service
= CACHESERVICE
;
2475 cmdp
->RequestBuffer
= scp
;
2476 /* search free command index */
2477 if (!(cmd_index
=gdth_get_cmd_index(ha
))) {
2478 TRACE(("GDT: No free command index found\n"));
2481 /* if it's the first command, set command semaphore */
2482 if (ha
->cmd_cnt
== 0)
2487 if (cmndinfo
->OpCode
!= -1)
2488 cmdp
->OpCode
= cmndinfo
->OpCode
; /* special cache cmd. */
2489 else if (scp
->cmnd
[0] == RESERVE
)
2490 cmdp
->OpCode
= GDT_RESERVE_DRV
;
2491 else if (scp
->cmnd
[0] == RELEASE
)
2492 cmdp
->OpCode
= GDT_RELEASE_DRV
;
2493 else if (scp
->cmnd
[0] == ALLOW_MEDIUM_REMOVAL
) {
2494 if (scp
->cmnd
[4] & 1) /* prevent ? */
2495 cmdp
->OpCode
= GDT_MOUNT
;
2496 else if (scp
->cmnd
[3] & 1) /* removable drive ? */
2497 cmdp
->OpCode
= GDT_UNMOUNT
;
2499 cmdp
->OpCode
= GDT_FLUSH
;
2500 } else if (scp
->cmnd
[0] == WRITE_6
|| scp
->cmnd
[0] == WRITE_10
||
2501 scp
->cmnd
[0] == WRITE_12
|| scp
->cmnd
[0] == WRITE_16
2504 if (gdth_write_through
|| ((ha
->hdr
[hdrive
].rw_attribs
& 1) &&
2505 (ha
->cache_feat
& GDT_WR_THROUGH
)))
2506 cmdp
->OpCode
= GDT_WRITE_THR
;
2508 cmdp
->OpCode
= GDT_WRITE
;
2511 cmdp
->OpCode
= GDT_READ
;
2514 cmdp
->BoardNode
= LOCALBOARD
;
2516 cmdp
->u
.cache64
.DeviceNo
= hdrive
;
2517 cmdp
->u
.cache64
.BlockNo
= 1;
2518 cmdp
->u
.cache64
.sg_canz
= 0;
2520 cmdp
->u
.cache
.DeviceNo
= hdrive
;
2521 cmdp
->u
.cache
.BlockNo
= 1;
2522 cmdp
->u
.cache
.sg_canz
= 0;
2526 if (scp
->cmd_len
== 16) {
2527 memcpy(&no
, &scp
->cmnd
[2], sizeof(ulong64
));
2528 blockno
= be64_to_cpu(no
);
2529 memcpy(&cnt
, &scp
->cmnd
[10], sizeof(ulong32
));
2530 blockcnt
= be32_to_cpu(cnt
);
2531 } else if (scp
->cmd_len
== 10) {
2532 memcpy(&no
, &scp
->cmnd
[2], sizeof(ulong32
));
2533 blockno
= be32_to_cpu(no
);
2534 memcpy(&cnt
, &scp
->cmnd
[7], sizeof(ushort
));
2535 blockcnt
= be16_to_cpu(cnt
);
2537 memcpy(&no
, &scp
->cmnd
[0], sizeof(ulong32
));
2538 blockno
= be32_to_cpu(no
) & 0x001fffffUL
;
2539 blockcnt
= scp
->cmnd
[4]==0 ? 0x100 : scp
->cmnd
[4];
2542 cmdp
->u
.cache64
.BlockNo
= blockno
;
2543 cmdp
->u
.cache64
.BlockCnt
= blockcnt
;
2545 cmdp
->u
.cache
.BlockNo
= (ulong32
)blockno
;
2546 cmdp
->u
.cache
.BlockCnt
= blockcnt
;
2550 sl
= (struct scatterlist
*)scp
->request_buffer
;
2551 sgcnt
= scp
->use_sg
;
2552 scp
->SCp
.Status
= GDTH_MAP_SG
;
2553 cmndinfo
->dma_dir
= (read_write
== 1 ?
2554 PCI_DMA_TODEVICE
: PCI_DMA_FROMDEVICE
);
2555 sgcnt
= pci_map_sg(ha
->pdev
, sl
, scp
->use_sg
, cmndinfo
->dma_dir
);
2557 cmdp
->u
.cache64
.DestAddr
= (ulong64
)-1;
2558 cmdp
->u
.cache64
.sg_canz
= sgcnt
;
2559 for (i
=0; i
<sgcnt
; ++i
,++sl
) {
2560 cmdp
->u
.cache64
.sg_lst
[i
].sg_ptr
= sg_dma_address(sl
);
2561 #ifdef GDTH_DMA_STATISTICS
2562 if (cmdp
->u
.cache64
.sg_lst
[i
].sg_ptr
> (ulong64
)0xffffffff)
2567 cmdp
->u
.cache64
.sg_lst
[i
].sg_len
= sg_dma_len(sl
);
2570 cmdp
->u
.cache
.DestAddr
= 0xffffffff;
2571 cmdp
->u
.cache
.sg_canz
= sgcnt
;
2572 for (i
=0; i
<sgcnt
; ++i
,++sl
) {
2573 cmdp
->u
.cache
.sg_lst
[i
].sg_ptr
= sg_dma_address(sl
);
2574 #ifdef GDTH_DMA_STATISTICS
2577 cmdp
->u
.cache
.sg_lst
[i
].sg_len
= sg_dma_len(sl
);
2581 #ifdef GDTH_STATISTICS
2582 if (max_sg
< (ulong32
)sgcnt
) {
2583 max_sg
= (ulong32
)sgcnt
;
2584 TRACE3(("GDT: max_sg = %d\n",max_sg
));
2588 } else if (scp
->request_bufflen
) {
2589 scp
->SCp
.Status
= GDTH_MAP_SINGLE
;
2590 cmndinfo
->dma_dir
= (read_write
== 1 ?
2591 PCI_DMA_TODEVICE
: PCI_DMA_FROMDEVICE
);
2592 page
= virt_to_page(scp
->request_buffer
);
2593 offset
= (ulong
)scp
->request_buffer
& ~PAGE_MASK
;
2594 phys_addr
= pci_map_page(ha
->pdev
,page
,offset
,
2595 scp
->request_bufflen
, cmndinfo
->dma_dir
);
2596 scp
->SCp
.dma_handle
= phys_addr
;
2598 if (ha
->cache_feat
& SCATTER_GATHER
) {
2599 cmdp
->u
.cache64
.DestAddr
= (ulong64
)-1;
2600 cmdp
->u
.cache64
.sg_canz
= 1;
2601 cmdp
->u
.cache64
.sg_lst
[0].sg_ptr
= phys_addr
;
2602 cmdp
->u
.cache64
.sg_lst
[0].sg_len
= scp
->request_bufflen
;
2603 cmdp
->u
.cache64
.sg_lst
[1].sg_len
= 0;
2605 cmdp
->u
.cache64
.DestAddr
= phys_addr
;
2606 cmdp
->u
.cache64
.sg_canz
= 0;
2609 if (ha
->cache_feat
& SCATTER_GATHER
) {
2610 cmdp
->u
.cache
.DestAddr
= 0xffffffff;
2611 cmdp
->u
.cache
.sg_canz
= 1;
2612 cmdp
->u
.cache
.sg_lst
[0].sg_ptr
= phys_addr
;
2613 cmdp
->u
.cache
.sg_lst
[0].sg_len
= scp
->request_bufflen
;
2614 cmdp
->u
.cache
.sg_lst
[1].sg_len
= 0;
2616 cmdp
->u
.cache
.DestAddr
= phys_addr
;
2617 cmdp
->u
.cache
.sg_canz
= 0;
2622 /* evaluate command size, check space */
2624 TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2625 cmdp
->u
.cache64
.DestAddr
,cmdp
->u
.cache64
.sg_canz
,
2626 cmdp
->u
.cache64
.sg_lst
[0].sg_ptr
,
2627 cmdp
->u
.cache64
.sg_lst
[0].sg_len
));
2628 TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2629 cmdp
->OpCode
,cmdp
->u
.cache64
.BlockNo
,cmdp
->u
.cache64
.BlockCnt
));
2630 ha
->cmd_len
= GDTOFFSOF(gdth_cmd_str
,u
.cache64
.sg_lst
) +
2631 (ushort
)cmdp
->u
.cache64
.sg_canz
* sizeof(gdth_sg64_str
);
2633 TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2634 cmdp
->u
.cache
.DestAddr
,cmdp
->u
.cache
.sg_canz
,
2635 cmdp
->u
.cache
.sg_lst
[0].sg_ptr
,
2636 cmdp
->u
.cache
.sg_lst
[0].sg_len
));
2637 TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2638 cmdp
->OpCode
,cmdp
->u
.cache
.BlockNo
,cmdp
->u
.cache
.BlockCnt
));
2639 ha
->cmd_len
= GDTOFFSOF(gdth_cmd_str
,u
.cache
.sg_lst
) +
2640 (ushort
)cmdp
->u
.cache
.sg_canz
* sizeof(gdth_sg_str
);
2642 if (ha
->cmd_len
& 3)
2643 ha
->cmd_len
+= (4 - (ha
->cmd_len
& 3));
2645 if (ha
->cmd_cnt
> 0) {
2646 if ((ha
->cmd_offs_dpmem
+ ha
->cmd_len
+ DPMEM_COMMAND_OFFSET
) >
2648 TRACE2(("gdth_fill_cache() DPMEM overflow\n"));
2649 ha
->cmd_tab
[cmd_index
-2].cmnd
= UNUSED_CMND
;
2655 gdth_copy_command(ha
);
2659 static int gdth_fill_raw_cmd(gdth_ha_str
*ha
, Scsi_Cmnd
*scp
, unchar b
)
2661 register gdth_cmd_str
*cmdp
;
2662 struct scatterlist
*sl
;
2664 dma_addr_t phys_addr
, sense_paddr
;
2665 int cmd_index
, sgcnt
, mode64
;
2669 struct gdth_cmndinfo
*cmndinfo
;
2671 t
= scp
->device
->id
;
2672 l
= scp
->device
->lun
;
2674 TRACE(("gdth_fill_raw_cmd() cmd 0x%x bus %d ID %d LUN %d\n",
2675 scp
->cmnd
[0],b
,t
,l
));
2677 if (ha
->type
==GDT_EISA
&& ha
->cmd_cnt
>0)
2680 mode64
= (ha
->raw_feat
& GDT_64BIT
) ? TRUE
: FALSE
;
2682 cmdp
->Service
= SCSIRAWSERVICE
;
2683 cmdp
->RequestBuffer
= scp
;
2684 /* search free command index */
2685 if (!(cmd_index
=gdth_get_cmd_index(ha
))) {
2686 TRACE(("GDT: No free command index found\n"));
2689 /* if it's the first command, set command semaphore */
2690 if (ha
->cmd_cnt
== 0)
2693 cmndinfo
= gdth_cmnd_priv(scp
);
2695 if (cmndinfo
->OpCode
!= -1) {
2696 cmdp
->OpCode
= cmndinfo
->OpCode
; /* special raw cmd. */
2697 cmdp
->BoardNode
= LOCALBOARD
;
2699 cmdp
->u
.raw64
.direction
= (cmndinfo
->phase
>> 8);
2700 TRACE2(("special raw cmd 0x%x param 0x%x\n",
2701 cmdp
->OpCode
, cmdp
->u
.raw64
.direction
));
2702 /* evaluate command size */
2703 ha
->cmd_len
= GDTOFFSOF(gdth_cmd_str
,u
.raw64
.sg_lst
);
2705 cmdp
->u
.raw
.direction
= (cmndinfo
->phase
>> 8);
2706 TRACE2(("special raw cmd 0x%x param 0x%x\n",
2707 cmdp
->OpCode
, cmdp
->u
.raw
.direction
));
2708 /* evaluate command size */
2709 ha
->cmd_len
= GDTOFFSOF(gdth_cmd_str
,u
.raw
.sg_lst
);
2713 page
= virt_to_page(scp
->sense_buffer
);
2714 offset
= (ulong
)scp
->sense_buffer
& ~PAGE_MASK
;
2715 sense_paddr
= pci_map_page(ha
->pdev
,page
,offset
,
2716 16,PCI_DMA_FROMDEVICE
);
2718 cmndinfo
->sense_paddr
= sense_paddr
;
2719 cmdp
->OpCode
= GDT_WRITE
; /* always */
2720 cmdp
->BoardNode
= LOCALBOARD
;
2722 cmdp
->u
.raw64
.reserved
= 0;
2723 cmdp
->u
.raw64
.mdisc_time
= 0;
2724 cmdp
->u
.raw64
.mcon_time
= 0;
2725 cmdp
->u
.raw64
.clen
= scp
->cmd_len
;
2726 cmdp
->u
.raw64
.target
= t
;
2727 cmdp
->u
.raw64
.lun
= l
;
2728 cmdp
->u
.raw64
.bus
= b
;
2729 cmdp
->u
.raw64
.priority
= 0;
2730 cmdp
->u
.raw64
.sdlen
= scp
->request_bufflen
;
2731 cmdp
->u
.raw64
.sense_len
= 16;
2732 cmdp
->u
.raw64
.sense_data
= sense_paddr
;
2733 cmdp
->u
.raw64
.direction
=
2734 gdth_direction_tab
[scp
->cmnd
[0]]==DOU
? GDTH_DATA_OUT
:GDTH_DATA_IN
;
2735 memcpy(cmdp
->u
.raw64
.cmd
,scp
->cmnd
,16);
2736 cmdp
->u
.raw64
.sg_ranz
= 0;
2738 cmdp
->u
.raw
.reserved
= 0;
2739 cmdp
->u
.raw
.mdisc_time
= 0;
2740 cmdp
->u
.raw
.mcon_time
= 0;
2741 cmdp
->u
.raw
.clen
= scp
->cmd_len
;
2742 cmdp
->u
.raw
.target
= t
;
2743 cmdp
->u
.raw
.lun
= l
;
2744 cmdp
->u
.raw
.bus
= b
;
2745 cmdp
->u
.raw
.priority
= 0;
2746 cmdp
->u
.raw
.link_p
= 0;
2747 cmdp
->u
.raw
.sdlen
= scp
->request_bufflen
;
2748 cmdp
->u
.raw
.sense_len
= 16;
2749 cmdp
->u
.raw
.sense_data
= sense_paddr
;
2750 cmdp
->u
.raw
.direction
=
2751 gdth_direction_tab
[scp
->cmnd
[0]]==DOU
? GDTH_DATA_OUT
:GDTH_DATA_IN
;
2752 memcpy(cmdp
->u
.raw
.cmd
,scp
->cmnd
,12);
2753 cmdp
->u
.raw
.sg_ranz
= 0;
2757 sl
= (struct scatterlist
*)scp
->request_buffer
;
2758 sgcnt
= scp
->use_sg
;
2759 scp
->SCp
.Status
= GDTH_MAP_SG
;
2760 cmndinfo
->dma_dir
= PCI_DMA_BIDIRECTIONAL
;
2761 sgcnt
= pci_map_sg(ha
->pdev
,sl
, scp
->use_sg
, cmndinfo
->dma_dir
);
2763 cmdp
->u
.raw64
.sdata
= (ulong64
)-1;
2764 cmdp
->u
.raw64
.sg_ranz
= sgcnt
;
2765 for (i
=0; i
<sgcnt
; ++i
,++sl
) {
2766 cmdp
->u
.raw64
.sg_lst
[i
].sg_ptr
= sg_dma_address(sl
);
2767 #ifdef GDTH_DMA_STATISTICS
2768 if (cmdp
->u
.raw64
.sg_lst
[i
].sg_ptr
> (ulong64
)0xffffffff)
2773 cmdp
->u
.raw64
.sg_lst
[i
].sg_len
= sg_dma_len(sl
);
2776 cmdp
->u
.raw
.sdata
= 0xffffffff;
2777 cmdp
->u
.raw
.sg_ranz
= sgcnt
;
2778 for (i
=0; i
<sgcnt
; ++i
,++sl
) {
2779 cmdp
->u
.raw
.sg_lst
[i
].sg_ptr
= sg_dma_address(sl
);
2780 #ifdef GDTH_DMA_STATISTICS
2783 cmdp
->u
.raw
.sg_lst
[i
].sg_len
= sg_dma_len(sl
);
2787 #ifdef GDTH_STATISTICS
2788 if (max_sg
< sgcnt
) {
2790 TRACE3(("GDT: max_sg = %d\n",sgcnt
));
2794 } else if (scp
->request_bufflen
) {
2795 scp
->SCp
.Status
= GDTH_MAP_SINGLE
;
2796 cmndinfo
->dma_dir
= PCI_DMA_BIDIRECTIONAL
;
2797 page
= virt_to_page(scp
->request_buffer
);
2798 offset
= (ulong
)scp
->request_buffer
& ~PAGE_MASK
;
2799 phys_addr
= pci_map_page(ha
->pdev
,page
,offset
,
2800 scp
->request_bufflen
, cmndinfo
->dma_dir
);
2801 scp
->SCp
.dma_handle
= phys_addr
;
2804 if (ha
->raw_feat
& SCATTER_GATHER
) {
2805 cmdp
->u
.raw64
.sdata
= (ulong64
)-1;
2806 cmdp
->u
.raw64
.sg_ranz
= 1;
2807 cmdp
->u
.raw64
.sg_lst
[0].sg_ptr
= phys_addr
;
2808 cmdp
->u
.raw64
.sg_lst
[0].sg_len
= scp
->request_bufflen
;
2809 cmdp
->u
.raw64
.sg_lst
[1].sg_len
= 0;
2811 cmdp
->u
.raw64
.sdata
= phys_addr
;
2812 cmdp
->u
.raw64
.sg_ranz
= 0;
2815 if (ha
->raw_feat
& SCATTER_GATHER
) {
2816 cmdp
->u
.raw
.sdata
= 0xffffffff;
2817 cmdp
->u
.raw
.sg_ranz
= 1;
2818 cmdp
->u
.raw
.sg_lst
[0].sg_ptr
= phys_addr
;
2819 cmdp
->u
.raw
.sg_lst
[0].sg_len
= scp
->request_bufflen
;
2820 cmdp
->u
.raw
.sg_lst
[1].sg_len
= 0;
2822 cmdp
->u
.raw
.sdata
= phys_addr
;
2823 cmdp
->u
.raw
.sg_ranz
= 0;
2828 TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2829 cmdp
->u
.raw64
.sdata
,cmdp
->u
.raw64
.sg_ranz
,
2830 cmdp
->u
.raw64
.sg_lst
[0].sg_ptr
,
2831 cmdp
->u
.raw64
.sg_lst
[0].sg_len
));
2832 /* evaluate command size */
2833 ha
->cmd_len
= GDTOFFSOF(gdth_cmd_str
,u
.raw64
.sg_lst
) +
2834 (ushort
)cmdp
->u
.raw64
.sg_ranz
* sizeof(gdth_sg64_str
);
2836 TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2837 cmdp
->u
.raw
.sdata
,cmdp
->u
.raw
.sg_ranz
,
2838 cmdp
->u
.raw
.sg_lst
[0].sg_ptr
,
2839 cmdp
->u
.raw
.sg_lst
[0].sg_len
));
2840 /* evaluate command size */
2841 ha
->cmd_len
= GDTOFFSOF(gdth_cmd_str
,u
.raw
.sg_lst
) +
2842 (ushort
)cmdp
->u
.raw
.sg_ranz
* sizeof(gdth_sg_str
);
2846 if (ha
->cmd_len
& 3)
2847 ha
->cmd_len
+= (4 - (ha
->cmd_len
& 3));
2849 if (ha
->cmd_cnt
> 0) {
2850 if ((ha
->cmd_offs_dpmem
+ ha
->cmd_len
+ DPMEM_COMMAND_OFFSET
) >
2852 TRACE2(("gdth_fill_raw() DPMEM overflow\n"));
2853 ha
->cmd_tab
[cmd_index
-2].cmnd
= UNUSED_CMND
;
2859 gdth_copy_command(ha
);
2863 static int gdth_special_cmd(gdth_ha_str
*ha
, Scsi_Cmnd
*scp
)
2865 register gdth_cmd_str
*cmdp
;
2869 TRACE2(("gdth_special_cmd(): "));
2871 if (ha
->type
==GDT_EISA
&& ha
->cmd_cnt
>0)
2874 memcpy( cmdp
, scp
->request_buffer
, sizeof(gdth_cmd_str
));
2875 cmdp
->RequestBuffer
= scp
;
2877 /* search free command index */
2878 if (!(cmd_index
=gdth_get_cmd_index(ha
))) {
2879 TRACE(("GDT: No free command index found\n"));
2883 /* if it's the first command, set command semaphore */
2884 if (ha
->cmd_cnt
== 0)
2887 /* evaluate command size, check space */
2888 if (cmdp
->OpCode
== GDT_IOCTL
) {
2889 TRACE2(("IOCTL\n"));
2891 GDTOFFSOF(gdth_cmd_str
,u
.ioctl
.p_param
) + sizeof(ulong64
);
2892 } else if (cmdp
->Service
== CACHESERVICE
) {
2893 TRACE2(("cache command %d\n",cmdp
->OpCode
));
2894 if (ha
->cache_feat
& GDT_64BIT
)
2896 GDTOFFSOF(gdth_cmd_str
,u
.cache64
.sg_lst
) + sizeof(gdth_sg64_str
);
2899 GDTOFFSOF(gdth_cmd_str
,u
.cache
.sg_lst
) + sizeof(gdth_sg_str
);
2900 } else if (cmdp
->Service
== SCSIRAWSERVICE
) {
2901 TRACE2(("raw command %d\n",cmdp
->OpCode
));
2902 if (ha
->raw_feat
& GDT_64BIT
)
2904 GDTOFFSOF(gdth_cmd_str
,u
.raw64
.sg_lst
) + sizeof(gdth_sg64_str
);
2907 GDTOFFSOF(gdth_cmd_str
,u
.raw
.sg_lst
) + sizeof(gdth_sg_str
);
2910 if (ha
->cmd_len
& 3)
2911 ha
->cmd_len
+= (4 - (ha
->cmd_len
& 3));
2913 if (ha
->cmd_cnt
> 0) {
2914 if ((ha
->cmd_offs_dpmem
+ ha
->cmd_len
+ DPMEM_COMMAND_OFFSET
) >
2916 TRACE2(("gdth_special_cmd() DPMEM overflow\n"));
2917 ha
->cmd_tab
[cmd_index
-2].cmnd
= UNUSED_CMND
;
2923 gdth_copy_command(ha
);
2928 /* Controller event handling functions */
2929 static gdth_evt_str
*gdth_store_event(gdth_ha_str
*ha
, ushort source
,
2930 ushort idx
, gdth_evt_data
*evt
)
2935 /* no GDTH_LOCK_HA() ! */
2936 TRACE2(("gdth_store_event() source %d idx %d\n", source
, idx
));
2937 if (source
== 0) /* no source -> no event */
2940 if (ebuffer
[elastidx
].event_source
== source
&&
2941 ebuffer
[elastidx
].event_idx
== idx
&&
2942 ((evt
->size
!= 0 && ebuffer
[elastidx
].event_data
.size
!= 0 &&
2943 !memcmp((char *)&ebuffer
[elastidx
].event_data
.eu
,
2944 (char *)&evt
->eu
, evt
->size
)) ||
2945 (evt
->size
== 0 && ebuffer
[elastidx
].event_data
.size
== 0 &&
2946 !strcmp((char *)&ebuffer
[elastidx
].event_data
.event_string
,
2947 (char *)&evt
->event_string
)))) {
2948 e
= &ebuffer
[elastidx
];
2949 do_gettimeofday(&tv
);
2950 e
->last_stamp
= tv
.tv_sec
;
2953 if (ebuffer
[elastidx
].event_source
!= 0) { /* entry not free ? */
2955 if (elastidx
== MAX_EVENTS
)
2957 if (elastidx
== eoldidx
) { /* reached mark ? */
2959 if (eoldidx
== MAX_EVENTS
)
2963 e
= &ebuffer
[elastidx
];
2964 e
->event_source
= source
;
2966 do_gettimeofday(&tv
);
2967 e
->first_stamp
= e
->last_stamp
= tv
.tv_sec
;
2969 e
->event_data
= *evt
;
2975 static int gdth_read_event(gdth_ha_str
*ha
, int handle
, gdth_evt_str
*estr
)
2981 TRACE2(("gdth_read_event() handle %d\n", handle
));
2982 spin_lock_irqsave(&ha
->smp_lock
, flags
);
2987 estr
->event_source
= 0;
2989 if (eindex
>= MAX_EVENTS
) {
2990 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
2993 e
= &ebuffer
[eindex
];
2994 if (e
->event_source
!= 0) {
2995 if (eindex
!= elastidx
) {
2996 if (++eindex
== MAX_EVENTS
)
3001 memcpy(estr
, e
, sizeof(gdth_evt_str
));
3003 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
3007 static void gdth_readapp_event(gdth_ha_str
*ha
,
3008 unchar application
, gdth_evt_str
*estr
)
3013 unchar found
= FALSE
;
3015 TRACE2(("gdth_readapp_event() app. %d\n", application
));
3016 spin_lock_irqsave(&ha
->smp_lock
, flags
);
3019 e
= &ebuffer
[eindex
];
3020 if (e
->event_source
== 0)
3022 if ((e
->application
& application
) == 0) {
3023 e
->application
|= application
;
3027 if (eindex
== elastidx
)
3029 if (++eindex
== MAX_EVENTS
)
3033 memcpy(estr
, e
, sizeof(gdth_evt_str
));
3035 estr
->event_source
= 0;
3036 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
3039 static void gdth_clear_events(void)
3041 TRACE(("gdth_clear_events()"));
3043 eoldidx
= elastidx
= 0;
3044 ebuffer
[0].event_source
= 0;
3048 /* SCSI interface functions */
3050 static irqreturn_t
__gdth_interrupt(gdth_ha_str
*ha
, int irq
,
3051 int gdth_from_wait
, int* pIndex
)
3053 gdt6m_dpram_str __iomem
*dp6m_ptr
= NULL
;
3054 gdt6_dpram_str __iomem
*dp6_ptr
;
3055 gdt2_dpram_str __iomem
*dp2_ptr
;
3062 int coalesced
= FALSE
;
3064 gdth_coal_status
*pcs
= NULL
;
3065 int act_int_coal
= 0;
3068 TRACE(("gdth_interrupt() IRQ %d\n",irq
));
3070 /* if polling and not from gdth_wait() -> return */
3072 if (!gdth_from_wait
) {
3078 spin_lock_irqsave(&ha
->smp_lock
, flags
);
3080 /* search controller */
3081 if (0 == (IStatus
= gdth_get_status(ha
, irq
))) {
3082 /* spurious interrupt */
3084 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
3088 #ifdef GDTH_STATISTICS
3093 /* See if the fw is returning coalesced status */
3094 if (IStatus
== COALINDEX
) {
3095 /* Coalesced status. Setup the initial status
3096 buffer pointer and flags */
3097 pcs
= ha
->coal_stat
;
3104 /* For coalesced requests all status
3105 information is found in the status buffer */
3106 IStatus
= (unchar
)(pcs
->status
& 0xff);
3110 if (ha
->type
== GDT_EISA
) {
3111 if (IStatus
& 0x80) { /* error flag */
3113 ha
->status
= inw(ha
->bmic
+ MAILBOXREG
+8);
3114 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus
,ha
->status
));
3115 } else /* no error */
3117 ha
->info
= inl(ha
->bmic
+ MAILBOXREG
+12);
3118 ha
->service
= inw(ha
->bmic
+ MAILBOXREG
+10);
3119 ha
->info2
= inl(ha
->bmic
+ MAILBOXREG
+4);
3121 outb(0xff, ha
->bmic
+ EDOORREG
); /* acknowledge interrupt */
3122 outb(0x00, ha
->bmic
+ SEMA1REG
); /* reset status semaphore */
3123 } else if (ha
->type
== GDT_ISA
) {
3125 if (IStatus
& 0x80) { /* error flag */
3127 ha
->status
= readw(&dp2_ptr
->u
.ic
.Status
);
3128 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus
,ha
->status
));
3129 } else /* no error */
3131 ha
->info
= readl(&dp2_ptr
->u
.ic
.Info
[0]);
3132 ha
->service
= readw(&dp2_ptr
->u
.ic
.Service
);
3133 ha
->info2
= readl(&dp2_ptr
->u
.ic
.Info
[1]);
3135 writeb(0xff, &dp2_ptr
->io
.irqdel
); /* acknowledge interrupt */
3136 writeb(0, &dp2_ptr
->u
.ic
.Cmd_Index
);/* reset command index */
3137 writeb(0, &dp2_ptr
->io
.Sema1
); /* reset status semaphore */
3138 } else if (ha
->type
== GDT_PCI
) {
3140 if (IStatus
& 0x80) { /* error flag */
3142 ha
->status
= readw(&dp6_ptr
->u
.ic
.Status
);
3143 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus
,ha
->status
));
3144 } else /* no error */
3146 ha
->info
= readl(&dp6_ptr
->u
.ic
.Info
[0]);
3147 ha
->service
= readw(&dp6_ptr
->u
.ic
.Service
);
3148 ha
->info2
= readl(&dp6_ptr
->u
.ic
.Info
[1]);
3150 writeb(0xff, &dp6_ptr
->io
.irqdel
); /* acknowledge interrupt */
3151 writeb(0, &dp6_ptr
->u
.ic
.Cmd_Index
);/* reset command index */
3152 writeb(0, &dp6_ptr
->io
.Sema1
); /* reset status semaphore */
3153 } else if (ha
->type
== GDT_PCINEW
) {
3154 if (IStatus
& 0x80) { /* error flag */
3156 ha
->status
= inw(PTR2USHORT(&ha
->plx
->status
));
3157 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus
,ha
->status
));
3160 ha
->info
= inl(PTR2USHORT(&ha
->plx
->info
[0]));
3161 ha
->service
= inw(PTR2USHORT(&ha
->plx
->service
));
3162 ha
->info2
= inl(PTR2USHORT(&ha
->plx
->info
[1]));
3164 outb(0xff, PTR2USHORT(&ha
->plx
->edoor_reg
));
3165 outb(0x00, PTR2USHORT(&ha
->plx
->sema1_reg
));
3166 } else if (ha
->type
== GDT_PCIMPR
) {
3168 if (IStatus
& 0x80) { /* error flag */
3172 ha
->status
= pcs
->ext_status
& 0xffff;
3175 ha
->status
= readw(&dp6m_ptr
->i960r
.status
);
3176 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus
,ha
->status
));
3177 } else /* no error */
3180 /* get information */
3182 ha
->info
= pcs
->info0
;
3183 ha
->info2
= pcs
->info1
;
3184 ha
->service
= (pcs
->ext_status
>> 16) & 0xffff;
3188 ha
->info
= readl(&dp6m_ptr
->i960r
.info
[0]);
3189 ha
->service
= readw(&dp6m_ptr
->i960r
.service
);
3190 ha
->info2
= readl(&dp6m_ptr
->i960r
.info
[1]);
3193 if (IStatus
== ASYNCINDEX
) {
3194 if (ha
->service
!= SCREENSERVICE
&&
3195 (ha
->fw_vers
& 0xff) >= 0x1a) {
3196 ha
->dvr
.severity
= readb
3197 (&((gdt6m_dpram_str __iomem
*)ha
->brd
)->i960r
.severity
);
3198 for (i
= 0; i
< 256; ++i
) {
3199 ha
->dvr
.event_string
[i
] = readb
3200 (&((gdt6m_dpram_str __iomem
*)ha
->brd
)->i960r
.evt_str
[i
]);
3201 if (ha
->dvr
.event_string
[i
] == 0)
3207 /* Make sure that non coalesced interrupts get cleared
3208 before being handled by gdth_async_event/gdth_sync_event */
3212 writeb(0xff, &dp6m_ptr
->i960r
.edoor_reg
);
3213 writeb(0, &dp6m_ptr
->i960r
.sema1_reg
);
3216 TRACE2(("gdth_interrupt() unknown controller type\n"));
3218 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
3222 TRACE(("gdth_interrupt() index %d stat %d info %d\n",
3223 IStatus
,ha
->status
,ha
->info
));
3225 if (gdth_from_wait
) {
3226 *pIndex
= (int)IStatus
;
3229 if (IStatus
== ASYNCINDEX
) {
3230 TRACE2(("gdth_interrupt() async. event\n"));
3231 gdth_async_event(ha
);
3233 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
3238 if (IStatus
== SPEZINDEX
) {
3239 TRACE2(("Service unknown or not initialized !\n"));
3240 ha
->dvr
.size
= sizeof(ha
->dvr
.eu
.driver
);
3241 ha
->dvr
.eu
.driver
.ionode
= ha
->hanum
;
3242 gdth_store_event(ha
, ES_DRIVER
, 4, &ha
->dvr
);
3244 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
3247 scp
= ha
->cmd_tab
[IStatus
-2].cmnd
;
3248 Service
= ha
->cmd_tab
[IStatus
-2].service
;
3249 ha
->cmd_tab
[IStatus
-2].cmnd
= UNUSED_CMND
;
3250 if (scp
== UNUSED_CMND
) {
3251 TRACE2(("gdth_interrupt() index to unused command (%d)\n",IStatus
));
3252 ha
->dvr
.size
= sizeof(ha
->dvr
.eu
.driver
);
3253 ha
->dvr
.eu
.driver
.ionode
= ha
->hanum
;
3254 ha
->dvr
.eu
.driver
.index
= IStatus
;
3255 gdth_store_event(ha
, ES_DRIVER
, 1, &ha
->dvr
);
3257 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
3260 if (scp
== INTERNAL_CMND
) {
3261 TRACE(("gdth_interrupt() answer to internal command\n"));
3263 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
3267 TRACE(("gdth_interrupt() sync. status\n"));
3268 rval
= gdth_sync_event(ha
,Service
,IStatus
,scp
);
3270 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
3272 gdth_putq(ha
, scp
, gdth_cmnd_priv(scp
)->priority
);
3273 } else if (rval
== 1) {
3274 gdth_scsi_done(scp
);
3279 /* go to the next status in the status buffer */
3281 #ifdef GDTH_STATISTICS
3283 if (act_int_coal
> max_int_coal
) {
3284 max_int_coal
= act_int_coal
;
3285 printk("GDT: max_int_coal = %d\n",(ushort
)max_int_coal
);
3288 /* see if there is another status */
3289 if (pcs
->status
== 0)
3290 /* Stop the coalesce loop */
3295 /* coalescing only for new GDT_PCIMPR controllers available */
3296 if (ha
->type
== GDT_PCIMPR
&& coalesced
) {
3297 writeb(0xff, &dp6m_ptr
->i960r
.edoor_reg
);
3298 writeb(0, &dp6m_ptr
->i960r
.sema1_reg
);
3306 static irqreturn_t
gdth_interrupt(int irq
, void *dev_id
)
3308 gdth_ha_str
*ha
= (gdth_ha_str
*)dev_id
;
3310 return __gdth_interrupt(ha
, irq
, false, NULL
);
3313 static int gdth_sync_event(gdth_ha_str
*ha
, int service
, unchar index
,
3319 struct gdth_cmndinfo
*cmndinfo
= gdth_cmnd_priv(scp
);
3322 TRACE(("gdth_sync_event() serv %d status %d\n",
3323 service
,ha
->status
));
3325 if (service
== SCREENSERVICE
) {
3327 TRACE(("len: %d, answer: %d, ext: %d, alen: %d\n",
3328 msg
->msg_len
,msg
->msg_answer
,msg
->msg_ext
,msg
->msg_alen
));
3329 if (msg
->msg_len
> MSGLEN
+1)
3330 msg
->msg_len
= MSGLEN
+1;
3332 if (!(msg
->msg_answer
&& msg
->msg_ext
)) {
3333 msg
->msg_text
[msg
->msg_len
] = '\0';
3334 printk("%s",msg
->msg_text
);
3337 if (msg
->msg_ext
&& !msg
->msg_answer
) {
3338 while (gdth_test_busy(ha
))
3340 cmdp
->Service
= SCREENSERVICE
;
3341 cmdp
->RequestBuffer
= SCREEN_CMND
;
3342 gdth_get_cmd_index(ha
);
3344 cmdp
->OpCode
= GDT_READ
;
3345 cmdp
->BoardNode
= LOCALBOARD
;
3346 cmdp
->u
.screen
.reserved
= 0;
3347 cmdp
->u
.screen
.su
.msg
.msg_handle
= msg
->msg_handle
;
3348 cmdp
->u
.screen
.su
.msg
.msg_addr
= ha
->msg_phys
;
3349 ha
->cmd_offs_dpmem
= 0;
3350 ha
->cmd_len
= GDTOFFSOF(gdth_cmd_str
,u
.screen
.su
.msg
.msg_addr
)
3353 gdth_copy_command(ha
);
3354 gdth_release_event(ha
);
3358 if (msg
->msg_answer
&& msg
->msg_alen
) {
3359 /* default answers (getchar() not possible) */
3360 if (msg
->msg_alen
== 1) {
3363 msg
->msg_text
[0] = 0;
3367 msg
->msg_text
[0] = 1;
3368 msg
->msg_text
[1] = 0;
3371 msg
->msg_answer
= 0;
3372 while (gdth_test_busy(ha
))
3374 cmdp
->Service
= SCREENSERVICE
;
3375 cmdp
->RequestBuffer
= SCREEN_CMND
;
3376 gdth_get_cmd_index(ha
);
3378 cmdp
->OpCode
= GDT_WRITE
;
3379 cmdp
->BoardNode
= LOCALBOARD
;
3380 cmdp
->u
.screen
.reserved
= 0;
3381 cmdp
->u
.screen
.su
.msg
.msg_handle
= msg
->msg_handle
;
3382 cmdp
->u
.screen
.su
.msg
.msg_addr
= ha
->msg_phys
;
3383 ha
->cmd_offs_dpmem
= 0;
3384 ha
->cmd_len
= GDTOFFSOF(gdth_cmd_str
,u
.screen
.su
.msg
.msg_addr
)
3387 gdth_copy_command(ha
);
3388 gdth_release_event(ha
);
3394 b
= scp
->device
->channel
;
3395 t
= scp
->device
->id
;
3396 if (cmndinfo
->OpCode
== -1 && b
!= ha
->virt_bus
) {
3397 ha
->raw
[BUS_L2P(ha
,b
)].io_cnt
[t
]--;
3399 /* cache or raw service */
3400 if (ha
->status
== S_BSY
) {
3401 TRACE2(("Controller busy -> retry !\n"));
3402 if (cmndinfo
->OpCode
== GDT_MOUNT
)
3403 cmndinfo
->OpCode
= GDT_CLUST_INFO
;
3407 if (scp
->SCp
.Status
== GDTH_MAP_SG
)
3408 pci_unmap_sg(ha
->pdev
,scp
->request_buffer
,
3409 scp
->use_sg
, cmndinfo
->dma_dir
);
3410 else if (scp
->SCp
.Status
== GDTH_MAP_SINGLE
)
3411 pci_unmap_page(ha
->pdev
,scp
->SCp
.dma_handle
,
3412 scp
->request_bufflen
, cmndinfo
->dma_dir
);
3413 if (cmndinfo
->sense_paddr
)
3414 pci_unmap_page(ha
->pdev
, cmndinfo
->sense_paddr
, 16,
3415 PCI_DMA_FROMDEVICE
);
3417 if (ha
->status
== S_OK
) {
3418 cmndinfo
->status
= S_OK
;
3419 cmndinfo
->info
= ha
->info
;
3420 if (cmndinfo
->OpCode
!= -1) {
3421 TRACE2(("gdth_sync_event(): special cmd 0x%x OK\n",
3423 /* special commands GDT_CLUST_INFO/GDT_MOUNT ? */
3424 if (cmndinfo
->OpCode
== GDT_CLUST_INFO
) {
3425 ha
->hdr
[t
].cluster_type
= (unchar
)ha
->info
;
3426 if (!(ha
->hdr
[t
].cluster_type
&
3428 /* NOT MOUNTED -> MOUNT */
3429 cmndinfo
->OpCode
= GDT_MOUNT
;
3430 if (ha
->hdr
[t
].cluster_type
&
3432 /* cluster drive RESERVED (on the other node) */
3433 cmndinfo
->phase
= -2; /* reservation conflict */
3436 cmndinfo
->OpCode
= -1;
3439 if (cmndinfo
->OpCode
== GDT_MOUNT
) {
3440 ha
->hdr
[t
].cluster_type
|= CLUSTER_MOUNTED
;
3441 ha
->hdr
[t
].media_changed
= TRUE
;
3442 } else if (cmndinfo
->OpCode
== GDT_UNMOUNT
) {
3443 ha
->hdr
[t
].cluster_type
&= ~CLUSTER_MOUNTED
;
3444 ha
->hdr
[t
].media_changed
= TRUE
;
3446 cmndinfo
->OpCode
= -1;
3449 cmndinfo
->priority
= HIGH_PRI
;
3452 /* RESERVE/RELEASE ? */
3453 if (scp
->cmnd
[0] == RESERVE
) {
3454 ha
->hdr
[t
].cluster_type
|= CLUSTER_RESERVED
;
3455 } else if (scp
->cmnd
[0] == RELEASE
) {
3456 ha
->hdr
[t
].cluster_type
&= ~CLUSTER_RESERVED
;
3458 scp
->result
= DID_OK
<< 16;
3459 scp
->sense_buffer
[0] = 0;
3462 cmndinfo
->status
= ha
->status
;
3463 cmndinfo
->info
= ha
->info
;
3465 if (cmndinfo
->OpCode
!= -1) {
3466 TRACE2(("gdth_sync_event(): special cmd 0x%x error 0x%x\n",
3467 cmndinfo
->OpCode
, ha
->status
));
3468 if (cmndinfo
->OpCode
== GDT_SCAN_START
||
3469 cmndinfo
->OpCode
== GDT_SCAN_END
) {
3470 cmndinfo
->OpCode
= -1;
3472 cmndinfo
->priority
= HIGH_PRI
;
3475 memset((char*)scp
->sense_buffer
,0,16);
3476 scp
->sense_buffer
[0] = 0x70;
3477 scp
->sense_buffer
[2] = NOT_READY
;
3478 scp
->result
= (DID_OK
<< 16) | (CHECK_CONDITION
<< 1);
3479 } else if (service
== CACHESERVICE
) {
3480 if (ha
->status
== S_CACHE_UNKNOWN
&&
3481 (ha
->hdr
[t
].cluster_type
&
3482 CLUSTER_RESERVE_STATE
) == CLUSTER_RESERVE_STATE
) {
3483 /* bus reset -> force GDT_CLUST_INFO */
3484 ha
->hdr
[t
].cluster_type
&= ~CLUSTER_RESERVED
;
3486 memset((char*)scp
->sense_buffer
,0,16);
3487 if (ha
->status
== (ushort
)S_CACHE_RESERV
) {
3488 scp
->result
= (DID_OK
<< 16) | (RESERVATION_CONFLICT
<< 1);
3490 scp
->sense_buffer
[0] = 0x70;
3491 scp
->sense_buffer
[2] = NOT_READY
;
3492 scp
->result
= (DID_OK
<< 16) | (CHECK_CONDITION
<< 1);
3494 if (!cmndinfo
->internal_command
) {
3495 ha
->dvr
.size
= sizeof(ha
->dvr
.eu
.sync
);
3496 ha
->dvr
.eu
.sync
.ionode
= ha
->hanum
;
3497 ha
->dvr
.eu
.sync
.service
= service
;
3498 ha
->dvr
.eu
.sync
.status
= ha
->status
;
3499 ha
->dvr
.eu
.sync
.info
= ha
->info
;
3500 ha
->dvr
.eu
.sync
.hostdrive
= t
;
3501 if (ha
->status
>= 0x8000)
3502 gdth_store_event(ha
, ES_SYNC
, 0, &ha
->dvr
);
3504 gdth_store_event(ha
, ES_SYNC
, service
, &ha
->dvr
);
3507 /* sense buffer filled from controller firmware (DMA) */
3508 if (ha
->status
!= S_RAW_SCSI
|| ha
->info
>= 0x100) {
3509 scp
->result
= DID_BAD_TARGET
<< 16;
3511 scp
->result
= (DID_OK
<< 16) | ha
->info
;
3515 if (!cmndinfo
->wait_for_completion
)
3516 cmndinfo
->wait_for_completion
++;
3524 static char *async_cache_tab
[] = {
3525 /* 0*/ "\011\000\002\002\002\004\002\006\004"
3526 "GDT HA %u, service %u, async. status %u/%lu unknown",
3527 /* 1*/ "\011\000\002\002\002\004\002\006\004"
3528 "GDT HA %u, service %u, async. status %u/%lu unknown",
3529 /* 2*/ "\005\000\002\006\004"
3530 "GDT HA %u, Host Drive %lu not ready",
3531 /* 3*/ "\005\000\002\006\004"
3532 "GDT HA %u, Host Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3533 /* 4*/ "\005\000\002\006\004"
3534 "GDT HA %u, mirror update on Host Drive %lu failed",
3535 /* 5*/ "\005\000\002\006\004"
3536 "GDT HA %u, Mirror Drive %lu failed",
3537 /* 6*/ "\005\000\002\006\004"
3538 "GDT HA %u, Mirror Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3539 /* 7*/ "\005\000\002\006\004"
3540 "GDT HA %u, Host Drive %lu write protected",
3541 /* 8*/ "\005\000\002\006\004"
3542 "GDT HA %u, media changed in Host Drive %lu",
3543 /* 9*/ "\005\000\002\006\004"
3544 "GDT HA %u, Host Drive %lu is offline",
3545 /*10*/ "\005\000\002\006\004"
3546 "GDT HA %u, media change of Mirror Drive %lu",
3547 /*11*/ "\005\000\002\006\004"
3548 "GDT HA %u, Mirror Drive %lu is write protected",
3549 /*12*/ "\005\000\002\006\004"
3550 "GDT HA %u, general error on Host Drive %lu. Please check the devices of this drive!",
3551 /*13*/ "\007\000\002\006\002\010\002"
3552 "GDT HA %u, Array Drive %u: Cache Drive %u failed",
3553 /*14*/ "\005\000\002\006\002"
3554 "GDT HA %u, Array Drive %u: FAIL state entered",
3555 /*15*/ "\005\000\002\006\002"
3556 "GDT HA %u, Array Drive %u: error",
3557 /*16*/ "\007\000\002\006\002\010\002"
3558 "GDT HA %u, Array Drive %u: failed drive replaced by Cache Drive %u",
3559 /*17*/ "\005\000\002\006\002"
3560 "GDT HA %u, Array Drive %u: parity build failed",
3561 /*18*/ "\005\000\002\006\002"
3562 "GDT HA %u, Array Drive %u: drive rebuild failed",
3563 /*19*/ "\005\000\002\010\002"
3564 "GDT HA %u, Test of Hot Fix %u failed",
3565 /*20*/ "\005\000\002\006\002"
3566 "GDT HA %u, Array Drive %u: drive build finished successfully",
3567 /*21*/ "\005\000\002\006\002"
3568 "GDT HA %u, Array Drive %u: drive rebuild finished successfully",
3569 /*22*/ "\007\000\002\006\002\010\002"
3570 "GDT HA %u, Array Drive %u: Hot Fix %u activated",
3571 /*23*/ "\005\000\002\006\002"
3572 "GDT HA %u, Host Drive %u: processing of i/o aborted due to serious drive error",
3573 /*24*/ "\005\000\002\010\002"
3574 "GDT HA %u, mirror update on Cache Drive %u completed",
3575 /*25*/ "\005\000\002\010\002"
3576 "GDT HA %u, mirror update on Cache Drive %lu failed",
3577 /*26*/ "\005\000\002\006\002"
3578 "GDT HA %u, Array Drive %u: drive rebuild started",
3579 /*27*/ "\005\000\002\012\001"
3580 "GDT HA %u, Fault bus %u: SHELF OK detected",
3581 /*28*/ "\005\000\002\012\001"
3582 "GDT HA %u, Fault bus %u: SHELF not OK detected",
3583 /*29*/ "\007\000\002\012\001\013\001"
3584 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug started",
3585 /*30*/ "\007\000\002\012\001\013\001"
3586 "GDT HA %u, Fault bus %u, ID %u: new disk detected",
3587 /*31*/ "\007\000\002\012\001\013\001"
3588 "GDT HA %u, Fault bus %u, ID %u: old disk detected",
3589 /*32*/ "\007\000\002\012\001\013\001"
3590 "GDT HA %u, Fault bus %u, ID %u: plugging an active disk is invalid",
3591 /*33*/ "\007\000\002\012\001\013\001"
3592 "GDT HA %u, Fault bus %u, ID %u: invalid device detected",
3593 /*34*/ "\011\000\002\012\001\013\001\006\004"
3594 "GDT HA %u, Fault bus %u, ID %u: insufficient disk capacity (%lu MB required)",
3595 /*35*/ "\007\000\002\012\001\013\001"
3596 "GDT HA %u, Fault bus %u, ID %u: disk write protected",
3597 /*36*/ "\007\000\002\012\001\013\001"
3598 "GDT HA %u, Fault bus %u, ID %u: disk not available",
3599 /*37*/ "\007\000\002\012\001\006\004"
3600 "GDT HA %u, Fault bus %u: swap detected (%lu)",
3601 /*38*/ "\007\000\002\012\001\013\001"
3602 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug finished successfully",
3603 /*39*/ "\007\000\002\012\001\013\001"
3604 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted due to user Hot Plug",
3605 /*40*/ "\007\000\002\012\001\013\001"
3606 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted",
3607 /*41*/ "\007\000\002\012\001\013\001"
3608 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug for Hot Fix started",
3609 /*42*/ "\005\000\002\006\002"
3610 "GDT HA %u, Array Drive %u: drive build started",
3611 /*43*/ "\003\000\002"
3612 "GDT HA %u, DRAM parity error detected",
3613 /*44*/ "\005\000\002\006\002"
3614 "GDT HA %u, Mirror Drive %u: update started",
3615 /*45*/ "\007\000\002\006\002\010\002"
3616 "GDT HA %u, Mirror Drive %u: Hot Fix %u activated",
3617 /*46*/ "\005\000\002\006\002"
3618 "GDT HA %u, Array Drive %u: no matching Pool Hot Fix Drive available",
3619 /*47*/ "\005\000\002\006\002"
3620 "GDT HA %u, Array Drive %u: Pool Hot Fix Drive available",
3621 /*48*/ "\005\000\002\006\002"
3622 "GDT HA %u, Mirror Drive %u: no matching Pool Hot Fix Drive available",
3623 /*49*/ "\005\000\002\006\002"
3624 "GDT HA %u, Mirror Drive %u: Pool Hot Fix Drive available",
3625 /*50*/ "\007\000\002\012\001\013\001"
3626 "GDT HA %u, SCSI bus %u, ID %u: IGNORE_WIDE_RESIDUE message received",
3627 /*51*/ "\005\000\002\006\002"
3628 "GDT HA %u, Array Drive %u: expand started",
3629 /*52*/ "\005\000\002\006\002"
3630 "GDT HA %u, Array Drive %u: expand finished successfully",
3631 /*53*/ "\005\000\002\006\002"
3632 "GDT HA %u, Array Drive %u: expand failed",
3633 /*54*/ "\003\000\002"
3634 "GDT HA %u, CPU temperature critical",
3635 /*55*/ "\003\000\002"
3636 "GDT HA %u, CPU temperature OK",
3637 /*56*/ "\005\000\002\006\004"
3638 "GDT HA %u, Host drive %lu created",
3639 /*57*/ "\005\000\002\006\002"
3640 "GDT HA %u, Array Drive %u: expand restarted",
3641 /*58*/ "\005\000\002\006\002"
3642 "GDT HA %u, Array Drive %u: expand stopped",
3643 /*59*/ "\005\000\002\010\002"
3644 "GDT HA %u, Mirror Drive %u: drive build quited",
3645 /*60*/ "\005\000\002\006\002"
3646 "GDT HA %u, Array Drive %u: parity build quited",
3647 /*61*/ "\005\000\002\006\002"
3648 "GDT HA %u, Array Drive %u: drive rebuild quited",
3649 /*62*/ "\005\000\002\006\002"
3650 "GDT HA %u, Array Drive %u: parity verify started",
3651 /*63*/ "\005\000\002\006\002"
3652 "GDT HA %u, Array Drive %u: parity verify done",
3653 /*64*/ "\005\000\002\006\002"
3654 "GDT HA %u, Array Drive %u: parity verify failed",
3655 /*65*/ "\005\000\002\006\002"
3656 "GDT HA %u, Array Drive %u: parity error detected",
3657 /*66*/ "\005\000\002\006\002"
3658 "GDT HA %u, Array Drive %u: parity verify quited",
3659 /*67*/ "\005\000\002\006\002"
3660 "GDT HA %u, Host Drive %u reserved",
3661 /*68*/ "\005\000\002\006\002"
3662 "GDT HA %u, Host Drive %u mounted and released",
3663 /*69*/ "\005\000\002\006\002"
3664 "GDT HA %u, Host Drive %u released",
3665 /*70*/ "\003\000\002"
3666 "GDT HA %u, DRAM error detected and corrected with ECC",
3667 /*71*/ "\003\000\002"
3668 "GDT HA %u, Uncorrectable DRAM error detected with ECC",
3669 /*72*/ "\011\000\002\012\001\013\001\014\001"
3670 "GDT HA %u, SCSI bus %u, ID %u, LUN %u: reassigning block",
3671 /*73*/ "\005\000\002\006\002"
3672 "GDT HA %u, Host drive %u resetted locally",
3673 /*74*/ "\005\000\002\006\002"
3674 "GDT HA %u, Host drive %u resetted remotely",
3675 /*75*/ "\003\000\002"
3676 "GDT HA %u, async. status 75 unknown",
3680 static int gdth_async_event(gdth_ha_str
*ha
)
3686 TRACE2(("gdth_async_event() ha %d serv %d\n",
3687 ha
->hanum
, ha
->service
));
3689 if (ha
->service
== SCREENSERVICE
) {
3690 if (ha
->status
== MSG_REQUEST
) {
3691 while (gdth_test_busy(ha
))
3693 cmdp
->Service
= SCREENSERVICE
;
3694 cmdp
->RequestBuffer
= SCREEN_CMND
;
3695 cmd_index
= gdth_get_cmd_index(ha
);
3697 cmdp
->OpCode
= GDT_READ
;
3698 cmdp
->BoardNode
= LOCALBOARD
;
3699 cmdp
->u
.screen
.reserved
= 0;
3700 cmdp
->u
.screen
.su
.msg
.msg_handle
= MSG_INV_HANDLE
;
3701 cmdp
->u
.screen
.su
.msg
.msg_addr
= ha
->msg_phys
;
3702 ha
->cmd_offs_dpmem
= 0;
3703 ha
->cmd_len
= GDTOFFSOF(gdth_cmd_str
,u
.screen
.su
.msg
.msg_addr
)
3706 gdth_copy_command(ha
);
3707 if (ha
->type
== GDT_EISA
)
3708 printk("[EISA slot %d] ",(ushort
)ha
->brd_phys
);
3709 else if (ha
->type
== GDT_ISA
)
3710 printk("[DPMEM 0x%4X] ",(ushort
)ha
->brd_phys
);
3712 printk("[PCI %d/%d] ",(ushort
)(ha
->brd_phys
>>8),
3713 (ushort
)((ha
->brd_phys
>>3)&0x1f));
3714 gdth_release_event(ha
);
3718 if (ha
->type
== GDT_PCIMPR
&&
3719 (ha
->fw_vers
& 0xff) >= 0x1a) {
3721 ha
->dvr
.eu
.async
.ionode
= ha
->hanum
;
3722 ha
->dvr
.eu
.async
.status
= ha
->status
;
3723 /* severity and event_string already set! */
3725 ha
->dvr
.size
= sizeof(ha
->dvr
.eu
.async
);
3726 ha
->dvr
.eu
.async
.ionode
= ha
->hanum
;
3727 ha
->dvr
.eu
.async
.service
= ha
->service
;
3728 ha
->dvr
.eu
.async
.status
= ha
->status
;
3729 ha
->dvr
.eu
.async
.info
= ha
->info
;
3730 *(ulong32
*)ha
->dvr
.eu
.async
.scsi_coord
= ha
->info2
;
3732 gdth_store_event( ha
, ES_ASYNC
, ha
->service
, &ha
->dvr
);
3733 gdth_log_event( &ha
->dvr
, NULL
);
3735 /* new host drive from expand? */
3736 if (ha
->service
== CACHESERVICE
&& ha
->status
== 56) {
3737 TRACE2(("gdth_async_event(): new host drive %d created\n",
3739 /* gdth_analyse_hdrive(hanum, (ushort)ha->info); */
3745 static void gdth_log_event(gdth_evt_data
*dvr
, char *buffer
)
3747 gdth_stackframe stack
;
3751 TRACE2(("gdth_log_event()\n"));
3752 if (dvr
->size
== 0) {
3753 if (buffer
== NULL
) {
3754 printk("Adapter %d: %s\n",dvr
->eu
.async
.ionode
,dvr
->event_string
);
3756 sprintf(buffer
,"Adapter %d: %s\n",
3757 dvr
->eu
.async
.ionode
,dvr
->event_string
);
3759 } else if (dvr
->eu
.async
.service
== CACHESERVICE
&&
3760 INDEX_OK(dvr
->eu
.async
.status
, async_cache_tab
)) {
3761 TRACE2(("GDT: Async. event cache service, event no.: %d\n",
3762 dvr
->eu
.async
.status
));
3764 f
= async_cache_tab
[dvr
->eu
.async
.status
];
3766 /* i: parameter to push, j: stack element to fill */
3767 for (j
=0,i
=1; i
< f
[0]; i
+=2) {
3770 stack
.b
[j
++] = *(ulong32
*)&dvr
->eu
.stream
[(int)f
[i
]];
3773 stack
.b
[j
++] = *(ushort
*)&dvr
->eu
.stream
[(int)f
[i
]];
3776 stack
.b
[j
++] = *(unchar
*)&dvr
->eu
.stream
[(int)f
[i
]];
3783 if (buffer
== NULL
) {
3784 printk(&f
[(int)f
[0]],stack
);
3787 sprintf(buffer
,&f
[(int)f
[0]],stack
);
3791 if (buffer
== NULL
) {
3792 printk("GDT HA %u, Unknown async. event service %d event no. %d\n",
3793 dvr
->eu
.async
.ionode
,dvr
->eu
.async
.service
,dvr
->eu
.async
.status
);
3795 sprintf(buffer
,"GDT HA %u, Unknown async. event service %d event no. %d",
3796 dvr
->eu
.async
.ionode
,dvr
->eu
.async
.service
,dvr
->eu
.async
.status
);
3801 #ifdef GDTH_STATISTICS
3802 static void gdth_timeout(ulong data
)
3809 ha
= list_first_entry(&gdth_instances
, gdth_ha_str
, list
);
3810 spin_lock_irqsave(&ha
->smp_lock
, flags
);
3812 for (act_stats
=0,i
=0; i
<GDTH_MAXCMDS
; ++i
)
3813 if (ha
->cmd_tab
[i
].cmnd
!= UNUSED_CMND
)
3816 for (act_rq
=0,nscp
=ha
->req_first
; nscp
; nscp
=(Scsi_Cmnd
*)nscp
->SCp
.ptr
)
3819 TRACE2(("gdth_to(): ints %d, ios %d, act_stats %d, act_rq %d\n",
3820 act_ints
, act_ios
, act_stats
, act_rq
));
3821 act_ints
= act_ios
= 0;
3823 gdth_timer
.expires
= jiffies
+ 30 * HZ
;
3824 add_timer(&gdth_timer
);
3825 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
3829 static void __init
internal_setup(char *str
,int *ints
)
3832 char *cur_str
, *argv
;
3834 TRACE2(("internal_setup() str %s ints[0] %d\n",
3835 str
? str
:"NULL", ints
? ints
[0]:0));
3837 /* read irq[] from ints[] */
3843 for (i
= 0; i
< argc
; ++i
)
3848 /* analyse string */
3850 while (argv
&& (cur_str
= strchr(argv
, ':'))) {
3851 int val
= 0, c
= *++cur_str
;
3853 if (c
== 'n' || c
== 'N')
3855 else if (c
== 'y' || c
== 'Y')
3858 val
= (int)simple_strtoul(cur_str
, NULL
, 0);
3860 if (!strncmp(argv
, "disable:", 8))
3862 else if (!strncmp(argv
, "reserve_mode:", 13))
3864 else if (!strncmp(argv
, "reverse_scan:", 13))
3866 else if (!strncmp(argv
, "hdr_channel:", 12))
3868 else if (!strncmp(argv
, "max_ids:", 8))
3870 else if (!strncmp(argv
, "rescan:", 7))
3872 else if (!strncmp(argv
, "shared_access:", 14))
3873 shared_access
= val
;
3874 else if (!strncmp(argv
, "probe_eisa_isa:", 15))
3875 probe_eisa_isa
= val
;
3876 else if (!strncmp(argv
, "reserve_list:", 13)) {
3877 reserve_list
[0] = val
;
3878 for (i
= 1; i
< MAX_RES_ARGS
; i
++) {
3879 cur_str
= strchr(cur_str
, ',');
3882 if (!isdigit((int)*++cur_str
)) {
3887 (int)simple_strtoul(cur_str
, NULL
, 0);
3895 if ((argv
= strchr(argv
, ',')))
3900 int __init
option_setup(char *str
)
3906 TRACE2(("option_setup() str %s\n", str
? str
:"NULL"));
3908 while (cur
&& isdigit(*cur
) && i
<= MAXHA
) {
3909 ints
[i
++] = simple_strtoul(cur
, NULL
, 0);
3910 if ((cur
= strchr(cur
, ',')) != NULL
) cur
++;
3914 internal_setup(cur
, ints
);
3918 static const char *gdth_ctr_name(gdth_ha_str
*ha
)
3920 TRACE2(("gdth_ctr_name()\n"));
3922 if (ha
->type
== GDT_EISA
) {
3923 switch (ha
->stype
) {
3925 return("GDT3000/3020");
3927 return("GDT3000A/3020A/3050A");
3929 return("GDT3000B/3010A");
3931 } else if (ha
->type
== GDT_ISA
) {
3932 return("GDT2000/2020");
3933 } else if (ha
->type
== GDT_PCI
) {
3934 switch (ha
->pdev
->device
) {
3935 case PCI_DEVICE_ID_VORTEX_GDT60x0
:
3936 return("GDT6000/6020/6050");
3937 case PCI_DEVICE_ID_VORTEX_GDT6000B
:
3938 return("GDT6000B/6010");
3941 /* new controllers (GDT_PCINEW, GDT_PCIMPR, ..) use board_info IOCTL! */
3946 static const char *gdth_info(struct Scsi_Host
*shp
)
3948 gdth_ha_str
*ha
= shost_priv(shp
);
3950 TRACE2(("gdth_info()\n"));
3951 return ((const char *)ha
->binfo
.type_string
);
3954 static int gdth_eh_bus_reset(Scsi_Cmnd
*scp
)
3956 gdth_ha_str
*ha
= shost_priv(scp
->device
->host
);
3962 TRACE2(("gdth_eh_bus_reset()\n"));
3964 b
= scp
->device
->channel
;
3966 /* clear command tab */
3967 spin_lock_irqsave(&ha
->smp_lock
, flags
);
3968 for (i
= 0; i
< GDTH_MAXCMDS
; ++i
) {
3969 cmnd
= ha
->cmd_tab
[i
].cmnd
;
3970 if (!SPECIAL_SCP(cmnd
) && cmnd
->device
->channel
== b
)
3971 ha
->cmd_tab
[i
].cmnd
= UNUSED_CMND
;
3973 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
3975 if (b
== ha
->virt_bus
) {
3977 for (i
= 0; i
< MAX_HDRIVES
; ++i
) {
3978 if (ha
->hdr
[i
].present
) {
3979 spin_lock_irqsave(&ha
->smp_lock
, flags
);
3980 gdth_polling
= TRUE
;
3981 while (gdth_test_busy(ha
))
3983 if (gdth_internal_cmd(ha
, CACHESERVICE
,
3984 GDT_CLUST_RESET
, i
, 0, 0))
3985 ha
->hdr
[i
].cluster_type
&= ~CLUSTER_RESERVED
;
3986 gdth_polling
= FALSE
;
3987 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
3992 spin_lock_irqsave(&ha
->smp_lock
, flags
);
3993 for (i
= 0; i
< MAXID
; ++i
)
3994 ha
->raw
[BUS_L2P(ha
,b
)].io_cnt
[i
] = 0;
3995 gdth_polling
= TRUE
;
3996 while (gdth_test_busy(ha
))
3998 gdth_internal_cmd(ha
, SCSIRAWSERVICE
, GDT_RESET_BUS
,
3999 BUS_L2P(ha
,b
), 0, 0);
4000 gdth_polling
= FALSE
;
4001 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
4006 static int gdth_bios_param(struct scsi_device
*sdev
,struct block_device
*bdev
,sector_t cap
,int *ip
)
4009 gdth_ha_str
*ha
= shost_priv(sdev
->host
);
4010 struct scsi_device
*sd
;
4017 TRACE2(("gdth_bios_param() ha %d bus %d target %d\n", ha
->hanum
, b
, t
));
4019 if (b
!= ha
->virt_bus
|| ha
->hdr
[t
].heads
== 0) {
4020 /* raw device or host drive without mapping information */
4021 TRACE2(("Evaluate mapping\n"));
4022 gdth_eval_mapping(capacity
,&ip
[2],&ip
[0],&ip
[1]);
4024 ip
[0] = ha
->hdr
[t
].heads
;
4025 ip
[1] = ha
->hdr
[t
].secs
;
4026 ip
[2] = capacity
/ ip
[0] / ip
[1];
4029 TRACE2(("gdth_bios_param(): %d heads, %d secs, %d cyls\n",
4030 ip
[0],ip
[1],ip
[2]));
4035 static int gdth_queuecommand(struct scsi_cmnd
*scp
,
4036 void (*done
)(struct scsi_cmnd
*))
4038 gdth_ha_str
*ha
= shost_priv(scp
->device
->host
);
4039 struct gdth_cmndinfo
*cmndinfo
;
4041 TRACE(("gdth_queuecommand() cmd 0x%x\n", scp
->cmnd
[0]));
4043 cmndinfo
= gdth_get_cmndinfo(ha
);
4046 scp
->scsi_done
= done
;
4047 gdth_update_timeout(scp
, scp
->timeout_per_command
* 6);
4048 cmndinfo
->priority
= DEFAULT_PRI
;
4049 return __gdth_queuecommand(ha
, scp
, cmndinfo
);
4052 static int __gdth_queuecommand(gdth_ha_str
*ha
, struct scsi_cmnd
*scp
,
4053 struct gdth_cmndinfo
*cmndinfo
)
4055 scp
->host_scribble
= (unsigned char *)cmndinfo
;
4056 cmndinfo
->wait_for_completion
= 1;
4057 cmndinfo
->phase
= -1;
4058 cmndinfo
->OpCode
= -1;
4059 scp
->SCp
.Status
= GDTH_MAP_NONE
;
4061 #ifdef GDTH_STATISTICS
4065 gdth_putq(ha
, scp
, cmndinfo
->priority
);
4071 static int gdth_open(struct inode
*inode
, struct file
*filep
)
4075 list_for_each_entry(ha
, &gdth_instances
, list
) {
4077 ha
->sdev
= scsi_get_host_dev(ha
->shost
);
4080 TRACE(("gdth_open()\n"));
4084 static int gdth_close(struct inode
*inode
, struct file
*filep
)
4086 TRACE(("gdth_close()\n"));
4090 static int ioc_event(void __user
*arg
)
4092 gdth_ioctl_event evt
;
4096 if (copy_from_user(&evt
, arg
, sizeof(gdth_ioctl_event
)))
4098 ha
= gdth_find_ha(evt
.ionode
);
4102 if (evt
.erase
== 0xff) {
4103 if (evt
.event
.event_source
== ES_TEST
)
4104 evt
.event
.event_data
.size
=sizeof(evt
.event
.event_data
.eu
.test
);
4105 else if (evt
.event
.event_source
== ES_DRIVER
)
4106 evt
.event
.event_data
.size
=sizeof(evt
.event
.event_data
.eu
.driver
);
4107 else if (evt
.event
.event_source
== ES_SYNC
)
4108 evt
.event
.event_data
.size
=sizeof(evt
.event
.event_data
.eu
.sync
);
4110 evt
.event
.event_data
.size
=sizeof(evt
.event
.event_data
.eu
.async
);
4111 spin_lock_irqsave(&ha
->smp_lock
, flags
);
4112 gdth_store_event(ha
, evt
.event
.event_source
, evt
.event
.event_idx
,
4113 &evt
.event
.event_data
);
4114 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
4115 } else if (evt
.erase
== 0xfe) {
4116 gdth_clear_events();
4117 } else if (evt
.erase
== 0) {
4118 evt
.handle
= gdth_read_event(ha
, evt
.handle
, &evt
.event
);
4120 gdth_readapp_event(ha
, evt
.erase
, &evt
.event
);
4122 if (copy_to_user(arg
, &evt
, sizeof(gdth_ioctl_event
)))
4127 static int ioc_lockdrv(void __user
*arg
)
4129 gdth_ioctl_lockdrv ldrv
;
4134 if (copy_from_user(&ldrv
, arg
, sizeof(gdth_ioctl_lockdrv
)))
4136 ha
= gdth_find_ha(ldrv
.ionode
);
4140 for (i
= 0; i
< ldrv
.drive_cnt
&& i
< MAX_HDRIVES
; ++i
) {
4142 if (j
>= MAX_HDRIVES
|| !ha
->hdr
[j
].present
)
4145 spin_lock_irqsave(&ha
->smp_lock
, flags
);
4146 ha
->hdr
[j
].lock
= 1;
4147 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
4148 gdth_wait_completion(ha
, ha
->bus_cnt
, j
);
4149 gdth_stop_timeout(ha
, ha
->bus_cnt
, j
);
4151 spin_lock_irqsave(&ha
->smp_lock
, flags
);
4152 ha
->hdr
[j
].lock
= 0;
4153 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
4154 gdth_start_timeout(ha
, ha
->bus_cnt
, j
);
4161 static int ioc_resetdrv(void __user
*arg
, char *cmnd
)
4163 gdth_ioctl_reset res
;
4168 if (copy_from_user(&res
, arg
, sizeof(gdth_ioctl_reset
)) ||
4169 res
.number
>= MAX_HDRIVES
)
4171 ha
= gdth_find_ha(res
.ionode
);
4175 if (!ha
->hdr
[res
.number
].present
)
4177 memset(&cmd
, 0, sizeof(gdth_cmd_str
));
4178 cmd
.Service
= CACHESERVICE
;
4179 cmd
.OpCode
= GDT_CLUST_RESET
;
4180 if (ha
->cache_feat
& GDT_64BIT
)
4181 cmd
.u
.cache64
.DeviceNo
= res
.number
;
4183 cmd
.u
.cache
.DeviceNo
= res
.number
;
4185 rval
= __gdth_execute(ha
->sdev
, &cmd
, cmnd
, 30, NULL
);
4190 if (copy_to_user(arg
, &res
, sizeof(gdth_ioctl_reset
)))
4195 static int ioc_general(void __user
*arg
, char *cmnd
)
4197 gdth_ioctl_general gen
;
4203 if (copy_from_user(&gen
, arg
, sizeof(gdth_ioctl_general
)))
4205 ha
= gdth_find_ha(gen
.ionode
);
4208 if (gen
.data_len
+ gen
.sense_len
!= 0) {
4209 if (!(buf
= gdth_ioctl_alloc(ha
, gen
.data_len
+ gen
.sense_len
,
4212 if (copy_from_user(buf
, arg
+ sizeof(gdth_ioctl_general
),
4213 gen
.data_len
+ gen
.sense_len
)) {
4214 gdth_ioctl_free(ha
, gen
.data_len
+gen
.sense_len
, buf
, paddr
);
4218 if (gen
.command
.OpCode
== GDT_IOCTL
) {
4219 gen
.command
.u
.ioctl
.p_param
= paddr
;
4220 } else if (gen
.command
.Service
== CACHESERVICE
) {
4221 if (ha
->cache_feat
& GDT_64BIT
) {
4222 /* copy elements from 32-bit IOCTL structure */
4223 gen
.command
.u
.cache64
.BlockCnt
= gen
.command
.u
.cache
.BlockCnt
;
4224 gen
.command
.u
.cache64
.BlockNo
= gen
.command
.u
.cache
.BlockNo
;
4225 gen
.command
.u
.cache64
.DeviceNo
= gen
.command
.u
.cache
.DeviceNo
;
4227 if (ha
->cache_feat
& SCATTER_GATHER
) {
4228 gen
.command
.u
.cache64
.DestAddr
= (ulong64
)-1;
4229 gen
.command
.u
.cache64
.sg_canz
= 1;
4230 gen
.command
.u
.cache64
.sg_lst
[0].sg_ptr
= paddr
;
4231 gen
.command
.u
.cache64
.sg_lst
[0].sg_len
= gen
.data_len
;
4232 gen
.command
.u
.cache64
.sg_lst
[1].sg_len
= 0;
4234 gen
.command
.u
.cache64
.DestAddr
= paddr
;
4235 gen
.command
.u
.cache64
.sg_canz
= 0;
4238 if (ha
->cache_feat
& SCATTER_GATHER
) {
4239 gen
.command
.u
.cache
.DestAddr
= 0xffffffff;
4240 gen
.command
.u
.cache
.sg_canz
= 1;
4241 gen
.command
.u
.cache
.sg_lst
[0].sg_ptr
= (ulong32
)paddr
;
4242 gen
.command
.u
.cache
.sg_lst
[0].sg_len
= gen
.data_len
;
4243 gen
.command
.u
.cache
.sg_lst
[1].sg_len
= 0;
4245 gen
.command
.u
.cache
.DestAddr
= paddr
;
4246 gen
.command
.u
.cache
.sg_canz
= 0;
4249 } else if (gen
.command
.Service
== SCSIRAWSERVICE
) {
4250 if (ha
->raw_feat
& GDT_64BIT
) {
4251 /* copy elements from 32-bit IOCTL structure */
4253 gen
.command
.u
.raw64
.sense_len
= gen
.command
.u
.raw
.sense_len
;
4254 gen
.command
.u
.raw64
.bus
= gen
.command
.u
.raw
.bus
;
4255 gen
.command
.u
.raw64
.lun
= gen
.command
.u
.raw
.lun
;
4256 gen
.command
.u
.raw64
.target
= gen
.command
.u
.raw
.target
;
4257 memcpy(cmd
, gen
.command
.u
.raw
.cmd
, 16);
4258 memcpy(gen
.command
.u
.raw64
.cmd
, cmd
, 16);
4259 gen
.command
.u
.raw64
.clen
= gen
.command
.u
.raw
.clen
;
4260 gen
.command
.u
.raw64
.sdlen
= gen
.command
.u
.raw
.sdlen
;
4261 gen
.command
.u
.raw64
.direction
= gen
.command
.u
.raw
.direction
;
4263 if (ha
->raw_feat
& SCATTER_GATHER
) {
4264 gen
.command
.u
.raw64
.sdata
= (ulong64
)-1;
4265 gen
.command
.u
.raw64
.sg_ranz
= 1;
4266 gen
.command
.u
.raw64
.sg_lst
[0].sg_ptr
= paddr
;
4267 gen
.command
.u
.raw64
.sg_lst
[0].sg_len
= gen
.data_len
;
4268 gen
.command
.u
.raw64
.sg_lst
[1].sg_len
= 0;
4270 gen
.command
.u
.raw64
.sdata
= paddr
;
4271 gen
.command
.u
.raw64
.sg_ranz
= 0;
4273 gen
.command
.u
.raw64
.sense_data
= paddr
+ gen
.data_len
;
4275 if (ha
->raw_feat
& SCATTER_GATHER
) {
4276 gen
.command
.u
.raw
.sdata
= 0xffffffff;
4277 gen
.command
.u
.raw
.sg_ranz
= 1;
4278 gen
.command
.u
.raw
.sg_lst
[0].sg_ptr
= (ulong32
)paddr
;
4279 gen
.command
.u
.raw
.sg_lst
[0].sg_len
= gen
.data_len
;
4280 gen
.command
.u
.raw
.sg_lst
[1].sg_len
= 0;
4282 gen
.command
.u
.raw
.sdata
= paddr
;
4283 gen
.command
.u
.raw
.sg_ranz
= 0;
4285 gen
.command
.u
.raw
.sense_data
= (ulong32
)paddr
+ gen
.data_len
;
4288 gdth_ioctl_free(ha
, gen
.data_len
+gen
.sense_len
, buf
, paddr
);
4293 rval
= __gdth_execute(ha
->sdev
, &gen
.command
, cmnd
, gen
.timeout
, &gen
.info
);
4298 if (copy_to_user(arg
+ sizeof(gdth_ioctl_general
), buf
,
4299 gen
.data_len
+ gen
.sense_len
)) {
4300 gdth_ioctl_free(ha
, gen
.data_len
+gen
.sense_len
, buf
, paddr
);
4303 if (copy_to_user(arg
, &gen
,
4304 sizeof(gdth_ioctl_general
) - sizeof(gdth_cmd_str
))) {
4305 gdth_ioctl_free(ha
, gen
.data_len
+gen
.sense_len
, buf
, paddr
);
4308 gdth_ioctl_free(ha
, gen
.data_len
+gen
.sense_len
, buf
, paddr
);
4312 static int ioc_hdrlist(void __user
*arg
, char *cmnd
)
4314 gdth_ioctl_rescan
*rsc
;
4319 u32 cluster_type
= 0;
4321 rsc
= kmalloc(sizeof(*rsc
), GFP_KERNEL
);
4322 cmd
= kmalloc(sizeof(*cmd
), GFP_KERNEL
);
4326 if (copy_from_user(rsc
, arg
, sizeof(gdth_ioctl_rescan
)) ||
4327 (NULL
== (ha
= gdth_find_ha(rsc
->ionode
)))) {
4331 memset(cmd
, 0, sizeof(gdth_cmd_str
));
4333 for (i
= 0; i
< MAX_HDRIVES
; ++i
) {
4334 if (!ha
->hdr
[i
].present
) {
4335 rsc
->hdr_list
[i
].bus
= 0xff;
4338 rsc
->hdr_list
[i
].bus
= ha
->virt_bus
;
4339 rsc
->hdr_list
[i
].target
= i
;
4340 rsc
->hdr_list
[i
].lun
= 0;
4341 rsc
->hdr_list
[i
].cluster_type
= ha
->hdr
[i
].cluster_type
;
4342 if (ha
->hdr
[i
].cluster_type
& CLUSTER_DRIVE
) {
4343 cmd
->Service
= CACHESERVICE
;
4344 cmd
->OpCode
= GDT_CLUST_INFO
;
4345 if (ha
->cache_feat
& GDT_64BIT
)
4346 cmd
->u
.cache64
.DeviceNo
= i
;
4348 cmd
->u
.cache
.DeviceNo
= i
;
4349 if (__gdth_execute(ha
->sdev
, cmd
, cmnd
, 30, &cluster_type
) == S_OK
)
4350 rsc
->hdr_list
[i
].cluster_type
= cluster_type
;
4354 if (copy_to_user(arg
, rsc
, sizeof(gdth_ioctl_rescan
)))
4365 static int ioc_rescan(void __user
*arg
, char *cmnd
)
4367 gdth_ioctl_rescan
*rsc
;
4369 ushort i
, status
, hdr_cnt
;
4371 int cyls
, hds
, secs
;
4376 rsc
= kmalloc(sizeof(*rsc
), GFP_KERNEL
);
4377 cmd
= kmalloc(sizeof(*cmd
), GFP_KERNEL
);
4381 if (copy_from_user(rsc
, arg
, sizeof(gdth_ioctl_rescan
)) ||
4382 (NULL
== (ha
= gdth_find_ha(rsc
->ionode
)))) {
4386 memset(cmd
, 0, sizeof(gdth_cmd_str
));
4388 if (rsc
->flag
== 0) {
4389 /* old method: re-init. cache service */
4390 cmd
->Service
= CACHESERVICE
;
4391 if (ha
->cache_feat
& GDT_64BIT
) {
4392 cmd
->OpCode
= GDT_X_INIT_HOST
;
4393 cmd
->u
.cache64
.DeviceNo
= LINUX_OS
;
4395 cmd
->OpCode
= GDT_INIT
;
4396 cmd
->u
.cache
.DeviceNo
= LINUX_OS
;
4399 status
= __gdth_execute(ha
->sdev
, cmd
, cmnd
, 30, &info
);
4401 hdr_cnt
= (status
== S_OK
? (ushort
)info
: 0);
4407 for (; i
< hdr_cnt
&& i
< MAX_HDRIVES
; ++i
) {
4408 cmd
->Service
= CACHESERVICE
;
4409 cmd
->OpCode
= GDT_INFO
;
4410 if (ha
->cache_feat
& GDT_64BIT
)
4411 cmd
->u
.cache64
.DeviceNo
= i
;
4413 cmd
->u
.cache
.DeviceNo
= i
;
4415 status
= __gdth_execute(ha
->sdev
, cmd
, cmnd
, 30, &info
);
4417 spin_lock_irqsave(&ha
->smp_lock
, flags
);
4418 rsc
->hdr_list
[i
].bus
= ha
->virt_bus
;
4419 rsc
->hdr_list
[i
].target
= i
;
4420 rsc
->hdr_list
[i
].lun
= 0;
4421 if (status
!= S_OK
) {
4422 ha
->hdr
[i
].present
= FALSE
;
4424 ha
->hdr
[i
].present
= TRUE
;
4425 ha
->hdr
[i
].size
= info
;
4426 /* evaluate mapping */
4427 ha
->hdr
[i
].size
&= ~SECS32
;
4428 gdth_eval_mapping(ha
->hdr
[i
].size
,&cyls
,&hds
,&secs
);
4429 ha
->hdr
[i
].heads
= hds
;
4430 ha
->hdr
[i
].secs
= secs
;
4432 ha
->hdr
[i
].size
= cyls
* hds
* secs
;
4434 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
4438 /* extended info, if GDT_64BIT, for drives > 2 TB */
4439 /* but we need ha->info2, not yet stored in scp->SCp */
4441 /* devtype, cluster info, R/W attribs */
4442 cmd
->Service
= CACHESERVICE
;
4443 cmd
->OpCode
= GDT_DEVTYPE
;
4444 if (ha
->cache_feat
& GDT_64BIT
)
4445 cmd
->u
.cache64
.DeviceNo
= i
;
4447 cmd
->u
.cache
.DeviceNo
= i
;
4449 status
= __gdth_execute(ha
->sdev
, cmd
, cmnd
, 30, &info
);
4451 spin_lock_irqsave(&ha
->smp_lock
, flags
);
4452 ha
->hdr
[i
].devtype
= (status
== S_OK
? (ushort
)info
: 0);
4453 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
4455 cmd
->Service
= CACHESERVICE
;
4456 cmd
->OpCode
= GDT_CLUST_INFO
;
4457 if (ha
->cache_feat
& GDT_64BIT
)
4458 cmd
->u
.cache64
.DeviceNo
= i
;
4460 cmd
->u
.cache
.DeviceNo
= i
;
4462 status
= __gdth_execute(ha
->sdev
, cmd
, cmnd
, 30, &info
);
4464 spin_lock_irqsave(&ha
->smp_lock
, flags
);
4465 ha
->hdr
[i
].cluster_type
=
4466 ((status
== S_OK
&& !shared_access
) ? (ushort
)info
: 0);
4467 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
4468 rsc
->hdr_list
[i
].cluster_type
= ha
->hdr
[i
].cluster_type
;
4470 cmd
->Service
= CACHESERVICE
;
4471 cmd
->OpCode
= GDT_RW_ATTRIBS
;
4472 if (ha
->cache_feat
& GDT_64BIT
)
4473 cmd
->u
.cache64
.DeviceNo
= i
;
4475 cmd
->u
.cache
.DeviceNo
= i
;
4477 status
= __gdth_execute(ha
->sdev
, cmd
, cmnd
, 30, &info
);
4479 spin_lock_irqsave(&ha
->smp_lock
, flags
);
4480 ha
->hdr
[i
].rw_attribs
= (status
== S_OK
? (ushort
)info
: 0);
4481 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
4484 if (copy_to_user(arg
, rsc
, sizeof(gdth_ioctl_rescan
)))
4495 static int gdth_ioctl(struct inode
*inode
, struct file
*filep
,
4496 unsigned int cmd
, unsigned long arg
)
4501 char cmnd
[MAX_COMMAND_SIZE
];
4502 void __user
*argp
= (void __user
*)arg
;
4504 memset(cmnd
, 0xff, 12);
4506 TRACE(("gdth_ioctl() cmd 0x%x\n", cmd
));
4509 case GDTIOCTL_CTRCNT
:
4511 int cnt
= gdth_ctr_count
;
4512 if (put_user(cnt
, (int __user
*)argp
))
4517 case GDTIOCTL_DRVERS
:
4519 int ver
= (GDTH_VERSION
<<8) | GDTH_SUBVERSION
;
4520 if (put_user(ver
, (int __user
*)argp
))
4525 case GDTIOCTL_OSVERS
:
4527 gdth_ioctl_osvers osv
;
4529 osv
.version
= (unchar
)(LINUX_VERSION_CODE
>> 16);
4530 osv
.subversion
= (unchar
)(LINUX_VERSION_CODE
>> 8);
4531 osv
.revision
= (ushort
)(LINUX_VERSION_CODE
& 0xff);
4532 if (copy_to_user(argp
, &osv
, sizeof(gdth_ioctl_osvers
)))
4537 case GDTIOCTL_CTRTYPE
:
4539 gdth_ioctl_ctrtype ctrt
;
4541 if (copy_from_user(&ctrt
, argp
, sizeof(gdth_ioctl_ctrtype
)) ||
4542 (NULL
== (ha
= gdth_find_ha(ctrt
.ionode
))))
4545 if (ha
->type
== GDT_ISA
|| ha
->type
== GDT_EISA
) {
4546 ctrt
.type
= (unchar
)((ha
->stype
>>20) - 0x10);
4548 if (ha
->type
!= GDT_PCIMPR
) {
4549 ctrt
.type
= (unchar
)((ha
->stype
<<4) + 6);
4552 (ha
->oem_id
== OEM_ID_INTEL
? 0xfd : 0xfe);
4553 if (ha
->stype
>= 0x300)
4554 ctrt
.ext_type
= 0x6000 | ha
->pdev
->subsystem_device
;
4556 ctrt
.ext_type
= 0x6000 | ha
->stype
;
4558 ctrt
.device_id
= ha
->pdev
->device
;
4559 ctrt
.sub_device_id
= ha
->pdev
->subsystem_device
;
4561 ctrt
.info
= ha
->brd_phys
;
4562 ctrt
.oem_id
= ha
->oem_id
;
4563 if (copy_to_user(argp
, &ctrt
, sizeof(gdth_ioctl_ctrtype
)))
4568 case GDTIOCTL_GENERAL
:
4569 return ioc_general(argp
, cmnd
);
4571 case GDTIOCTL_EVENT
:
4572 return ioc_event(argp
);
4574 case GDTIOCTL_LOCKDRV
:
4575 return ioc_lockdrv(argp
);
4577 case GDTIOCTL_LOCKCHN
:
4579 gdth_ioctl_lockchn lchn
;
4582 if (copy_from_user(&lchn
, argp
, sizeof(gdth_ioctl_lockchn
)) ||
4583 (NULL
== (ha
= gdth_find_ha(lchn
.ionode
))))
4587 if (i
< ha
->bus_cnt
) {
4589 spin_lock_irqsave(&ha
->smp_lock
, flags
);
4590 ha
->raw
[i
].lock
= 1;
4591 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
4592 for (j
= 0; j
< ha
->tid_cnt
; ++j
) {
4593 gdth_wait_completion(ha
, i
, j
);
4594 gdth_stop_timeout(ha
, i
, j
);
4597 spin_lock_irqsave(&ha
->smp_lock
, flags
);
4598 ha
->raw
[i
].lock
= 0;
4599 spin_unlock_irqrestore(&ha
->smp_lock
, flags
);
4600 for (j
= 0; j
< ha
->tid_cnt
; ++j
) {
4601 gdth_start_timeout(ha
, i
, j
);
4609 case GDTIOCTL_RESCAN
:
4610 return ioc_rescan(argp
, cmnd
);
4612 case GDTIOCTL_HDRLIST
:
4613 return ioc_hdrlist(argp
, cmnd
);
4615 case GDTIOCTL_RESET_BUS
:
4617 gdth_ioctl_reset res
;
4620 if (copy_from_user(&res
, argp
, sizeof(gdth_ioctl_reset
)) ||
4621 (NULL
== (ha
= gdth_find_ha(res
.ionode
))))
4624 scp
= kzalloc(sizeof(*scp
), GFP_KERNEL
);
4627 scp
->device
= ha
->sdev
;
4630 scp
->device
->channel
= res
.number
;
4631 rval
= gdth_eh_bus_reset(scp
);
4632 res
.status
= (rval
== SUCCESS
? S_OK
: S_GENERR
);
4635 if (copy_to_user(argp
, &res
, sizeof(gdth_ioctl_reset
)))
4640 case GDTIOCTL_RESET_DRV
:
4641 return ioc_resetdrv(argp
, cmnd
);
4651 static void gdth_flush(gdth_ha_str
*ha
)
4654 gdth_cmd_str gdtcmd
;
4655 char cmnd
[MAX_COMMAND_SIZE
];
4656 memset(cmnd
, 0xff, MAX_COMMAND_SIZE
);
4658 TRACE2(("gdth_flush() hanum %d\n", ha
->hanum
));
4660 for (i
= 0; i
< MAX_HDRIVES
; ++i
) {
4661 if (ha
->hdr
[i
].present
) {
4662 gdtcmd
.BoardNode
= LOCALBOARD
;
4663 gdtcmd
.Service
= CACHESERVICE
;
4664 gdtcmd
.OpCode
= GDT_FLUSH
;
4665 if (ha
->cache_feat
& GDT_64BIT
) {
4666 gdtcmd
.u
.cache64
.DeviceNo
= i
;
4667 gdtcmd
.u
.cache64
.BlockNo
= 1;
4668 gdtcmd
.u
.cache64
.sg_canz
= 0;
4670 gdtcmd
.u
.cache
.DeviceNo
= i
;
4671 gdtcmd
.u
.cache
.BlockNo
= 1;
4672 gdtcmd
.u
.cache
.sg_canz
= 0;
4674 TRACE2(("gdth_flush(): flush ha %d drive %d\n", ha
->hanum
, i
));
4676 gdth_execute(ha
->shost
, &gdtcmd
, cmnd
, 30, NULL
);
4681 /* shutdown routine */
4682 static int gdth_halt(struct notifier_block
*nb
, ulong event
, void *buf
)
4686 gdth_cmd_str gdtcmd
;
4687 char cmnd
[MAX_COMMAND_SIZE
];
4690 if (notifier_disabled
)
4693 TRACE2(("gdth_halt() event %d\n",(int)event
));
4694 if (event
!= SYS_RESTART
&& event
!= SYS_HALT
&& event
!= SYS_POWER_OFF
)
4697 notifier_disabled
= 1;
4698 printk("GDT-HA: Flushing all host drives .. ");
4699 list_for_each_entry(ha
, &gdth_instances
, list
) {
4703 /* controller reset */
4704 memset(cmnd
, 0xff, MAX_COMMAND_SIZE
);
4705 gdtcmd
.BoardNode
= LOCALBOARD
;
4706 gdtcmd
.Service
= CACHESERVICE
;
4707 gdtcmd
.OpCode
= GDT_RESET
;
4708 TRACE2(("gdth_halt(): reset controller %d\n", ha
->hanum
));
4709 gdth_execute(ha
->shost
, &gdtcmd
, cmnd
, 10, NULL
);
4714 #ifdef GDTH_STATISTICS
4715 del_timer(&gdth_timer
);
4721 static int gdth_slave_configure(struct scsi_device
*sdev
)
4723 scsi_adjust_queue_depth(sdev
, 0, sdev
->host
->cmd_per_lun
);
4724 sdev
->skip_ms_page_3f
= 1;
4725 sdev
->skip_ms_page_8
= 1;
4729 static struct scsi_host_template gdth_template
= {
4730 .name
= "GDT SCSI Disk Array Controller",
4732 .queuecommand
= gdth_queuecommand
,
4733 .eh_bus_reset_handler
= gdth_eh_bus_reset
,
4734 .slave_configure
= gdth_slave_configure
,
4735 .bios_param
= gdth_bios_param
,
4736 .proc_info
= gdth_proc_info
,
4737 .proc_name
= "gdth",
4738 .can_queue
= GDTH_MAXCMDS
,
4740 .sg_tablesize
= GDTH_MAXSG
,
4741 .cmd_per_lun
= GDTH_MAXC_P_L
,
4742 .unchecked_isa_dma
= 1,
4743 .use_clustering
= ENABLE_CLUSTERING
,
4747 static int gdth_isa_probe_one(ulong32 isa_bios
)
4749 struct Scsi_Host
*shp
;
4751 dma_addr_t scratch_dma_handle
= 0;
4754 if (!gdth_search_isa(isa_bios
))
4757 shp
= scsi_host_alloc(&gdth_template
, sizeof(gdth_ha_str
));
4760 ha
= shost_priv(shp
);
4763 if (!gdth_init_isa(isa_bios
,ha
))
4766 /* controller found and initialized */
4767 printk("Configuring GDT-ISA HA at BIOS 0x%05X IRQ %u DRQ %u\n",
4768 isa_bios
, ha
->irq
, ha
->drq
);
4770 error
= request_irq(ha
->irq
, gdth_interrupt
, IRQF_DISABLED
, "gdth", ha
);
4772 printk("GDT-ISA: Unable to allocate IRQ\n");
4776 error
= request_dma(ha
->drq
, "gdth");
4778 printk("GDT-ISA: Unable to allocate DMA channel\n");
4782 set_dma_mode(ha
->drq
,DMA_MODE_CASCADE
);
4783 enable_dma(ha
->drq
);
4784 shp
->unchecked_isa_dma
= 1;
4786 shp
->dma_channel
= ha
->drq
;
4788 ha
->hanum
= gdth_ctr_count
++;
4791 ha
->pccb
= &ha
->cmdext
;
4797 ha
->pscratch
= pci_alloc_consistent(ha
->pdev
, GDTH_SCRATCH
,
4798 &scratch_dma_handle
);
4800 goto out_dec_counters
;
4801 ha
->scratch_phys
= scratch_dma_handle
;
4803 ha
->pmsg
= pci_alloc_consistent(ha
->pdev
, sizeof(gdth_msg_str
),
4804 &scratch_dma_handle
);
4806 goto out_free_pscratch
;
4807 ha
->msg_phys
= scratch_dma_handle
;
4810 ha
->coal_stat
= pci_alloc_consistent(ha
->pdev
,
4811 sizeof(gdth_coal_status
) * MAXOFFSETS
,
4812 &scratch_dma_handle
);
4815 ha
->coal_stat_phys
= scratch_dma_handle
;
4818 ha
->scratch_busy
= FALSE
;
4819 ha
->req_first
= NULL
;
4820 ha
->tid_cnt
= MAX_HDRIVES
;
4821 if (max_ids
> 0 && max_ids
< ha
->tid_cnt
)
4822 ha
->tid_cnt
= max_ids
;
4823 for (i
= 0; i
< GDTH_MAXCMDS
; ++i
)
4824 ha
->cmd_tab
[i
].cmnd
= UNUSED_CMND
;
4825 ha
->scan_mode
= rescan
? 0x10 : 0;
4828 if (!gdth_search_drives(ha
)) {
4829 printk("GDT-ISA: Error during device scan\n");
4830 goto out_free_coal_stat
;
4833 if (hdr_channel
< 0 || hdr_channel
> ha
->bus_cnt
)
4834 hdr_channel
= ha
->bus_cnt
;
4835 ha
->virt_bus
= hdr_channel
;
4837 if (ha
->cache_feat
& ha
->raw_feat
& ha
->screen_feat
& GDT_64BIT
)
4838 shp
->max_cmd_len
= 16;
4840 shp
->max_id
= ha
->tid_cnt
;
4841 shp
->max_lun
= MAXLUN
;
4842 shp
->max_channel
= ha
->bus_cnt
;
4844 spin_lock_init(&ha
->smp_lock
);
4845 gdth_enable_int(ha
);
4847 error
= scsi_add_host(shp
, NULL
);
4849 goto out_free_coal_stat
;
4850 list_add_tail(&ha
->list
, &gdth_instances
);
4855 pci_free_consistent(ha
->pdev
, sizeof(gdth_coal_status
) * MAXOFFSETS
,
4856 ha
->coal_stat
, ha
->coal_stat_phys
);
4859 pci_free_consistent(ha
->pdev
, sizeof(gdth_msg_str
),
4860 ha
->pmsg
, ha
->msg_phys
);
4862 pci_free_consistent(ha
->pdev
, GDTH_SCRATCH
,
4863 ha
->pscratch
, ha
->scratch_phys
);
4867 free_irq(ha
->irq
, ha
);
4872 #endif /* CONFIG_ISA */
4875 static int gdth_eisa_probe_one(ushort eisa_slot
)
4877 struct Scsi_Host
*shp
;
4879 dma_addr_t scratch_dma_handle
= 0;
4882 if (!gdth_search_eisa(eisa_slot
))
4885 shp
= scsi_host_alloc(&gdth_template
, sizeof(gdth_ha_str
));
4888 ha
= shost_priv(shp
);
4891 if (!gdth_init_eisa(eisa_slot
,ha
))
4894 /* controller found and initialized */
4895 printk("Configuring GDT-EISA HA at Slot %d IRQ %u\n",
4896 eisa_slot
>> 12, ha
->irq
);
4898 error
= request_irq(ha
->irq
, gdth_interrupt
, IRQF_DISABLED
, "gdth", ha
);
4900 printk("GDT-EISA: Unable to allocate IRQ\n");
4904 shp
->unchecked_isa_dma
= 0;
4906 shp
->dma_channel
= 0xff;
4908 ha
->hanum
= gdth_ctr_count
++;
4911 TRACE2(("EISA detect Bus 0: hanum %d\n", ha
->hanum
));
4913 ha
->pccb
= &ha
->cmdext
;
4919 ha
->pscratch
= pci_alloc_consistent(ha
->pdev
, GDTH_SCRATCH
,
4920 &scratch_dma_handle
);
4923 ha
->scratch_phys
= scratch_dma_handle
;
4925 ha
->pmsg
= pci_alloc_consistent(ha
->pdev
, sizeof(gdth_msg_str
),
4926 &scratch_dma_handle
);
4928 goto out_free_pscratch
;
4929 ha
->msg_phys
= scratch_dma_handle
;
4932 ha
->coal_stat
= pci_alloc_consistent(ha
->pdev
,
4933 sizeof(gdth_coal_status
) * MAXOFFSETS
,
4934 &scratch_dma_handle
);
4937 ha
->coal_stat_phys
= scratch_dma_handle
;
4940 ha
->ccb_phys
= pci_map_single(ha
->pdev
,ha
->pccb
,
4941 sizeof(gdth_cmd_str
), PCI_DMA_BIDIRECTIONAL
);
4943 goto out_free_coal_stat
;
4945 ha
->scratch_busy
= FALSE
;
4946 ha
->req_first
= NULL
;
4947 ha
->tid_cnt
= MAX_HDRIVES
;
4948 if (max_ids
> 0 && max_ids
< ha
->tid_cnt
)
4949 ha
->tid_cnt
= max_ids
;
4950 for (i
= 0; i
< GDTH_MAXCMDS
; ++i
)
4951 ha
->cmd_tab
[i
].cmnd
= UNUSED_CMND
;
4952 ha
->scan_mode
= rescan
? 0x10 : 0;
4954 if (!gdth_search_drives(ha
)) {
4955 printk("GDT-EISA: Error during device scan\n");
4957 goto out_free_ccb_phys
;
4960 if (hdr_channel
< 0 || hdr_channel
> ha
->bus_cnt
)
4961 hdr_channel
= ha
->bus_cnt
;
4962 ha
->virt_bus
= hdr_channel
;
4964 if (ha
->cache_feat
& ha
->raw_feat
& ha
->screen_feat
& GDT_64BIT
)
4965 shp
->max_cmd_len
= 16;
4967 shp
->max_id
= ha
->tid_cnt
;
4968 shp
->max_lun
= MAXLUN
;
4969 shp
->max_channel
= ha
->bus_cnt
;
4971 spin_lock_init(&ha
->smp_lock
);
4972 gdth_enable_int(ha
);
4974 error
= scsi_add_host(shp
, NULL
);
4976 goto out_free_coal_stat
;
4977 list_add_tail(&ha
->list
, &gdth_instances
);
4981 pci_unmap_single(ha
->pdev
,ha
->ccb_phys
, sizeof(gdth_cmd_str
),
4982 PCI_DMA_BIDIRECTIONAL
);
4985 pci_free_consistent(ha
->pdev
, sizeof(gdth_coal_status
) * MAXOFFSETS
,
4986 ha
->coal_stat
, ha
->coal_stat_phys
);
4989 pci_free_consistent(ha
->pdev
, sizeof(gdth_msg_str
),
4990 ha
->pmsg
, ha
->msg_phys
);
4992 pci_free_consistent(ha
->pdev
, GDTH_SCRATCH
,
4993 ha
->pscratch
, ha
->scratch_phys
);
4995 free_irq(ha
->irq
, ha
);
5001 #endif /* CONFIG_EISA */
5004 static int gdth_pci_probe_one(gdth_pci_str
*pcistr
, int ctr
)
5006 struct Scsi_Host
*shp
;
5008 dma_addr_t scratch_dma_handle
= 0;
5011 shp
= scsi_host_alloc(&gdth_template
, sizeof(gdth_ha_str
));
5014 ha
= shost_priv(shp
);
5017 if (!gdth_init_pci(&pcistr
[ctr
],ha
))
5020 /* controller found and initialized */
5021 printk("Configuring GDT-PCI HA at %d/%d IRQ %u\n",
5022 pcistr
[ctr
].pdev
->bus
->number
,
5023 PCI_SLOT(pcistr
[ctr
].pdev
->devfn
),
5026 error
= request_irq(ha
->irq
, gdth_interrupt
,
5027 IRQF_DISABLED
|IRQF_SHARED
, "gdth", ha
);
5029 printk("GDT-PCI: Unable to allocate IRQ\n");
5033 shp
->unchecked_isa_dma
= 0;
5035 shp
->dma_channel
= 0xff;
5037 ha
->hanum
= gdth_ctr_count
++;
5040 ha
->pccb
= &ha
->cmdext
;
5045 ha
->pscratch
= pci_alloc_consistent(ha
->pdev
, GDTH_SCRATCH
,
5046 &scratch_dma_handle
);
5049 ha
->scratch_phys
= scratch_dma_handle
;
5051 ha
->pmsg
= pci_alloc_consistent(ha
->pdev
, sizeof(gdth_msg_str
),
5052 &scratch_dma_handle
);
5054 goto out_free_pscratch
;
5055 ha
->msg_phys
= scratch_dma_handle
;
5058 ha
->coal_stat
= pci_alloc_consistent(ha
->pdev
,
5059 sizeof(gdth_coal_status
) * MAXOFFSETS
,
5060 &scratch_dma_handle
);
5063 ha
->coal_stat_phys
= scratch_dma_handle
;
5066 ha
->scratch_busy
= FALSE
;
5067 ha
->req_first
= NULL
;
5068 ha
->tid_cnt
= pcistr
[ctr
].pdev
->device
>= 0x200 ? MAXID
: MAX_HDRIVES
;
5069 if (max_ids
> 0 && max_ids
< ha
->tid_cnt
)
5070 ha
->tid_cnt
= max_ids
;
5071 for (i
= 0; i
< GDTH_MAXCMDS
; ++i
)
5072 ha
->cmd_tab
[i
].cmnd
= UNUSED_CMND
;
5073 ha
->scan_mode
= rescan
? 0x10 : 0;
5076 if (!gdth_search_drives(ha
)) {
5077 printk("GDT-PCI %d: Error during device scan\n", ha
->hanum
);
5078 goto out_free_coal_stat
;
5081 if (hdr_channel
< 0 || hdr_channel
> ha
->bus_cnt
)
5082 hdr_channel
= ha
->bus_cnt
;
5083 ha
->virt_bus
= hdr_channel
;
5085 /* 64-bit DMA only supported from FW >= x.43 */
5086 if (!(ha
->cache_feat
& ha
->raw_feat
& ha
->screen_feat
& GDT_64BIT
) ||
5087 !ha
->dma64_support
) {
5088 if (pci_set_dma_mask(pcistr
[ctr
].pdev
, DMA_32BIT_MASK
)) {
5089 printk(KERN_WARNING
"GDT-PCI %d: "
5090 "Unable to set 32-bit DMA\n", ha
->hanum
);
5091 goto out_free_coal_stat
;
5094 shp
->max_cmd_len
= 16;
5095 if (!pci_set_dma_mask(pcistr
[ctr
].pdev
, DMA_64BIT_MASK
)) {
5096 printk("GDT-PCI %d: 64-bit DMA enabled\n", ha
->hanum
);
5097 } else if (pci_set_dma_mask(pcistr
[ctr
].pdev
, DMA_32BIT_MASK
)) {
5098 printk(KERN_WARNING
"GDT-PCI %d: "
5099 "Unable to set 64/32-bit DMA\n", ha
->hanum
);
5100 goto out_free_coal_stat
;
5104 shp
->max_id
= ha
->tid_cnt
;
5105 shp
->max_lun
= MAXLUN
;
5106 shp
->max_channel
= ha
->bus_cnt
;
5108 spin_lock_init(&ha
->smp_lock
);
5109 gdth_enable_int(ha
);
5111 error
= scsi_add_host(shp
, &pcistr
[ctr
].pdev
->dev
);
5113 goto out_free_coal_stat
;
5114 list_add_tail(&ha
->list
, &gdth_instances
);
5119 pci_free_consistent(ha
->pdev
, sizeof(gdth_coal_status
) * MAXOFFSETS
,
5120 ha
->coal_stat
, ha
->coal_stat_phys
);
5123 pci_free_consistent(ha
->pdev
, sizeof(gdth_msg_str
),
5124 ha
->pmsg
, ha
->msg_phys
);
5126 pci_free_consistent(ha
->pdev
, GDTH_SCRATCH
,
5127 ha
->pscratch
, ha
->scratch_phys
);
5129 free_irq(ha
->irq
, ha
);
5135 #endif /* CONFIG_PCI */
5137 static void gdth_remove_one(gdth_ha_str
*ha
)
5139 struct Scsi_Host
*shp
= ha
->shost
;
5141 TRACE2(("gdth_remove_one()\n"));
5143 scsi_remove_host(shp
);
5146 scsi_free_host_dev(ha
->sdev
);
5153 free_irq(shp
->irq
,ha
);
5156 if (shp
->dma_channel
!= 0xff)
5157 free_dma(shp
->dma_channel
);
5161 pci_free_consistent(ha
->pdev
, sizeof(gdth_coal_status
) *
5162 MAXOFFSETS
, ha
->coal_stat
, ha
->coal_stat_phys
);
5165 pci_free_consistent(ha
->pdev
, GDTH_SCRATCH
,
5166 ha
->pscratch
, ha
->scratch_phys
);
5168 pci_free_consistent(ha
->pdev
, sizeof(gdth_msg_str
),
5169 ha
->pmsg
, ha
->msg_phys
);
5171 pci_unmap_single(ha
->pdev
,ha
->ccb_phys
,
5172 sizeof(gdth_cmd_str
),PCI_DMA_BIDIRECTIONAL
);
5177 static int __init
gdth_init(void)
5180 printk("GDT-HA: Controller driver disabled from"
5181 " command line !\n");
5185 printk("GDT-HA: Storage RAID Controller Driver. Version: %s\n",
5188 /* initializations */
5189 gdth_polling
= TRUE
;
5190 gdth_clear_events();
5192 /* As default we do not probe for EISA or ISA controllers */
5193 if (probe_eisa_isa
) {
5194 /* scanning for controllers, at first: ISA controller */
5197 for (isa_bios
= 0xc8000UL
; isa_bios
<= 0xd8000UL
;
5198 isa_bios
+= 0x8000UL
)
5199 gdth_isa_probe_one(isa_bios
);
5204 for (eisa_slot
= 0x1000; eisa_slot
<= 0x8000;
5205 eisa_slot
+= 0x1000)
5206 gdth_eisa_probe_one(eisa_slot
);
5212 /* scanning for PCI controllers */
5214 gdth_pci_str pcistr
[MAXHA
];
5217 cnt
= gdth_search_pci(pcistr
);
5218 printk("GDT-HA: Found %d PCI Storage RAID Controllers\n", cnt
);
5219 gdth_sort_pci(pcistr
,cnt
);
5220 for (ctr
= 0; ctr
< cnt
; ++ctr
)
5221 gdth_pci_probe_one(pcistr
, ctr
);
5223 #endif /* CONFIG_PCI */
5225 TRACE2(("gdth_detect() %d controller detected\n", gdth_ctr_count
));
5226 #ifdef GDTH_STATISTICS
5227 TRACE2(("gdth_detect(): Initializing timer !\n"));
5228 init_timer(&gdth_timer
);
5229 gdth_timer
.expires
= jiffies
+ HZ
;
5230 gdth_timer
.data
= 0L;
5231 gdth_timer
.function
= gdth_timeout
;
5232 add_timer(&gdth_timer
);
5234 major
= register_chrdev(0,"gdth", &gdth_fops
);
5235 notifier_disabled
= 0;
5236 register_reboot_notifier(&gdth_notifier
);
5237 gdth_polling
= FALSE
;
5241 static void __exit
gdth_exit(void)
5245 list_for_each_entry(ha
, &gdth_instances
, list
)
5246 gdth_remove_one(ha
);
5248 #ifdef GDTH_STATISTICS
5249 del_timer(&gdth_timer
);
5251 unregister_chrdev(major
,"gdth");
5252 unregister_reboot_notifier(&gdth_notifier
);
5255 module_init(gdth_init
);
5256 module_exit(gdth_exit
);
5259 __setup("gdth=", option_setup
);