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tridentfb: y-panning fixes
[linux-2.6/libata-dev.git] / drivers / char / mxser.c
blob4c756bbba94831aafa3895853394409688c896c6
1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
6 *
7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
18 * - Fixed x86_64 cleanness
19 * - Fixed sleep with spinlock held in mxser_send_break
20 */
21
22 #include <linux/module.h>
23 #include <linux/errno.h>
24 #include <linux/signal.h>
25 #include <linux/sched.h>
26 #include <linux/timer.h>
27 #include <linux/interrupt.h>
28 #include <linux/tty.h>
29 #include <linux/tty_flip.h>
30 #include <linux/serial.h>
31 #include <linux/serial_reg.h>
32 #include <linux/major.h>
33 #include <linux/string.h>
34 #include <linux/fcntl.h>
35 #include <linux/ptrace.h>
36 #include <linux/gfp.h>
37 #include <linux/ioport.h>
38 #include <linux/mm.h>
39 #include <linux/delay.h>
40 #include <linux/pci.h>
41 #include <linux/bitops.h>
42
43 #include <asm/system.h>
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/uaccess.h>
47
48 #include "mxser.h"
49
50 #define MXSER_VERSION "2.0.4" /* 1.12 */
51 #define MXSERMAJOR 174
52 #define MXSERCUMAJOR 175
53
54 #define MXSER_BOARDS 4 /* Max. boards */
55 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
56 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
57 #define MXSER_ISR_PASS_LIMIT 100
58
59 #define MXSER_ERR_IOADDR -1
60 #define MXSER_ERR_IRQ -2
61 #define MXSER_ERR_IRQ_CONFLIT -3
62 #define MXSER_ERR_VECTOR -4
63
64 /*CheckIsMoxaMust return value*/
65 #define MOXA_OTHER_UART 0x00
66 #define MOXA_MUST_MU150_HWID 0x01
67 #define MOXA_MUST_MU860_HWID 0x02
68
69 #define WAKEUP_CHARS 256
70
71 #define UART_MCR_AFE 0x20
72 #define UART_LSR_SPECIAL 0x1E
73
74 #define PCI_DEVICE_ID_POS104UL 0x1044
75 #define PCI_DEVICE_ID_CB108 0x1080
76 #define PCI_DEVICE_ID_CP102UF 0x1023
77 #define PCI_DEVICE_ID_CB114 0x1142
78 #define PCI_DEVICE_ID_CP114UL 0x1143
79 #define PCI_DEVICE_ID_CB134I 0x1341
80 #define PCI_DEVICE_ID_CP138U 0x1380
81
82
83 #define C168_ASIC_ID 1
84 #define C104_ASIC_ID 2
85 #define C102_ASIC_ID 0xB
86 #define CI132_ASIC_ID 4
87 #define CI134_ASIC_ID 3
88 #define CI104J_ASIC_ID 5
89
90 #define MXSER_HIGHBAUD 1
91 #define MXSER_HAS2 2
92
93 /* This is only for PCI */
94 static const struct {
95 int type;
96 int tx_fifo;
97 int rx_fifo;
98 int xmit_fifo_size;
99 int rx_high_water;
100 int rx_trigger;
101 int rx_low_water;
102 long max_baud;
103 } Gpci_uart_info[] = {
104 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
105 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
106 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
107 };
108 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
109
110 struct mxser_cardinfo {
111 char *name;
112 unsigned int nports;
113 unsigned int flags;
114 };
115
116 static const struct mxser_cardinfo mxser_cards[] = {
117 /* 0*/ { "C168 series", 8, },
118 { "C104 series", 4, },
119 { "CI-104J series", 4, },
120 { "C168H/PCI series", 8, },
121 { "C104H/PCI series", 4, },
122 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
123 { "CI-132 series", 4, MXSER_HAS2 },
124 { "CI-134 series", 4, },
125 { "CP-132 series", 2, },
126 { "CP-114 series", 4, },
127 /*10*/ { "CT-114 series", 4, },
128 { "CP-102 series", 2, MXSER_HIGHBAUD },
129 { "CP-104U series", 4, },
130 { "CP-168U series", 8, },
131 { "CP-132U series", 2, },
132 /*15*/ { "CP-134U series", 4, },
133 { "CP-104JU series", 4, },
134 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
135 { "CP-118U series", 8, },
136 { "CP-102UL series", 2, },
137 /*20*/ { "CP-102U series", 2, },
138 { "CP-118EL series", 8, },
139 { "CP-168EL series", 8, },
140 { "CP-104EL series", 4, },
141 { "CB-108 series", 8, },
142 /*25*/ { "CB-114 series", 4, },
143 { "CB-134I series", 4, },
144 { "CP-138U series", 8, },
145 { "POS-104UL series", 4, },
146 { "CP-114UL series", 4, },
147 /*30*/ { "CP-102UF series", 2, }
148 };
149
150 /* driver_data correspond to the lines in the structure above
151 see also ISA probe function before you change something */
152 static struct pci_device_id mxser_pcibrds[] = {
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
173 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
174 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
175 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
176 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
177 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
178 { }
179 };
180 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
181
182 static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
183 static int ttymajor = MXSERMAJOR;
184
185 /* Variables for insmod */
186
187 MODULE_AUTHOR("Casper Yang");
188 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
189 module_param_array(ioaddr, int, NULL, 0);
190 module_param(ttymajor, int, 0);
191 MODULE_LICENSE("GPL");
192
193 struct mxser_log {
194 int tick;
195 unsigned long rxcnt[MXSER_PORTS];
196 unsigned long txcnt[MXSER_PORTS];
197 };
198
199
200 struct mxser_mon {
201 unsigned long rxcnt;
202 unsigned long txcnt;
203 unsigned long up_rxcnt;
204 unsigned long up_txcnt;
205 int modem_status;
206 unsigned char hold_reason;
207 };
208
209 struct mxser_mon_ext {
210 unsigned long rx_cnt[32];
211 unsigned long tx_cnt[32];
212 unsigned long up_rxcnt[32];
213 unsigned long up_txcnt[32];
214 int modem_status[32];
215
216 long baudrate[32];
217 int databits[32];
218 int stopbits[32];
219 int parity[32];
220 int flowctrl[32];
221 int fifo[32];
222 int iftype[32];
223 };
224
225 struct mxser_board;
226
227 struct mxser_port {
228 struct tty_port port;
229 struct mxser_board *board;
230
231 unsigned long ioaddr;
232 unsigned long opmode_ioaddr;
233 int max_baud;
234
235 int rx_high_water;
236 int rx_trigger; /* Rx fifo trigger level */
237 int rx_low_water;
238 int baud_base; /* max. speed */
239 int type; /* UART type */
240
241 int x_char; /* xon/xoff character */
242 int IER; /* Interrupt Enable Register */
243 int MCR; /* Modem control register */
244
245 unsigned char stop_rx;
246 unsigned char ldisc_stop_rx;
247
248 int custom_divisor;
249 unsigned char err_shadow;
250
251 struct async_icount icount; /* kernel counters for 4 input interrupts */
252 int timeout;
253
254 int read_status_mask;
255 int ignore_status_mask;
256 int xmit_fifo_size;
257 int xmit_head;
258 int xmit_tail;
259 int xmit_cnt;
260
261 struct ktermios normal_termios;
262
263 struct mxser_mon mon_data;
264
265 spinlock_t slock;
266 wait_queue_head_t delta_msr_wait;
267 };
268
269 struct mxser_board {
270 unsigned int idx;
271 int irq;
272 const struct mxser_cardinfo *info;
273 unsigned long vector;
274 unsigned long vector_mask;
275
276 int chip_flag;
277 int uart_type;
278
279 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
280 };
281
282 struct mxser_mstatus {
283 tcflag_t cflag;
284 int cts;
285 int dsr;
286 int ri;
287 int dcd;
288 };
289
290 static struct mxser_mstatus GMStatus[MXSER_PORTS];
291
292 static int mxserBoardCAP[MXSER_BOARDS] = {
293 0, 0, 0, 0
294 /* 0x180, 0x280, 0x200, 0x320 */
295 };
296
297 static struct mxser_board mxser_boards[MXSER_BOARDS];
298 static struct tty_driver *mxvar_sdriver;
299 static struct mxser_log mxvar_log;
300 static int mxvar_diagflag;
301 static unsigned char mxser_msr[MXSER_PORTS + 1];
302 static struct mxser_mon_ext mon_data_ext;
303 static int mxser_set_baud_method[MXSER_PORTS + 1];
304
305 static void mxser_enable_must_enchance_mode(unsigned long baseio)
306 {
307 u8 oldlcr;
308 u8 efr;
309
310 oldlcr = inb(baseio + UART_LCR);
311 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
312
313 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
314 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
315
316 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
317 outb(oldlcr, baseio + UART_LCR);
318 }
319
320 static void mxser_disable_must_enchance_mode(unsigned long baseio)
321 {
322 u8 oldlcr;
323 u8 efr;
324
325 oldlcr = inb(baseio + UART_LCR);
326 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
327
328 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
329 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
330
331 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
332 outb(oldlcr, baseio + UART_LCR);
333 }
334
335 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
336 {
337 u8 oldlcr;
338 u8 efr;
339
340 oldlcr = inb(baseio + UART_LCR);
341 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
342
343 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
344 efr &= ~MOXA_MUST_EFR_BANK_MASK;
345 efr |= MOXA_MUST_EFR_BANK0;
346
347 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
348 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
349 outb(oldlcr, baseio + UART_LCR);
350 }
351
352 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
353 {
354 u8 oldlcr;
355 u8 efr;
356
357 oldlcr = inb(baseio + UART_LCR);
358 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
359
360 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
361 efr &= ~MOXA_MUST_EFR_BANK_MASK;
362 efr |= MOXA_MUST_EFR_BANK0;
363
364 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
365 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
366 outb(oldlcr, baseio + UART_LCR);
367 }
368
369 static void mxser_set_must_fifo_value(struct mxser_port *info)
370 {
371 u8 oldlcr;
372 u8 efr;
373
374 oldlcr = inb(info->ioaddr + UART_LCR);
375 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
376
377 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
378 efr &= ~MOXA_MUST_EFR_BANK_MASK;
379 efr |= MOXA_MUST_EFR_BANK1;
380
381 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
382 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
383 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
384 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
385 outb(oldlcr, info->ioaddr + UART_LCR);
386 }
387
388 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
389 {
390 u8 oldlcr;
391 u8 efr;
392
393 oldlcr = inb(baseio + UART_LCR);
394 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
395
396 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
397 efr &= ~MOXA_MUST_EFR_BANK_MASK;
398 efr |= MOXA_MUST_EFR_BANK2;
399
400 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
401 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
402 outb(oldlcr, baseio + UART_LCR);
403 }
404
405 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
406 {
407 u8 oldlcr;
408 u8 efr;
409
410 oldlcr = inb(baseio + UART_LCR);
411 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
412
413 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
414 efr &= ~MOXA_MUST_EFR_BANK_MASK;
415 efr |= MOXA_MUST_EFR_BANK2;
416
417 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
418 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
419 outb(oldlcr, baseio + UART_LCR);
420 }
421
422 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
423 {
424 u8 oldlcr;
425 u8 efr;
426
427 oldlcr = inb(baseio + UART_LCR);
428 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
429
430 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
431 efr &= ~MOXA_MUST_EFR_SF_MASK;
432
433 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
434 outb(oldlcr, baseio + UART_LCR);
435 }
436
437 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
438 {
439 u8 oldlcr;
440 u8 efr;
441
442 oldlcr = inb(baseio + UART_LCR);
443 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
444
445 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
446 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
447 efr |= MOXA_MUST_EFR_SF_TX1;
448
449 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
450 outb(oldlcr, baseio + UART_LCR);
451 }
452
453 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
454 {
455 u8 oldlcr;
456 u8 efr;
457
458 oldlcr = inb(baseio + UART_LCR);
459 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
460
461 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
462 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
463
464 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
465 outb(oldlcr, baseio + UART_LCR);
466 }
467
468 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
469 {
470 u8 oldlcr;
471 u8 efr;
472
473 oldlcr = inb(baseio + UART_LCR);
474 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
475
476 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
477 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
478 efr |= MOXA_MUST_EFR_SF_RX1;
479
480 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
481 outb(oldlcr, baseio + UART_LCR);
482 }
483
484 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
485 {
486 u8 oldlcr;
487 u8 efr;
488
489 oldlcr = inb(baseio + UART_LCR);
490 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
491
492 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
493 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
494
495 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
496 outb(oldlcr, baseio + UART_LCR);
497 }
498
499 #ifdef CONFIG_PCI
500 static int __devinit CheckIsMoxaMust(unsigned long io)
501 {
502 u8 oldmcr, hwid;
503 int i;
504
505 outb(0, io + UART_LCR);
506 mxser_disable_must_enchance_mode(io);
507 oldmcr = inb(io + UART_MCR);
508 outb(0, io + UART_MCR);
509 mxser_set_must_xon1_value(io, 0x11);
510 if ((hwid = inb(io + UART_MCR)) != 0) {
511 outb(oldmcr, io + UART_MCR);
512 return MOXA_OTHER_UART;
513 }
514
515 mxser_get_must_hardware_id(io, &hwid);
516 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
517 if (hwid == Gpci_uart_info[i].type)
518 return (int)hwid;
519 }
520 return MOXA_OTHER_UART;
521 }
522 #endif
523
524 static void process_txrx_fifo(struct mxser_port *info)
525 {
526 int i;
527
528 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
529 info->rx_trigger = 1;
530 info->rx_high_water = 1;
531 info->rx_low_water = 1;
532 info->xmit_fifo_size = 1;
533 } else
534 for (i = 0; i < UART_INFO_NUM; i++)
535 if (info->board->chip_flag == Gpci_uart_info[i].type) {
536 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
537 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
538 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
539 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
540 break;
541 }
542 }
543
544 static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
545 {
546 unsigned char status = 0;
547
548 status = inb(baseaddr + UART_MSR);
549
550 mxser_msr[port] &= 0x0F;
551 mxser_msr[port] |= status;
552 status = mxser_msr[port];
553 if (mode)
554 mxser_msr[port] = 0;
555
556 return status;
557 }
558
559 static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
560 struct mxser_port *port)
561 {
562 DECLARE_WAITQUEUE(wait, current);
563 int retval;
564 int do_clocal = 0;
565 unsigned long flags;
566
567 /*
568 * If non-blocking mode is set, or the port is not enabled,
569 * then make the check up front and then exit.
570 */
571 if ((filp->f_flags & O_NONBLOCK) ||
572 test_bit(TTY_IO_ERROR, &tty->flags)) {
573 port->port.flags |= ASYNC_NORMAL_ACTIVE;
574 return 0;
575 }
576
577 if (tty->termios->c_cflag & CLOCAL)
578 do_clocal = 1;
579
580 /*
581 * Block waiting for the carrier detect and the line to become
582 * free (i.e., not in use by the callout). While we are in
583 * this loop, port->port.count is dropped by one, so that
584 * mxser_close() knows when to free things. We restore it upon
585 * exit, either normal or abnormal.
586 */
587 retval = 0;
588 add_wait_queue(&port->port.open_wait, &wait);
589
590 spin_lock_irqsave(&port->slock, flags);
591 if (!tty_hung_up_p(filp))
592 port->port.count--;
593 spin_unlock_irqrestore(&port->slock, flags);
594 port->port.blocked_open++;
595 while (1) {
596 spin_lock_irqsave(&port->slock, flags);
597 outb(inb(port->ioaddr + UART_MCR) |
598 UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
599 spin_unlock_irqrestore(&port->slock, flags);
600 set_current_state(TASK_INTERRUPTIBLE);
601 if (tty_hung_up_p(filp) || !(port->port.flags & ASYNC_INITIALIZED)) {
602 if (port->port.flags & ASYNC_HUP_NOTIFY)
603 retval = -EAGAIN;
604 else
605 retval = -ERESTARTSYS;
606 break;
607 }
608 if (!(port->port.flags & ASYNC_CLOSING) &&
609 (do_clocal ||
610 (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
611 break;
612 if (signal_pending(current)) {
613 retval = -ERESTARTSYS;
614 break;
615 }
616 schedule();
617 }
618 set_current_state(TASK_RUNNING);
619 remove_wait_queue(&port->port.open_wait, &wait);
620 if (!tty_hung_up_p(filp))
621 port->port.count++;
622 port->port.blocked_open--;
623 if (retval)
624 return retval;
625 port->port.flags |= ASYNC_NORMAL_ACTIVE;
626 return 0;
627 }
628
629 static int mxser_set_baud(struct mxser_port *info, long newspd)
630 {
631 int quot = 0, baud;
632 unsigned char cval;
633
634 if (!info->port.tty || !info->port.tty->termios)
635 return -1;
636
637 if (!(info->ioaddr))
638 return -1;
639
640 if (newspd > info->max_baud)
641 return -1;
642
643 if (newspd == 134) {
644 quot = 2 * info->baud_base / 269;
645 tty_encode_baud_rate(info->port.tty, 134, 134);
646 } else if (newspd) {
647 quot = info->baud_base / newspd;
648 if (quot == 0)
649 quot = 1;
650 baud = info->baud_base/quot;
651 tty_encode_baud_rate(info->port.tty, baud, baud);
652 } else {
653 quot = 0;
654 }
655
656 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
657 info->timeout += HZ / 50; /* Add .02 seconds of slop */
658
659 if (quot) {
660 info->MCR |= UART_MCR_DTR;
661 outb(info->MCR, info->ioaddr + UART_MCR);
662 } else {
663 info->MCR &= ~UART_MCR_DTR;
664 outb(info->MCR, info->ioaddr + UART_MCR);
665 return 0;
666 }
667
668 cval = inb(info->ioaddr + UART_LCR);
669
670 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
671
672 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
673 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
674 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
675
676 #ifdef BOTHER
677 if (C_BAUD(info->port.tty) == BOTHER) {
678 quot = info->baud_base % newspd;
679 quot *= 8;
680 if (quot % newspd > newspd / 2) {
681 quot /= newspd;
682 quot++;
683 } else
684 quot /= newspd;
685
686 mxser_set_must_enum_value(info->ioaddr, quot);
687 } else
688 #endif
689 mxser_set_must_enum_value(info->ioaddr, 0);
690
691 return 0;
692 }
693
694 /*
695 * This routine is called to set the UART divisor registers to match
696 * the specified baud rate for a serial port.
697 */
698 static int mxser_change_speed(struct mxser_port *info,
699 struct ktermios *old_termios)
700 {
701 unsigned cflag, cval, fcr;
702 int ret = 0;
703 unsigned char status;
704
705 if (!info->port.tty || !info->port.tty->termios)
706 return ret;
707 cflag = info->port.tty->termios->c_cflag;
708 if (!(info->ioaddr))
709 return ret;
710
711 if (mxser_set_baud_method[info->port.tty->index] == 0)
712 mxser_set_baud(info, tty_get_baud_rate(info->port.tty));
713
714 /* byte size and parity */
715 switch (cflag & CSIZE) {
716 case CS5:
717 cval = 0x00;
718 break;
719 case CS6:
720 cval = 0x01;
721 break;
722 case CS7:
723 cval = 0x02;
724 break;
725 case CS8:
726 cval = 0x03;
727 break;
728 default:
729 cval = 0x00;
730 break; /* too keep GCC shut... */
731 }
732 if (cflag & CSTOPB)
733 cval |= 0x04;
734 if (cflag & PARENB)
735 cval |= UART_LCR_PARITY;
736 if (!(cflag & PARODD))
737 cval |= UART_LCR_EPAR;
738 if (cflag & CMSPAR)
739 cval |= UART_LCR_SPAR;
740
741 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
742 if (info->board->chip_flag) {
743 fcr = UART_FCR_ENABLE_FIFO;
744 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
745 mxser_set_must_fifo_value(info);
746 } else
747 fcr = 0;
748 } else {
749 fcr = UART_FCR_ENABLE_FIFO;
750 if (info->board->chip_flag) {
751 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
752 mxser_set_must_fifo_value(info);
753 } else {
754 switch (info->rx_trigger) {
755 case 1:
756 fcr |= UART_FCR_TRIGGER_1;
757 break;
758 case 4:
759 fcr |= UART_FCR_TRIGGER_4;
760 break;
761 case 8:
762 fcr |= UART_FCR_TRIGGER_8;
763 break;
764 default:
765 fcr |= UART_FCR_TRIGGER_14;
766 break;
767 }
768 }
769 }
770
771 /* CTS flow control flag and modem status interrupts */
772 info->IER &= ~UART_IER_MSI;
773 info->MCR &= ~UART_MCR_AFE;
774 if (cflag & CRTSCTS) {
775 info->port.flags |= ASYNC_CTS_FLOW;
776 info->IER |= UART_IER_MSI;
777 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
778 info->MCR |= UART_MCR_AFE;
779 } else {
780 status = inb(info->ioaddr + UART_MSR);
781 if (info->port.tty->hw_stopped) {
782 if (status & UART_MSR_CTS) {
783 info->port.tty->hw_stopped = 0;
784 if (info->type != PORT_16550A &&
785 !info->board->chip_flag) {
786 outb(info->IER & ~UART_IER_THRI,
787 info->ioaddr +
788 UART_IER);
789 info->IER |= UART_IER_THRI;
790 outb(info->IER, info->ioaddr +
791 UART_IER);
792 }
793 tty_wakeup(info->port.tty);
794 }
795 } else {
796 if (!(status & UART_MSR_CTS)) {
797 info->port.tty->hw_stopped = 1;
798 if ((info->type != PORT_16550A) &&
799 (!info->board->chip_flag)) {
800 info->IER &= ~UART_IER_THRI;
801 outb(info->IER, info->ioaddr +
802 UART_IER);
803 }
804 }
805 }
806 }
807 } else {
808 info->port.flags &= ~ASYNC_CTS_FLOW;
809 }
810 outb(info->MCR, info->ioaddr + UART_MCR);
811 if (cflag & CLOCAL) {
812 info->port.flags &= ~ASYNC_CHECK_CD;
813 } else {
814 info->port.flags |= ASYNC_CHECK_CD;
815 info->IER |= UART_IER_MSI;
816 }
817 outb(info->IER, info->ioaddr + UART_IER);
818
819 /*
820 * Set up parity check flag
821 */
822 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
823 if (I_INPCK(info->port.tty))
824 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
825 if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
826 info->read_status_mask |= UART_LSR_BI;
827
828 info->ignore_status_mask = 0;
829
830 if (I_IGNBRK(info->port.tty)) {
831 info->ignore_status_mask |= UART_LSR_BI;
832 info->read_status_mask |= UART_LSR_BI;
833 /*
834 * If we're ignore parity and break indicators, ignore
835 * overruns too. (For real raw support).
836 */
837 if (I_IGNPAR(info->port.tty)) {
838 info->ignore_status_mask |=
839 UART_LSR_OE |
840 UART_LSR_PE |
841 UART_LSR_FE;
842 info->read_status_mask |=
843 UART_LSR_OE |
844 UART_LSR_PE |
845 UART_LSR_FE;
846 }
847 }
848 if (info->board->chip_flag) {
849 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(info->port.tty));
850 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(info->port.tty));
851 if (I_IXON(info->port.tty)) {
852 mxser_enable_must_rx_software_flow_control(
853 info->ioaddr);
854 } else {
855 mxser_disable_must_rx_software_flow_control(
856 info->ioaddr);
857 }
858 if (I_IXOFF(info->port.tty)) {
859 mxser_enable_must_tx_software_flow_control(
860 info->ioaddr);
861 } else {
862 mxser_disable_must_tx_software_flow_control(
863 info->ioaddr);
864 }
865 }
866
867
868 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
869 outb(cval, info->ioaddr + UART_LCR);
870
871 return ret;
872 }
873
874 static void mxser_check_modem_status(struct mxser_port *port, int status)
875 {
876 /* update input line counters */
877 if (status & UART_MSR_TERI)
878 port->icount.rng++;
879 if (status & UART_MSR_DDSR)
880 port->icount.dsr++;
881 if (status & UART_MSR_DDCD)
882 port->icount.dcd++;
883 if (status & UART_MSR_DCTS)
884 port->icount.cts++;
885 port->mon_data.modem_status = status;
886 wake_up_interruptible(&port->delta_msr_wait);
887
888 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
889 if (status & UART_MSR_DCD)
890 wake_up_interruptible(&port->port.open_wait);
891 }
892
893 if (port->port.flags & ASYNC_CTS_FLOW) {
894 if (port->port.tty->hw_stopped) {
895 if (status & UART_MSR_CTS) {
896 port->port.tty->hw_stopped = 0;
897
898 if ((port->type != PORT_16550A) &&
899 (!port->board->chip_flag)) {
900 outb(port->IER & ~UART_IER_THRI,
901 port->ioaddr + UART_IER);
902 port->IER |= UART_IER_THRI;
903 outb(port->IER, port->ioaddr +
904 UART_IER);
905 }
906 tty_wakeup(port->port.tty);
907 }
908 } else {
909 if (!(status & UART_MSR_CTS)) {
910 port->port.tty->hw_stopped = 1;
911 if (port->type != PORT_16550A &&
912 !port->board->chip_flag) {
913 port->IER &= ~UART_IER_THRI;
914 outb(port->IER, port->ioaddr +
915 UART_IER);
916 }
917 }
918 }
919 }
920 }
921
922 static int mxser_startup(struct mxser_port *info)
923 {
924 unsigned long page;
925 unsigned long flags;
926
927 page = __get_free_page(GFP_KERNEL);
928 if (!page)
929 return -ENOMEM;
930
931 spin_lock_irqsave(&info->slock, flags);
932
933 if (info->port.flags & ASYNC_INITIALIZED) {
934 free_page(page);
935 spin_unlock_irqrestore(&info->slock, flags);
936 return 0;
937 }
938
939 if (!info->ioaddr || !info->type) {
940 if (info->port.tty)
941 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
942 free_page(page);
943 spin_unlock_irqrestore(&info->slock, flags);
944 return 0;
945 }
946 if (info->port.xmit_buf)
947 free_page(page);
948 else
949 info->port.xmit_buf = (unsigned char *) page;
950
951 /*
952 * Clear the FIFO buffers and disable them
953 * (they will be reenabled in mxser_change_speed())
954 */
955 if (info->board->chip_flag)
956 outb((UART_FCR_CLEAR_RCVR |
957 UART_FCR_CLEAR_XMIT |
958 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
959 else
960 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
961 info->ioaddr + UART_FCR);
962
963 /*
964 * At this point there's no way the LSR could still be 0xFF;
965 * if it is, then bail out, because there's likely no UART
966 * here.
967 */
968 if (inb(info->ioaddr + UART_LSR) == 0xff) {
969 spin_unlock_irqrestore(&info->slock, flags);
970 if (capable(CAP_SYS_ADMIN)) {
971 if (info->port.tty)
972 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
973 return 0;
974 } else
975 return -ENODEV;
976 }
977
978 /*
979 * Clear the interrupt registers.
980 */
981 (void) inb(info->ioaddr + UART_LSR);
982 (void) inb(info->ioaddr + UART_RX);
983 (void) inb(info->ioaddr + UART_IIR);
984 (void) inb(info->ioaddr + UART_MSR);
985
986 /*
987 * Now, initialize the UART
988 */
989 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
990 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
991 outb(info->MCR, info->ioaddr + UART_MCR);
992
993 /*
994 * Finally, enable interrupts
995 */
996 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
997
998 if (info->board->chip_flag)
999 info->IER |= MOXA_MUST_IER_EGDAI;
1000 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
1001
1002 /*
1003 * And clear the interrupt registers again for luck.
1004 */
1005 (void) inb(info->ioaddr + UART_LSR);
1006 (void) inb(info->ioaddr + UART_RX);
1007 (void) inb(info->ioaddr + UART_IIR);
1008 (void) inb(info->ioaddr + UART_MSR);
1009
1010 if (info->port.tty)
1011 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
1012 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1013
1014 /*
1015 * and set the speed of the serial port
1016 */
1017 mxser_change_speed(info, NULL);
1018 info->port.flags |= ASYNC_INITIALIZED;
1019 spin_unlock_irqrestore(&info->slock, flags);
1020
1021 return 0;
1022 }
1023
1024 /*
1025 * This routine will shutdown a serial port; interrupts maybe disabled, and
1026 * DTR is dropped if the hangup on close termio flag is on.
1027 */
1028 static void mxser_shutdown(struct mxser_port *info)
1029 {
1030 unsigned long flags;
1031
1032 if (!(info->port.flags & ASYNC_INITIALIZED))
1033 return;
1034
1035 spin_lock_irqsave(&info->slock, flags);
1036
1037 /*
1038 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
1039 * here so the queue might never be waken up
1040 */
1041 wake_up_interruptible(&info->delta_msr_wait);
1042
1043 /*
1044 * Free the IRQ, if necessary
1045 */
1046 if (info->port.xmit_buf) {
1047 free_page((unsigned long) info->port.xmit_buf);
1048 info->port.xmit_buf = NULL;
1049 }
1050
1051 info->IER = 0;
1052 outb(0x00, info->ioaddr + UART_IER);
1053
1054 if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL))
1055 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
1056 outb(info->MCR, info->ioaddr + UART_MCR);
1057
1058 /* clear Rx/Tx FIFO's */
1059 if (info->board->chip_flag)
1060 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
1061 MOXA_MUST_FCR_GDA_MODE_ENABLE,
1062 info->ioaddr + UART_FCR);
1063 else
1064 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
1065 info->ioaddr + UART_FCR);
1066
1067 /* read data port to reset things */
1068 (void) inb(info->ioaddr + UART_RX);
1069
1070 if (info->port.tty)
1071 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
1072
1073 info->port.flags &= ~ASYNC_INITIALIZED;
1074
1075 if (info->board->chip_flag)
1076 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1077
1078 spin_unlock_irqrestore(&info->slock, flags);
1079 }
1080
1081 /*
1082 * This routine is called whenever a serial port is opened. It
1083 * enables interrupts for a serial port, linking in its async structure into
1084 * the IRQ chain. It also performs the serial-specific
1085 * initialization for the tty structure.
1086 */
1087 static int mxser_open(struct tty_struct *tty, struct file *filp)
1088 {
1089 struct mxser_port *info;
1090 unsigned long flags;
1091 int retval, line;
1092
1093 line = tty->index;
1094 if (line == MXSER_PORTS)
1095 return 0;
1096 if (line < 0 || line > MXSER_PORTS)
1097 return -ENODEV;
1098 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1099 if (!info->ioaddr)
1100 return -ENODEV;
1101
1102 tty->driver_data = info;
1103 info->port.tty = tty;
1104 /*
1105 * Start up serial port
1106 */
1107 spin_lock_irqsave(&info->slock, flags);
1108 info->port.count++;
1109 spin_unlock_irqrestore(&info->slock, flags);
1110 retval = mxser_startup(info);
1111 if (retval)
1112 return retval;
1113
1114 retval = mxser_block_til_ready(tty, filp, info);
1115 if (retval)
1116 return retval;
1117
1118 /* unmark here for very high baud rate (ex. 921600 bps) used */
1119 tty->low_latency = 1;
1120 return 0;
1121 }
1122
1123 static void mxser_flush_buffer(struct tty_struct *tty)
1124 {
1125 struct mxser_port *info = tty->driver_data;
1126 char fcr;
1127 unsigned long flags;
1128
1129
1130 spin_lock_irqsave(&info->slock, flags);
1131 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1132
1133 fcr = inb(info->ioaddr + UART_FCR);
1134 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1135 info->ioaddr + UART_FCR);
1136 outb(fcr, info->ioaddr + UART_FCR);
1137
1138 spin_unlock_irqrestore(&info->slock, flags);
1139
1140 tty_wakeup(tty);
1141 }
1142
1143
1144 /*
1145 * This routine is called when the serial port gets closed. First, we
1146 * wait for the last remaining data to be sent. Then, we unlink its
1147 * async structure from the interrupt chain if necessary, and we free
1148 * that IRQ if nothing is left in the chain.
1149 */
1150 static void mxser_close(struct tty_struct *tty, struct file *filp)
1151 {
1152 struct mxser_port *info = tty->driver_data;
1153
1154 unsigned long timeout;
1155 unsigned long flags;
1156
1157 if (tty->index == MXSER_PORTS)
1158 return;
1159 if (!info)
1160 return;
1161
1162 spin_lock_irqsave(&info->slock, flags);
1163
1164 if (tty_hung_up_p(filp)) {
1165 spin_unlock_irqrestore(&info->slock, flags);
1166 return;
1167 }
1168 if ((tty->count == 1) && (info->port.count != 1)) {
1169 /*
1170 * Uh, oh. tty->count is 1, which means that the tty
1171 * structure will be freed. Info->port.count should always
1172 * be one in these conditions. If it's greater than
1173 * one, we've got real problems, since it means the
1174 * serial port won't be shutdown.
1175 */
1176 printk(KERN_ERR "mxser_close: bad serial port count; "
1177 "tty->count is 1, info->port.count is %d\n", info->port.count);
1178 info->port.count = 1;
1179 }
1180 if (--info->port.count < 0) {
1181 printk(KERN_ERR "mxser_close: bad serial port count for "
1182 "ttys%d: %d\n", tty->index, info->port.count);
1183 info->port.count = 0;
1184 }
1185 if (info->port.count) {
1186 spin_unlock_irqrestore(&info->slock, flags);
1187 return;
1188 }
1189 info->port.flags |= ASYNC_CLOSING;
1190 spin_unlock_irqrestore(&info->slock, flags);
1191 /*
1192 * Save the termios structure, since this port may have
1193 * separate termios for callout and dialin.
1194 */
1195 if (info->port.flags & ASYNC_NORMAL_ACTIVE)
1196 info->normal_termios = *tty->termios;
1197 /*
1198 * Now we wait for the transmit buffer to clear; and we notify
1199 * the line discipline to only process XON/XOFF characters.
1200 */
1201 tty->closing = 1;
1202 if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE)
1203 tty_wait_until_sent(tty, info->port.closing_wait);
1204 /*
1205 * At this point we stop accepting input. To do this, we
1206 * disable the receive line status interrupts, and tell the
1207 * interrupt driver to stop checking the data ready bit in the
1208 * line status register.
1209 */
1210 info->IER &= ~UART_IER_RLSI;
1211 if (info->board->chip_flag)
1212 info->IER &= ~MOXA_MUST_RECV_ISR;
1213
1214 if (info->port.flags & ASYNC_INITIALIZED) {
1215 outb(info->IER, info->ioaddr + UART_IER);
1216 /*
1217 * Before we drop DTR, make sure the UART transmitter
1218 * has completely drained; this is especially
1219 * important if there is a transmit FIFO!
1220 */
1221 timeout = jiffies + HZ;
1222 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1223 schedule_timeout_interruptible(5);
1224 if (time_after(jiffies, timeout))
1225 break;
1226 }
1227 }
1228 mxser_shutdown(info);
1229
1230 mxser_flush_buffer(tty);
1231 tty_ldisc_flush(tty);
1232
1233 tty->closing = 0;
1234 info->port.tty = NULL;
1235 if (info->port.blocked_open) {
1236 if (info->port.close_delay)
1237 schedule_timeout_interruptible(info->port.close_delay);
1238 wake_up_interruptible(&info->port.open_wait);
1239 }
1240
1241 info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1242 }
1243
1244 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1245 {
1246 int c, total = 0;
1247 struct mxser_port *info = tty->driver_data;
1248 unsigned long flags;
1249
1250 if (!info->port.xmit_buf)
1251 return 0;
1252
1253 while (1) {
1254 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1255 SERIAL_XMIT_SIZE - info->xmit_head));
1256 if (c <= 0)
1257 break;
1258
1259 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1260 spin_lock_irqsave(&info->slock, flags);
1261 info->xmit_head = (info->xmit_head + c) &
1262 (SERIAL_XMIT_SIZE - 1);
1263 info->xmit_cnt += c;
1264 spin_unlock_irqrestore(&info->slock, flags);
1265
1266 buf += c;
1267 count -= c;
1268 total += c;
1269 }
1270
1271 if (info->xmit_cnt && !tty->stopped) {
1272 if (!tty->hw_stopped ||
1273 (info->type == PORT_16550A) ||
1274 (info->board->chip_flag)) {
1275 spin_lock_irqsave(&info->slock, flags);
1276 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1277 UART_IER);
1278 info->IER |= UART_IER_THRI;
1279 outb(info->IER, info->ioaddr + UART_IER);
1280 spin_unlock_irqrestore(&info->slock, flags);
1281 }
1282 }
1283 return total;
1284 }
1285
1286 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1287 {
1288 struct mxser_port *info = tty->driver_data;
1289 unsigned long flags;
1290
1291 if (!info->port.xmit_buf)
1292 return 0;
1293
1294 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1295 return 0;
1296
1297 spin_lock_irqsave(&info->slock, flags);
1298 info->port.xmit_buf[info->xmit_head++] = ch;
1299 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1300 info->xmit_cnt++;
1301 spin_unlock_irqrestore(&info->slock, flags);
1302 if (!tty->stopped) {
1303 if (!tty->hw_stopped ||
1304 (info->type == PORT_16550A) ||
1305 info->board->chip_flag) {
1306 spin_lock_irqsave(&info->slock, flags);
1307 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1308 info->IER |= UART_IER_THRI;
1309 outb(info->IER, info->ioaddr + UART_IER);
1310 spin_unlock_irqrestore(&info->slock, flags);
1311 }
1312 }
1313 return 1;
1314 }
1315
1316
1317 static void mxser_flush_chars(struct tty_struct *tty)
1318 {
1319 struct mxser_port *info = tty->driver_data;
1320 unsigned long flags;
1321
1322 if (info->xmit_cnt <= 0 ||
1323 tty->stopped ||
1324 !info->port.xmit_buf ||
1325 (tty->hw_stopped &&
1326 (info->type != PORT_16550A) &&
1327 (!info->board->chip_flag)
1328 ))
1329 return;
1330
1331 spin_lock_irqsave(&info->slock, flags);
1332
1333 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1334 info->IER |= UART_IER_THRI;
1335 outb(info->IER, info->ioaddr + UART_IER);
1336
1337 spin_unlock_irqrestore(&info->slock, flags);
1338 }
1339
1340 static int mxser_write_room(struct tty_struct *tty)
1341 {
1342 struct mxser_port *info = tty->driver_data;
1343 int ret;
1344
1345 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1346 if (ret < 0)
1347 ret = 0;
1348 return ret;
1349 }
1350
1351 static int mxser_chars_in_buffer(struct tty_struct *tty)
1352 {
1353 struct mxser_port *info = tty->driver_data;
1354 return info->xmit_cnt;
1355 }
1356
1357 /*
1358 * ------------------------------------------------------------
1359 * friends of mxser_ioctl()
1360 * ------------------------------------------------------------
1361 */
1362 static int mxser_get_serial_info(struct mxser_port *info,
1363 struct serial_struct __user *retinfo)
1364 {
1365 struct serial_struct tmp = {
1366 .type = info->type,
1367 .line = info->port.tty->index,
1368 .port = info->ioaddr,
1369 .irq = info->board->irq,
1370 .flags = info->port.flags,
1371 .baud_base = info->baud_base,
1372 .close_delay = info->port.close_delay,
1373 .closing_wait = info->port.closing_wait,
1374 .custom_divisor = info->custom_divisor,
1375 .hub6 = 0
1376 };
1377 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1378 return -EFAULT;
1379 return 0;
1380 }
1381
1382 static int mxser_set_serial_info(struct mxser_port *info,
1383 struct serial_struct __user *new_info)
1384 {
1385 struct serial_struct new_serial;
1386 speed_t baud;
1387 unsigned long sl_flags;
1388 unsigned int flags;
1389 int retval = 0;
1390
1391 if (!new_info || !info->ioaddr)
1392 return -ENODEV;
1393 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1394 return -EFAULT;
1395
1396 if (new_serial.irq != info->board->irq ||
1397 new_serial.port != info->ioaddr)
1398 return -EINVAL;
1399
1400 flags = info->port.flags & ASYNC_SPD_MASK;
1401
1402 if (!capable(CAP_SYS_ADMIN)) {
1403 if ((new_serial.baud_base != info->baud_base) ||
1404 (new_serial.close_delay != info->port.close_delay) ||
1405 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1406 return -EPERM;
1407 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1408 (new_serial.flags & ASYNC_USR_MASK));
1409 } else {
1410 /*
1411 * OK, past this point, all the error checking has been done.
1412 * At this point, we start making changes.....
1413 */
1414 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
1415 (new_serial.flags & ASYNC_FLAGS));
1416 info->port.close_delay = new_serial.close_delay * HZ / 100;
1417 info->port.closing_wait = new_serial.closing_wait * HZ / 100;
1418 info->port.tty->low_latency =
1419 (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1420 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1421 (new_serial.baud_base != info->baud_base ||
1422 new_serial.custom_divisor !=
1423 info->custom_divisor)) {
1424 baud = new_serial.baud_base / new_serial.custom_divisor;
1425 tty_encode_baud_rate(info->port.tty, baud, baud);
1426 }
1427 }
1428
1429 info->type = new_serial.type;
1430
1431 process_txrx_fifo(info);
1432
1433 if (info->port.flags & ASYNC_INITIALIZED) {
1434 if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
1435 spin_lock_irqsave(&info->slock, sl_flags);
1436 mxser_change_speed(info, NULL);
1437 spin_unlock_irqrestore(&info->slock, sl_flags);
1438 }
1439 } else
1440 retval = mxser_startup(info);
1441
1442 return retval;
1443 }
1444
1445 /*
1446 * mxser_get_lsr_info - get line status register info
1447 *
1448 * Purpose: Let user call ioctl() to get info when the UART physically
1449 * is emptied. On bus types like RS485, the transmitter must
1450 * release the bus after transmitting. This must be done when
1451 * the transmit shift register is empty, not be done when the
1452 * transmit holding register is empty. This functionality
1453 * allows an RS485 driver to be written in user space.
1454 */
1455 static int mxser_get_lsr_info(struct mxser_port *info,
1456 unsigned int __user *value)
1457 {
1458 unsigned char status;
1459 unsigned int result;
1460 unsigned long flags;
1461
1462 spin_lock_irqsave(&info->slock, flags);
1463 status = inb(info->ioaddr + UART_LSR);
1464 spin_unlock_irqrestore(&info->slock, flags);
1465 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1466 return put_user(result, value);
1467 }
1468
1469 static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1470 {
1471 struct mxser_port *info = tty->driver_data;
1472 unsigned char control, status;
1473 unsigned long flags;
1474
1475
1476 if (tty->index == MXSER_PORTS)
1477 return -ENOIOCTLCMD;
1478 if (test_bit(TTY_IO_ERROR, &tty->flags))
1479 return -EIO;
1480
1481 control = info->MCR;
1482
1483 spin_lock_irqsave(&info->slock, flags);
1484 status = inb(info->ioaddr + UART_MSR);
1485 if (status & UART_MSR_ANY_DELTA)
1486 mxser_check_modem_status(info, status);
1487 spin_unlock_irqrestore(&info->slock, flags);
1488 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1489 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1490 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1491 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1492 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1493 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1494 }
1495
1496 static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1497 unsigned int set, unsigned int clear)
1498 {
1499 struct mxser_port *info = tty->driver_data;
1500 unsigned long flags;
1501
1502
1503 if (tty->index == MXSER_PORTS)
1504 return -ENOIOCTLCMD;
1505 if (test_bit(TTY_IO_ERROR, &tty->flags))
1506 return -EIO;
1507
1508 spin_lock_irqsave(&info->slock, flags);
1509
1510 if (set & TIOCM_RTS)
1511 info->MCR |= UART_MCR_RTS;
1512 if (set & TIOCM_DTR)
1513 info->MCR |= UART_MCR_DTR;
1514
1515 if (clear & TIOCM_RTS)
1516 info->MCR &= ~UART_MCR_RTS;
1517 if (clear & TIOCM_DTR)
1518 info->MCR &= ~UART_MCR_DTR;
1519
1520 outb(info->MCR, info->ioaddr + UART_MCR);
1521 spin_unlock_irqrestore(&info->slock, flags);
1522 return 0;
1523 }
1524
1525 static int __init mxser_program_mode(int port)
1526 {
1527 int id, i, j, n;
1528
1529 outb(0, port);
1530 outb(0, port);
1531 outb(0, port);
1532 (void)inb(port);
1533 (void)inb(port);
1534 outb(0, port);
1535 (void)inb(port);
1536
1537 id = inb(port + 1) & 0x1F;
1538 if ((id != C168_ASIC_ID) &&
1539 (id != C104_ASIC_ID) &&
1540 (id != C102_ASIC_ID) &&
1541 (id != CI132_ASIC_ID) &&
1542 (id != CI134_ASIC_ID) &&
1543 (id != CI104J_ASIC_ID))
1544 return -1;
1545 for (i = 0, j = 0; i < 4; i++) {
1546 n = inb(port + 2);
1547 if (n == 'M') {
1548 j = 1;
1549 } else if ((j == 1) && (n == 1)) {
1550 j = 2;
1551 break;
1552 } else
1553 j = 0;
1554 }
1555 if (j != 2)
1556 id = -2;
1557 return id;
1558 }
1559
1560 static void __init mxser_normal_mode(int port)
1561 {
1562 int i, n;
1563
1564 outb(0xA5, port + 1);
1565 outb(0x80, port + 3);
1566 outb(12, port + 0); /* 9600 bps */
1567 outb(0, port + 1);
1568 outb(0x03, port + 3); /* 8 data bits */
1569 outb(0x13, port + 4); /* loop back mode */
1570 for (i = 0; i < 16; i++) {
1571 n = inb(port + 5);
1572 if ((n & 0x61) == 0x60)
1573 break;
1574 if ((n & 1) == 1)
1575 (void)inb(port);
1576 }
1577 outb(0x00, port + 4);
1578 }
1579
1580 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1581 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1582 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1583 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1584 #define EN_CCMD 0x000 /* Chip's command register */
1585 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1586 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1587 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1588 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1589 #define EN0_DCFG 0x00E /* Data configuration reg WR */
1590 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1591 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1592 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1593 static int __init mxser_read_register(int port, unsigned short *regs)
1594 {
1595 int i, k, value, id;
1596 unsigned int j;
1597
1598 id = mxser_program_mode(port);
1599 if (id < 0)
1600 return id;
1601 for (i = 0; i < 14; i++) {
1602 k = (i & 0x3F) | 0x180;
1603 for (j = 0x100; j > 0; j >>= 1) {
1604 outb(CHIP_CS, port);
1605 if (k & j) {
1606 outb(CHIP_CS | CHIP_DO, port);
1607 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1608 } else {
1609 outb(CHIP_CS, port);
1610 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1611 }
1612 }
1613 (void)inb(port);
1614 value = 0;
1615 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1616 outb(CHIP_CS, port);
1617 outb(CHIP_CS | CHIP_SK, port);
1618 if (inb(port) & CHIP_DI)
1619 value |= j;
1620 }
1621 regs[i] = value;
1622 outb(0, port);
1623 }
1624 mxser_normal_mode(port);
1625 return id;
1626 }
1627
1628 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1629 {
1630 struct mxser_port *port;
1631 int result, status;
1632 unsigned int i, j;
1633 int ret = 0;
1634
1635 switch (cmd) {
1636 case MOXA_GET_MAJOR:
1637 return put_user(ttymajor, (int __user *)argp);
1638
1639 case MOXA_CHKPORTENABLE:
1640 result = 0;
1641 lock_kernel();
1642 for (i = 0; i < MXSER_BOARDS; i++)
1643 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1644 if (mxser_boards[i].ports[j].ioaddr)
1645 result |= (1 << i);
1646 unlock_kernel();
1647 return put_user(result, (unsigned long __user *)argp);
1648 case MOXA_GETDATACOUNT:
1649 lock_kernel();
1650 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1651 ret = -EFAULT;
1652 unlock_kernel();
1653 return ret;
1654 case MOXA_GETMSTATUS:
1655 lock_kernel();
1656 for (i = 0; i < MXSER_BOARDS; i++)
1657 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1658 port = &mxser_boards[i].ports[j];
1659
1660 GMStatus[i].ri = 0;
1661 if (!port->ioaddr) {
1662 GMStatus[i].dcd = 0;
1663 GMStatus[i].dsr = 0;
1664 GMStatus[i].cts = 0;
1665 continue;
1666 }
1667
1668 if (!port->port.tty || !port->port.tty->termios)
1669 GMStatus[i].cflag =
1670 port->normal_termios.c_cflag;
1671 else
1672 GMStatus[i].cflag =
1673 port->port.tty->termios->c_cflag;
1674
1675 status = inb(port->ioaddr + UART_MSR);
1676 if (status & 0x80 /*UART_MSR_DCD */ )
1677 GMStatus[i].dcd = 1;
1678 else
1679 GMStatus[i].dcd = 0;
1680
1681 if (status & 0x20 /*UART_MSR_DSR */ )
1682 GMStatus[i].dsr = 1;
1683 else
1684 GMStatus[i].dsr = 0;
1685
1686
1687 if (status & 0x10 /*UART_MSR_CTS */ )
1688 GMStatus[i].cts = 1;
1689 else
1690 GMStatus[i].cts = 0;
1691 }
1692 unlock_kernel();
1693 if (copy_to_user(argp, GMStatus,
1694 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1695 return -EFAULT;
1696 return 0;
1697 case MOXA_ASPP_MON_EXT: {
1698 int p, shiftbit;
1699 unsigned long opmode;
1700 unsigned cflag, iflag;
1701
1702 lock_kernel();
1703 for (i = 0; i < MXSER_BOARDS; i++) {
1704 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1705 port = &mxser_boards[i].ports[j];
1706 if (!port->ioaddr)
1707 continue;
1708
1709 status = mxser_get_msr(port->ioaddr, 0, i);
1710
1711 if (status & UART_MSR_TERI)
1712 port->icount.rng++;
1713 if (status & UART_MSR_DDSR)
1714 port->icount.dsr++;
1715 if (status & UART_MSR_DDCD)
1716 port->icount.dcd++;
1717 if (status & UART_MSR_DCTS)
1718 port->icount.cts++;
1719
1720 port->mon_data.modem_status = status;
1721 mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt;
1722 mon_data_ext.tx_cnt[i] = port->mon_data.txcnt;
1723 mon_data_ext.up_rxcnt[i] =
1724 port->mon_data.up_rxcnt;
1725 mon_data_ext.up_txcnt[i] =
1726 port->mon_data.up_txcnt;
1727 mon_data_ext.modem_status[i] =
1728 port->mon_data.modem_status;
1729 mon_data_ext.baudrate[i] =
1730 tty_get_baud_rate(port->port.tty);
1731
1732 if (!port->port.tty || !port->port.tty->termios) {
1733 cflag = port->normal_termios.c_cflag;
1734 iflag = port->normal_termios.c_iflag;
1735 } else {
1736 cflag = port->port.tty->termios->c_cflag;
1737 iflag = port->port.tty->termios->c_iflag;
1738 }
1739
1740 mon_data_ext.databits[i] = cflag & CSIZE;
1741
1742 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1743
1744 mon_data_ext.parity[i] =
1745 cflag & (PARENB | PARODD | CMSPAR);
1746
1747 mon_data_ext.flowctrl[i] = 0x00;
1748
1749 if (cflag & CRTSCTS)
1750 mon_data_ext.flowctrl[i] |= 0x03;
1751
1752 if (iflag & (IXON | IXOFF))
1753 mon_data_ext.flowctrl[i] |= 0x0C;
1754
1755 if (port->type == PORT_16550A)
1756 mon_data_ext.fifo[i] = 1;
1757 else
1758 mon_data_ext.fifo[i] = 0;
1759
1760 p = i % 4;
1761 shiftbit = p * 2;
1762 opmode = inb(port->opmode_ioaddr) >> shiftbit;
1763 opmode &= OP_MODE_MASK;
1764
1765 mon_data_ext.iftype[i] = opmode;
1766
1767 }
1768 }
1769 unlock_kernel();
1770 if (copy_to_user(argp, &mon_data_ext,
1771 sizeof(mon_data_ext)))
1772 return -EFAULT;
1773 return 0;
1774 }
1775 default:
1776 return -ENOIOCTLCMD;
1777 }
1778 return 0;
1779 }
1780
1781 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1782 struct async_icount *cprev)
1783 {
1784 struct async_icount cnow;
1785 unsigned long flags;
1786 int ret;
1787
1788 spin_lock_irqsave(&info->slock, flags);
1789 cnow = info->icount; /* atomic copy */
1790 spin_unlock_irqrestore(&info->slock, flags);
1791
1792 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1793 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1794 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1795 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1796
1797 *cprev = cnow;
1798
1799 return ret;
1800 }
1801
1802 static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1803 unsigned int cmd, unsigned long arg)
1804 {
1805 struct mxser_port *info = tty->driver_data;
1806 struct async_icount cnow;
1807 struct serial_icounter_struct __user *p_cuser;
1808 unsigned long flags;
1809 void __user *argp = (void __user *)arg;
1810 int retval;
1811
1812 if (tty->index == MXSER_PORTS)
1813 return mxser_ioctl_special(cmd, argp);
1814
1815 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1816 int p;
1817 unsigned long opmode;
1818 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1819 int shiftbit;
1820 unsigned char val, mask;
1821
1822 p = tty->index % 4;
1823 if (cmd == MOXA_SET_OP_MODE) {
1824 if (get_user(opmode, (int __user *) argp))
1825 return -EFAULT;
1826 if (opmode != RS232_MODE &&
1827 opmode != RS485_2WIRE_MODE &&
1828 opmode != RS422_MODE &&
1829 opmode != RS485_4WIRE_MODE)
1830 return -EFAULT;
1831 lock_kernel();
1832 mask = ModeMask[p];
1833 shiftbit = p * 2;
1834 val = inb(info->opmode_ioaddr);
1835 val &= mask;
1836 val |= (opmode << shiftbit);
1837 outb(val, info->opmode_ioaddr);
1838 unlock_kernel();
1839 } else {
1840 lock_kernel();
1841 shiftbit = p * 2;
1842 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1843 opmode &= OP_MODE_MASK;
1844 unlock_kernel();
1845 if (put_user(opmode, (int __user *)argp))
1846 return -EFAULT;
1847 }
1848 return 0;
1849 }
1850
1851 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1852 test_bit(TTY_IO_ERROR, &tty->flags))
1853 return -EIO;
1854
1855 switch (cmd) {
1856 case TIOCGSERIAL:
1857 lock_kernel();
1858 retval = mxser_get_serial_info(info, argp);
1859 unlock_kernel();
1860 return retval;
1861 case TIOCSSERIAL:
1862 lock_kernel();
1863 retval = mxser_set_serial_info(info, argp);
1864 unlock_kernel();
1865 return retval;
1866 case TIOCSERGETLSR: /* Get line status register */
1867 return mxser_get_lsr_info(info, argp);
1868 /*
1869 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1870 * - mask passed in arg for lines of interest
1871 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1872 * Caller should use TIOCGICOUNT to see which one it was
1873 */
1874 case TIOCMIWAIT:
1875 spin_lock_irqsave(&info->slock, flags);
1876 cnow = info->icount; /* note the counters on entry */
1877 spin_unlock_irqrestore(&info->slock, flags);
1878
1879 return wait_event_interruptible(info->delta_msr_wait,
1880 mxser_cflags_changed(info, arg, &cnow));
1881 /*
1882 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1883 * Return: write counters to the user passed counter struct
1884 * NB: both 1->0 and 0->1 transitions are counted except for
1885 * RI where only 0->1 is counted.
1886 */
1887 case TIOCGICOUNT:
1888 spin_lock_irqsave(&info->slock, flags);
1889 cnow = info->icount;
1890 spin_unlock_irqrestore(&info->slock, flags);
1891 p_cuser = argp;
1892 if (put_user(cnow.frame, &p_cuser->frame))
1893 return -EFAULT;
1894 if (put_user(cnow.brk, &p_cuser->brk))
1895 return -EFAULT;
1896 if (put_user(cnow.overrun, &p_cuser->overrun))
1897 return -EFAULT;
1898 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1899 return -EFAULT;
1900 if (put_user(cnow.parity, &p_cuser->parity))
1901 return -EFAULT;
1902 if (put_user(cnow.rx, &p_cuser->rx))
1903 return -EFAULT;
1904 if (put_user(cnow.tx, &p_cuser->tx))
1905 return -EFAULT;
1906 put_user(cnow.cts, &p_cuser->cts);
1907 put_user(cnow.dsr, &p_cuser->dsr);
1908 put_user(cnow.rng, &p_cuser->rng);
1909 put_user(cnow.dcd, &p_cuser->dcd);
1910 return 0;
1911 case MOXA_HighSpeedOn:
1912 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1913 case MOXA_SDS_RSTICOUNTER:
1914 lock_kernel();
1915 info->mon_data.rxcnt = 0;
1916 info->mon_data.txcnt = 0;
1917 unlock_kernel();
1918 return 0;
1919
1920 case MOXA_ASPP_OQUEUE:{
1921 int len, lsr;
1922
1923 lock_kernel();
1924 len = mxser_chars_in_buffer(tty);
1925 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1926 len += (lsr ? 0 : 1);
1927 unlock_kernel();
1928
1929 return put_user(len, (int __user *)argp);
1930 }
1931 case MOXA_ASPP_MON: {
1932 int mcr, status;
1933
1934 lock_kernel();
1935 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1936 mxser_check_modem_status(info, status);
1937
1938 mcr = inb(info->ioaddr + UART_MCR);
1939 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1940 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1941 else
1942 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1943
1944 if (mcr & MOXA_MUST_MCR_TX_XON)
1945 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1946 else
1947 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1948
1949 if (info->port.tty->hw_stopped)
1950 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1951 else
1952 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1953 unlock_kernel();
1954 if (copy_to_user(argp, &info->mon_data,
1955 sizeof(struct mxser_mon)))
1956 return -EFAULT;
1957
1958 return 0;
1959 }
1960 case MOXA_ASPP_LSTATUS: {
1961 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1962 return -EFAULT;
1963
1964 info->err_shadow = 0;
1965 return 0;
1966 }
1967 case MOXA_SET_BAUD_METHOD: {
1968 int method;
1969
1970 if (get_user(method, (int __user *)argp))
1971 return -EFAULT;
1972 mxser_set_baud_method[tty->index] = method;
1973 return put_user(method, (int __user *)argp);
1974 }
1975 default:
1976 return -ENOIOCTLCMD;
1977 }
1978 return 0;
1979 }
1980
1981 static void mxser_stoprx(struct tty_struct *tty)
1982 {
1983 struct mxser_port *info = tty->driver_data;
1984
1985 info->ldisc_stop_rx = 1;
1986 if (I_IXOFF(tty)) {
1987 if (info->board->chip_flag) {
1988 info->IER &= ~MOXA_MUST_RECV_ISR;
1989 outb(info->IER, info->ioaddr + UART_IER);
1990 } else {
1991 info->x_char = STOP_CHAR(tty);
1992 outb(0, info->ioaddr + UART_IER);
1993 info->IER |= UART_IER_THRI;
1994 outb(info->IER, info->ioaddr + UART_IER);
1995 }
1996 }
1997
1998 if (info->port.tty->termios->c_cflag & CRTSCTS) {
1999 info->MCR &= ~UART_MCR_RTS;
2000 outb(info->MCR, info->ioaddr + UART_MCR);
2001 }
2002 }
2003
2004 /*
2005 * This routine is called by the upper-layer tty layer to signal that
2006 * incoming characters should be throttled.
2007 */
2008 static void mxser_throttle(struct tty_struct *tty)
2009 {
2010 mxser_stoprx(tty);
2011 }
2012
2013 static void mxser_unthrottle(struct tty_struct *tty)
2014 {
2015 struct mxser_port *info = tty->driver_data;
2016
2017 /* startrx */
2018 info->ldisc_stop_rx = 0;
2019 if (I_IXOFF(tty)) {
2020 if (info->x_char)
2021 info->x_char = 0;
2022 else {
2023 if (info->board->chip_flag) {
2024 info->IER |= MOXA_MUST_RECV_ISR;
2025 outb(info->IER, info->ioaddr + UART_IER);
2026 } else {
2027 info->x_char = START_CHAR(tty);
2028 outb(0, info->ioaddr + UART_IER);
2029 info->IER |= UART_IER_THRI;
2030 outb(info->IER, info->ioaddr + UART_IER);
2031 }
2032 }
2033 }
2034
2035 if (info->port.tty->termios->c_cflag & CRTSCTS) {
2036 info->MCR |= UART_MCR_RTS;
2037 outb(info->MCR, info->ioaddr + UART_MCR);
2038 }
2039 }
2040
2041 /*
2042 * mxser_stop() and mxser_start()
2043 *
2044 * This routines are called before setting or resetting tty->stopped.
2045 * They enable or disable transmitter interrupts, as necessary.
2046 */
2047 static void mxser_stop(struct tty_struct *tty)
2048 {
2049 struct mxser_port *info = tty->driver_data;
2050 unsigned long flags;
2051
2052 spin_lock_irqsave(&info->slock, flags);
2053 if (info->IER & UART_IER_THRI) {
2054 info->IER &= ~UART_IER_THRI;
2055 outb(info->IER, info->ioaddr + UART_IER);
2056 }
2057 spin_unlock_irqrestore(&info->slock, flags);
2058 }
2059
2060 static void mxser_start(struct tty_struct *tty)
2061 {
2062 struct mxser_port *info = tty->driver_data;
2063 unsigned long flags;
2064
2065 spin_lock_irqsave(&info->slock, flags);
2066 if (info->xmit_cnt && info->port.xmit_buf) {
2067 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
2068 info->IER |= UART_IER_THRI;
2069 outb(info->IER, info->ioaddr + UART_IER);
2070 }
2071 spin_unlock_irqrestore(&info->slock, flags);
2072 }
2073
2074 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2075 {
2076 struct mxser_port *info = tty->driver_data;
2077 unsigned long flags;
2078
2079 spin_lock_irqsave(&info->slock, flags);
2080 mxser_change_speed(info, old_termios);
2081 spin_unlock_irqrestore(&info->slock, flags);
2082
2083 if ((old_termios->c_cflag & CRTSCTS) &&
2084 !(tty->termios->c_cflag & CRTSCTS)) {
2085 tty->hw_stopped = 0;
2086 mxser_start(tty);
2087 }
2088
2089 /* Handle sw stopped */
2090 if ((old_termios->c_iflag & IXON) &&
2091 !(tty->termios->c_iflag & IXON)) {
2092 tty->stopped = 0;
2093
2094 if (info->board->chip_flag) {
2095 spin_lock_irqsave(&info->slock, flags);
2096 mxser_disable_must_rx_software_flow_control(
2097 info->ioaddr);
2098 spin_unlock_irqrestore(&info->slock, flags);
2099 }
2100
2101 mxser_start(tty);
2102 }
2103 }
2104
2105 /*
2106 * mxser_wait_until_sent() --- wait until the transmitter is empty
2107 */
2108 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
2109 {
2110 struct mxser_port *info = tty->driver_data;
2111 unsigned long orig_jiffies, char_time;
2112 int lsr;
2113
2114 if (info->type == PORT_UNKNOWN)
2115 return;
2116
2117 if (info->xmit_fifo_size == 0)
2118 return; /* Just in case.... */
2119
2120 orig_jiffies = jiffies;
2121 /*
2122 * Set the check interval to be 1/5 of the estimated time to
2123 * send a single character, and make it at least 1. The check
2124 * interval should also be less than the timeout.
2125 *
2126 * Note: we have to use pretty tight timings here to satisfy
2127 * the NIST-PCTS.
2128 */
2129 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2130 char_time = char_time / 5;
2131 if (char_time == 0)
2132 char_time = 1;
2133 if (timeout && timeout < char_time)
2134 char_time = timeout;
2135 /*
2136 * If the transmitter hasn't cleared in twice the approximate
2137 * amount of time to send the entire FIFO, it probably won't
2138 * ever clear. This assumes the UART isn't doing flow
2139 * control, which is currently the case. Hence, if it ever
2140 * takes longer than info->timeout, this is probably due to a
2141 * UART bug of some kind. So, we clamp the timeout parameter at
2142 * 2*info->timeout.
2143 */
2144 if (!timeout || timeout > 2 * info->timeout)
2145 timeout = 2 * info->timeout;
2146 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2147 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2148 timeout, char_time);
2149 printk("jiff=%lu...", jiffies);
2150 #endif
2151 lock_kernel();
2152 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
2153 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2154 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2155 #endif
2156 schedule_timeout_interruptible(char_time);
2157 if (signal_pending(current))
2158 break;
2159 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2160 break;
2161 }
2162 set_current_state(TASK_RUNNING);
2163 unlock_kernel();
2164
2165 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2166 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2167 #endif
2168 }
2169
2170 /*
2171 * This routine is called by tty_hangup() when a hangup is signaled.
2172 */
2173 static void mxser_hangup(struct tty_struct *tty)
2174 {
2175 struct mxser_port *info = tty->driver_data;
2176
2177 mxser_flush_buffer(tty);
2178 mxser_shutdown(info);
2179 info->port.count = 0;
2180 info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
2181 info->port.tty = NULL;
2182 wake_up_interruptible(&info->port.open_wait);
2183 }
2184
2185 /*
2186 * mxser_rs_break() --- routine which turns the break handling on or off
2187 */
2188 static int mxser_rs_break(struct tty_struct *tty, int break_state)
2189 {
2190 struct mxser_port *info = tty->driver_data;
2191 unsigned long flags;
2192
2193 spin_lock_irqsave(&info->slock, flags);
2194 if (break_state == -1)
2195 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2196 info->ioaddr + UART_LCR);
2197 else
2198 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2199 info->ioaddr + UART_LCR);
2200 spin_unlock_irqrestore(&info->slock, flags);
2201 return 0;
2202 }
2203
2204 static void mxser_receive_chars(struct mxser_port *port, int *status)
2205 {
2206 struct tty_struct *tty = port->port.tty;
2207 unsigned char ch, gdl;
2208 int ignored = 0;
2209 int cnt = 0;
2210 int recv_room;
2211 int max = 256;
2212
2213 recv_room = tty->receive_room;
2214 if ((recv_room == 0) && (!port->ldisc_stop_rx))
2215 mxser_stoprx(tty);
2216
2217 if (port->board->chip_flag != MOXA_OTHER_UART) {
2218
2219 if (*status & UART_LSR_SPECIAL)
2220 goto intr_old;
2221 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2222 (*status & MOXA_MUST_LSR_RERR))
2223 goto intr_old;
2224 if (*status & MOXA_MUST_LSR_RERR)
2225 goto intr_old;
2226
2227 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2228
2229 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2230 gdl &= MOXA_MUST_GDL_MASK;
2231 if (gdl >= recv_room) {
2232 if (!port->ldisc_stop_rx)
2233 mxser_stoprx(tty);
2234 }
2235 while (gdl--) {
2236 ch = inb(port->ioaddr + UART_RX);
2237 tty_insert_flip_char(tty, ch, 0);
2238 cnt++;
2239 }
2240 goto end_intr;
2241 }
2242 intr_old:
2243
2244 do {
2245 if (max-- < 0)
2246 break;
2247
2248 ch = inb(port->ioaddr + UART_RX);
2249 if (port->board->chip_flag && (*status & UART_LSR_OE))
2250 outb(0x23, port->ioaddr + UART_FCR);
2251 *status &= port->read_status_mask;
2252 if (*status & port->ignore_status_mask) {
2253 if (++ignored > 100)
2254 break;
2255 } else {
2256 char flag = 0;
2257 if (*status & UART_LSR_SPECIAL) {
2258 if (*status & UART_LSR_BI) {
2259 flag = TTY_BREAK;
2260 port->icount.brk++;
2261
2262 if (port->port.flags & ASYNC_SAK)
2263 do_SAK(tty);
2264 } else if (*status & UART_LSR_PE) {
2265 flag = TTY_PARITY;
2266 port->icount.parity++;
2267 } else if (*status & UART_LSR_FE) {
2268 flag = TTY_FRAME;
2269 port->icount.frame++;
2270 } else if (*status & UART_LSR_OE) {
2271 flag = TTY_OVERRUN;
2272 port->icount.overrun++;
2273 } else
2274 flag = TTY_BREAK;
2275 }
2276 tty_insert_flip_char(tty, ch, flag);
2277 cnt++;
2278 if (cnt >= recv_room) {
2279 if (!port->ldisc_stop_rx)
2280 mxser_stoprx(tty);
2281 break;
2282 }
2283
2284 }
2285
2286 if (port->board->chip_flag)
2287 break;
2288
2289 *status = inb(port->ioaddr + UART_LSR);
2290 } while (*status & UART_LSR_DR);
2291
2292 end_intr:
2293 mxvar_log.rxcnt[port->port.tty->index] += cnt;
2294 port->mon_data.rxcnt += cnt;
2295 port->mon_data.up_rxcnt += cnt;
2296
2297 /*
2298 * We are called from an interrupt context with &port->slock
2299 * being held. Drop it temporarily in order to prevent
2300 * recursive locking.
2301 */
2302 spin_unlock(&port->slock);
2303 tty_flip_buffer_push(tty);
2304 spin_lock(&port->slock);
2305 }
2306
2307 static void mxser_transmit_chars(struct mxser_port *port)
2308 {
2309 int count, cnt;
2310
2311 if (port->x_char) {
2312 outb(port->x_char, port->ioaddr + UART_TX);
2313 port->x_char = 0;
2314 mxvar_log.txcnt[port->port.tty->index]++;
2315 port->mon_data.txcnt++;
2316 port->mon_data.up_txcnt++;
2317 port->icount.tx++;
2318 return;
2319 }
2320
2321 if (port->port.xmit_buf == NULL)
2322 return;
2323
2324 if ((port->xmit_cnt <= 0) || port->port.tty->stopped ||
2325 (port->port.tty->hw_stopped &&
2326 (port->type != PORT_16550A) &&
2327 (!port->board->chip_flag))) {
2328 port->IER &= ~UART_IER_THRI;
2329 outb(port->IER, port->ioaddr + UART_IER);
2330 return;
2331 }
2332
2333 cnt = port->xmit_cnt;
2334 count = port->xmit_fifo_size;
2335 do {
2336 outb(port->port.xmit_buf[port->xmit_tail++],
2337 port->ioaddr + UART_TX);
2338 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2339 if (--port->xmit_cnt <= 0)
2340 break;
2341 } while (--count > 0);
2342 mxvar_log.txcnt[port->port.tty->index] += (cnt - port->xmit_cnt);
2343
2344 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2345 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2346 port->icount.tx += (cnt - port->xmit_cnt);
2347
2348 if (port->xmit_cnt < WAKEUP_CHARS)
2349 tty_wakeup(port->port.tty);
2350
2351 if (port->xmit_cnt <= 0) {
2352 port->IER &= ~UART_IER_THRI;
2353 outb(port->IER, port->ioaddr + UART_IER);
2354 }
2355 }
2356
2357 /*
2358 * This is the serial driver's generic interrupt routine
2359 */
2360 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
2361 {
2362 int status, iir, i;
2363 struct mxser_board *brd = NULL;
2364 struct mxser_port *port;
2365 int max, irqbits, bits, msr;
2366 unsigned int int_cnt, pass_counter = 0;
2367 int handled = IRQ_NONE;
2368
2369 for (i = 0; i < MXSER_BOARDS; i++)
2370 if (dev_id == &mxser_boards[i]) {
2371 brd = dev_id;
2372 break;
2373 }
2374
2375 if (i == MXSER_BOARDS)
2376 goto irq_stop;
2377 if (brd == NULL)
2378 goto irq_stop;
2379 max = brd->info->nports;
2380 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2381 irqbits = inb(brd->vector) & brd->vector_mask;
2382 if (irqbits == brd->vector_mask)
2383 break;
2384
2385 handled = IRQ_HANDLED;
2386 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2387 if (irqbits == brd->vector_mask)
2388 break;
2389 if (bits & irqbits)
2390 continue;
2391 port = &brd->ports[i];
2392
2393 int_cnt = 0;
2394 spin_lock(&port->slock);
2395 do {
2396 iir = inb(port->ioaddr + UART_IIR);
2397 if (iir & UART_IIR_NO_INT)
2398 break;
2399 iir &= MOXA_MUST_IIR_MASK;
2400 if (!port->port.tty ||
2401 (port->port.flags & ASYNC_CLOSING) ||
2402 !(port->port.flags &
2403 ASYNC_INITIALIZED)) {
2404 status = inb(port->ioaddr + UART_LSR);
2405 outb(0x27, port->ioaddr + UART_FCR);
2406 inb(port->ioaddr + UART_MSR);
2407 break;
2408 }
2409
2410 status = inb(port->ioaddr + UART_LSR);
2411
2412 if (status & UART_LSR_PE)
2413 port->err_shadow |= NPPI_NOTIFY_PARITY;
2414 if (status & UART_LSR_FE)
2415 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2416 if (status & UART_LSR_OE)
2417 port->err_shadow |=
2418 NPPI_NOTIFY_HW_OVERRUN;
2419 if (status & UART_LSR_BI)
2420 port->err_shadow |= NPPI_NOTIFY_BREAK;
2421
2422 if (port->board->chip_flag) {
2423 if (iir == MOXA_MUST_IIR_GDA ||
2424 iir == MOXA_MUST_IIR_RDA ||
2425 iir == MOXA_MUST_IIR_RTO ||
2426 iir == MOXA_MUST_IIR_LSR)
2427 mxser_receive_chars(port,
2428 &status);
2429
2430 } else {
2431 status &= port->read_status_mask;
2432 if (status & UART_LSR_DR)
2433 mxser_receive_chars(port,
2434 &status);
2435 }
2436 msr = inb(port->ioaddr + UART_MSR);
2437 if (msr & UART_MSR_ANY_DELTA)
2438 mxser_check_modem_status(port, msr);
2439
2440 if (port->board->chip_flag) {
2441 if (iir == 0x02 && (status &
2442 UART_LSR_THRE))
2443 mxser_transmit_chars(port);
2444 } else {
2445 if (status & UART_LSR_THRE)
2446 mxser_transmit_chars(port);
2447 }
2448 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2449 spin_unlock(&port->slock);
2450 }
2451 }
2452
2453 irq_stop:
2454 return handled;
2455 }
2456
2457 static const struct tty_operations mxser_ops = {
2458 .open = mxser_open,
2459 .close = mxser_close,
2460 .write = mxser_write,
2461 .put_char = mxser_put_char,
2462 .flush_chars = mxser_flush_chars,
2463 .write_room = mxser_write_room,
2464 .chars_in_buffer = mxser_chars_in_buffer,
2465 .flush_buffer = mxser_flush_buffer,
2466 .ioctl = mxser_ioctl,
2467 .throttle = mxser_throttle,
2468 .unthrottle = mxser_unthrottle,
2469 .set_termios = mxser_set_termios,
2470 .stop = mxser_stop,
2471 .start = mxser_start,
2472 .hangup = mxser_hangup,
2473 .break_ctl = mxser_rs_break,
2474 .wait_until_sent = mxser_wait_until_sent,
2475 .tiocmget = mxser_tiocmget,
2476 .tiocmset = mxser_tiocmset,
2477 };
2478
2479 /*
2480 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2481 */
2482
2483 static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2484 unsigned int irq)
2485 {
2486 if (irq)
2487 free_irq(brd->irq, brd);
2488 if (pdev != NULL) { /* PCI */
2489 #ifdef CONFIG_PCI
2490 pci_release_region(pdev, 2);
2491 pci_release_region(pdev, 3);
2492 #endif
2493 } else {
2494 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2495 release_region(brd->vector, 1);
2496 }
2497 }
2498
2499 static int __devinit mxser_initbrd(struct mxser_board *brd,
2500 struct pci_dev *pdev)
2501 {
2502 struct mxser_port *info;
2503 unsigned int i;
2504 int retval;
2505
2506 printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud);
2507
2508 for (i = 0; i < brd->info->nports; i++) {
2509 info = &brd->ports[i];
2510 tty_port_init(&info->port);
2511 info->board = brd;
2512 info->stop_rx = 0;
2513 info->ldisc_stop_rx = 0;
2514
2515 /* Enhance mode enabled here */
2516 if (brd->chip_flag != MOXA_OTHER_UART)
2517 mxser_enable_must_enchance_mode(info->ioaddr);
2518
2519 info->port.flags = ASYNC_SHARE_IRQ;
2520 info->type = brd->uart_type;
2521
2522 process_txrx_fifo(info);
2523
2524 info->custom_divisor = info->baud_base * 16;
2525 info->port.close_delay = 5 * HZ / 10;
2526 info->port.closing_wait = 30 * HZ;
2527 info->normal_termios = mxvar_sdriver->init_termios;
2528 init_waitqueue_head(&info->delta_msr_wait);
2529 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2530 info->err_shadow = 0;
2531 spin_lock_init(&info->slock);
2532
2533 /* before set INT ISR, disable all int */
2534 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2535 info->ioaddr + UART_IER);
2536 }
2537
2538 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2539 brd);
2540 if (retval) {
2541 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2542 "conflict with another device.\n",
2543 brd->info->name, brd->irq);
2544 /* We hold resources, we need to release them. */
2545 mxser_release_res(brd, pdev, 0);
2546 }
2547 return retval;
2548 }
2549
2550 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
2551 {
2552 int id, i, bits;
2553 unsigned short regs[16], irq;
2554 unsigned char scratch, scratch2;
2555
2556 brd->chip_flag = MOXA_OTHER_UART;
2557
2558 id = mxser_read_register(cap, regs);
2559 switch (id) {
2560 case C168_ASIC_ID:
2561 brd->info = &mxser_cards[0];
2562 break;
2563 case C104_ASIC_ID:
2564 brd->info = &mxser_cards[1];
2565 break;
2566 case CI104J_ASIC_ID:
2567 brd->info = &mxser_cards[2];
2568 break;
2569 case C102_ASIC_ID:
2570 brd->info = &mxser_cards[5];
2571 break;
2572 case CI132_ASIC_ID:
2573 brd->info = &mxser_cards[6];
2574 break;
2575 case CI134_ASIC_ID:
2576 brd->info = &mxser_cards[7];
2577 break;
2578 default:
2579 return 0;
2580 }
2581
2582 irq = 0;
2583 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2584 Flag-hack checks if configuration should be read as 2-port here. */
2585 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
2586 irq = regs[9] & 0xF000;
2587 irq = irq | (irq >> 4);
2588 if (irq != (regs[9] & 0xFF00))
2589 return MXSER_ERR_IRQ_CONFLIT;
2590 } else if (brd->info->nports == 4) {
2591 irq = regs[9] & 0xF000;
2592 irq = irq | (irq >> 4);
2593 irq = irq | (irq >> 8);
2594 if (irq != regs[9])
2595 return MXSER_ERR_IRQ_CONFLIT;
2596 } else if (brd->info->nports == 8) {
2597 irq = regs[9] & 0xF000;
2598 irq = irq | (irq >> 4);
2599 irq = irq | (irq >> 8);
2600 if ((irq != regs[9]) || (irq != regs[10]))
2601 return MXSER_ERR_IRQ_CONFLIT;
2602 }
2603
2604 if (!irq)
2605 return MXSER_ERR_IRQ;
2606 brd->irq = ((int)(irq & 0xF000) >> 12);
2607 for (i = 0; i < 8; i++)
2608 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2609 if ((regs[12] & 0x80) == 0)
2610 return MXSER_ERR_VECTOR;
2611 brd->vector = (int)regs[11]; /* interrupt vector */
2612 if (id == 1)
2613 brd->vector_mask = 0x00FF;
2614 else
2615 brd->vector_mask = 0x000F;
2616 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2617 if (regs[12] & bits) {
2618 brd->ports[i].baud_base = 921600;
2619 brd->ports[i].max_baud = 921600;
2620 } else {
2621 brd->ports[i].baud_base = 115200;
2622 brd->ports[i].max_baud = 115200;
2623 }
2624 }
2625 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2626 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2627 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2628 outb(scratch2, cap + UART_LCR);
2629 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2630 scratch = inb(cap + UART_IIR);
2631
2632 if (scratch & 0xC0)
2633 brd->uart_type = PORT_16550A;
2634 else
2635 brd->uart_type = PORT_16450;
2636 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2637 "mxser(IO)"))
2638 return MXSER_ERR_IOADDR;
2639 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2640 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2641 return MXSER_ERR_VECTOR;
2642 }
2643 return brd->info->nports;
2644 }
2645
2646 static int __devinit mxser_probe(struct pci_dev *pdev,
2647 const struct pci_device_id *ent)
2648 {
2649 #ifdef CONFIG_PCI
2650 struct mxser_board *brd;
2651 unsigned int i, j;
2652 unsigned long ioaddress;
2653 int retval = -EINVAL;
2654
2655 for (i = 0; i < MXSER_BOARDS; i++)
2656 if (mxser_boards[i].info == NULL)
2657 break;
2658
2659 if (i >= MXSER_BOARDS) {
2660 printk(KERN_ERR "Too many Smartio/Industio family boards found "
2661 "(maximum %d), board not configured\n", MXSER_BOARDS);
2662 goto err;
2663 }
2664
2665 brd = &mxser_boards[i];
2666 brd->idx = i * MXSER_PORTS_PER_BOARD;
2667 printk(KERN_INFO "Found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2668 mxser_cards[ent->driver_data].name,
2669 pdev->bus->number, PCI_SLOT(pdev->devfn));
2670
2671 retval = pci_enable_device(pdev);
2672 if (retval) {
2673 printk(KERN_ERR "Moxa SmartI/O PCI enable fail !\n");
2674 goto err;
2675 }
2676
2677 /* io address */
2678 ioaddress = pci_resource_start(pdev, 2);
2679 retval = pci_request_region(pdev, 2, "mxser(IO)");
2680 if (retval)
2681 goto err;
2682
2683 brd->info = &mxser_cards[ent->driver_data];
2684 for (i = 0; i < brd->info->nports; i++)
2685 brd->ports[i].ioaddr = ioaddress + 8 * i;
2686
2687 /* vector */
2688 ioaddress = pci_resource_start(pdev, 3);
2689 retval = pci_request_region(pdev, 3, "mxser(vector)");
2690 if (retval)
2691 goto err_relio;
2692 brd->vector = ioaddress;
2693
2694 /* irq */
2695 brd->irq = pdev->irq;
2696
2697 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2698 brd->uart_type = PORT_16550A;
2699 brd->vector_mask = 0;
2700
2701 for (i = 0; i < brd->info->nports; i++) {
2702 for (j = 0; j < UART_INFO_NUM; j++) {
2703 if (Gpci_uart_info[j].type == brd->chip_flag) {
2704 brd->ports[i].max_baud =
2705 Gpci_uart_info[j].max_baud;
2706
2707 /* exception....CP-102 */
2708 if (brd->info->flags & MXSER_HIGHBAUD)
2709 brd->ports[i].max_baud = 921600;
2710 break;
2711 }
2712 }
2713 }
2714
2715 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2716 for (i = 0; i < brd->info->nports; i++) {
2717 if (i < 4)
2718 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2719 else
2720 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2721 }
2722 outb(0, ioaddress + 4); /* default set to RS232 mode */
2723 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2724 }
2725
2726 for (i = 0; i < brd->info->nports; i++) {
2727 brd->vector_mask |= (1 << i);
2728 brd->ports[i].baud_base = 921600;
2729 }
2730
2731 /* mxser_initbrd will hook ISR. */
2732 retval = mxser_initbrd(brd, pdev);
2733 if (retval)
2734 goto err_null;
2735
2736 for (i = 0; i < brd->info->nports; i++)
2737 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2738
2739 pci_set_drvdata(pdev, brd);
2740
2741 return 0;
2742 err_relio:
2743 pci_release_region(pdev, 2);
2744 err_null:
2745 brd->info = NULL;
2746 err:
2747 return retval;
2748 #else
2749 return -ENODEV;
2750 #endif
2751 }
2752
2753 static void __devexit mxser_remove(struct pci_dev *pdev)
2754 {
2755 struct mxser_board *brd = pci_get_drvdata(pdev);
2756 unsigned int i;
2757
2758 for (i = 0; i < brd->info->nports; i++)
2759 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2760
2761 mxser_release_res(brd, pdev, 1);
2762 brd->info = NULL;
2763 }
2764
2765 static struct pci_driver mxser_driver = {
2766 .name = "mxser",
2767 .id_table = mxser_pcibrds,
2768 .probe = mxser_probe,
2769 .remove = __devexit_p(mxser_remove)
2770 };
2771
2772 static int __init mxser_module_init(void)
2773 {
2774 struct mxser_board *brd;
2775 unsigned long cap;
2776 unsigned int i, m, isaloop;
2777 int retval, b;
2778
2779 pr_debug("Loading module mxser ...\n");
2780
2781 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2782 if (!mxvar_sdriver)
2783 return -ENOMEM;
2784
2785 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2786 MXSER_VERSION);
2787
2788 /* Initialize the tty_driver structure */
2789 mxvar_sdriver->owner = THIS_MODULE;
2790 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2791 mxvar_sdriver->name = "ttyMI";
2792 mxvar_sdriver->major = ttymajor;
2793 mxvar_sdriver->minor_start = 0;
2794 mxvar_sdriver->num = MXSER_PORTS + 1;
2795 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2796 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2797 mxvar_sdriver->init_termios = tty_std_termios;
2798 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2799 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2800 tty_set_operations(mxvar_sdriver, &mxser_ops);
2801
2802 retval = tty_register_driver(mxvar_sdriver);
2803 if (retval) {
2804 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2805 "tty driver !\n");
2806 goto err_put;
2807 }
2808
2809 mxvar_diagflag = 0;
2810
2811 m = 0;
2812 /* Start finding ISA boards here */
2813 for (isaloop = 0; isaloop < 2; isaloop++)
2814 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
2815 if (!isaloop)
2816 cap = mxserBoardCAP[b]; /* predefined */
2817 else
2818 cap = ioaddr[b]; /* module param */
2819
2820 if (!cap)
2821 continue;
2822
2823 brd = &mxser_boards[m];
2824 retval = mxser_get_ISA_conf(cap, brd);
2825
2826 if (retval != 0)
2827 printk(KERN_INFO "Found MOXA %s board "
2828 "(CAP=0x%x)\n",
2829 brd->info->name, ioaddr[b]);
2830
2831 if (retval <= 0) {
2832 if (retval == MXSER_ERR_IRQ)
2833 printk(KERN_ERR "Invalid interrupt "
2834 "number, board not "
2835 "configured\n");
2836 else if (retval == MXSER_ERR_IRQ_CONFLIT)
2837 printk(KERN_ERR "Invalid interrupt "
2838 "number, board not "
2839 "configured\n");
2840 else if (retval == MXSER_ERR_VECTOR)
2841 printk(KERN_ERR "Invalid interrupt "
2842 "vector, board not "
2843 "configured\n");
2844 else if (retval == MXSER_ERR_IOADDR)
2845 printk(KERN_ERR "Invalid I/O address, "
2846 "board not configured\n");
2847
2848 brd->info = NULL;
2849 continue;
2850 }
2851
2852 /* mxser_initbrd will hook ISR. */
2853 if (mxser_initbrd(brd, NULL) < 0) {
2854 brd->info = NULL;
2855 continue;
2856 }
2857
2858 brd->idx = m * MXSER_PORTS_PER_BOARD;
2859 for (i = 0; i < brd->info->nports; i++)
2860 tty_register_device(mxvar_sdriver, brd->idx + i,
2861 NULL);
2862
2863 m++;
2864 }
2865
2866 retval = pci_register_driver(&mxser_driver);
2867 if (retval) {
2868 printk(KERN_ERR "Can't register pci driver\n");
2869 if (!m) {
2870 retval = -ENODEV;
2871 goto err_unr;
2872 } /* else: we have some ISA cards under control */
2873 }
2874
2875 pr_debug("Done.\n");
2876
2877 return 0;
2878 err_unr:
2879 tty_unregister_driver(mxvar_sdriver);
2880 err_put:
2881 put_tty_driver(mxvar_sdriver);
2882 return retval;
2883 }
2884
2885 static void __exit mxser_module_exit(void)
2886 {
2887 unsigned int i, j;
2888
2889 pr_debug("Unloading module mxser ...\n");
2890
2891 pci_unregister_driver(&mxser_driver);
2892
2893 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2894 if (mxser_boards[i].info != NULL)
2895 for (j = 0; j < mxser_boards[i].info->nports; j++)
2896 tty_unregister_device(mxvar_sdriver,
2897 mxser_boards[i].idx + j);
2898 tty_unregister_driver(mxvar_sdriver);
2899 put_tty_driver(mxvar_sdriver);
2900
2901 for (i = 0; i < MXSER_BOARDS; i++)
2902 if (mxser_boards[i].info != NULL)
2903 mxser_release_res(&mxser_boards[i], NULL, 1);
2904
2905 pr_debug("Done.\n");
2906 }
2907
2908 module_init(mxser_module_init);
2909 module_exit(mxser_module_exit);
Linux 2.6 libata-dev (mirror)