4 * This provides a low-level interface to the hardware's Debug Store
5 * feature that is used for last branch recording (LBR) and
6 * precise-event based sampling (PEBS).
8 * Different architectures use a different DS layout/pointer size.
9 * The below functions therefore work on a void*.
12 * Since there is no user for PEBS, yet, only LBR (or branch
13 * trace store, BTS) is supported.
16 * Copyright (C) 2007 Intel Corporation.
17 * Markus Metzger <markus.t.metzger@intel.com>, Dec 2007
22 #include <linux/errno.h>
23 #include <linux/string.h>
24 #include <linux/slab.h>
28 * Debug Store (DS) save area configuration (see Intel64 and IA32
29 * Architectures Software Developer's Manual, section 18.5)
31 * The DS configuration consists of the following fields; different
32 * architetures vary in the size of those fields.
33 * - double-word aligned base linear address of the BTS buffer
34 * - write pointer into the BTS buffer
35 * - end linear address of the BTS buffer (one byte beyond the end of
37 * - interrupt pointer into BTS buffer
38 * (interrupt occurs when write pointer passes interrupt pointer)
39 * - double-word aligned base linear address of the PEBS buffer
40 * - write pointer into the PEBS buffer
41 * - end linear address of the PEBS buffer (one byte beyond the end of
43 * - interrupt pointer into PEBS buffer
44 * (interrupt occurs when write pointer passes interrupt pointer)
45 * - value to which counter is reset following counter overflow
47 * On later architectures, the last branch recording hardware uses
48 * 64bit pointers even in 32bit mode.
51 * Branch Trace Store (BTS) records store information about control
52 * flow changes. They at least provide the following information:
53 * - source linear address
54 * - destination linear address
56 * Netburst supported a predicated bit that had been dropped in later
57 * architectures. We do not suppor it.
60 * In order to abstract from the actual DS and BTS layout, we describe
61 * the access to the relevant fields.
62 * Thanks to Andi Kleen for proposing this design.
64 * The implementation, however, is not as general as it might seem. In
65 * order to stay somewhat simple and efficient, we assume an
66 * underlying unsigned type (mostly a pointer type) and we expect the
67 * field to be at least as big as that type.
71 * A special from_ip address to indicate that the BTS record is an
72 * info record that needs to be interpreted or skipped.
74 #define BTS_ESCAPE_ADDRESS (-1)
77 * A field access descriptor
85 * The configuration for a particular DS/BTS hardware implementation.
87 struct ds_configuration
{
88 /* the DS configuration */
89 unsigned char sizeof_ds
;
90 struct access_desc bts_buffer_base
;
91 struct access_desc bts_index
;
92 struct access_desc bts_absolute_maximum
;
93 struct access_desc bts_interrupt_threshold
;
94 /* the BTS configuration */
95 unsigned char sizeof_bts
;
96 struct access_desc from_ip
;
97 struct access_desc to_ip
;
98 /* BTS variants used to store additional information like
100 struct access_desc info_type
;
101 struct access_desc info_data
;
102 unsigned long debugctl_mask
;
106 * The global configuration used by the below accessor functions
108 static struct ds_configuration ds_cfg
;
111 * Accessor functions for some DS and BTS fields using the above
112 * global ptrace_bts_cfg.
114 static inline void *get_bts_buffer_base(char *base
)
116 return *(void **)(base
+ ds_cfg
.bts_buffer_base
.offset
);
118 static inline void set_bts_buffer_base(char *base
, void *value
)
120 (*(void **)(base
+ ds_cfg
.bts_buffer_base
.offset
)) = value
;
122 static inline void *get_bts_index(char *base
)
124 return *(void **)(base
+ ds_cfg
.bts_index
.offset
);
126 static inline void set_bts_index(char *base
, void *value
)
128 (*(void **)(base
+ ds_cfg
.bts_index
.offset
)) = value
;
130 static inline void *get_bts_absolute_maximum(char *base
)
132 return *(void **)(base
+ ds_cfg
.bts_absolute_maximum
.offset
);
134 static inline void set_bts_absolute_maximum(char *base
, void *value
)
136 (*(void **)(base
+ ds_cfg
.bts_absolute_maximum
.offset
)) = value
;
138 static inline void *get_bts_interrupt_threshold(char *base
)
140 return *(void **)(base
+ ds_cfg
.bts_interrupt_threshold
.offset
);
142 static inline void set_bts_interrupt_threshold(char *base
, void *value
)
144 (*(void **)(base
+ ds_cfg
.bts_interrupt_threshold
.offset
)) = value
;
146 static inline long get_from_ip(char *base
)
148 return *(long *)(base
+ ds_cfg
.from_ip
.offset
);
150 static inline void set_from_ip(char *base
, long value
)
152 (*(long *)(base
+ ds_cfg
.from_ip
.offset
)) = value
;
154 static inline long get_to_ip(char *base
)
156 return *(long *)(base
+ ds_cfg
.to_ip
.offset
);
158 static inline void set_to_ip(char *base
, long value
)
160 (*(long *)(base
+ ds_cfg
.to_ip
.offset
)) = value
;
162 static inline unsigned char get_info_type(char *base
)
164 return *(unsigned char *)(base
+ ds_cfg
.info_type
.offset
);
166 static inline void set_info_type(char *base
, unsigned char value
)
168 (*(unsigned char *)(base
+ ds_cfg
.info_type
.offset
)) = value
;
171 * The info data might overlap with the info type on some architectures.
172 * We therefore read and write the exact number of bytes.
174 static inline unsigned long long get_info_data(char *base
)
176 unsigned long long value
= 0;
178 base
+ ds_cfg
.info_data
.offset
,
179 ds_cfg
.info_data
.size
);
182 static inline void set_info_data(char *base
, unsigned long long value
)
184 memcpy(base
+ ds_cfg
.info_data
.offset
,
186 ds_cfg
.info_data
.size
);
190 int ds_allocate(void **dsp
, size_t bts_size_in_records
)
192 size_t bts_size_in_bytes
= 0;
196 if (!ds_cfg
.sizeof_ds
|| !ds_cfg
.sizeof_bts
)
199 if (bts_size_in_records
< 0)
203 bts_size_in_records
* ds_cfg
.sizeof_bts
;
205 if (bts_size_in_bytes
<= 0)
208 bts
= kzalloc(bts_size_in_bytes
, GFP_KERNEL
);
213 ds
= kzalloc(ds_cfg
.sizeof_ds
, GFP_KERNEL
);
220 set_bts_buffer_base(ds
, bts
);
221 set_bts_index(ds
, bts
);
222 set_bts_absolute_maximum(ds
, bts
+ bts_size_in_bytes
);
223 set_bts_interrupt_threshold(ds
, bts
+ bts_size_in_bytes
+ 1);
229 int ds_free(void **dsp
)
232 kfree(get_bts_buffer_base(*dsp
));
239 int ds_get_bts_size(void *ds
)
241 size_t size_in_bytes
;
243 if (!ds_cfg
.sizeof_ds
|| !ds_cfg
.sizeof_bts
)
247 get_bts_absolute_maximum(ds
) -
248 get_bts_buffer_base(ds
);
250 return size_in_bytes
/ ds_cfg
.sizeof_bts
;
253 int ds_get_bts_index(void *ds
)
255 size_t index_offset_in_bytes
;
257 if (!ds_cfg
.sizeof_ds
|| !ds_cfg
.sizeof_bts
)
260 index_offset_in_bytes
=
262 get_bts_buffer_base(ds
);
264 return index_offset_in_bytes
/ ds_cfg
.sizeof_bts
;
267 int ds_read_bts(void *ds
, size_t index
, struct bts_struct
*out
)
271 if (!ds_cfg
.sizeof_ds
|| !ds_cfg
.sizeof_bts
)
277 if (index
>= ds_get_bts_size(ds
))
280 bts
= get_bts_buffer_base(ds
);
281 bts
= (char *)bts
+ (index
* ds_cfg
.sizeof_bts
);
283 memset(out
, 0, sizeof(*out
));
284 if (get_from_ip(bts
) == BTS_ESCAPE_ADDRESS
) {
285 out
->qualifier
= get_info_type(bts
);
286 out
->variant
.timestamp
= get_info_data(bts
);
288 out
->qualifier
= BTS_BRANCH
;
289 out
->variant
.lbr
.from_ip
= get_from_ip(bts
);
290 out
->variant
.lbr
.to_ip
= get_to_ip(bts
);
296 int ds_write_bts(void *ds
, const struct bts_struct
*in
)
300 if (!ds_cfg
.sizeof_ds
|| !ds_cfg
.sizeof_bts
)
303 if (ds_get_bts_size(ds
) <= 0)
306 bts
= get_bts_index(ds
);
308 memset(bts
, 0, ds_cfg
.sizeof_bts
);
309 switch (in
->qualifier
) {
314 set_from_ip(bts
, in
->variant
.lbr
.from_ip
);
315 set_to_ip(bts
, in
->variant
.lbr
.to_ip
);
318 case BTS_TASK_ARRIVES
:
319 case BTS_TASK_DEPARTS
:
320 set_from_ip(bts
, BTS_ESCAPE_ADDRESS
);
321 set_info_type(bts
, in
->qualifier
);
322 set_info_data(bts
, in
->variant
.timestamp
);
329 bts
= (char *)bts
+ ds_cfg
.sizeof_bts
;
330 if (bts
>= get_bts_absolute_maximum(ds
))
331 bts
= get_bts_buffer_base(ds
);
332 set_bts_index(ds
, bts
);
337 unsigned long ds_debugctl_mask(void)
339 return ds_cfg
.debugctl_mask
;
343 static const struct ds_configuration ds_cfg_netburst
= {
345 .bts_buffer_base
= { 0, 4 },
346 .bts_index
= { 4, 4 },
347 .bts_absolute_maximum
= { 8, 4 },
348 .bts_interrupt_threshold
= { 12, 4 },
352 .info_type
= { 4, 1 },
353 .info_data
= { 5, 7 },
354 .debugctl_mask
= (1<<2)|(1<<3)
357 static const struct ds_configuration ds_cfg_pentium_m
= {
359 .bts_buffer_base
= { 0, 4 },
360 .bts_index
= { 4, 4 },
361 .bts_absolute_maximum
= { 8, 4 },
362 .bts_interrupt_threshold
= { 12, 4 },
366 .info_type
= { 4, 1 },
367 .info_data
= { 5, 7 },
368 .debugctl_mask
= (1<<6)|(1<<7)
372 static const struct ds_configuration ds_cfg_core2
= {
374 .bts_buffer_base
= { 0, 8 },
375 .bts_index
= { 8, 8 },
376 .bts_absolute_maximum
= { 16, 8 },
377 .bts_interrupt_threshold
= { 24, 8 },
381 .info_type
= { 8, 1 },
382 .info_data
= { 9, 7 },
383 .debugctl_mask
= (1<<6)|(1<<7)|(1<<9)
387 ds_configure(const struct ds_configuration
*cfg
)
392 void __cpuinit
ds_init_intel(struct cpuinfo_x86
*c
)
396 switch (c
->x86_model
) {
399 case 0xE: /* Pentium M */
400 ds_configure(&ds_cfg_pentium_m
);
403 case 0xF: /* Core2 */
404 ds_configure(&ds_cfg_core2
);
407 /* sorry, don't know about them */
412 switch (c
->x86_model
) {
416 case 0x2: /* Netburst */
417 ds_configure(&ds_cfg_netburst
);
421 /* sorry, don't know about them */
426 /* sorry, don't know about them */