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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[linux-2.6/libata-dev.git] / drivers / net / ethernet / broadcom / bnx2x / bnx2x_cmn.c
blob518ec5c6872dae8bcd774aac86789193a1394b90
1 /* bnx2x_cmn.c: Broadcom Everest network driver.
2 *
3 * Copyright (c) 2007-2012 Broadcom Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
10 * Written by: Eliezer Tamir
11 * Based on code from Michael Chan's bnx2 driver
12 * UDP CSUM errata workaround by Arik Gendelman
13 * Slowpath and fastpath rework by Vladislav Zolotarov
14 * Statistics and Link management by Yitchak Gertner
15 *
16 */
17
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
20 #include <linux/etherdevice.h>
21 #include <linux/if_vlan.h>
22 #include <linux/interrupt.h>
23 #include <linux/ip.h>
24 #include <net/ipv6.h>
25 #include <net/ip6_checksum.h>
26 #include <linux/firmware.h>
27 #include <linux/prefetch.h>
28 #include "bnx2x_cmn.h"
29 #include "bnx2x_init.h"
30 #include "bnx2x_sp.h"
31
32
33
34 /**
35 * bnx2x_bz_fp - zero content of the fastpath structure.
36 *
37 * @bp: driver handle
38 * @index: fastpath index to be zeroed
39 *
40 * Makes sure the contents of the bp->fp[index].napi is kept
41 * intact.
42 */
43 static inline void bnx2x_bz_fp(struct bnx2x *bp, int index)
44 {
45 struct bnx2x_fastpath *fp = &bp->fp[index];
46 struct napi_struct orig_napi = fp->napi;
47 /* bzero bnx2x_fastpath contents */
48 memset(fp, 0, sizeof(*fp));
49
50 /* Restore the NAPI object as it has been already initialized */
51 fp->napi = orig_napi;
52
53 fp->bp = bp;
54 fp->index = index;
55 if (IS_ETH_FP(fp))
56 fp->max_cos = bp->max_cos;
57 else
58 /* Special queues support only one CoS */
59 fp->max_cos = 1;
60
61 /*
62 * set the tpa flag for each queue. The tpa flag determines the queue
63 * minimal size so it must be set prior to queue memory allocation
64 */
65 fp->disable_tpa = ((bp->flags & TPA_ENABLE_FLAG) == 0);
66
67 #ifdef BCM_CNIC
68 /* We don't want TPA on an FCoE L2 ring */
69 if (IS_FCOE_FP(fp))
70 fp->disable_tpa = 1;
71 #endif
72 }
73
74 /**
75 * bnx2x_move_fp - move content of the fastpath structure.
76 *
77 * @bp: driver handle
78 * @from: source FP index
79 * @to: destination FP index
80 *
81 * Makes sure the contents of the bp->fp[to].napi is kept
82 * intact. This is done by first copying the napi struct from
83 * the target to the source, and then mem copying the entire
84 * source onto the target
85 */
86 static inline void bnx2x_move_fp(struct bnx2x *bp, int from, int to)
87 {
88 struct bnx2x_fastpath *from_fp = &bp->fp[from];
89 struct bnx2x_fastpath *to_fp = &bp->fp[to];
90
91 /* Copy the NAPI object as it has been already initialized */
92 from_fp->napi = to_fp->napi;
93
94 /* Move bnx2x_fastpath contents */
95 memcpy(to_fp, from_fp, sizeof(*to_fp));
96 to_fp->index = to;
97 }
98
99 int load_count[2][3] = { {0} }; /* per-path: 0-common, 1-port0, 2-port1 */
100
101 /* free skb in the packet ring at pos idx
102 * return idx of last bd freed
103 */
104 static u16 bnx2x_free_tx_pkt(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata,
105 u16 idx, unsigned int *pkts_compl,
106 unsigned int *bytes_compl)
107 {
108 struct sw_tx_bd *tx_buf = &txdata->tx_buf_ring[idx];
109 struct eth_tx_start_bd *tx_start_bd;
110 struct eth_tx_bd *tx_data_bd;
111 struct sk_buff *skb = tx_buf->skb;
112 u16 bd_idx = TX_BD(tx_buf->first_bd), new_cons;
113 int nbd;
114
115 /* prefetch skb end pointer to speedup dev_kfree_skb() */
116 prefetch(&skb->end);
117
118 DP(BNX2X_MSG_FP, "fp[%d]: pkt_idx %d buff @(%p)->skb %p\n",
119 txdata->txq_index, idx, tx_buf, skb);
120
121 /* unmap first bd */
122 DP(BNX2X_MSG_OFF, "free bd_idx %d\n", bd_idx);
123 tx_start_bd = &txdata->tx_desc_ring[bd_idx].start_bd;
124 dma_unmap_single(&bp->pdev->dev, BD_UNMAP_ADDR(tx_start_bd),
125 BD_UNMAP_LEN(tx_start_bd), DMA_TO_DEVICE);
126
127
128 nbd = le16_to_cpu(tx_start_bd->nbd) - 1;
129 #ifdef BNX2X_STOP_ON_ERROR
130 if ((nbd - 1) > (MAX_SKB_FRAGS + 2)) {
131 BNX2X_ERR("BAD nbd!\n");
132 bnx2x_panic();
133 }
134 #endif
135 new_cons = nbd + tx_buf->first_bd;
136
137 /* Get the next bd */
138 bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
139
140 /* Skip a parse bd... */
141 --nbd;
142 bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
143
144 /* ...and the TSO split header bd since they have no mapping */
145 if (tx_buf->flags & BNX2X_TSO_SPLIT_BD) {
146 --nbd;
147 bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
148 }
149
150 /* now free frags */
151 while (nbd > 0) {
152
153 DP(BNX2X_MSG_OFF, "free frag bd_idx %d\n", bd_idx);
154 tx_data_bd = &txdata->tx_desc_ring[bd_idx].reg_bd;
155 dma_unmap_page(&bp->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
156 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
157 if (--nbd)
158 bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
159 }
160
161 /* release skb */
162 WARN_ON(!skb);
163 if (skb) {
164 (*pkts_compl)++;
165 (*bytes_compl) += skb->len;
166 }
167 dev_kfree_skb_any(skb);
168 tx_buf->first_bd = 0;
169 tx_buf->skb = NULL;
170
171 return new_cons;
172 }
173
174 int bnx2x_tx_int(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata)
175 {
176 struct netdev_queue *txq;
177 u16 hw_cons, sw_cons, bd_cons = txdata->tx_bd_cons;
178 unsigned int pkts_compl = 0, bytes_compl = 0;
179
180 #ifdef BNX2X_STOP_ON_ERROR
181 if (unlikely(bp->panic))
182 return -1;
183 #endif
184
185 txq = netdev_get_tx_queue(bp->dev, txdata->txq_index);
186 hw_cons = le16_to_cpu(*txdata->tx_cons_sb);
187 sw_cons = txdata->tx_pkt_cons;
188
189 while (sw_cons != hw_cons) {
190 u16 pkt_cons;
191
192 pkt_cons = TX_BD(sw_cons);
193
194 DP(NETIF_MSG_TX_DONE, "queue[%d]: hw_cons %u sw_cons %u "
195 " pkt_cons %u\n",
196 txdata->txq_index, hw_cons, sw_cons, pkt_cons);
197
198 bd_cons = bnx2x_free_tx_pkt(bp, txdata, pkt_cons,
199 &pkts_compl, &bytes_compl);
200
201 sw_cons++;
202 }
203
204 netdev_tx_completed_queue(txq, pkts_compl, bytes_compl);
205
206 txdata->tx_pkt_cons = sw_cons;
207 txdata->tx_bd_cons = bd_cons;
208
209 /* Need to make the tx_bd_cons update visible to start_xmit()
210 * before checking for netif_tx_queue_stopped(). Without the
211 * memory barrier, there is a small possibility that
212 * start_xmit() will miss it and cause the queue to be stopped
213 * forever.
214 * On the other hand we need an rmb() here to ensure the proper
215 * ordering of bit testing in the following
216 * netif_tx_queue_stopped(txq) call.
217 */
218 smp_mb();
219
220 if (unlikely(netif_tx_queue_stopped(txq))) {
221 /* Taking tx_lock() is needed to prevent reenabling the queue
222 * while it's empty. This could have happen if rx_action() gets
223 * suspended in bnx2x_tx_int() after the condition before
224 * netif_tx_wake_queue(), while tx_action (bnx2x_start_xmit()):
225 *
226 * stops the queue->sees fresh tx_bd_cons->releases the queue->
227 * sends some packets consuming the whole queue again->
228 * stops the queue
229 */
230
231 __netif_tx_lock(txq, smp_processor_id());
232
233 if ((netif_tx_queue_stopped(txq)) &&
234 (bp->state == BNX2X_STATE_OPEN) &&
235 (bnx2x_tx_avail(bp, txdata) >= MAX_SKB_FRAGS + 3))
236 netif_tx_wake_queue(txq);
237
238 __netif_tx_unlock(txq);
239 }
240 return 0;
241 }
242
243 static inline void bnx2x_update_last_max_sge(struct bnx2x_fastpath *fp,
244 u16 idx)
245 {
246 u16 last_max = fp->last_max_sge;
247
248 if (SUB_S16(idx, last_max) > 0)
249 fp->last_max_sge = idx;
250 }
251
252 static void bnx2x_update_sge_prod(struct bnx2x_fastpath *fp,
253 struct eth_fast_path_rx_cqe *fp_cqe)
254 {
255 struct bnx2x *bp = fp->bp;
256 u16 sge_len = SGE_PAGE_ALIGN(le16_to_cpu(fp_cqe->pkt_len) -
257 le16_to_cpu(fp_cqe->len_on_bd)) >>
258 SGE_PAGE_SHIFT;
259 u16 last_max, last_elem, first_elem;
260 u16 delta = 0;
261 u16 i;
262
263 if (!sge_len)
264 return;
265
266 /* First mark all used pages */
267 for (i = 0; i < sge_len; i++)
268 BIT_VEC64_CLEAR_BIT(fp->sge_mask,
269 RX_SGE(le16_to_cpu(fp_cqe->sgl_or_raw_data.sgl[i])));
270
271 DP(NETIF_MSG_RX_STATUS, "fp_cqe->sgl[%d] = %d\n",
272 sge_len - 1, le16_to_cpu(fp_cqe->sgl_or_raw_data.sgl[sge_len - 1]));
273
274 /* Here we assume that the last SGE index is the biggest */
275 prefetch((void *)(fp->sge_mask));
276 bnx2x_update_last_max_sge(fp,
277 le16_to_cpu(fp_cqe->sgl_or_raw_data.sgl[sge_len - 1]));
278
279 last_max = RX_SGE(fp->last_max_sge);
280 last_elem = last_max >> BIT_VEC64_ELEM_SHIFT;
281 first_elem = RX_SGE(fp->rx_sge_prod) >> BIT_VEC64_ELEM_SHIFT;
282
283 /* If ring is not full */
284 if (last_elem + 1 != first_elem)
285 last_elem++;
286
287 /* Now update the prod */
288 for (i = first_elem; i != last_elem; i = NEXT_SGE_MASK_ELEM(i)) {
289 if (likely(fp->sge_mask[i]))
290 break;
291
292 fp->sge_mask[i] = BIT_VEC64_ELEM_ONE_MASK;
293 delta += BIT_VEC64_ELEM_SZ;
294 }
295
296 if (delta > 0) {
297 fp->rx_sge_prod += delta;
298 /* clear page-end entries */
299 bnx2x_clear_sge_mask_next_elems(fp);
300 }
301
302 DP(NETIF_MSG_RX_STATUS,
303 "fp->last_max_sge = %d fp->rx_sge_prod = %d\n",
304 fp->last_max_sge, fp->rx_sge_prod);
305 }
306
307 /* Set Toeplitz hash value in the skb using the value from the
308 * CQE (calculated by HW).
309 */
310 static u32 bnx2x_get_rxhash(const struct bnx2x *bp,
311 const struct eth_fast_path_rx_cqe *cqe)
312 {
313 /* Set Toeplitz hash from CQE */
314 if ((bp->dev->features & NETIF_F_RXHASH) &&
315 (cqe->status_flags & ETH_FAST_PATH_RX_CQE_RSS_HASH_FLG))
316 return le32_to_cpu(cqe->rss_hash_result);
317 return 0;
318 }
319
320 static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue,
321 u16 cons, u16 prod,
322 struct eth_fast_path_rx_cqe *cqe)
323 {
324 struct bnx2x *bp = fp->bp;
325 struct sw_rx_bd *cons_rx_buf = &fp->rx_buf_ring[cons];
326 struct sw_rx_bd *prod_rx_buf = &fp->rx_buf_ring[prod];
327 struct eth_rx_bd *prod_bd = &fp->rx_desc_ring[prod];
328 dma_addr_t mapping;
329 struct bnx2x_agg_info *tpa_info = &fp->tpa_info[queue];
330 struct sw_rx_bd *first_buf = &tpa_info->first_buf;
331
332 /* print error if current state != stop */
333 if (tpa_info->tpa_state != BNX2X_TPA_STOP)
334 BNX2X_ERR("start of bin not in stop [%d]\n", queue);
335
336 /* Try to map an empty data buffer from the aggregation info */
337 mapping = dma_map_single(&bp->pdev->dev,
338 first_buf->data + NET_SKB_PAD,
339 fp->rx_buf_size, DMA_FROM_DEVICE);
340 /*
341 * ...if it fails - move the skb from the consumer to the producer
342 * and set the current aggregation state as ERROR to drop it
343 * when TPA_STOP arrives.
344 */
345
346 if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
347 /* Move the BD from the consumer to the producer */
348 bnx2x_reuse_rx_data(fp, cons, prod);
349 tpa_info->tpa_state = BNX2X_TPA_ERROR;
350 return;
351 }
352
353 /* move empty data from pool to prod */
354 prod_rx_buf->data = first_buf->data;
355 dma_unmap_addr_set(prod_rx_buf, mapping, mapping);
356 /* point prod_bd to new data */
357 prod_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
358 prod_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
359
360 /* move partial skb from cons to pool (don't unmap yet) */
361 *first_buf = *cons_rx_buf;
362
363 /* mark bin state as START */
364 tpa_info->parsing_flags =
365 le16_to_cpu(cqe->pars_flags.flags);
366 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
367 tpa_info->tpa_state = BNX2X_TPA_START;
368 tpa_info->len_on_bd = le16_to_cpu(cqe->len_on_bd);
369 tpa_info->placement_offset = cqe->placement_offset;
370 tpa_info->rxhash = bnx2x_get_rxhash(bp, cqe);
371
372 #ifdef BNX2X_STOP_ON_ERROR
373 fp->tpa_queue_used |= (1 << queue);
374 #ifdef _ASM_GENERIC_INT_L64_H
375 DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%lx\n",
376 #else
377 DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%llx\n",
378 #endif
379 fp->tpa_queue_used);
380 #endif
381 }
382
383 /* Timestamp option length allowed for TPA aggregation:
384 *
385 * nop nop kind length echo val
386 */
387 #define TPA_TSTAMP_OPT_LEN 12
388 /**
389 * bnx2x_set_lro_mss - calculate the approximate value of the MSS
390 *
391 * @bp: driver handle
392 * @parsing_flags: parsing flags from the START CQE
393 * @len_on_bd: total length of the first packet for the
394 * aggregation.
395 *
396 * Approximate value of the MSS for this aggregation calculated using
397 * the first packet of it.
398 */
399 static inline u16 bnx2x_set_lro_mss(struct bnx2x *bp, u16 parsing_flags,
400 u16 len_on_bd)
401 {
402 /*
403 * TPA arrgregation won't have either IP options or TCP options
404 * other than timestamp or IPv6 extension headers.
405 */
406 u16 hdrs_len = ETH_HLEN + sizeof(struct tcphdr);
407
408 if (GET_FLAG(parsing_flags, PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) ==
409 PRS_FLAG_OVERETH_IPV6)
410 hdrs_len += sizeof(struct ipv6hdr);
411 else /* IPv4 */
412 hdrs_len += sizeof(struct iphdr);
413
414
415 /* Check if there was a TCP timestamp, if there is it's will
416 * always be 12 bytes length: nop nop kind length echo val.
417 *
418 * Otherwise FW would close the aggregation.
419 */
420 if (parsing_flags & PARSING_FLAGS_TIME_STAMP_EXIST_FLAG)
421 hdrs_len += TPA_TSTAMP_OPT_LEN;
422
423 return len_on_bd - hdrs_len;
424 }
425
426 static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp,
427 u16 queue, struct sk_buff *skb,
428 struct eth_end_agg_rx_cqe *cqe,
429 u16 cqe_idx)
430 {
431 struct sw_rx_page *rx_pg, old_rx_pg;
432 u32 i, frag_len, frag_size, pages;
433 int err;
434 int j;
435 struct bnx2x_agg_info *tpa_info = &fp->tpa_info[queue];
436 u16 len_on_bd = tpa_info->len_on_bd;
437
438 frag_size = le16_to_cpu(cqe->pkt_len) - len_on_bd;
439 pages = SGE_PAGE_ALIGN(frag_size) >> SGE_PAGE_SHIFT;
440
441 /* This is needed in order to enable forwarding support */
442 if (frag_size)
443 skb_shinfo(skb)->gso_size = bnx2x_set_lro_mss(bp,
444 tpa_info->parsing_flags, len_on_bd);
445
446 #ifdef BNX2X_STOP_ON_ERROR
447 if (pages > min_t(u32, 8, MAX_SKB_FRAGS)*SGE_PAGE_SIZE*PAGES_PER_SGE) {
448 BNX2X_ERR("SGL length is too long: %d. CQE index is %d\n",
449 pages, cqe_idx);
450 BNX2X_ERR("cqe->pkt_len = %d\n", cqe->pkt_len);
451 bnx2x_panic();
452 return -EINVAL;
453 }
454 #endif
455
456 /* Run through the SGL and compose the fragmented skb */
457 for (i = 0, j = 0; i < pages; i += PAGES_PER_SGE, j++) {
458 u16 sge_idx = RX_SGE(le16_to_cpu(cqe->sgl_or_raw_data.sgl[j]));
459
460 /* FW gives the indices of the SGE as if the ring is an array
461 (meaning that "next" element will consume 2 indices) */
462 frag_len = min(frag_size, (u32)(SGE_PAGE_SIZE*PAGES_PER_SGE));
463 rx_pg = &fp->rx_page_ring[sge_idx];
464 old_rx_pg = *rx_pg;
465
466 /* If we fail to allocate a substitute page, we simply stop
467 where we are and drop the whole packet */
468 err = bnx2x_alloc_rx_sge(bp, fp, sge_idx);
469 if (unlikely(err)) {
470 fp->eth_q_stats.rx_skb_alloc_failed++;
471 return err;
472 }
473
474 /* Unmap the page as we r going to pass it to the stack */
475 dma_unmap_page(&bp->pdev->dev,
476 dma_unmap_addr(&old_rx_pg, mapping),
477 SGE_PAGE_SIZE*PAGES_PER_SGE, DMA_FROM_DEVICE);
478
479 /* Add one frag and update the appropriate fields in the skb */
480 skb_fill_page_desc(skb, j, old_rx_pg.page, 0, frag_len);
481
482 skb->data_len += frag_len;
483 skb->truesize += SGE_PAGE_SIZE * PAGES_PER_SGE;
484 skb->len += frag_len;
485
486 frag_size -= frag_len;
487 }
488
489 return 0;
490 }
491
492 static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,
493 u16 queue, struct eth_end_agg_rx_cqe *cqe,
494 u16 cqe_idx)
495 {
496 struct bnx2x_agg_info *tpa_info = &fp->tpa_info[queue];
497 struct sw_rx_bd *rx_buf = &tpa_info->first_buf;
498 u32 pad = tpa_info->placement_offset;
499 u16 len = tpa_info->len_on_bd;
500 struct sk_buff *skb = NULL;
501 u8 *data = rx_buf->data;
502 /* alloc new skb */
503 u8 *new_data;
504 u8 old_tpa_state = tpa_info->tpa_state;
505
506 tpa_info->tpa_state = BNX2X_TPA_STOP;
507
508 /* If we there was an error during the handling of the TPA_START -
509 * drop this aggregation.
510 */
511 if (old_tpa_state == BNX2X_TPA_ERROR)
512 goto drop;
513
514 /* Try to allocate the new data */
515 new_data = kmalloc(fp->rx_buf_size + NET_SKB_PAD, GFP_ATOMIC);
516
517 /* Unmap skb in the pool anyway, as we are going to change
518 pool entry status to BNX2X_TPA_STOP even if new skb allocation
519 fails. */
520 dma_unmap_single(&bp->pdev->dev, dma_unmap_addr(rx_buf, mapping),
521 fp->rx_buf_size, DMA_FROM_DEVICE);
522 if (likely(new_data))
523 skb = build_skb(data);
524
525 if (likely(skb)) {
526 #ifdef BNX2X_STOP_ON_ERROR
527 if (pad + len > fp->rx_buf_size) {
528 BNX2X_ERR("skb_put is about to fail... "
529 "pad %d len %d rx_buf_size %d\n",
530 pad, len, fp->rx_buf_size);
531 bnx2x_panic();
532 return;
533 }
534 #endif
535
536 skb_reserve(skb, pad + NET_SKB_PAD);
537 skb_put(skb, len);
538 skb->rxhash = tpa_info->rxhash;
539
540 skb->protocol = eth_type_trans(skb, bp->dev);
541 skb->ip_summed = CHECKSUM_UNNECESSARY;
542
543 if (!bnx2x_fill_frag_skb(bp, fp, queue, skb, cqe, cqe_idx)) {
544 if (tpa_info->parsing_flags & PARSING_FLAGS_VLAN)
545 __vlan_hwaccel_put_tag(skb, tpa_info->vlan_tag);
546 napi_gro_receive(&fp->napi, skb);
547 } else {
548 DP(NETIF_MSG_RX_STATUS, "Failed to allocate new pages"
549 " - dropping packet!\n");
550 dev_kfree_skb_any(skb);
551 }
552
553
554 /* put new data in bin */
555 rx_buf->data = new_data;
556
557 return;
558 }
559 kfree(new_data);
560 drop:
561 /* drop the packet and keep the buffer in the bin */
562 DP(NETIF_MSG_RX_STATUS,
563 "Failed to allocate or map a new skb - dropping packet!\n");
564 fp->eth_q_stats.rx_skb_alloc_failed++;
565 }
566
567
568 int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)
569 {
570 struct bnx2x *bp = fp->bp;
571 u16 bd_cons, bd_prod, bd_prod_fw, comp_ring_cons;
572 u16 hw_comp_cons, sw_comp_cons, sw_comp_prod;
573 int rx_pkt = 0;
574
575 #ifdef BNX2X_STOP_ON_ERROR
576 if (unlikely(bp->panic))
577 return 0;
578 #endif
579
580 /* CQ "next element" is of the size of the regular element,
581 that's why it's ok here */
582 hw_comp_cons = le16_to_cpu(*fp->rx_cons_sb);
583 if ((hw_comp_cons & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT)
584 hw_comp_cons++;
585
586 bd_cons = fp->rx_bd_cons;
587 bd_prod = fp->rx_bd_prod;
588 bd_prod_fw = bd_prod;
589 sw_comp_cons = fp->rx_comp_cons;
590 sw_comp_prod = fp->rx_comp_prod;
591
592 /* Memory barrier necessary as speculative reads of the rx
593 * buffer can be ahead of the index in the status block
594 */
595 rmb();
596
597 DP(NETIF_MSG_RX_STATUS,
598 "queue[%d]: hw_comp_cons %u sw_comp_cons %u\n",
599 fp->index, hw_comp_cons, sw_comp_cons);
600
601 while (sw_comp_cons != hw_comp_cons) {
602 struct sw_rx_bd *rx_buf = NULL;
603 struct sk_buff *skb;
604 union eth_rx_cqe *cqe;
605 struct eth_fast_path_rx_cqe *cqe_fp;
606 u8 cqe_fp_flags;
607 enum eth_rx_cqe_type cqe_fp_type;
608 u16 len, pad;
609 u8 *data;
610
611 #ifdef BNX2X_STOP_ON_ERROR
612 if (unlikely(bp->panic))
613 return 0;
614 #endif
615
616 comp_ring_cons = RCQ_BD(sw_comp_cons);
617 bd_prod = RX_BD(bd_prod);
618 bd_cons = RX_BD(bd_cons);
619
620 cqe = &fp->rx_comp_ring[comp_ring_cons];
621 cqe_fp = &cqe->fast_path_cqe;
622 cqe_fp_flags = cqe_fp->type_error_flags;
623 cqe_fp_type = cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE;
624
625 DP(NETIF_MSG_RX_STATUS, "CQE type %x err %x status %x"
626 " queue %x vlan %x len %u\n", CQE_TYPE(cqe_fp_flags),
627 cqe_fp_flags, cqe_fp->status_flags,
628 le32_to_cpu(cqe_fp->rss_hash_result),
629 le16_to_cpu(cqe_fp->vlan_tag), le16_to_cpu(cqe_fp->pkt_len));
630
631 /* is this a slowpath msg? */
632 if (unlikely(CQE_TYPE_SLOW(cqe_fp_type))) {
633 bnx2x_sp_event(fp, cqe);
634 goto next_cqe;
635 }
636 rx_buf = &fp->rx_buf_ring[bd_cons];
637 data = rx_buf->data;
638
639 if (!CQE_TYPE_FAST(cqe_fp_type)) {
640 #ifdef BNX2X_STOP_ON_ERROR
641 /* sanity check */
642 if (fp->disable_tpa &&
643 (CQE_TYPE_START(cqe_fp_type) ||
644 CQE_TYPE_STOP(cqe_fp_type)))
645 BNX2X_ERR("START/STOP packet while "
646 "disable_tpa type %x\n",
647 CQE_TYPE(cqe_fp_type));
648 #endif
649
650 if (CQE_TYPE_START(cqe_fp_type)) {
651 u16 queue = cqe_fp->queue_index;
652 DP(NETIF_MSG_RX_STATUS,
653 "calling tpa_start on queue %d\n",
654 queue);
655
656 bnx2x_tpa_start(fp, queue,
657 bd_cons, bd_prod,
658 cqe_fp);
659 goto next_rx;
660 } else {
661 u16 queue =
662 cqe->end_agg_cqe.queue_index;
663 DP(NETIF_MSG_RX_STATUS,
664 "calling tpa_stop on queue %d\n",
665 queue);
666
667 bnx2x_tpa_stop(bp, fp, queue,
668 &cqe->end_agg_cqe,
669 comp_ring_cons);
670 #ifdef BNX2X_STOP_ON_ERROR
671 if (bp->panic)
672 return 0;
673 #endif
674
675 bnx2x_update_sge_prod(fp, cqe_fp);
676 goto next_cqe;
677 }
678 }
679 /* non TPA */
680 len = le16_to_cpu(cqe_fp->pkt_len);
681 pad = cqe_fp->placement_offset;
682 dma_sync_single_for_cpu(&bp->pdev->dev,
683 dma_unmap_addr(rx_buf, mapping),
684 pad + RX_COPY_THRESH,
685 DMA_FROM_DEVICE);
686 pad += NET_SKB_PAD;
687 prefetch(data + pad); /* speedup eth_type_trans() */
688 /* is this an error packet? */
689 if (unlikely(cqe_fp_flags & ETH_RX_ERROR_FALGS)) {
690 DP(NETIF_MSG_RX_ERR,
691 "ERROR flags %x rx packet %u\n",
692 cqe_fp_flags, sw_comp_cons);
693 fp->eth_q_stats.rx_err_discard_pkt++;
694 goto reuse_rx;
695 }
696
697 /* Since we don't have a jumbo ring
698 * copy small packets if mtu > 1500
699 */
700 if ((bp->dev->mtu > ETH_MAX_PACKET_SIZE) &&
701 (len <= RX_COPY_THRESH)) {
702 skb = netdev_alloc_skb_ip_align(bp->dev, len);
703 if (skb == NULL) {
704 DP(NETIF_MSG_RX_ERR,
705 "ERROR packet dropped because of alloc failure\n");
706 fp->eth_q_stats.rx_skb_alloc_failed++;
707 goto reuse_rx;
708 }
709 memcpy(skb->data, data + pad, len);
710 bnx2x_reuse_rx_data(fp, bd_cons, bd_prod);
711 } else {
712 if (likely(bnx2x_alloc_rx_data(bp, fp, bd_prod) == 0)) {
713 dma_unmap_single(&bp->pdev->dev,
714 dma_unmap_addr(rx_buf, mapping),
715 fp->rx_buf_size,
716 DMA_FROM_DEVICE);
717 skb = build_skb(data);
718 if (unlikely(!skb)) {
719 kfree(data);
720 fp->eth_q_stats.rx_skb_alloc_failed++;
721 goto next_rx;
722 }
723 skb_reserve(skb, pad);
724 } else {
725 DP(NETIF_MSG_RX_ERR,
726 "ERROR packet dropped because "
727 "of alloc failure\n");
728 fp->eth_q_stats.rx_skb_alloc_failed++;
729 reuse_rx:
730 bnx2x_reuse_rx_data(fp, bd_cons, bd_prod);
731 goto next_rx;
732 }
733 }
734
735 skb_put(skb, len);
736 skb->protocol = eth_type_trans(skb, bp->dev);
737
738 /* Set Toeplitz hash for a none-LRO skb */
739 skb->rxhash = bnx2x_get_rxhash(bp, cqe_fp);
740
741 skb_checksum_none_assert(skb);
742
743 if (bp->dev->features & NETIF_F_RXCSUM) {
744
745 if (likely(BNX2X_RX_CSUM_OK(cqe)))
746 skb->ip_summed = CHECKSUM_UNNECESSARY;
747 else
748 fp->eth_q_stats.hw_csum_err++;
749 }
750
751 skb_record_rx_queue(skb, fp->rx_queue);
752
753 if (le16_to_cpu(cqe_fp->pars_flags.flags) &
754 PARSING_FLAGS_VLAN)
755 __vlan_hwaccel_put_tag(skb,
756 le16_to_cpu(cqe_fp->vlan_tag));
757 napi_gro_receive(&fp->napi, skb);
758
759
760 next_rx:
761 rx_buf->data = NULL;
762
763 bd_cons = NEXT_RX_IDX(bd_cons);
764 bd_prod = NEXT_RX_IDX(bd_prod);
765 bd_prod_fw = NEXT_RX_IDX(bd_prod_fw);
766 rx_pkt++;
767 next_cqe:
768 sw_comp_prod = NEXT_RCQ_IDX(sw_comp_prod);
769 sw_comp_cons = NEXT_RCQ_IDX(sw_comp_cons);
770
771 if (rx_pkt == budget)
772 break;
773 } /* while */
774
775 fp->rx_bd_cons = bd_cons;
776 fp->rx_bd_prod = bd_prod_fw;
777 fp->rx_comp_cons = sw_comp_cons;
778 fp->rx_comp_prod = sw_comp_prod;
779
780 /* Update producers */
781 bnx2x_update_rx_prod(bp, fp, bd_prod_fw, sw_comp_prod,
782 fp->rx_sge_prod);
783
784 fp->rx_pkt += rx_pkt;
785 fp->rx_calls++;
786
787 return rx_pkt;
788 }
789
790 static irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie)
791 {
792 struct bnx2x_fastpath *fp = fp_cookie;
793 struct bnx2x *bp = fp->bp;
794 u8 cos;
795
796 DP(BNX2X_MSG_FP, "got an MSI-X interrupt on IDX:SB "
797 "[fp %d fw_sd %d igusb %d]\n",
798 fp->index, fp->fw_sb_id, fp->igu_sb_id);
799 bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID, 0, IGU_INT_DISABLE, 0);
800
801 #ifdef BNX2X_STOP_ON_ERROR
802 if (unlikely(bp->panic))
803 return IRQ_HANDLED;
804 #endif
805
806 /* Handle Rx and Tx according to MSI-X vector */
807 prefetch(fp->rx_cons_sb);
808
809 for_each_cos_in_tx_queue(fp, cos)
810 prefetch(fp->txdata[cos].tx_cons_sb);
811
812 prefetch(&fp->sb_running_index[SM_RX_ID]);
813 napi_schedule(&bnx2x_fp(bp, fp->index, napi));
814
815 return IRQ_HANDLED;
816 }
817
818 /* HW Lock for shared dual port PHYs */
819 void bnx2x_acquire_phy_lock(struct bnx2x *bp)
820 {
821 mutex_lock(&bp->port.phy_mutex);
822
823 if (bp->port.need_hw_lock)
824 bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
825 }
826
827 void bnx2x_release_phy_lock(struct bnx2x *bp)
828 {
829 if (bp->port.need_hw_lock)
830 bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
831
832 mutex_unlock(&bp->port.phy_mutex);
833 }
834
835 /* calculates MF speed according to current linespeed and MF configuration */
836 u16 bnx2x_get_mf_speed(struct bnx2x *bp)
837 {
838 u16 line_speed = bp->link_vars.line_speed;
839 if (IS_MF(bp)) {
840 u16 maxCfg = bnx2x_extract_max_cfg(bp,
841 bp->mf_config[BP_VN(bp)]);
842
843 /* Calculate the current MAX line speed limit for the MF
844 * devices
845 */
846 if (IS_MF_SI(bp))
847 line_speed = (line_speed * maxCfg) / 100;
848 else { /* SD mode */
849 u16 vn_max_rate = maxCfg * 100;
850
851 if (vn_max_rate < line_speed)
852 line_speed = vn_max_rate;
853 }
854 }
855
856 return line_speed;
857 }
858
859 /**
860 * bnx2x_fill_report_data - fill link report data to report
861 *
862 * @bp: driver handle
863 * @data: link state to update
864 *
865 * It uses a none-atomic bit operations because is called under the mutex.
866 */
867 static inline void bnx2x_fill_report_data(struct bnx2x *bp,
868 struct bnx2x_link_report_data *data)
869 {
870 u16 line_speed = bnx2x_get_mf_speed(bp);
871
872 memset(data, 0, sizeof(*data));
873
874 /* Fill the report data: efective line speed */
875 data->line_speed = line_speed;
876
877 /* Link is down */
878 if (!bp->link_vars.link_up || (bp->flags & MF_FUNC_DIS))
879 __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
880 &data->link_report_flags);
881
882 /* Full DUPLEX */
883 if (bp->link_vars.duplex == DUPLEX_FULL)
884 __set_bit(BNX2X_LINK_REPORT_FD, &data->link_report_flags);
885
886 /* Rx Flow Control is ON */
887 if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_RX)
888 __set_bit(BNX2X_LINK_REPORT_RX_FC_ON, &data->link_report_flags);
889
890 /* Tx Flow Control is ON */
891 if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_TX)
892 __set_bit(BNX2X_LINK_REPORT_TX_FC_ON, &data->link_report_flags);
893 }
894
895 /**
896 * bnx2x_link_report - report link status to OS.
897 *
898 * @bp: driver handle
899 *
900 * Calls the __bnx2x_link_report() under the same locking scheme
901 * as a link/PHY state managing code to ensure a consistent link
902 * reporting.
903 */
904
905 void bnx2x_link_report(struct bnx2x *bp)
906 {
907 bnx2x_acquire_phy_lock(bp);
908 __bnx2x_link_report(bp);
909 bnx2x_release_phy_lock(bp);
910 }
911
912 /**
913 * __bnx2x_link_report - report link status to OS.
914 *
915 * @bp: driver handle
916 *
917 * None atomic inmlementation.
918 * Should be called under the phy_lock.
919 */
920 void __bnx2x_link_report(struct bnx2x *bp)
921 {
922 struct bnx2x_link_report_data cur_data;
923
924 /* reread mf_cfg */
925 if (!CHIP_IS_E1(bp))
926 bnx2x_read_mf_cfg(bp);
927
928 /* Read the current link report info */
929 bnx2x_fill_report_data(bp, &cur_data);
930
931 /* Don't report link down or exactly the same link status twice */
932 if (!memcmp(&cur_data, &bp->last_reported_link, sizeof(cur_data)) ||
933 (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
934 &bp->last_reported_link.link_report_flags) &&
935 test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
936 &cur_data.link_report_flags)))
937 return;
938
939 bp->link_cnt++;
940
941 /* We are going to report a new link parameters now -
942 * remember the current data for the next time.
943 */
944 memcpy(&bp->last_reported_link, &cur_data, sizeof(cur_data));
945
946 if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
947 &cur_data.link_report_flags)) {
948 netif_carrier_off(bp->dev);
949 netdev_err(bp->dev, "NIC Link is Down\n");
950 return;
951 } else {
952 const char *duplex;
953 const char *flow;
954
955 netif_carrier_on(bp->dev);
956
957 if (test_and_clear_bit(BNX2X_LINK_REPORT_FD,
958 &cur_data.link_report_flags))
959 duplex = "full";
960 else
961 duplex = "half";
962
963 /* Handle the FC at the end so that only these flags would be
964 * possibly set. This way we may easily check if there is no FC
965 * enabled.
966 */
967 if (cur_data.link_report_flags) {
968 if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON,
969 &cur_data.link_report_flags)) {
970 if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON,
971 &cur_data.link_report_flags))
972 flow = "ON - receive & transmit";
973 else
974 flow = "ON - receive";
975 } else {
976 flow = "ON - transmit";
977 }
978 } else {
979 flow = "none";
980 }
981 netdev_info(bp->dev, "NIC Link is Up, %d Mbps %s duplex, Flow control: %s\n",
982 cur_data.line_speed, duplex, flow);
983 }
984 }
985
986 void bnx2x_init_rx_rings(struct bnx2x *bp)
987 {
988 int func = BP_FUNC(bp);
989 u16 ring_prod;
990 int i, j;
991
992 /* Allocate TPA resources */
993 for_each_rx_queue(bp, j) {
994 struct bnx2x_fastpath *fp = &bp->fp[j];
995
996 DP(NETIF_MSG_IFUP,
997 "mtu %d rx_buf_size %d\n", bp->dev->mtu, fp->rx_buf_size);
998
999 if (!fp->disable_tpa) {
1000 /* Fill the per-aggregtion pool */
1001 for (i = 0; i < MAX_AGG_QS(bp); i++) {
1002 struct bnx2x_agg_info *tpa_info =
1003 &fp->tpa_info[i];
1004 struct sw_rx_bd *first_buf =
1005 &tpa_info->first_buf;
1006
1007 first_buf->data = kmalloc(fp->rx_buf_size + NET_SKB_PAD,
1008 GFP_ATOMIC);
1009 if (!first_buf->data) {
1010 BNX2X_ERR("Failed to allocate TPA "
1011 "skb pool for queue[%d] - "
1012 "disabling TPA on this "
1013 "queue!\n", j);
1014 bnx2x_free_tpa_pool(bp, fp, i);
1015 fp->disable_tpa = 1;
1016 break;
1017 }
1018 dma_unmap_addr_set(first_buf, mapping, 0);
1019 tpa_info->tpa_state = BNX2X_TPA_STOP;
1020 }
1021
1022 /* "next page" elements initialization */
1023 bnx2x_set_next_page_sgl(fp);
1024
1025 /* set SGEs bit mask */
1026 bnx2x_init_sge_ring_bit_mask(fp);
1027
1028 /* Allocate SGEs and initialize the ring elements */
1029 for (i = 0, ring_prod = 0;
1030 i < MAX_RX_SGE_CNT*NUM_RX_SGE_PAGES; i++) {
1031
1032 if (bnx2x_alloc_rx_sge(bp, fp, ring_prod) < 0) {
1033 BNX2X_ERR("was only able to allocate "
1034 "%d rx sges\n", i);
1035 BNX2X_ERR("disabling TPA for "
1036 "queue[%d]\n", j);
1037 /* Cleanup already allocated elements */
1038 bnx2x_free_rx_sge_range(bp, fp,
1039 ring_prod);
1040 bnx2x_free_tpa_pool(bp, fp,
1041 MAX_AGG_QS(bp));
1042 fp->disable_tpa = 1;
1043 ring_prod = 0;
1044 break;
1045 }
1046 ring_prod = NEXT_SGE_IDX(ring_prod);
1047 }
1048
1049 fp->rx_sge_prod = ring_prod;
1050 }
1051 }
1052
1053 for_each_rx_queue(bp, j) {
1054 struct bnx2x_fastpath *fp = &bp->fp[j];
1055
1056 fp->rx_bd_cons = 0;
1057
1058 /* Activate BD ring */
1059 /* Warning!
1060 * this will generate an interrupt (to the TSTORM)
1061 * must only be done after chip is initialized
1062 */
1063 bnx2x_update_rx_prod(bp, fp, fp->rx_bd_prod, fp->rx_comp_prod,
1064 fp->rx_sge_prod);
1065
1066 if (j != 0)
1067 continue;
1068
1069 if (CHIP_IS_E1(bp)) {
1070 REG_WR(bp, BAR_USTRORM_INTMEM +
1071 USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func),
1072 U64_LO(fp->rx_comp_mapping));
1073 REG_WR(bp, BAR_USTRORM_INTMEM +
1074 USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func) + 4,
1075 U64_HI(fp->rx_comp_mapping));
1076 }
1077 }
1078 }
1079
1080 static void bnx2x_free_tx_skbs(struct bnx2x *bp)
1081 {
1082 int i;
1083 u8 cos;
1084
1085 for_each_tx_queue(bp, i) {
1086 struct bnx2x_fastpath *fp = &bp->fp[i];
1087 for_each_cos_in_tx_queue(fp, cos) {
1088 struct bnx2x_fp_txdata *txdata = &fp->txdata[cos];
1089 unsigned pkts_compl = 0, bytes_compl = 0;
1090
1091 u16 sw_prod = txdata->tx_pkt_prod;
1092 u16 sw_cons = txdata->tx_pkt_cons;
1093
1094 while (sw_cons != sw_prod) {
1095 bnx2x_free_tx_pkt(bp, txdata, TX_BD(sw_cons),
1096 &pkts_compl, &bytes_compl);
1097 sw_cons++;
1098 }
1099 netdev_tx_reset_queue(
1100 netdev_get_tx_queue(bp->dev, txdata->txq_index));
1101 }
1102 }
1103 }
1104
1105 static void bnx2x_free_rx_bds(struct bnx2x_fastpath *fp)
1106 {
1107 struct bnx2x *bp = fp->bp;
1108 int i;
1109
1110 /* ring wasn't allocated */
1111 if (fp->rx_buf_ring == NULL)
1112 return;
1113
1114 for (i = 0; i < NUM_RX_BD; i++) {
1115 struct sw_rx_bd *rx_buf = &fp->rx_buf_ring[i];
1116 u8 *data = rx_buf->data;
1117
1118 if (data == NULL)
1119 continue;
1120 dma_unmap_single(&bp->pdev->dev,
1121 dma_unmap_addr(rx_buf, mapping),
1122 fp->rx_buf_size, DMA_FROM_DEVICE);
1123
1124 rx_buf->data = NULL;
1125 kfree(data);
1126 }
1127 }
1128
1129 static void bnx2x_free_rx_skbs(struct bnx2x *bp)
1130 {
1131 int j;
1132
1133 for_each_rx_queue(bp, j) {
1134 struct bnx2x_fastpath *fp = &bp->fp[j];
1135
1136 bnx2x_free_rx_bds(fp);
1137
1138 if (!fp->disable_tpa)
1139 bnx2x_free_tpa_pool(bp, fp, MAX_AGG_QS(bp));
1140 }
1141 }
1142
1143 void bnx2x_free_skbs(struct bnx2x *bp)
1144 {
1145 bnx2x_free_tx_skbs(bp);
1146 bnx2x_free_rx_skbs(bp);
1147 }
1148
1149 void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value)
1150 {
1151 /* load old values */
1152 u32 mf_cfg = bp->mf_config[BP_VN(bp)];
1153
1154 if (value != bnx2x_extract_max_cfg(bp, mf_cfg)) {
1155 /* leave all but MAX value */
1156 mf_cfg &= ~FUNC_MF_CFG_MAX_BW_MASK;
1157
1158 /* set new MAX value */
1159 mf_cfg |= (value << FUNC_MF_CFG_MAX_BW_SHIFT)
1160 & FUNC_MF_CFG_MAX_BW_MASK;
1161
1162 bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW, mf_cfg);
1163 }
1164 }
1165
1166 /**
1167 * bnx2x_free_msix_irqs - free previously requested MSI-X IRQ vectors
1168 *
1169 * @bp: driver handle
1170 * @nvecs: number of vectors to be released
1171 */
1172 static void bnx2x_free_msix_irqs(struct bnx2x *bp, int nvecs)
1173 {
1174 int i, offset = 0;
1175
1176 if (nvecs == offset)
1177 return;
1178 free_irq(bp->msix_table[offset].vector, bp->dev);
1179 DP(NETIF_MSG_IFDOWN, "released sp irq (%d)\n",
1180 bp->msix_table[offset].vector);
1181 offset++;
1182 #ifdef BCM_CNIC
1183 if (nvecs == offset)
1184 return;
1185 offset++;
1186 #endif
1187
1188 for_each_eth_queue(bp, i) {
1189 if (nvecs == offset)
1190 return;
1191 DP(NETIF_MSG_IFDOWN, "about to release fp #%d->%d "
1192 "irq\n", i, bp->msix_table[offset].vector);
1193
1194 free_irq(bp->msix_table[offset++].vector, &bp->fp[i]);
1195 }
1196 }
1197
1198 void bnx2x_free_irq(struct bnx2x *bp)
1199 {
1200 if (bp->flags & USING_MSIX_FLAG)
1201 bnx2x_free_msix_irqs(bp, BNX2X_NUM_ETH_QUEUES(bp) +
1202 CNIC_PRESENT + 1);
1203 else if (bp->flags & USING_MSI_FLAG)
1204 free_irq(bp->pdev->irq, bp->dev);
1205 else
1206 free_irq(bp->pdev->irq, bp->dev);
1207 }
1208
1209 int bnx2x_enable_msix(struct bnx2x *bp)
1210 {
1211 int msix_vec = 0, i, rc, req_cnt;
1212
1213 bp->msix_table[msix_vec].entry = msix_vec;
1214 DP(NETIF_MSG_IFUP, "msix_table[0].entry = %d (slowpath)\n",
1215 bp->msix_table[0].entry);
1216 msix_vec++;
1217
1218 #ifdef BCM_CNIC
1219 bp->msix_table[msix_vec].entry = msix_vec;
1220 DP(NETIF_MSG_IFUP, "msix_table[%d].entry = %d (CNIC)\n",
1221 bp->msix_table[msix_vec].entry, bp->msix_table[msix_vec].entry);
1222 msix_vec++;
1223 #endif
1224 /* We need separate vectors for ETH queues only (not FCoE) */
1225 for_each_eth_queue(bp, i) {
1226 bp->msix_table[msix_vec].entry = msix_vec;
1227 DP(NETIF_MSG_IFUP, "msix_table[%d].entry = %d "
1228 "(fastpath #%u)\n", msix_vec, msix_vec, i);
1229 msix_vec++;
1230 }
1231
1232 req_cnt = BNX2X_NUM_ETH_QUEUES(bp) + CNIC_PRESENT + 1;
1233
1234 rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], req_cnt);
1235
1236 /*
1237 * reconfigure number of tx/rx queues according to available
1238 * MSI-X vectors
1239 */
1240 if (rc >= BNX2X_MIN_MSIX_VEC_CNT) {
1241 /* how less vectors we will have? */
1242 int diff = req_cnt - rc;
1243
1244 DP(NETIF_MSG_IFUP,
1245 "Trying to use less MSI-X vectors: %d\n", rc);
1246
1247 rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], rc);
1248
1249 if (rc) {
1250 DP(NETIF_MSG_IFUP,
1251 "MSI-X is not attainable rc %d\n", rc);
1252 return rc;
1253 }
1254 /*
1255 * decrease number of queues by number of unallocated entries
1256 */
1257 bp->num_queues -= diff;
1258
1259 DP(NETIF_MSG_IFUP, "New queue configuration set: %d\n",
1260 bp->num_queues);
1261 } else if (rc) {
1262 /* fall to INTx if not enough memory */
1263 if (rc == -ENOMEM)
1264 bp->flags |= DISABLE_MSI_FLAG;
1265 DP(NETIF_MSG_IFUP, "MSI-X is not attainable rc %d\n", rc);
1266 return rc;
1267 }
1268
1269 bp->flags |= USING_MSIX_FLAG;
1270
1271 return 0;
1272 }
1273
1274 static int bnx2x_req_msix_irqs(struct bnx2x *bp)
1275 {
1276 int i, rc, offset = 0;
1277
1278 rc = request_irq(bp->msix_table[offset++].vector,
1279 bnx2x_msix_sp_int, 0,
1280 bp->dev->name, bp->dev);
1281 if (rc) {
1282 BNX2X_ERR("request sp irq failed\n");
1283 return -EBUSY;
1284 }
1285
1286 #ifdef BCM_CNIC
1287 offset++;
1288 #endif
1289 for_each_eth_queue(bp, i) {
1290 struct bnx2x_fastpath *fp = &bp->fp[i];
1291 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1292 bp->dev->name, i);
1293
1294 rc = request_irq(bp->msix_table[offset].vector,
1295 bnx2x_msix_fp_int, 0, fp->name, fp);
1296 if (rc) {
1297 BNX2X_ERR("request fp #%d irq (%d) failed rc %d\n", i,
1298 bp->msix_table[offset].vector, rc);
1299 bnx2x_free_msix_irqs(bp, offset);
1300 return -EBUSY;
1301 }
1302
1303 offset++;
1304 }
1305
1306 i = BNX2X_NUM_ETH_QUEUES(bp);
1307 offset = 1 + CNIC_PRESENT;
1308 netdev_info(bp->dev, "using MSI-X IRQs: sp %d fp[%d] %d"
1309 " ... fp[%d] %d\n",
1310 bp->msix_table[0].vector,
1311 0, bp->msix_table[offset].vector,
1312 i - 1, bp->msix_table[offset + i - 1].vector);
1313
1314 return 0;
1315 }
1316
1317 int bnx2x_enable_msi(struct bnx2x *bp)
1318 {
1319 int rc;
1320
1321 rc = pci_enable_msi(bp->pdev);
1322 if (rc) {
1323 DP(NETIF_MSG_IFUP, "MSI is not attainable\n");
1324 return -1;
1325 }
1326 bp->flags |= USING_MSI_FLAG;
1327
1328 return 0;
1329 }
1330
1331 static int bnx2x_req_irq(struct bnx2x *bp)
1332 {
1333 unsigned long flags;
1334 int rc;
1335
1336 if (bp->flags & USING_MSI_FLAG)
1337 flags = 0;
1338 else
1339 flags = IRQF_SHARED;
1340
1341 rc = request_irq(bp->pdev->irq, bnx2x_interrupt, flags,
1342 bp->dev->name, bp->dev);
1343 return rc;
1344 }
1345
1346 static inline int bnx2x_setup_irqs(struct bnx2x *bp)
1347 {
1348 int rc = 0;
1349 if (bp->flags & USING_MSIX_FLAG) {
1350 rc = bnx2x_req_msix_irqs(bp);
1351 if (rc)
1352 return rc;
1353 } else {
1354 bnx2x_ack_int(bp);
1355 rc = bnx2x_req_irq(bp);
1356 if (rc) {
1357 BNX2X_ERR("IRQ request failed rc %d, aborting\n", rc);
1358 return rc;
1359 }
1360 if (bp->flags & USING_MSI_FLAG) {
1361 bp->dev->irq = bp->pdev->irq;
1362 netdev_info(bp->dev, "using MSI IRQ %d\n",
1363 bp->pdev->irq);
1364 }
1365 }
1366
1367 return 0;
1368 }
1369
1370 static inline void bnx2x_napi_enable(struct bnx2x *bp)
1371 {
1372 int i;
1373
1374 for_each_rx_queue(bp, i)
1375 napi_enable(&bnx2x_fp(bp, i, napi));
1376 }
1377
1378 static inline void bnx2x_napi_disable(struct bnx2x *bp)
1379 {
1380 int i;
1381
1382 for_each_rx_queue(bp, i)
1383 napi_disable(&bnx2x_fp(bp, i, napi));
1384 }
1385
1386 void bnx2x_netif_start(struct bnx2x *bp)
1387 {
1388 if (netif_running(bp->dev)) {
1389 bnx2x_napi_enable(bp);
1390 bnx2x_int_enable(bp);
1391 if (bp->state == BNX2X_STATE_OPEN)
1392 netif_tx_wake_all_queues(bp->dev);
1393 }
1394 }
1395
1396 void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw)
1397 {
1398 bnx2x_int_disable_sync(bp, disable_hw);
1399 bnx2x_napi_disable(bp);
1400 }
1401
1402 u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb)
1403 {
1404 struct bnx2x *bp = netdev_priv(dev);
1405
1406 #ifdef BCM_CNIC
1407 if (!NO_FCOE(bp)) {
1408 struct ethhdr *hdr = (struct ethhdr *)skb->data;
1409 u16 ether_type = ntohs(hdr->h_proto);
1410
1411 /* Skip VLAN tag if present */
1412 if (ether_type == ETH_P_8021Q) {
1413 struct vlan_ethhdr *vhdr =
1414 (struct vlan_ethhdr *)skb->data;
1415
1416 ether_type = ntohs(vhdr->h_vlan_encapsulated_proto);
1417 }
1418
1419 /* If ethertype is FCoE or FIP - use FCoE ring */
1420 if ((ether_type == ETH_P_FCOE) || (ether_type == ETH_P_FIP))
1421 return bnx2x_fcoe_tx(bp, txq_index);
1422 }
1423 #endif
1424 /* select a non-FCoE queue */
1425 return __skb_tx_hash(dev, skb, BNX2X_NUM_ETH_QUEUES(bp));
1426 }
1427
1428 void bnx2x_set_num_queues(struct bnx2x *bp)
1429 {
1430 switch (bp->multi_mode) {
1431 case ETH_RSS_MODE_DISABLED:
1432 bp->num_queues = 1;
1433 break;
1434 case ETH_RSS_MODE_REGULAR:
1435 bp->num_queues = bnx2x_calc_num_queues(bp);
1436 break;
1437
1438 default:
1439 bp->num_queues = 1;
1440 break;
1441 }
1442
1443 #ifdef BCM_CNIC
1444 /* override in ISCSI SD mod */
1445 if (IS_MF_ISCSI_SD(bp))
1446 bp->num_queues = 1;
1447 #endif
1448 /* Add special queues */
1449 bp->num_queues += NON_ETH_CONTEXT_USE;
1450 }
1451
1452 /**
1453 * bnx2x_set_real_num_queues - configure netdev->real_num_[tx,rx]_queues
1454 *
1455 * @bp: Driver handle
1456 *
1457 * We currently support for at most 16 Tx queues for each CoS thus we will
1458 * allocate a multiple of 16 for ETH L2 rings according to the value of the
1459 * bp->max_cos.
1460 *
1461 * If there is an FCoE L2 queue the appropriate Tx queue will have the next
1462 * index after all ETH L2 indices.
1463 *
1464 * If the actual number of Tx queues (for each CoS) is less than 16 then there
1465 * will be the holes at the end of each group of 16 ETh L2 indices (0..15,
1466 * 16..31,...) with indicies that are not coupled with any real Tx queue.
1467 *
1468 * The proper configuration of skb->queue_mapping is handled by
1469 * bnx2x_select_queue() and __skb_tx_hash().
1470 *
1471 * bnx2x_setup_tc() takes care of the proper TC mappings so that __skb_tx_hash()
1472 * will return a proper Tx index if TC is enabled (netdev->num_tc > 0).
1473 */
1474 static inline int bnx2x_set_real_num_queues(struct bnx2x *bp)
1475 {
1476 int rc, tx, rx;
1477
1478 tx = MAX_TXQS_PER_COS * bp->max_cos;
1479 rx = BNX2X_NUM_ETH_QUEUES(bp);
1480
1481 /* account for fcoe queue */
1482 #ifdef BCM_CNIC
1483 if (!NO_FCOE(bp)) {
1484 rx += FCOE_PRESENT;
1485 tx += FCOE_PRESENT;
1486 }
1487 #endif
1488
1489 rc = netif_set_real_num_tx_queues(bp->dev, tx);
1490 if (rc) {
1491 BNX2X_ERR("Failed to set real number of Tx queues: %d\n", rc);
1492 return rc;
1493 }
1494 rc = netif_set_real_num_rx_queues(bp->dev, rx);
1495 if (rc) {
1496 BNX2X_ERR("Failed to set real number of Rx queues: %d\n", rc);
1497 return rc;
1498 }
1499
1500 DP(NETIF_MSG_DRV, "Setting real num queues to (tx, rx) (%d, %d)\n",
1501 tx, rx);
1502
1503 return rc;
1504 }
1505
1506 static inline void bnx2x_set_rx_buf_size(struct bnx2x *bp)
1507 {
1508 int i;
1509
1510 for_each_queue(bp, i) {
1511 struct bnx2x_fastpath *fp = &bp->fp[i];
1512 u32 mtu;
1513
1514 /* Always use a mini-jumbo MTU for the FCoE L2 ring */
1515 if (IS_FCOE_IDX(i))
1516 /*
1517 * Although there are no IP frames expected to arrive to
1518 * this ring we still want to add an
1519 * IP_HEADER_ALIGNMENT_PADDING to prevent a buffer
1520 * overrun attack.
1521 */
1522 mtu = BNX2X_FCOE_MINI_JUMBO_MTU;
1523 else
1524 mtu = bp->dev->mtu;
1525 fp->rx_buf_size = BNX2X_FW_RX_ALIGN_START +
1526 IP_HEADER_ALIGNMENT_PADDING +
1527 ETH_OVREHEAD +
1528 mtu +
1529 BNX2X_FW_RX_ALIGN_END;
1530 /* Note : rx_buf_size doesnt take into account NET_SKB_PAD */
1531 }
1532 }
1533
1534 static inline int bnx2x_init_rss_pf(struct bnx2x *bp)
1535 {
1536 int i;
1537 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE] = {0};
1538 u8 num_eth_queues = BNX2X_NUM_ETH_QUEUES(bp);
1539
1540 /*
1541 * Prepare the inital contents fo the indirection table if RSS is
1542 * enabled
1543 */
1544 if (bp->multi_mode != ETH_RSS_MODE_DISABLED) {
1545 for (i = 0; i < sizeof(ind_table); i++)
1546 ind_table[i] =
1547 bp->fp->cl_id +
1548 ethtool_rxfh_indir_default(i, num_eth_queues);
1549 }
1550
1551 /*
1552 * For 57710 and 57711 SEARCHER configuration (rss_keys) is
1553 * per-port, so if explicit configuration is needed , do it only
1554 * for a PMF.
1555 *
1556 * For 57712 and newer on the other hand it's a per-function
1557 * configuration.
1558 */
1559 return bnx2x_config_rss_pf(bp, ind_table,
1560 bp->port.pmf || !CHIP_IS_E1x(bp));
1561 }
1562
1563 int bnx2x_config_rss_pf(struct bnx2x *bp, u8 *ind_table, bool config_hash)
1564 {
1565 struct bnx2x_config_rss_params params = {0};
1566 int i;
1567
1568 /* Although RSS is meaningless when there is a single HW queue we
1569 * still need it enabled in order to have HW Rx hash generated.
1570 *
1571 * if (!is_eth_multi(bp))
1572 * bp->multi_mode = ETH_RSS_MODE_DISABLED;
1573 */
1574
1575 params.rss_obj = &bp->rss_conf_obj;
1576
1577 __set_bit(RAMROD_COMP_WAIT, &params.ramrod_flags);
1578
1579 /* RSS mode */
1580 switch (bp->multi_mode) {
1581 case ETH_RSS_MODE_DISABLED:
1582 __set_bit(BNX2X_RSS_MODE_DISABLED, &params.rss_flags);
1583 break;
1584 case ETH_RSS_MODE_REGULAR:
1585 __set_bit(BNX2X_RSS_MODE_REGULAR, &params.rss_flags);
1586 break;
1587 case ETH_RSS_MODE_VLAN_PRI:
1588 __set_bit(BNX2X_RSS_MODE_VLAN_PRI, &params.rss_flags);
1589 break;
1590 case ETH_RSS_MODE_E1HOV_PRI:
1591 __set_bit(BNX2X_RSS_MODE_E1HOV_PRI, &params.rss_flags);
1592 break;
1593 case ETH_RSS_MODE_IP_DSCP:
1594 __set_bit(BNX2X_RSS_MODE_IP_DSCP, &params.rss_flags);
1595 break;
1596 default:
1597 BNX2X_ERR("Unknown multi_mode: %d\n", bp->multi_mode);
1598 return -EINVAL;
1599 }
1600
1601 /* If RSS is enabled */
1602 if (bp->multi_mode != ETH_RSS_MODE_DISABLED) {
1603 /* RSS configuration */
1604 __set_bit(BNX2X_RSS_IPV4, &params.rss_flags);
1605 __set_bit(BNX2X_RSS_IPV4_TCP, &params.rss_flags);
1606 __set_bit(BNX2X_RSS_IPV6, &params.rss_flags);
1607 __set_bit(BNX2X_RSS_IPV6_TCP, &params.rss_flags);
1608
1609 /* Hash bits */
1610 params.rss_result_mask = MULTI_MASK;
1611
1612 memcpy(params.ind_table, ind_table, sizeof(params.ind_table));
1613
1614 if (config_hash) {
1615 /* RSS keys */
1616 for (i = 0; i < sizeof(params.rss_key) / 4; i++)
1617 params.rss_key[i] = random32();
1618
1619 __set_bit(BNX2X_RSS_SET_SRCH, &params.rss_flags);
1620 }
1621 }
1622
1623 return bnx2x_config_rss(bp, &params);
1624 }
1625
1626 static inline int bnx2x_init_hw(struct bnx2x *bp, u32 load_code)
1627 {
1628 struct bnx2x_func_state_params func_params = {0};
1629
1630 /* Prepare parameters for function state transitions */
1631 __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags);
1632
1633 func_params.f_obj = &bp->func_obj;
1634 func_params.cmd = BNX2X_F_CMD_HW_INIT;
1635
1636 func_params.params.hw_init.load_phase = load_code;
1637
1638 return bnx2x_func_state_change(bp, &func_params);
1639 }
1640
1641 /*
1642 * Cleans the object that have internal lists without sending
1643 * ramrods. Should be run when interrutps are disabled.
1644 */
1645 static void bnx2x_squeeze_objects(struct bnx2x *bp)
1646 {
1647 int rc;
1648 unsigned long ramrod_flags = 0, vlan_mac_flags = 0;
1649 struct bnx2x_mcast_ramrod_params rparam = {0};
1650 struct bnx2x_vlan_mac_obj *mac_obj = &bp->fp->mac_obj;
1651
1652 /***************** Cleanup MACs' object first *************************/
1653
1654 /* Wait for completion of requested */
1655 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
1656 /* Perform a dry cleanup */
1657 __set_bit(RAMROD_DRV_CLR_ONLY, &ramrod_flags);
1658
1659 /* Clean ETH primary MAC */
1660 __set_bit(BNX2X_ETH_MAC, &vlan_mac_flags);
1661 rc = mac_obj->delete_all(bp, &bp->fp->mac_obj, &vlan_mac_flags,
1662 &ramrod_flags);
1663 if (rc != 0)
1664 BNX2X_ERR("Failed to clean ETH MACs: %d\n", rc);
1665
1666 /* Cleanup UC list */
1667 vlan_mac_flags = 0;
1668 __set_bit(BNX2X_UC_LIST_MAC, &vlan_mac_flags);
1669 rc = mac_obj->delete_all(bp, mac_obj, &vlan_mac_flags,
1670 &ramrod_flags);
1671 if (rc != 0)
1672 BNX2X_ERR("Failed to clean UC list MACs: %d\n", rc);
1673
1674 /***************** Now clean mcast object *****************************/
1675 rparam.mcast_obj = &bp->mcast_obj;
1676 __set_bit(RAMROD_DRV_CLR_ONLY, &rparam.ramrod_flags);
1677
1678 /* Add a DEL command... */
1679 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_DEL);
1680 if (rc < 0)
1681 BNX2X_ERR("Failed to add a new DEL command to a multi-cast "
1682 "object: %d\n", rc);
1683
1684 /* ...and wait until all pending commands are cleared */
1685 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1686 while (rc != 0) {
1687 if (rc < 0) {
1688 BNX2X_ERR("Failed to clean multi-cast object: %d\n",
1689 rc);
1690 return;
1691 }
1692
1693 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1694 }
1695 }
1696
1697 #ifndef BNX2X_STOP_ON_ERROR
1698 #define LOAD_ERROR_EXIT(bp, label) \
1699 do { \
1700 (bp)->state = BNX2X_STATE_ERROR; \
1701 goto label; \
1702 } while (0)
1703 #else
1704 #define LOAD_ERROR_EXIT(bp, label) \
1705 do { \
1706 (bp)->state = BNX2X_STATE_ERROR; \
1707 (bp)->panic = 1; \
1708 return -EBUSY; \
1709 } while (0)
1710 #endif
1711
1712 /* must be called with rtnl_lock */
1713 int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
1714 {
1715 int port = BP_PORT(bp);
1716 u32 load_code;
1717 int i, rc;
1718
1719 #ifdef BNX2X_STOP_ON_ERROR
1720 if (unlikely(bp->panic))
1721 return -EPERM;
1722 #endif
1723
1724 bp->state = BNX2X_STATE_OPENING_WAIT4_LOAD;
1725
1726 /* Set the initial link reported state to link down */
1727 bnx2x_acquire_phy_lock(bp);
1728 memset(&bp->last_reported_link, 0, sizeof(bp->last_reported_link));
1729 __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1730 &bp->last_reported_link.link_report_flags);
1731 bnx2x_release_phy_lock(bp);
1732
1733 /* must be called before memory allocation and HW init */
1734 bnx2x_ilt_set_info(bp);
1735
1736 /*
1737 * Zero fastpath structures preserving invariants like napi, which are
1738 * allocated only once, fp index, max_cos, bp pointer.
1739 * Also set fp->disable_tpa.
1740 */
1741 for_each_queue(bp, i)
1742 bnx2x_bz_fp(bp, i);
1743
1744
1745 /* Set the receive queues buffer size */
1746 bnx2x_set_rx_buf_size(bp);
1747
1748 if (bnx2x_alloc_mem(bp))
1749 return -ENOMEM;
1750
1751 /* As long as bnx2x_alloc_mem() may possibly update
1752 * bp->num_queues, bnx2x_set_real_num_queues() should always
1753 * come after it.
1754 */
1755 rc = bnx2x_set_real_num_queues(bp);
1756 if (rc) {
1757 BNX2X_ERR("Unable to set real_num_queues\n");
1758 LOAD_ERROR_EXIT(bp, load_error0);
1759 }
1760
1761 /* configure multi cos mappings in kernel.
1762 * this configuration may be overriden by a multi class queue discipline
1763 * or by a dcbx negotiation result.
1764 */
1765 bnx2x_setup_tc(bp->dev, bp->max_cos);
1766
1767 bnx2x_napi_enable(bp);
1768
1769 /* set pf load just before approaching the MCP */
1770 bnx2x_set_pf_load(bp);
1771
1772 /* Send LOAD_REQUEST command to MCP
1773 * Returns the type of LOAD command:
1774 * if it is the first port to be initialized
1775 * common blocks should be initialized, otherwise - not
1776 */
1777 if (!BP_NOMCP(bp)) {
1778 /* init fw_seq */
1779 bp->fw_seq =
1780 (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) &
1781 DRV_MSG_SEQ_NUMBER_MASK);
1782 BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq);
1783
1784 /* Get current FW pulse sequence */
1785 bp->fw_drv_pulse_wr_seq =
1786 (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_pulse_mb) &
1787 DRV_PULSE_SEQ_MASK);
1788 BNX2X_DEV_INFO("drv_pulse 0x%x\n", bp->fw_drv_pulse_wr_seq);
1789
1790 load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ, 0);
1791 if (!load_code) {
1792 BNX2X_ERR("MCP response failure, aborting\n");
1793 rc = -EBUSY;
1794 LOAD_ERROR_EXIT(bp, load_error1);
1795 }
1796 if (load_code == FW_MSG_CODE_DRV_LOAD_REFUSED) {
1797 rc = -EBUSY; /* other port in diagnostic mode */
1798 LOAD_ERROR_EXIT(bp, load_error1);
1799 }
1800 if (load_code != FW_MSG_CODE_DRV_LOAD_COMMON_CHIP &&
1801 load_code != FW_MSG_CODE_DRV_LOAD_COMMON) {
1802 /* build FW version dword */
1803 u32 my_fw = (BCM_5710_FW_MAJOR_VERSION) +
1804 (BCM_5710_FW_MINOR_VERSION << 8) +
1805 (BCM_5710_FW_REVISION_VERSION << 16) +
1806 (BCM_5710_FW_ENGINEERING_VERSION << 24);
1807
1808 /* read loaded FW from chip */
1809 u32 loaded_fw = REG_RD(bp, XSEM_REG_PRAM);
1810
1811 DP(BNX2X_MSG_SP, "loaded fw %x, my fw %x",
1812 loaded_fw, my_fw);
1813
1814 /* abort nic load if version mismatch */
1815 if (my_fw != loaded_fw) {
1816 BNX2X_ERR("bnx2x with FW %x already loaded, "
1817 "which mismatches my %x FW. aborting",
1818 loaded_fw, my_fw);
1819 rc = -EBUSY;
1820 LOAD_ERROR_EXIT(bp, load_error2);
1821 }
1822 }
1823
1824 } else {
1825 int path = BP_PATH(bp);
1826
1827 DP(NETIF_MSG_IFUP, "NO MCP - load counts[%d] %d, %d, %d\n",
1828 path, load_count[path][0], load_count[path][1],
1829 load_count[path][2]);
1830 load_count[path][0]++;
1831 load_count[path][1 + port]++;
1832 DP(NETIF_MSG_IFUP, "NO MCP - new load counts[%d] %d, %d, %d\n",
1833 path, load_count[path][0], load_count[path][1],
1834 load_count[path][2]);
1835 if (load_count[path][0] == 1)
1836 load_code = FW_MSG_CODE_DRV_LOAD_COMMON;
1837 else if (load_count[path][1 + port] == 1)
1838 load_code = FW_MSG_CODE_DRV_LOAD_PORT;
1839 else
1840 load_code = FW_MSG_CODE_DRV_LOAD_FUNCTION;
1841 }
1842
1843 if ((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) ||
1844 (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP) ||
1845 (load_code == FW_MSG_CODE_DRV_LOAD_PORT)) {
1846 bp->port.pmf = 1;
1847 /*
1848 * We need the barrier to ensure the ordering between the
1849 * writing to bp->port.pmf here and reading it from the
1850 * bnx2x_periodic_task().
1851 */
1852 smp_mb();
1853 queue_delayed_work(bnx2x_wq, &bp->period_task, 0);
1854 } else
1855 bp->port.pmf = 0;
1856
1857 DP(NETIF_MSG_LINK, "pmf %d\n", bp->port.pmf);
1858
1859 /* Init Function state controlling object */
1860 bnx2x__init_func_obj(bp);
1861
1862 /* Initialize HW */
1863 rc = bnx2x_init_hw(bp, load_code);
1864 if (rc) {
1865 BNX2X_ERR("HW init failed, aborting\n");
1866 bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
1867 LOAD_ERROR_EXIT(bp, load_error2);
1868 }
1869
1870 /* Connect to IRQs */
1871 rc = bnx2x_setup_irqs(bp);
1872 if (rc) {
1873 bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
1874 LOAD_ERROR_EXIT(bp, load_error2);
1875 }
1876
1877 /* Setup NIC internals and enable interrupts */
1878 bnx2x_nic_init(bp, load_code);
1879
1880 /* Init per-function objects */
1881 bnx2x_init_bp_objs(bp);
1882
1883 if (((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) ||
1884 (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP)) &&
1885 (bp->common.shmem2_base)) {
1886 if (SHMEM2_HAS(bp, dcc_support))
1887 SHMEM2_WR(bp, dcc_support,
1888 (SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV |
1889 SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV));
1890 }
1891
1892 bp->state = BNX2X_STATE_OPENING_WAIT4_PORT;
1893 rc = bnx2x_func_start(bp);
1894 if (rc) {
1895 BNX2X_ERR("Function start failed!\n");
1896 bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
1897 LOAD_ERROR_EXIT(bp, load_error3);
1898 }
1899
1900 /* Send LOAD_DONE command to MCP */
1901 if (!BP_NOMCP(bp)) {
1902 load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
1903 if (!load_code) {
1904 BNX2X_ERR("MCP response failure, aborting\n");
1905 rc = -EBUSY;
1906 LOAD_ERROR_EXIT(bp, load_error3);
1907 }
1908 }
1909
1910 rc = bnx2x_setup_leading(bp);
1911 if (rc) {
1912 BNX2X_ERR("Setup leading failed!\n");
1913 LOAD_ERROR_EXIT(bp, load_error3);
1914 }
1915
1916 #ifdef BCM_CNIC
1917 /* Enable Timer scan */
1918 REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 1);
1919 #endif
1920
1921 for_each_nondefault_queue(bp, i) {
1922 rc = bnx2x_setup_queue(bp, &bp->fp[i], 0);
1923 if (rc)
1924 LOAD_ERROR_EXIT(bp, load_error4);
1925 }
1926
1927 rc = bnx2x_init_rss_pf(bp);
1928 if (rc)
1929 LOAD_ERROR_EXIT(bp, load_error4);
1930
1931 /* Now when Clients are configured we are ready to work */
1932 bp->state = BNX2X_STATE_OPEN;
1933
1934 /* Configure a ucast MAC */
1935 rc = bnx2x_set_eth_mac(bp, true);
1936 if (rc)
1937 LOAD_ERROR_EXIT(bp, load_error4);
1938
1939 if (bp->pending_max) {
1940 bnx2x_update_max_mf_config(bp, bp->pending_max);
1941 bp->pending_max = 0;
1942 }
1943
1944 if (bp->port.pmf)
1945 bnx2x_initial_phy_init(bp, load_mode);
1946
1947 /* Start fast path */
1948
1949 /* Initialize Rx filter. */
1950 netif_addr_lock_bh(bp->dev);
1951 bnx2x_set_rx_mode(bp->dev);
1952 netif_addr_unlock_bh(bp->dev);
1953
1954 /* Start the Tx */
1955 switch (load_mode) {
1956 case LOAD_NORMAL:
1957 /* Tx queue should be only reenabled */
1958 netif_tx_wake_all_queues(bp->dev);
1959 break;
1960
1961 case LOAD_OPEN:
1962 netif_tx_start_all_queues(bp->dev);
1963 smp_mb__after_clear_bit();
1964 break;
1965
1966 case LOAD_DIAG:
1967 bp->state = BNX2X_STATE_DIAG;
1968 break;
1969
1970 default:
1971 break;
1972 }
1973
1974 if (bp->port.pmf)
1975 bnx2x_update_drv_flags(bp, DRV_FLAGS_DCB_CONFIGURED, 0);
1976 else
1977 bnx2x__link_status_update(bp);
1978
1979 /* start the timer */
1980 mod_timer(&bp->timer, jiffies + bp->current_interval);
1981
1982 #ifdef BCM_CNIC
1983 /* re-read iscsi info */
1984 bnx2x_get_iscsi_info(bp);
1985 bnx2x_setup_cnic_irq_info(bp);
1986 if (bp->state == BNX2X_STATE_OPEN)
1987 bnx2x_cnic_notify(bp, CNIC_CTL_START_CMD);
1988 #endif
1989
1990 /* Wait for all pending SP commands to complete */
1991 if (!bnx2x_wait_sp_comp(bp, ~0x0UL)) {
1992 BNX2X_ERR("Timeout waiting for SP elements to complete\n");
1993 bnx2x_nic_unload(bp, UNLOAD_CLOSE);
1994 return -EBUSY;
1995 }
1996
1997 bnx2x_dcbx_init(bp);
1998 return 0;
1999
2000 #ifndef BNX2X_STOP_ON_ERROR
2001 load_error4:
2002 #ifdef BCM_CNIC
2003 /* Disable Timer scan */
2004 REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 0);
2005 #endif
2006 load_error3:
2007 bnx2x_int_disable_sync(bp, 1);
2008
2009 /* Clean queueable objects */
2010 bnx2x_squeeze_objects(bp);
2011
2012 /* Free SKBs, SGEs, TPA pool and driver internals */
2013 bnx2x_free_skbs(bp);
2014 for_each_rx_queue(bp, i)
2015 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
2016
2017 /* Release IRQs */
2018 bnx2x_free_irq(bp);
2019 load_error2:
2020 if (!BP_NOMCP(bp)) {
2021 bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP, 0);
2022 bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0);
2023 }
2024
2025 bp->port.pmf = 0;
2026 load_error1:
2027 bnx2x_napi_disable(bp);
2028 /* clear pf_load status, as it was already set */
2029 bnx2x_clear_pf_load(bp);
2030 load_error0:
2031 bnx2x_free_mem(bp);
2032
2033 return rc;
2034 #endif /* ! BNX2X_STOP_ON_ERROR */
2035 }
2036
2037 /* must be called with rtnl_lock */
2038 int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode)
2039 {
2040 int i;
2041 bool global = false;
2042
2043 if ((bp->state == BNX2X_STATE_CLOSED) ||
2044 (bp->state == BNX2X_STATE_ERROR)) {
2045 /* We can get here if the driver has been unloaded
2046 * during parity error recovery and is either waiting for a
2047 * leader to complete or for other functions to unload and
2048 * then ifdown has been issued. In this case we want to
2049 * unload and let other functions to complete a recovery
2050 * process.
2051 */
2052 bp->recovery_state = BNX2X_RECOVERY_DONE;
2053 bp->is_leader = 0;
2054 bnx2x_release_leader_lock(bp);
2055 smp_mb();
2056
2057 DP(NETIF_MSG_HW, "Releasing a leadership...\n");
2058
2059 return -EINVAL;
2060 }
2061
2062 /*
2063 * It's important to set the bp->state to the value different from
2064 * BNX2X_STATE_OPEN and only then stop the Tx. Otherwise bnx2x_tx_int()
2065 * may restart the Tx from the NAPI context (see bnx2x_tx_int()).
2066 */
2067 bp->state = BNX2X_STATE_CLOSING_WAIT4_HALT;
2068 smp_mb();
2069
2070 /* Stop Tx */
2071 bnx2x_tx_disable(bp);
2072
2073 #ifdef BCM_CNIC
2074 bnx2x_cnic_notify(bp, CNIC_CTL_STOP_CMD);
2075 #endif
2076
2077 bp->rx_mode = BNX2X_RX_MODE_NONE;
2078
2079 del_timer_sync(&bp->timer);
2080
2081 /* Set ALWAYS_ALIVE bit in shmem */
2082 bp->fw_drv_pulse_wr_seq |= DRV_PULSE_ALWAYS_ALIVE;
2083
2084 bnx2x_drv_pulse(bp);
2085
2086 bnx2x_stats_handle(bp, STATS_EVENT_STOP);
2087
2088 /* Cleanup the chip if needed */
2089 if (unload_mode != UNLOAD_RECOVERY)
2090 bnx2x_chip_cleanup(bp, unload_mode);
2091 else {
2092 /* Send the UNLOAD_REQUEST to the MCP */
2093 bnx2x_send_unload_req(bp, unload_mode);
2094
2095 /*
2096 * Prevent transactions to host from the functions on the
2097 * engine that doesn't reset global blocks in case of global
2098 * attention once gloabl blocks are reset and gates are opened
2099 * (the engine which leader will perform the recovery
2100 * last).
2101 */
2102 if (!CHIP_IS_E1x(bp))
2103 bnx2x_pf_disable(bp);
2104
2105 /* Disable HW interrupts, NAPI */
2106 bnx2x_netif_stop(bp, 1);
2107
2108 /* Release IRQs */
2109 bnx2x_free_irq(bp);
2110
2111 /* Report UNLOAD_DONE to MCP */
2112 bnx2x_send_unload_done(bp);
2113 }
2114
2115 /*
2116 * At this stage no more interrupts will arrive so we may safly clean
2117 * the queueable objects here in case they failed to get cleaned so far.
2118 */
2119 bnx2x_squeeze_objects(bp);
2120
2121 /* There should be no more pending SP commands at this stage */
2122 bp->sp_state = 0;
2123
2124 bp->port.pmf = 0;
2125
2126 /* Free SKBs, SGEs, TPA pool and driver internals */
2127 bnx2x_free_skbs(bp);
2128 for_each_rx_queue(bp, i)
2129 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
2130
2131 bnx2x_free_mem(bp);
2132
2133 bp->state = BNX2X_STATE_CLOSED;
2134
2135 /* Check if there are pending parity attentions. If there are - set
2136 * RECOVERY_IN_PROGRESS.
2137 */
2138 if (bnx2x_chk_parity_attn(bp, &global, false)) {
2139 bnx2x_set_reset_in_progress(bp);
2140
2141 /* Set RESET_IS_GLOBAL if needed */
2142 if (global)
2143 bnx2x_set_reset_global(bp);
2144 }
2145
2146
2147 /* The last driver must disable a "close the gate" if there is no
2148 * parity attention or "process kill" pending.
2149 */
2150 if (!bnx2x_clear_pf_load(bp) && bnx2x_reset_is_done(bp, BP_PATH(bp)))
2151 bnx2x_disable_close_the_gate(bp);
2152
2153 return 0;
2154 }
2155
2156 int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state)
2157 {
2158 u16 pmcsr;
2159
2160 /* If there is no power capability, silently succeed */
2161 if (!bp->pm_cap) {
2162 DP(NETIF_MSG_HW, "No power capability. Breaking.\n");
2163 return 0;
2164 }
2165
2166 pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmcsr);
2167
2168 switch (state) {
2169 case PCI_D0:
2170 pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,
2171 ((pmcsr & ~PCI_PM_CTRL_STATE_MASK) |
2172 PCI_PM_CTRL_PME_STATUS));
2173
2174 if (pmcsr & PCI_PM_CTRL_STATE_MASK)
2175 /* delay required during transition out of D3hot */
2176 msleep(20);
2177 break;
2178
2179 case PCI_D3hot:
2180 /* If there are other clients above don't
2181 shut down the power */
2182 if (atomic_read(&bp->pdev->enable_cnt) != 1)
2183 return 0;
2184 /* Don't shut down the power for emulation and FPGA */
2185 if (CHIP_REV_IS_SLOW(bp))
2186 return 0;
2187
2188 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
2189 pmcsr |= 3;
2190
2191 if (bp->wol)
2192 pmcsr |= PCI_PM_CTRL_PME_ENABLE;
2193
2194 pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,
2195 pmcsr);
2196
2197 /* No more memory access after this point until
2198 * device is brought back to D0.
2199 */
2200 break;
2201
2202 default:
2203 return -EINVAL;
2204 }
2205 return 0;
2206 }
2207
2208 /*
2209 * net_device service functions
2210 */
2211 int bnx2x_poll(struct napi_struct *napi, int budget)
2212 {
2213 int work_done = 0;
2214 u8 cos;
2215 struct bnx2x_fastpath *fp = container_of(napi, struct bnx2x_fastpath,
2216 napi);
2217 struct bnx2x *bp = fp->bp;
2218
2219 while (1) {
2220 #ifdef BNX2X_STOP_ON_ERROR
2221 if (unlikely(bp->panic)) {
2222 napi_complete(napi);
2223 return 0;
2224 }
2225 #endif
2226
2227 for_each_cos_in_tx_queue(fp, cos)
2228 if (bnx2x_tx_queue_has_work(&fp->txdata[cos]))
2229 bnx2x_tx_int(bp, &fp->txdata[cos]);
2230
2231
2232 if (bnx2x_has_rx_work(fp)) {
2233 work_done += bnx2x_rx_int(fp, budget - work_done);
2234
2235 /* must not complete if we consumed full budget */
2236 if (work_done >= budget)
2237 break;
2238 }
2239
2240 /* Fall out from the NAPI loop if needed */
2241 if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) {
2242 #ifdef BCM_CNIC
2243 /* No need to update SB for FCoE L2 ring as long as
2244 * it's connected to the default SB and the SB
2245 * has been updated when NAPI was scheduled.
2246 */
2247 if (IS_FCOE_FP(fp)) {
2248 napi_complete(napi);
2249 break;
2250 }
2251 #endif
2252
2253 bnx2x_update_fpsb_idx(fp);
2254 /* bnx2x_has_rx_work() reads the status block,
2255 * thus we need to ensure that status block indices
2256 * have been actually read (bnx2x_update_fpsb_idx)
2257 * prior to this check (bnx2x_has_rx_work) so that
2258 * we won't write the "newer" value of the status block
2259 * to IGU (if there was a DMA right after
2260 * bnx2x_has_rx_work and if there is no rmb, the memory
2261 * reading (bnx2x_update_fpsb_idx) may be postponed
2262 * to right before bnx2x_ack_sb). In this case there
2263 * will never be another interrupt until there is
2264 * another update of the status block, while there
2265 * is still unhandled work.
2266 */
2267 rmb();
2268
2269 if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) {
2270 napi_complete(napi);
2271 /* Re-enable interrupts */
2272 DP(NETIF_MSG_HW,
2273 "Update index to %d\n", fp->fp_hc_idx);
2274 bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID,
2275 le16_to_cpu(fp->fp_hc_idx),
2276 IGU_INT_ENABLE, 1);
2277 break;
2278 }
2279 }
2280 }
2281
2282 return work_done;
2283 }
2284
2285 /* we split the first BD into headers and data BDs
2286 * to ease the pain of our fellow microcode engineers
2287 * we use one mapping for both BDs
2288 * So far this has only been observed to happen
2289 * in Other Operating Systems(TM)
2290 */
2291 static noinline u16 bnx2x_tx_split(struct bnx2x *bp,
2292 struct bnx2x_fp_txdata *txdata,
2293 struct sw_tx_bd *tx_buf,
2294 struct eth_tx_start_bd **tx_bd, u16 hlen,
2295 u16 bd_prod, int nbd)
2296 {
2297 struct eth_tx_start_bd *h_tx_bd = *tx_bd;
2298 struct eth_tx_bd *d_tx_bd;
2299 dma_addr_t mapping;
2300 int old_len = le16_to_cpu(h_tx_bd->nbytes);
2301
2302 /* first fix first BD */
2303 h_tx_bd->nbd = cpu_to_le16(nbd);
2304 h_tx_bd->nbytes = cpu_to_le16(hlen);
2305
2306 DP(NETIF_MSG_TX_QUEUED, "TSO split header size is %d "
2307 "(%x:%x) nbd %d\n", h_tx_bd->nbytes, h_tx_bd->addr_hi,
2308 h_tx_bd->addr_lo, h_tx_bd->nbd);
2309
2310 /* now get a new data BD
2311 * (after the pbd) and fill it */
2312 bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
2313 d_tx_bd = &txdata->tx_desc_ring[bd_prod].reg_bd;
2314
2315 mapping = HILO_U64(le32_to_cpu(h_tx_bd->addr_hi),
2316 le32_to_cpu(h_tx_bd->addr_lo)) + hlen;
2317
2318 d_tx_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
2319 d_tx_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
2320 d_tx_bd->nbytes = cpu_to_le16(old_len - hlen);
2321
2322 /* this marks the BD as one that has no individual mapping */
2323 tx_buf->flags |= BNX2X_TSO_SPLIT_BD;
2324
2325 DP(NETIF_MSG_TX_QUEUED,
2326 "TSO split data size is %d (%x:%x)\n",
2327 d_tx_bd->nbytes, d_tx_bd->addr_hi, d_tx_bd->addr_lo);
2328
2329 /* update tx_bd */
2330 *tx_bd = (struct eth_tx_start_bd *)d_tx_bd;
2331
2332 return bd_prod;
2333 }
2334
2335 static inline u16 bnx2x_csum_fix(unsigned char *t_header, u16 csum, s8 fix)
2336 {
2337 if (fix > 0)
2338 csum = (u16) ~csum_fold(csum_sub(csum,
2339 csum_partial(t_header - fix, fix, 0)));
2340
2341 else if (fix < 0)
2342 csum = (u16) ~csum_fold(csum_add(csum,
2343 csum_partial(t_header, -fix, 0)));
2344
2345 return swab16(csum);
2346 }
2347
2348 static inline u32 bnx2x_xmit_type(struct bnx2x *bp, struct sk_buff *skb)
2349 {
2350 u32 rc;
2351
2352 if (skb->ip_summed != CHECKSUM_PARTIAL)
2353 rc = XMIT_PLAIN;
2354
2355 else {
2356 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6)) {
2357 rc = XMIT_CSUM_V6;
2358 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2359 rc |= XMIT_CSUM_TCP;
2360
2361 } else {
2362 rc = XMIT_CSUM_V4;
2363 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2364 rc |= XMIT_CSUM_TCP;
2365 }
2366 }
2367
2368 if (skb_is_gso_v6(skb))
2369 rc |= XMIT_GSO_V6 | XMIT_CSUM_TCP | XMIT_CSUM_V6;
2370 else if (skb_is_gso(skb))
2371 rc |= XMIT_GSO_V4 | XMIT_CSUM_V4 | XMIT_CSUM_TCP;
2372
2373 return rc;
2374 }
2375
2376 #if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3)
2377 /* check if packet requires linearization (packet is too fragmented)
2378 no need to check fragmentation if page size > 8K (there will be no
2379 violation to FW restrictions) */
2380 static int bnx2x_pkt_req_lin(struct bnx2x *bp, struct sk_buff *skb,
2381 u32 xmit_type)
2382 {
2383 int to_copy = 0;
2384 int hlen = 0;
2385 int first_bd_sz = 0;
2386
2387 /* 3 = 1 (for linear data BD) + 2 (for PBD and last BD) */
2388 if (skb_shinfo(skb)->nr_frags >= (MAX_FETCH_BD - 3)) {
2389
2390 if (xmit_type & XMIT_GSO) {
2391 unsigned short lso_mss = skb_shinfo(skb)->gso_size;
2392 /* Check if LSO packet needs to be copied:
2393 3 = 1 (for headers BD) + 2 (for PBD and last BD) */
2394 int wnd_size = MAX_FETCH_BD - 3;
2395 /* Number of windows to check */
2396 int num_wnds = skb_shinfo(skb)->nr_frags - wnd_size;
2397 int wnd_idx = 0;
2398 int frag_idx = 0;
2399 u32 wnd_sum = 0;
2400
2401 /* Headers length */
2402 hlen = (int)(skb_transport_header(skb) - skb->data) +
2403 tcp_hdrlen(skb);
2404
2405 /* Amount of data (w/o headers) on linear part of SKB*/
2406 first_bd_sz = skb_headlen(skb) - hlen;
2407
2408 wnd_sum = first_bd_sz;
2409
2410 /* Calculate the first sum - it's special */
2411 for (frag_idx = 0; frag_idx < wnd_size - 1; frag_idx++)
2412 wnd_sum +=
2413 skb_frag_size(&skb_shinfo(skb)->frags[frag_idx]);
2414
2415 /* If there was data on linear skb data - check it */
2416 if (first_bd_sz > 0) {
2417 if (unlikely(wnd_sum < lso_mss)) {
2418 to_copy = 1;
2419 goto exit_lbl;
2420 }
2421
2422 wnd_sum -= first_bd_sz;
2423 }
2424
2425 /* Others are easier: run through the frag list and
2426 check all windows */
2427 for (wnd_idx = 0; wnd_idx <= num_wnds; wnd_idx++) {
2428 wnd_sum +=
2429 skb_frag_size(&skb_shinfo(skb)->frags[wnd_idx + wnd_size - 1]);
2430
2431 if (unlikely(wnd_sum < lso_mss)) {
2432 to_copy = 1;
2433 break;
2434 }
2435 wnd_sum -=
2436 skb_frag_size(&skb_shinfo(skb)->frags[wnd_idx]);
2437 }
2438 } else {
2439 /* in non-LSO too fragmented packet should always
2440 be linearized */
2441 to_copy = 1;
2442 }
2443 }
2444
2445 exit_lbl:
2446 if (unlikely(to_copy))
2447 DP(NETIF_MSG_TX_QUEUED,
2448 "Linearization IS REQUIRED for %s packet. "
2449 "num_frags %d hlen %d first_bd_sz %d\n",
2450 (xmit_type & XMIT_GSO) ? "LSO" : "non-LSO",
2451 skb_shinfo(skb)->nr_frags, hlen, first_bd_sz);
2452
2453 return to_copy;
2454 }
2455 #endif
2456
2457 static inline void bnx2x_set_pbd_gso_e2(struct sk_buff *skb, u32 *parsing_data,
2458 u32 xmit_type)
2459 {
2460 *parsing_data |= (skb_shinfo(skb)->gso_size <<
2461 ETH_TX_PARSE_BD_E2_LSO_MSS_SHIFT) &
2462 ETH_TX_PARSE_BD_E2_LSO_MSS;
2463 if ((xmit_type & XMIT_GSO_V6) &&
2464 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
2465 *parsing_data |= ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR;
2466 }
2467
2468 /**
2469 * bnx2x_set_pbd_gso - update PBD in GSO case.
2470 *
2471 * @skb: packet skb
2472 * @pbd: parse BD
2473 * @xmit_type: xmit flags
2474 */
2475 static inline void bnx2x_set_pbd_gso(struct sk_buff *skb,
2476 struct eth_tx_parse_bd_e1x *pbd,
2477 u32 xmit_type)
2478 {
2479 pbd->lso_mss = cpu_to_le16(skb_shinfo(skb)->gso_size);
2480 pbd->tcp_send_seq = swab32(tcp_hdr(skb)->seq);
2481 pbd->tcp_flags = pbd_tcp_flags(skb);
2482
2483 if (xmit_type & XMIT_GSO_V4) {
2484 pbd->ip_id = swab16(ip_hdr(skb)->id);
2485 pbd->tcp_pseudo_csum =
2486 swab16(~csum_tcpudp_magic(ip_hdr(skb)->saddr,
2487 ip_hdr(skb)->daddr,
2488 0, IPPROTO_TCP, 0));
2489
2490 } else
2491 pbd->tcp_pseudo_csum =
2492 swab16(~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2493 &ipv6_hdr(skb)->daddr,
2494 0, IPPROTO_TCP, 0));
2495
2496 pbd->global_data |= ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN;
2497 }
2498
2499 /**
2500 * bnx2x_set_pbd_csum_e2 - update PBD with checksum and return header length
2501 *
2502 * @bp: driver handle
2503 * @skb: packet skb
2504 * @parsing_data: data to be updated
2505 * @xmit_type: xmit flags
2506 *
2507 * 57712 related
2508 */
2509 static inline u8 bnx2x_set_pbd_csum_e2(struct bnx2x *bp, struct sk_buff *skb,
2510 u32 *parsing_data, u32 xmit_type)
2511 {
2512 *parsing_data |=
2513 ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) <<
2514 ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W_SHIFT) &
2515 ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W;
2516
2517 if (xmit_type & XMIT_CSUM_TCP) {
2518 *parsing_data |= ((tcp_hdrlen(skb) / 4) <<
2519 ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW_SHIFT) &
2520 ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW;
2521
2522 return skb_transport_header(skb) + tcp_hdrlen(skb) - skb->data;
2523 } else
2524 /* We support checksum offload for TCP and UDP only.
2525 * No need to pass the UDP header length - it's a constant.
2526 */
2527 return skb_transport_header(skb) +
2528 sizeof(struct udphdr) - skb->data;
2529 }
2530
2531 static inline void bnx2x_set_sbd_csum(struct bnx2x *bp, struct sk_buff *skb,
2532 struct eth_tx_start_bd *tx_start_bd, u32 xmit_type)
2533 {
2534 tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_L4_CSUM;
2535
2536 if (xmit_type & XMIT_CSUM_V4)
2537 tx_start_bd->bd_flags.as_bitfield |=
2538 ETH_TX_BD_FLAGS_IP_CSUM;
2539 else
2540 tx_start_bd->bd_flags.as_bitfield |=
2541 ETH_TX_BD_FLAGS_IPV6;
2542
2543 if (!(xmit_type & XMIT_CSUM_TCP))
2544 tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_IS_UDP;
2545 }
2546
2547 /**
2548 * bnx2x_set_pbd_csum - update PBD with checksum and return header length
2549 *
2550 * @bp: driver handle
2551 * @skb: packet skb
2552 * @pbd: parse BD to be updated
2553 * @xmit_type: xmit flags
2554 */
2555 static inline u8 bnx2x_set_pbd_csum(struct bnx2x *bp, struct sk_buff *skb,
2556 struct eth_tx_parse_bd_e1x *pbd,
2557 u32 xmit_type)
2558 {
2559 u8 hlen = (skb_network_header(skb) - skb->data) >> 1;
2560
2561 /* for now NS flag is not used in Linux */
2562 pbd->global_data =
2563 (hlen | ((skb->protocol == cpu_to_be16(ETH_P_8021Q)) <<
2564 ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN_SHIFT));
2565
2566 pbd->ip_hlen_w = (skb_transport_header(skb) -
2567 skb_network_header(skb)) >> 1;
2568
2569 hlen += pbd->ip_hlen_w;
2570
2571 /* We support checksum offload for TCP and UDP only */
2572 if (xmit_type & XMIT_CSUM_TCP)
2573 hlen += tcp_hdrlen(skb) / 2;
2574 else
2575 hlen += sizeof(struct udphdr) / 2;
2576
2577 pbd->total_hlen_w = cpu_to_le16(hlen);
2578 hlen = hlen*2;
2579
2580 if (xmit_type & XMIT_CSUM_TCP) {
2581 pbd->tcp_pseudo_csum = swab16(tcp_hdr(skb)->check);
2582
2583 } else {
2584 s8 fix = SKB_CS_OFF(skb); /* signed! */
2585
2586 DP(NETIF_MSG_TX_QUEUED,
2587 "hlen %d fix %d csum before fix %x\n",
2588 le16_to_cpu(pbd->total_hlen_w), fix, SKB_CS(skb));
2589
2590 /* HW bug: fixup the CSUM */
2591 pbd->tcp_pseudo_csum =
2592 bnx2x_csum_fix(skb_transport_header(skb),
2593 SKB_CS(skb), fix);
2594
2595 DP(NETIF_MSG_TX_QUEUED, "csum after fix %x\n",
2596 pbd->tcp_pseudo_csum);
2597 }
2598
2599 return hlen;
2600 }
2601
2602 /* called with netif_tx_lock
2603 * bnx2x_tx_int() runs without netif_tx_lock unless it needs to call
2604 * netif_wake_queue()
2605 */
2606 netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
2607 {
2608 struct bnx2x *bp = netdev_priv(dev);
2609
2610 struct bnx2x_fastpath *fp;
2611 struct netdev_queue *txq;
2612 struct bnx2x_fp_txdata *txdata;
2613 struct sw_tx_bd *tx_buf;
2614 struct eth_tx_start_bd *tx_start_bd, *first_bd;
2615 struct eth_tx_bd *tx_data_bd, *total_pkt_bd = NULL;
2616 struct eth_tx_parse_bd_e1x *pbd_e1x = NULL;
2617 struct eth_tx_parse_bd_e2 *pbd_e2 = NULL;
2618 u32 pbd_e2_parsing_data = 0;
2619 u16 pkt_prod, bd_prod;
2620 int nbd, txq_index, fp_index, txdata_index;
2621 dma_addr_t mapping;
2622 u32 xmit_type = bnx2x_xmit_type(bp, skb);
2623 int i;
2624 u8 hlen = 0;
2625 __le16 pkt_size = 0;
2626 struct ethhdr *eth;
2627 u8 mac_type = UNICAST_ADDRESS;
2628
2629 #ifdef BNX2X_STOP_ON_ERROR
2630 if (unlikely(bp->panic))
2631 return NETDEV_TX_BUSY;
2632 #endif
2633
2634 txq_index = skb_get_queue_mapping(skb);
2635 txq = netdev_get_tx_queue(dev, txq_index);
2636
2637 BUG_ON(txq_index >= MAX_ETH_TXQ_IDX(bp) + FCOE_PRESENT);
2638
2639 /* decode the fastpath index and the cos index from the txq */
2640 fp_index = TXQ_TO_FP(txq_index);
2641 txdata_index = TXQ_TO_COS(txq_index);
2642
2643 #ifdef BCM_CNIC
2644 /*
2645 * Override the above for the FCoE queue:
2646 * - FCoE fp entry is right after the ETH entries.
2647 * - FCoE L2 queue uses bp->txdata[0] only.
2648 */
2649 if (unlikely(!NO_FCOE(bp) && (txq_index ==
2650 bnx2x_fcoe_tx(bp, txq_index)))) {
2651 fp_index = FCOE_IDX;
2652 txdata_index = 0;
2653 }
2654 #endif
2655
2656 /* enable this debug print to view the transmission queue being used
2657 DP(BNX2X_MSG_FP, "indices: txq %d, fp %d, txdata %d\n",
2658 txq_index, fp_index, txdata_index); */
2659
2660 /* locate the fastpath and the txdata */
2661 fp = &bp->fp[fp_index];
2662 txdata = &fp->txdata[txdata_index];
2663
2664 /* enable this debug print to view the tranmission details
2665 DP(BNX2X_MSG_FP,"transmitting packet cid %d fp index %d txdata_index %d"
2666 " tx_data ptr %p fp pointer %p\n",
2667 txdata->cid, fp_index, txdata_index, txdata, fp); */
2668
2669 if (unlikely(bnx2x_tx_avail(bp, txdata) <
2670 (skb_shinfo(skb)->nr_frags + 3))) {
2671 fp->eth_q_stats.driver_xoff++;
2672 netif_tx_stop_queue(txq);
2673 BNX2X_ERR("BUG! Tx ring full when queue awake!\n");
2674 return NETDEV_TX_BUSY;
2675 }
2676
2677 DP(NETIF_MSG_TX_QUEUED, "queue[%d]: SKB: summed %x protocol %x "
2678 "protocol(%x,%x) gso type %x xmit_type %x\n",
2679 txq_index, skb->ip_summed, skb->protocol, ipv6_hdr(skb)->nexthdr,
2680 ip_hdr(skb)->protocol, skb_shinfo(skb)->gso_type, xmit_type);
2681
2682 eth = (struct ethhdr *)skb->data;
2683
2684 /* set flag according to packet type (UNICAST_ADDRESS is default)*/
2685 if (unlikely(is_multicast_ether_addr(eth->h_dest))) {
2686 if (is_broadcast_ether_addr(eth->h_dest))
2687 mac_type = BROADCAST_ADDRESS;
2688 else
2689 mac_type = MULTICAST_ADDRESS;
2690 }
2691
2692 #if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3)
2693 /* First, check if we need to linearize the skb (due to FW
2694 restrictions). No need to check fragmentation if page size > 8K
2695 (there will be no violation to FW restrictions) */
2696 if (bnx2x_pkt_req_lin(bp, skb, xmit_type)) {
2697 /* Statistics of linearization */
2698 bp->lin_cnt++;
2699 if (skb_linearize(skb) != 0) {
2700 DP(NETIF_MSG_TX_QUEUED, "SKB linearization failed - "
2701 "silently dropping this SKB\n");
2702 dev_kfree_skb_any(skb);
2703 return NETDEV_TX_OK;
2704 }
2705 }
2706 #endif
2707 /* Map skb linear data for DMA */
2708 mapping = dma_map_single(&bp->pdev->dev, skb->data,
2709 skb_headlen(skb), DMA_TO_DEVICE);
2710 if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
2711 DP(NETIF_MSG_TX_QUEUED, "SKB mapping failed - "
2712 "silently dropping this SKB\n");
2713 dev_kfree_skb_any(skb);
2714 return NETDEV_TX_OK;
2715 }
2716 /*
2717 Please read carefully. First we use one BD which we mark as start,
2718 then we have a parsing info BD (used for TSO or xsum),
2719 and only then we have the rest of the TSO BDs.
2720 (don't forget to mark the last one as last,
2721 and to unmap only AFTER you write to the BD ...)
2722 And above all, all pdb sizes are in words - NOT DWORDS!
2723 */
2724
2725 /* get current pkt produced now - advance it just before sending packet
2726 * since mapping of pages may fail and cause packet to be dropped
2727 */
2728 pkt_prod = txdata->tx_pkt_prod;
2729 bd_prod = TX_BD(txdata->tx_bd_prod);
2730
2731 /* get a tx_buf and first BD
2732 * tx_start_bd may be changed during SPLIT,
2733 * but first_bd will always stay first
2734 */
2735 tx_buf = &txdata->tx_buf_ring[TX_BD(pkt_prod)];
2736 tx_start_bd = &txdata->tx_desc_ring[bd_prod].start_bd;
2737 first_bd = tx_start_bd;
2738
2739 tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
2740 SET_FLAG(tx_start_bd->general_data, ETH_TX_START_BD_ETH_ADDR_TYPE,
2741 mac_type);
2742
2743 /* header nbd */
2744 SET_FLAG(tx_start_bd->general_data, ETH_TX_START_BD_HDR_NBDS, 1);
2745
2746 /* remember the first BD of the packet */
2747 tx_buf->first_bd = txdata->tx_bd_prod;
2748 tx_buf->skb = skb;
2749 tx_buf->flags = 0;
2750
2751 DP(NETIF_MSG_TX_QUEUED,
2752 "sending pkt %u @%p next_idx %u bd %u @%p\n",
2753 pkt_prod, tx_buf, txdata->tx_pkt_prod, bd_prod, tx_start_bd);
2754
2755 if (vlan_tx_tag_present(skb)) {
2756 tx_start_bd->vlan_or_ethertype =
2757 cpu_to_le16(vlan_tx_tag_get(skb));
2758 tx_start_bd->bd_flags.as_bitfield |=
2759 (X_ETH_OUTBAND_VLAN << ETH_TX_BD_FLAGS_VLAN_MODE_SHIFT);
2760 } else
2761 tx_start_bd->vlan_or_ethertype = cpu_to_le16(pkt_prod);
2762
2763 /* turn on parsing and get a BD */
2764 bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
2765
2766 if (xmit_type & XMIT_CSUM)
2767 bnx2x_set_sbd_csum(bp, skb, tx_start_bd, xmit_type);
2768
2769 if (!CHIP_IS_E1x(bp)) {
2770 pbd_e2 = &txdata->tx_desc_ring[bd_prod].parse_bd_e2;
2771 memset(pbd_e2, 0, sizeof(struct eth_tx_parse_bd_e2));
2772 /* Set PBD in checksum offload case */
2773 if (xmit_type & XMIT_CSUM)
2774 hlen = bnx2x_set_pbd_csum_e2(bp, skb,
2775 &pbd_e2_parsing_data,
2776 xmit_type);
2777 if (IS_MF_SI(bp)) {
2778 /*
2779 * fill in the MAC addresses in the PBD - for local
2780 * switching
2781 */
2782 bnx2x_set_fw_mac_addr(&pbd_e2->src_mac_addr_hi,
2783 &pbd_e2->src_mac_addr_mid,
2784 &pbd_e2->src_mac_addr_lo,
2785 eth->h_source);
2786 bnx2x_set_fw_mac_addr(&pbd_e2->dst_mac_addr_hi,
2787 &pbd_e2->dst_mac_addr_mid,
2788 &pbd_e2->dst_mac_addr_lo,
2789 eth->h_dest);
2790 }
2791 } else {
2792 pbd_e1x = &txdata->tx_desc_ring[bd_prod].parse_bd_e1x;
2793 memset(pbd_e1x, 0, sizeof(struct eth_tx_parse_bd_e1x));
2794 /* Set PBD in checksum offload case */
2795 if (xmit_type & XMIT_CSUM)
2796 hlen = bnx2x_set_pbd_csum(bp, skb, pbd_e1x, xmit_type);
2797
2798 }
2799
2800 /* Setup the data pointer of the first BD of the packet */
2801 tx_start_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
2802 tx_start_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
2803 nbd = 2; /* start_bd + pbd + frags (updated when pages are mapped) */
2804 tx_start_bd->nbytes = cpu_to_le16(skb_headlen(skb));
2805 pkt_size = tx_start_bd->nbytes;
2806
2807 DP(NETIF_MSG_TX_QUEUED, "first bd @%p addr (%x:%x) nbd %d"
2808 " nbytes %d flags %x vlan %x\n",
2809 tx_start_bd, tx_start_bd->addr_hi, tx_start_bd->addr_lo,
2810 le16_to_cpu(tx_start_bd->nbd), le16_to_cpu(tx_start_bd->nbytes),
2811 tx_start_bd->bd_flags.as_bitfield,
2812 le16_to_cpu(tx_start_bd->vlan_or_ethertype));
2813
2814 if (xmit_type & XMIT_GSO) {
2815
2816 DP(NETIF_MSG_TX_QUEUED,
2817 "TSO packet len %d hlen %d total len %d tso size %d\n",
2818 skb->len, hlen, skb_headlen(skb),
2819 skb_shinfo(skb)->gso_size);
2820
2821 tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_SW_LSO;
2822
2823 if (unlikely(skb_headlen(skb) > hlen))
2824 bd_prod = bnx2x_tx_split(bp, txdata, tx_buf,
2825 &tx_start_bd, hlen,
2826 bd_prod, ++nbd);
2827 if (!CHIP_IS_E1x(bp))
2828 bnx2x_set_pbd_gso_e2(skb, &pbd_e2_parsing_data,
2829 xmit_type);
2830 else
2831 bnx2x_set_pbd_gso(skb, pbd_e1x, xmit_type);
2832 }
2833
2834 /* Set the PBD's parsing_data field if not zero
2835 * (for the chips newer than 57711).
2836 */
2837 if (pbd_e2_parsing_data)
2838 pbd_e2->parsing_data = cpu_to_le32(pbd_e2_parsing_data);
2839
2840 tx_data_bd = (struct eth_tx_bd *)tx_start_bd;
2841
2842 /* Handle fragmented skb */
2843 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2844 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2845
2846 mapping = skb_frag_dma_map(&bp->pdev->dev, frag, 0,
2847 skb_frag_size(frag), DMA_TO_DEVICE);
2848 if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
2849 unsigned int pkts_compl = 0, bytes_compl = 0;
2850
2851 DP(NETIF_MSG_TX_QUEUED, "Unable to map page - "
2852 "dropping packet...\n");
2853
2854 /* we need unmap all buffers already mapped
2855 * for this SKB;
2856 * first_bd->nbd need to be properly updated
2857 * before call to bnx2x_free_tx_pkt
2858 */
2859 first_bd->nbd = cpu_to_le16(nbd);
2860 bnx2x_free_tx_pkt(bp, txdata,
2861 TX_BD(txdata->tx_pkt_prod),
2862 &pkts_compl, &bytes_compl);
2863 return NETDEV_TX_OK;
2864 }
2865
2866 bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
2867 tx_data_bd = &txdata->tx_desc_ring[bd_prod].reg_bd;
2868 if (total_pkt_bd == NULL)
2869 total_pkt_bd = &txdata->tx_desc_ring[bd_prod].reg_bd;
2870
2871 tx_data_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
2872 tx_data_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
2873 tx_data_bd->nbytes = cpu_to_le16(skb_frag_size(frag));
2874 le16_add_cpu(&pkt_size, skb_frag_size(frag));
2875 nbd++;
2876
2877 DP(NETIF_MSG_TX_QUEUED,
2878 "frag %d bd @%p addr (%x:%x) nbytes %d\n",
2879 i, tx_data_bd, tx_data_bd->addr_hi, tx_data_bd->addr_lo,
2880 le16_to_cpu(tx_data_bd->nbytes));
2881 }
2882
2883 DP(NETIF_MSG_TX_QUEUED, "last bd @%p\n", tx_data_bd);
2884
2885 /* update with actual num BDs */
2886 first_bd->nbd = cpu_to_le16(nbd);
2887
2888 bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
2889
2890 /* now send a tx doorbell, counting the next BD
2891 * if the packet contains or ends with it
2892 */
2893 if (TX_BD_POFF(bd_prod) < nbd)
2894 nbd++;
2895
2896 /* total_pkt_bytes should be set on the first data BD if
2897 * it's not an LSO packet and there is more than one
2898 * data BD. In this case pkt_size is limited by an MTU value.
2899 * However we prefer to set it for an LSO packet (while we don't
2900 * have to) in order to save some CPU cycles in a none-LSO
2901 * case, when we much more care about them.
2902 */
2903 if (total_pkt_bd != NULL)
2904 total_pkt_bd->total_pkt_bytes = pkt_size;
2905
2906 if (pbd_e1x)
2907 DP(NETIF_MSG_TX_QUEUED,
2908 "PBD (E1X) @%p ip_data %x ip_hlen %u ip_id %u lso_mss %u"
2909 " tcp_flags %x xsum %x seq %u hlen %u\n",
2910 pbd_e1x, pbd_e1x->global_data, pbd_e1x->ip_hlen_w,
2911 pbd_e1x->ip_id, pbd_e1x->lso_mss, pbd_e1x->tcp_flags,
2912 pbd_e1x->tcp_pseudo_csum, pbd_e1x->tcp_send_seq,
2913 le16_to_cpu(pbd_e1x->total_hlen_w));
2914 if (pbd_e2)
2915 DP(NETIF_MSG_TX_QUEUED,
2916 "PBD (E2) @%p dst %x %x %x src %x %x %x parsing_data %x\n",
2917 pbd_e2, pbd_e2->dst_mac_addr_hi, pbd_e2->dst_mac_addr_mid,
2918 pbd_e2->dst_mac_addr_lo, pbd_e2->src_mac_addr_hi,
2919 pbd_e2->src_mac_addr_mid, pbd_e2->src_mac_addr_lo,
2920 pbd_e2->parsing_data);
2921 DP(NETIF_MSG_TX_QUEUED, "doorbell: nbd %d bd %u\n", nbd, bd_prod);
2922
2923 netdev_tx_sent_queue(txq, skb->len);
2924
2925 txdata->tx_pkt_prod++;
2926 /*
2927 * Make sure that the BD data is updated before updating the producer
2928 * since FW might read the BD right after the producer is updated.
2929 * This is only applicable for weak-ordered memory model archs such
2930 * as IA-64. The following barrier is also mandatory since FW will
2931 * assumes packets must have BDs.
2932 */
2933 wmb();
2934
2935 txdata->tx_db.data.prod += nbd;
2936 barrier();
2937
2938 DOORBELL(bp, txdata->cid, txdata->tx_db.raw);
2939
2940 mmiowb();
2941
2942 txdata->tx_bd_prod += nbd;
2943
2944 if (unlikely(bnx2x_tx_avail(bp, txdata) < MAX_SKB_FRAGS + 3)) {
2945 netif_tx_stop_queue(txq);
2946
2947 /* paired memory barrier is in bnx2x_tx_int(), we have to keep
2948 * ordering of set_bit() in netif_tx_stop_queue() and read of
2949 * fp->bd_tx_cons */
2950 smp_mb();
2951
2952 fp->eth_q_stats.driver_xoff++;
2953 if (bnx2x_tx_avail(bp, txdata) >= MAX_SKB_FRAGS + 3)
2954 netif_tx_wake_queue(txq);
2955 }
2956 txdata->tx_pkt++;
2957
2958 return NETDEV_TX_OK;
2959 }
2960
2961 /**
2962 * bnx2x_setup_tc - routine to configure net_device for multi tc
2963 *
2964 * @netdev: net device to configure
2965 * @tc: number of traffic classes to enable
2966 *
2967 * callback connected to the ndo_setup_tc function pointer
2968 */
2969 int bnx2x_setup_tc(struct net_device *dev, u8 num_tc)
2970 {
2971 int cos, prio, count, offset;
2972 struct bnx2x *bp = netdev_priv(dev);
2973
2974 /* setup tc must be called under rtnl lock */
2975 ASSERT_RTNL();
2976
2977 /* no traffic classes requested. aborting */
2978 if (!num_tc) {
2979 netdev_reset_tc(dev);
2980 return 0;
2981 }
2982
2983 /* requested to support too many traffic classes */
2984 if (num_tc > bp->max_cos) {
2985 DP(NETIF_MSG_TX_ERR, "support for too many traffic classes"
2986 " requested: %d. max supported is %d\n",
2987 num_tc, bp->max_cos);
2988 return -EINVAL;
2989 }
2990
2991 /* declare amount of supported traffic classes */
2992 if (netdev_set_num_tc(dev, num_tc)) {
2993 DP(NETIF_MSG_TX_ERR, "failed to declare %d traffic classes\n",
2994 num_tc);
2995 return -EINVAL;
2996 }
2997
2998 /* configure priority to traffic class mapping */
2999 for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) {
3000 netdev_set_prio_tc_map(dev, prio, bp->prio_to_cos[prio]);
3001 DP(BNX2X_MSG_SP, "mapping priority %d to tc %d\n",
3002 prio, bp->prio_to_cos[prio]);
3003 }
3004
3005
3006 /* Use this configuration to diffrentiate tc0 from other COSes
3007 This can be used for ets or pfc, and save the effort of setting
3008 up a multio class queue disc or negotiating DCBX with a switch
3009 netdev_set_prio_tc_map(dev, 0, 0);
3010 DP(BNX2X_MSG_SP, "mapping priority %d to tc %d\n", 0, 0);
3011 for (prio = 1; prio < 16; prio++) {
3012 netdev_set_prio_tc_map(dev, prio, 1);
3013 DP(BNX2X_MSG_SP, "mapping priority %d to tc %d\n", prio, 1);
3014 } */
3015
3016 /* configure traffic class to transmission queue mapping */
3017 for (cos = 0; cos < bp->max_cos; cos++) {
3018 count = BNX2X_NUM_ETH_QUEUES(bp);
3019 offset = cos * MAX_TXQS_PER_COS;
3020 netdev_set_tc_queue(dev, cos, count, offset);
3021 DP(BNX2X_MSG_SP, "mapping tc %d to offset %d count %d\n",
3022 cos, offset, count);
3023 }
3024
3025 return 0;
3026 }
3027
3028 /* called with rtnl_lock */
3029 int bnx2x_change_mac_addr(struct net_device *dev, void *p)
3030 {
3031 struct sockaddr *addr = p;
3032 struct bnx2x *bp = netdev_priv(dev);
3033 int rc = 0;
3034
3035 if (!bnx2x_is_valid_ether_addr(bp, addr->sa_data))
3036 return -EINVAL;
3037
3038 #ifdef BCM_CNIC
3039 if (IS_MF_ISCSI_SD(bp) && !is_zero_ether_addr(addr->sa_data))
3040 return -EINVAL;
3041 #endif
3042
3043 if (netif_running(dev)) {
3044 rc = bnx2x_set_eth_mac(bp, false);
3045 if (rc)
3046 return rc;
3047 }
3048
3049 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
3050
3051 if (netif_running(dev))
3052 rc = bnx2x_set_eth_mac(bp, true);
3053
3054 return rc;
3055 }
3056
3057 static void bnx2x_free_fp_mem_at(struct bnx2x *bp, int fp_index)
3058 {
3059 union host_hc_status_block *sb = &bnx2x_fp(bp, fp_index, status_blk);
3060 struct bnx2x_fastpath *fp = &bp->fp[fp_index];
3061 u8 cos;
3062
3063 /* Common */
3064 #ifdef BCM_CNIC
3065 if (IS_FCOE_IDX(fp_index)) {
3066 memset(sb, 0, sizeof(union host_hc_status_block));
3067 fp->status_blk_mapping = 0;
3068
3069 } else {
3070 #endif
3071 /* status blocks */
3072 if (!CHIP_IS_E1x(bp))
3073 BNX2X_PCI_FREE(sb->e2_sb,
3074 bnx2x_fp(bp, fp_index,
3075 status_blk_mapping),
3076 sizeof(struct host_hc_status_block_e2));
3077 else
3078 BNX2X_PCI_FREE(sb->e1x_sb,
3079 bnx2x_fp(bp, fp_index,
3080 status_blk_mapping),
3081 sizeof(struct host_hc_status_block_e1x));
3082 #ifdef BCM_CNIC
3083 }
3084 #endif
3085 /* Rx */
3086 if (!skip_rx_queue(bp, fp_index)) {
3087 bnx2x_free_rx_bds(fp);
3088
3089 /* fastpath rx rings: rx_buf rx_desc rx_comp */
3090 BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_buf_ring));
3091 BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_desc_ring),
3092 bnx2x_fp(bp, fp_index, rx_desc_mapping),
3093 sizeof(struct eth_rx_bd) * NUM_RX_BD);
3094
3095 BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_comp_ring),
3096 bnx2x_fp(bp, fp_index, rx_comp_mapping),
3097 sizeof(struct eth_fast_path_rx_cqe) *
3098 NUM_RCQ_BD);
3099
3100 /* SGE ring */
3101 BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_page_ring));
3102 BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_sge_ring),
3103 bnx2x_fp(bp, fp_index, rx_sge_mapping),
3104 BCM_PAGE_SIZE * NUM_RX_SGE_PAGES);
3105 }
3106
3107 /* Tx */
3108 if (!skip_tx_queue(bp, fp_index)) {
3109 /* fastpath tx rings: tx_buf tx_desc */
3110 for_each_cos_in_tx_queue(fp, cos) {
3111 struct bnx2x_fp_txdata *txdata = &fp->txdata[cos];
3112
3113 DP(BNX2X_MSG_SP,
3114 "freeing tx memory of fp %d cos %d cid %d\n",
3115 fp_index, cos, txdata->cid);
3116
3117 BNX2X_FREE(txdata->tx_buf_ring);
3118 BNX2X_PCI_FREE(txdata->tx_desc_ring,
3119 txdata->tx_desc_mapping,
3120 sizeof(union eth_tx_bd_types) * NUM_TX_BD);
3121 }
3122 }
3123 /* end of fastpath */
3124 }
3125
3126 void bnx2x_free_fp_mem(struct bnx2x *bp)
3127 {
3128 int i;
3129 for_each_queue(bp, i)
3130 bnx2x_free_fp_mem_at(bp, i);
3131 }
3132
3133 static inline void set_sb_shortcuts(struct bnx2x *bp, int index)
3134 {
3135 union host_hc_status_block status_blk = bnx2x_fp(bp, index, status_blk);
3136 if (!CHIP_IS_E1x(bp)) {
3137 bnx2x_fp(bp, index, sb_index_values) =
3138 (__le16 *)status_blk.e2_sb->sb.index_values;
3139 bnx2x_fp(bp, index, sb_running_index) =
3140 (__le16 *)status_blk.e2_sb->sb.running_index;
3141 } else {
3142 bnx2x_fp(bp, index, sb_index_values) =
3143 (__le16 *)status_blk.e1x_sb->sb.index_values;
3144 bnx2x_fp(bp, index, sb_running_index) =
3145 (__le16 *)status_blk.e1x_sb->sb.running_index;
3146 }
3147 }
3148
3149 static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index)
3150 {
3151 union host_hc_status_block *sb;
3152 struct bnx2x_fastpath *fp = &bp->fp[index];
3153 int ring_size = 0;
3154 u8 cos;
3155 int rx_ring_size = 0;
3156
3157 #ifdef BCM_CNIC
3158 if (!bp->rx_ring_size && IS_MF_ISCSI_SD(bp)) {
3159 rx_ring_size = MIN_RX_SIZE_NONTPA;
3160 bp->rx_ring_size = rx_ring_size;
3161 } else
3162 #endif
3163 if (!bp->rx_ring_size) {
3164
3165 rx_ring_size = MAX_RX_AVAIL/BNX2X_NUM_RX_QUEUES(bp);
3166
3167 /* allocate at least number of buffers required by FW */
3168 rx_ring_size = max_t(int, bp->disable_tpa ? MIN_RX_SIZE_NONTPA :
3169 MIN_RX_SIZE_TPA, rx_ring_size);
3170
3171 bp->rx_ring_size = rx_ring_size;
3172 } else /* if rx_ring_size specified - use it */
3173 rx_ring_size = bp->rx_ring_size;
3174
3175 /* Common */
3176 sb = &bnx2x_fp(bp, index, status_blk);
3177 #ifdef BCM_CNIC
3178 if (!IS_FCOE_IDX(index)) {
3179 #endif
3180 /* status blocks */
3181 if (!CHIP_IS_E1x(bp))
3182 BNX2X_PCI_ALLOC(sb->e2_sb,
3183 &bnx2x_fp(bp, index, status_blk_mapping),
3184 sizeof(struct host_hc_status_block_e2));
3185 else
3186 BNX2X_PCI_ALLOC(sb->e1x_sb,
3187 &bnx2x_fp(bp, index, status_blk_mapping),
3188 sizeof(struct host_hc_status_block_e1x));
3189 #ifdef BCM_CNIC
3190 }
3191 #endif
3192
3193 /* FCoE Queue uses Default SB and doesn't ACK the SB, thus no need to
3194 * set shortcuts for it.
3195 */
3196 if (!IS_FCOE_IDX(index))
3197 set_sb_shortcuts(bp, index);
3198
3199 /* Tx */
3200 if (!skip_tx_queue(bp, index)) {
3201 /* fastpath tx rings: tx_buf tx_desc */
3202 for_each_cos_in_tx_queue(fp, cos) {
3203 struct bnx2x_fp_txdata *txdata = &fp->txdata[cos];
3204
3205 DP(BNX2X_MSG_SP, "allocating tx memory of "
3206 "fp %d cos %d\n",
3207 index, cos);
3208
3209 BNX2X_ALLOC(txdata->tx_buf_ring,
3210 sizeof(struct sw_tx_bd) * NUM_TX_BD);
3211 BNX2X_PCI_ALLOC(txdata->tx_desc_ring,
3212 &txdata->tx_desc_mapping,
3213 sizeof(union eth_tx_bd_types) * NUM_TX_BD);
3214 }
3215 }
3216
3217 /* Rx */
3218 if (!skip_rx_queue(bp, index)) {
3219 /* fastpath rx rings: rx_buf rx_desc rx_comp */
3220 BNX2X_ALLOC(bnx2x_fp(bp, index, rx_buf_ring),
3221 sizeof(struct sw_rx_bd) * NUM_RX_BD);
3222 BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_desc_ring),
3223 &bnx2x_fp(bp, index, rx_desc_mapping),
3224 sizeof(struct eth_rx_bd) * NUM_RX_BD);
3225
3226 BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_comp_ring),
3227 &bnx2x_fp(bp, index, rx_comp_mapping),
3228 sizeof(struct eth_fast_path_rx_cqe) *
3229 NUM_RCQ_BD);
3230
3231 /* SGE ring */
3232 BNX2X_ALLOC(bnx2x_fp(bp, index, rx_page_ring),
3233 sizeof(struct sw_rx_page) * NUM_RX_SGE);
3234 BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_sge_ring),
3235 &bnx2x_fp(bp, index, rx_sge_mapping),
3236 BCM_PAGE_SIZE * NUM_RX_SGE_PAGES);
3237 /* RX BD ring */
3238 bnx2x_set_next_page_rx_bd(fp);
3239
3240 /* CQ ring */
3241 bnx2x_set_next_page_rx_cq(fp);
3242
3243 /* BDs */
3244 ring_size = bnx2x_alloc_rx_bds(fp, rx_ring_size);
3245 if (ring_size < rx_ring_size)
3246 goto alloc_mem_err;
3247 }
3248
3249 return 0;
3250
3251 /* handles low memory cases */
3252 alloc_mem_err:
3253 BNX2X_ERR("Unable to allocate full memory for queue %d (size %d)\n",
3254 index, ring_size);
3255 /* FW will drop all packets if queue is not big enough,
3256 * In these cases we disable the queue
3257 * Min size is different for OOO, TPA and non-TPA queues
3258 */
3259 if (ring_size < (fp->disable_tpa ?
3260 MIN_RX_SIZE_NONTPA : MIN_RX_SIZE_TPA)) {
3261 /* release memory allocated for this queue */
3262 bnx2x_free_fp_mem_at(bp, index);
3263 return -ENOMEM;
3264 }
3265 return 0;
3266 }
3267
3268 int bnx2x_alloc_fp_mem(struct bnx2x *bp)
3269 {
3270 int i;
3271
3272 /**
3273 * 1. Allocate FP for leading - fatal if error
3274 * 2. {CNIC} Allocate FCoE FP - fatal if error
3275 * 3. {CNIC} Allocate OOO + FWD - disable OOO if error
3276 * 4. Allocate RSS - fix number of queues if error
3277 */
3278
3279 /* leading */
3280 if (bnx2x_alloc_fp_mem_at(bp, 0))
3281 return -ENOMEM;
3282
3283 #ifdef BCM_CNIC
3284 if (!NO_FCOE(bp))
3285 /* FCoE */
3286 if (bnx2x_alloc_fp_mem_at(bp, FCOE_IDX))
3287 /* we will fail load process instead of mark
3288 * NO_FCOE_FLAG
3289 */
3290 return -ENOMEM;
3291 #endif
3292
3293 /* RSS */
3294 for_each_nondefault_eth_queue(bp, i)
3295 if (bnx2x_alloc_fp_mem_at(bp, i))
3296 break;
3297
3298 /* handle memory failures */
3299 if (i != BNX2X_NUM_ETH_QUEUES(bp)) {
3300 int delta = BNX2X_NUM_ETH_QUEUES(bp) - i;
3301
3302 WARN_ON(delta < 0);
3303 #ifdef BCM_CNIC
3304 /**
3305 * move non eth FPs next to last eth FP
3306 * must be done in that order
3307 * FCOE_IDX < FWD_IDX < OOO_IDX
3308 */
3309
3310 /* move FCoE fp even NO_FCOE_FLAG is on */
3311 bnx2x_move_fp(bp, FCOE_IDX, FCOE_IDX - delta);
3312 #endif
3313 bp->num_queues -= delta;
3314 BNX2X_ERR("Adjusted num of queues from %d to %d\n",
3315 bp->num_queues + delta, bp->num_queues);
3316 }
3317
3318 return 0;
3319 }
3320
3321 void bnx2x_free_mem_bp(struct bnx2x *bp)
3322 {
3323 kfree(bp->fp);
3324 kfree(bp->msix_table);
3325 kfree(bp->ilt);
3326 }
3327
3328 int __devinit bnx2x_alloc_mem_bp(struct bnx2x *bp)
3329 {
3330 struct bnx2x_fastpath *fp;
3331 struct msix_entry *tbl;
3332 struct bnx2x_ilt *ilt;
3333 int msix_table_size = 0;
3334
3335 /*
3336 * The biggest MSI-X table we might need is as a maximum number of fast
3337 * path IGU SBs plus default SB (for PF).
3338 */
3339 msix_table_size = bp->igu_sb_cnt + 1;
3340
3341 /* fp array: RSS plus CNIC related L2 queues */
3342 fp = kcalloc(BNX2X_MAX_RSS_COUNT(bp) + NON_ETH_CONTEXT_USE,
3343 sizeof(*fp), GFP_KERNEL);
3344 if (!fp)
3345 goto alloc_err;
3346 bp->fp = fp;
3347
3348 /* msix table */
3349 tbl = kcalloc(msix_table_size, sizeof(*tbl), GFP_KERNEL);
3350 if (!tbl)
3351 goto alloc_err;
3352 bp->msix_table = tbl;
3353
3354 /* ilt */
3355 ilt = kzalloc(sizeof(*ilt), GFP_KERNEL);
3356 if (!ilt)
3357 goto alloc_err;
3358 bp->ilt = ilt;
3359
3360 return 0;
3361 alloc_err:
3362 bnx2x_free_mem_bp(bp);
3363 return -ENOMEM;
3364
3365 }
3366
3367 int bnx2x_reload_if_running(struct net_device *dev)
3368 {
3369 struct bnx2x *bp = netdev_priv(dev);
3370
3371 if (unlikely(!netif_running(dev)))
3372 return 0;
3373
3374 bnx2x_nic_unload(bp, UNLOAD_NORMAL);
3375 return bnx2x_nic_load(bp, LOAD_NORMAL);
3376 }
3377
3378 int bnx2x_get_cur_phy_idx(struct bnx2x *bp)
3379 {
3380 u32 sel_phy_idx = 0;
3381 if (bp->link_params.num_phys <= 1)
3382 return INT_PHY;
3383
3384 if (bp->link_vars.link_up) {
3385 sel_phy_idx = EXT_PHY1;
3386 /* In case link is SERDES, check if the EXT_PHY2 is the one */
3387 if ((bp->link_vars.link_status & LINK_STATUS_SERDES_LINK) &&
3388 (bp->link_params.phy[EXT_PHY2].supported & SUPPORTED_FIBRE))
3389 sel_phy_idx = EXT_PHY2;
3390 } else {
3391
3392 switch (bnx2x_phy_selection(&bp->link_params)) {
3393 case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT:
3394 case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY:
3395 case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY:
3396 sel_phy_idx = EXT_PHY1;
3397 break;
3398 case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY:
3399 case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY:
3400 sel_phy_idx = EXT_PHY2;
3401 break;
3402 }
3403 }
3404
3405 return sel_phy_idx;
3406
3407 }
3408 int bnx2x_get_link_cfg_idx(struct bnx2x *bp)
3409 {
3410 u32 sel_phy_idx = bnx2x_get_cur_phy_idx(bp);
3411 /*
3412 * The selected actived PHY is always after swapping (in case PHY
3413 * swapping is enabled). So when swapping is enabled, we need to reverse
3414 * the configuration
3415 */
3416
3417 if (bp->link_params.multi_phy_config &
3418 PORT_HW_CFG_PHY_SWAPPED_ENABLED) {
3419 if (sel_phy_idx == EXT_PHY1)
3420 sel_phy_idx = EXT_PHY2;
3421 else if (sel_phy_idx == EXT_PHY2)
3422 sel_phy_idx = EXT_PHY1;
3423 }
3424 return LINK_CONFIG_IDX(sel_phy_idx);
3425 }
3426
3427 #if defined(NETDEV_FCOE_WWNN) && defined(BCM_CNIC)
3428 int bnx2x_fcoe_get_wwn(struct net_device *dev, u64 *wwn, int type)
3429 {
3430 struct bnx2x *bp = netdev_priv(dev);
3431 struct cnic_eth_dev *cp = &bp->cnic_eth_dev;
3432
3433 switch (type) {
3434 case NETDEV_FCOE_WWNN:
3435 *wwn = HILO_U64(cp->fcoe_wwn_node_name_hi,
3436 cp->fcoe_wwn_node_name_lo);
3437 break;
3438 case NETDEV_FCOE_WWPN:
3439 *wwn = HILO_U64(cp->fcoe_wwn_port_name_hi,
3440 cp->fcoe_wwn_port_name_lo);
3441 break;
3442 default:
3443 return -EINVAL;
3444 }
3445
3446 return 0;
3447 }
3448 #endif
3449
3450 /* called with rtnl_lock */
3451 int bnx2x_change_mtu(struct net_device *dev, int new_mtu)
3452 {
3453 struct bnx2x *bp = netdev_priv(dev);
3454
3455 if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
3456 netdev_err(dev, "Handling parity error recovery. Try again later\n");
3457 return -EAGAIN;
3458 }
3459
3460 if ((new_mtu > ETH_MAX_JUMBO_PACKET_SIZE) ||
3461 ((new_mtu + ETH_HLEN) < ETH_MIN_PACKET_SIZE))
3462 return -EINVAL;
3463
3464 /* This does not race with packet allocation
3465 * because the actual alloc size is
3466 * only updated as part of load
3467 */
3468 dev->mtu = new_mtu;
3469
3470 return bnx2x_reload_if_running(dev);
3471 }
3472
3473 netdev_features_t bnx2x_fix_features(struct net_device *dev,
3474 netdev_features_t features)
3475 {
3476 struct bnx2x *bp = netdev_priv(dev);
3477
3478 /* TPA requires Rx CSUM offloading */
3479 if (!(features & NETIF_F_RXCSUM) || bp->disable_tpa)
3480 features &= ~NETIF_F_LRO;
3481
3482 return features;
3483 }
3484
3485 int bnx2x_set_features(struct net_device *dev, netdev_features_t features)
3486 {
3487 struct bnx2x *bp = netdev_priv(dev);
3488 u32 flags = bp->flags;
3489 bool bnx2x_reload = false;
3490
3491 if (features & NETIF_F_LRO)
3492 flags |= TPA_ENABLE_FLAG;
3493 else
3494 flags &= ~TPA_ENABLE_FLAG;
3495
3496 if (features & NETIF_F_LOOPBACK) {
3497 if (bp->link_params.loopback_mode != LOOPBACK_BMAC) {
3498 bp->link_params.loopback_mode = LOOPBACK_BMAC;
3499 bnx2x_reload = true;
3500 }
3501 } else {
3502 if (bp->link_params.loopback_mode != LOOPBACK_NONE) {
3503 bp->link_params.loopback_mode = LOOPBACK_NONE;
3504 bnx2x_reload = true;
3505 }
3506 }
3507
3508 if (flags ^ bp->flags) {
3509 bp->flags = flags;
3510 bnx2x_reload = true;
3511 }
3512
3513 if (bnx2x_reload) {
3514 if (bp->recovery_state == BNX2X_RECOVERY_DONE)
3515 return bnx2x_reload_if_running(dev);
3516 /* else: bnx2x_nic_load() will be called at end of recovery */
3517 }
3518
3519 return 0;
3520 }
3521
3522 void bnx2x_tx_timeout(struct net_device *dev)
3523 {
3524 struct bnx2x *bp = netdev_priv(dev);
3525
3526 #ifdef BNX2X_STOP_ON_ERROR
3527 if (!bp->panic)
3528 bnx2x_panic();
3529 #endif
3530
3531 smp_mb__before_clear_bit();
3532 set_bit(BNX2X_SP_RTNL_TX_TIMEOUT, &bp->sp_rtnl_state);
3533 smp_mb__after_clear_bit();
3534
3535 /* This allows the netif to be shutdown gracefully before resetting */
3536 schedule_delayed_work(&bp->sp_rtnl_task, 0);
3537 }
3538
3539 int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state)
3540 {
3541 struct net_device *dev = pci_get_drvdata(pdev);
3542 struct bnx2x *bp;
3543
3544 if (!dev) {
3545 dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n");
3546 return -ENODEV;
3547 }
3548 bp = netdev_priv(dev);
3549
3550 rtnl_lock();
3551
3552 pci_save_state(pdev);
3553
3554 if (!netif_running(dev)) {
3555 rtnl_unlock();
3556 return 0;
3557 }
3558
3559 netif_device_detach(dev);
3560
3561 bnx2x_nic_unload(bp, UNLOAD_CLOSE);
3562
3563 bnx2x_set_power_state(bp, pci_choose_state(pdev, state));
3564
3565 rtnl_unlock();
3566
3567 return 0;
3568 }
3569
3570 int bnx2x_resume(struct pci_dev *pdev)
3571 {
3572 struct net_device *dev = pci_get_drvdata(pdev);
3573 struct bnx2x *bp;
3574 int rc;
3575
3576 if (!dev) {
3577 dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n");
3578 return -ENODEV;
3579 }
3580 bp = netdev_priv(dev);
3581
3582 if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
3583 netdev_err(dev, "Handling parity error recovery. Try again later\n");
3584 return -EAGAIN;
3585 }
3586
3587 rtnl_lock();
3588
3589 pci_restore_state(pdev);
3590
3591 if (!netif_running(dev)) {
3592 rtnl_unlock();
3593 return 0;
3594 }
3595
3596 bnx2x_set_power_state(bp, PCI_D0);
3597 netif_device_attach(dev);
3598
3599 rc = bnx2x_nic_load(bp, LOAD_OPEN);
3600
3601 rtnl_unlock();
3602
3603 return rc;
3604 }
3605
3606
3607 void bnx2x_set_ctx_validation(struct bnx2x *bp, struct eth_context *cxt,
3608 u32 cid)
3609 {
3610 /* ustorm cxt validation */
3611 cxt->ustorm_ag_context.cdu_usage =
3612 CDU_RSRVD_VALUE_TYPE_A(HW_CID(bp, cid),
3613 CDU_REGION_NUMBER_UCM_AG, ETH_CONNECTION_TYPE);
3614 /* xcontext validation */
3615 cxt->xstorm_ag_context.cdu_reserved =
3616 CDU_RSRVD_VALUE_TYPE_A(HW_CID(bp, cid),
3617 CDU_REGION_NUMBER_XCM_AG, ETH_CONNECTION_TYPE);
3618 }
3619
3620 static inline void storm_memset_hc_timeout(struct bnx2x *bp, u8 port,
3621 u8 fw_sb_id, u8 sb_index,
3622 u8 ticks)
3623 {
3624
3625 u32 addr = BAR_CSTRORM_INTMEM +
3626 CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(fw_sb_id, sb_index);
3627 REG_WR8(bp, addr, ticks);
3628 DP(NETIF_MSG_HW, "port %x fw_sb_id %d sb_index %d ticks %d\n",
3629 port, fw_sb_id, sb_index, ticks);
3630 }
3631
3632 static inline void storm_memset_hc_disable(struct bnx2x *bp, u8 port,
3633 u16 fw_sb_id, u8 sb_index,
3634 u8 disable)
3635 {
3636 u32 enable_flag = disable ? 0 : (1 << HC_INDEX_DATA_HC_ENABLED_SHIFT);
3637 u32 addr = BAR_CSTRORM_INTMEM +
3638 CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(fw_sb_id, sb_index);
3639 u16 flags = REG_RD16(bp, addr);
3640 /* clear and set */
3641 flags &= ~HC_INDEX_DATA_HC_ENABLED;
3642 flags |= enable_flag;
3643 REG_WR16(bp, addr, flags);
3644 DP(NETIF_MSG_HW, "port %x fw_sb_id %d sb_index %d disable %d\n",
3645 port, fw_sb_id, sb_index, disable);
3646 }
3647
3648 void bnx2x_update_coalesce_sb_index(struct bnx2x *bp, u8 fw_sb_id,
3649 u8 sb_index, u8 disable, u16 usec)
3650 {
3651 int port = BP_PORT(bp);
3652 u8 ticks = usec / BNX2X_BTR;
3653
3654 storm_memset_hc_timeout(bp, port, fw_sb_id, sb_index, ticks);
3655
3656 disable = disable ? 1 : (usec ? 0 : 1);
3657 storm_memset_hc_disable(bp, port, fw_sb_id, sb_index, disable);
3658 }
Linux 2.6 libata-dev (mirror)