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mwl8k: get rid of mwl8k_stop() workqueue use
[linux-2.6/libata-dev.git] / drivers / net / wireless / mwl8k.c
blobb88b1e001f07f6a1aedfe19af4801d2325bb8942
1 /*
2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
4 *
5 * Copyright (C) 2008 Marvell Semiconductor Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/spinlock.h>
16 #include <linux/list.h>
17 #include <linux/pci.h>
18 #include <linux/delay.h>
19 #include <linux/completion.h>
20 #include <linux/etherdevice.h>
21 #include <net/mac80211.h>
22 #include <linux/moduleparam.h>
23 #include <linux/firmware.h>
24 #include <linux/workqueue.h>
25
26 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
27 #define MWL8K_NAME KBUILD_MODNAME
28 #define MWL8K_VERSION "0.9.1"
29
30 MODULE_DESCRIPTION(MWL8K_DESC);
31 MODULE_VERSION(MWL8K_VERSION);
32 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
33 MODULE_LICENSE("GPL");
34
35 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
36 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
37 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
38 { }
39 };
40 MODULE_DEVICE_TABLE(pci, mwl8k_table);
41
42 /* Register definitions */
43 #define MWL8K_HIU_GEN_PTR 0x00000c10
44 #define MWL8K_MODE_STA 0x0000005a
45 #define MWL8K_MODE_AP 0x000000a5
46 #define MWL8K_HIU_INT_CODE 0x00000c14
47 #define MWL8K_FWSTA_READY 0xf0f1f2f4
48 #define MWL8K_FWAP_READY 0xf1f2f4a5
49 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
50 #define MWL8K_HIU_SCRATCH 0x00000c40
51
52 /* Host->device communications */
53 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
54 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
55 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
56 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
57 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
58 #define MWL8K_H2A_INT_DUMMY (1 << 20)
59 #define MWL8K_H2A_INT_RESET (1 << 15)
60 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
61 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
62
63 /* Device->host communications */
64 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
65 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
66 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
67 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
68 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
69 #define MWL8K_A2H_INT_DUMMY (1 << 20)
70 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
71 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
72 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
73 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
74 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
75 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
76 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
77 #define MWL8K_A2H_INT_RX_READY (1 << 1)
78 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
79
80 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
81 MWL8K_A2H_INT_CHNL_SWITCHED | \
82 MWL8K_A2H_INT_QUEUE_EMPTY | \
83 MWL8K_A2H_INT_RADAR_DETECT | \
84 MWL8K_A2H_INT_RADIO_ON | \
85 MWL8K_A2H_INT_RADIO_OFF | \
86 MWL8K_A2H_INT_MAC_EVENT | \
87 MWL8K_A2H_INT_OPC_DONE | \
88 MWL8K_A2H_INT_RX_READY | \
89 MWL8K_A2H_INT_TX_DONE)
90
91 /* WME stream classes */
92 #define WME_AC_BE 0 /* best effort */
93 #define WME_AC_BK 1 /* background */
94 #define WME_AC_VI 2 /* video */
95 #define WME_AC_VO 3 /* voice */
96
97 #define MWL8K_RX_QUEUES 1
98 #define MWL8K_TX_QUEUES 4
99
100 struct mwl8k_rx_queue {
101 int rx_desc_count;
102
103 /* hw receives here */
104 int rx_head;
105
106 /* refill descs here */
107 int rx_tail;
108
109 struct mwl8k_rx_desc *rx_desc_area;
110 dma_addr_t rx_desc_dma;
111 struct sk_buff **rx_skb;
112 };
113
114 struct mwl8k_tx_queue {
115 /* hw transmits here */
116 int tx_head;
117
118 /* sw appends here */
119 int tx_tail;
120
121 struct ieee80211_tx_queue_stats tx_stats;
122 struct mwl8k_tx_desc *tx_desc_area;
123 dma_addr_t tx_desc_dma;
124 struct sk_buff **tx_skb;
125 };
126
127 /* Pointers to the firmware data and meta information about it. */
128 struct mwl8k_firmware {
129 /* Microcode */
130 struct firmware *ucode;
131
132 /* Boot helper code */
133 struct firmware *helper;
134 };
135
136 struct mwl8k_priv {
137 void __iomem *regs;
138 struct ieee80211_hw *hw;
139
140 struct pci_dev *pdev;
141 u8 name[16];
142
143 /* firmware files and meta data */
144 struct mwl8k_firmware fw;
145 u32 part_num;
146
147 /* firmware access */
148 struct mutex fw_mutex;
149 struct task_struct *fw_mutex_owner;
150 int fw_mutex_depth;
151 struct completion *tx_wait;
152 struct completion *hostcmd_wait;
153
154 /* lock held over TX and TX reap */
155 spinlock_t tx_lock;
156
157 struct ieee80211_vif *vif;
158
159 struct ieee80211_channel *current_channel;
160
161 /* power management status cookie from firmware */
162 u32 *cookie;
163 dma_addr_t cookie_dma;
164
165 u16 num_mcaddrs;
166 u8 hw_rev;
167 __le32 fw_rev;
168
169 /*
170 * Running count of TX packets in flight, to avoid
171 * iterating over the transmit rings each time.
172 */
173 int pending_tx_pkts;
174
175 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
176 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
177
178 /* PHY parameters */
179 struct ieee80211_supported_band band;
180 struct ieee80211_channel channels[14];
181 struct ieee80211_rate rates[12];
182
183 bool radio_on;
184 bool radio_short_preamble;
185 bool wmm_enabled;
186
187 /* XXX need to convert this to handle multiple interfaces */
188 bool capture_beacon;
189 u8 capture_bssid[ETH_ALEN];
190 struct sk_buff *beacon_skb;
191
192 /*
193 * This FJ worker has to be global as it is scheduled from the
194 * RX handler. At this point we don't know which interface it
195 * belongs to until the list of bssids waiting to complete join
196 * is checked.
197 */
198 struct work_struct finalize_join_worker;
199
200 /* Tasklet to reclaim TX descriptors and buffers after tx */
201 struct tasklet_struct tx_reclaim_task;
202
203 /* Work thread to serialize configuration requests */
204 struct workqueue_struct *config_wq;
205 };
206
207 /* Per interface specific private data */
208 struct mwl8k_vif {
209 /* backpointer to parent config block */
210 struct mwl8k_priv *priv;
211
212 /* BSS config of AP or IBSS from mac80211*/
213 struct ieee80211_bss_conf bss_info;
214
215 /* BSSID of AP or IBSS */
216 u8 bssid[ETH_ALEN];
217 u8 mac_addr[ETH_ALEN];
218
219 /*
220 * Subset of supported legacy rates.
221 * Intersection of AP and STA supported rates.
222 */
223 struct ieee80211_rate legacy_rates[12];
224
225 /* number of supported legacy rates */
226 u8 legacy_nrates;
227
228 /* Index into station database.Returned by update_sta_db call */
229 u8 peer_id;
230
231 /* Non AMPDU sequence number assigned by driver */
232 u16 seqno;
233 };
234
235 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
236
237 static const struct ieee80211_channel mwl8k_channels[] = {
238 { .center_freq = 2412, .hw_value = 1, },
239 { .center_freq = 2417, .hw_value = 2, },
240 { .center_freq = 2422, .hw_value = 3, },
241 { .center_freq = 2427, .hw_value = 4, },
242 { .center_freq = 2432, .hw_value = 5, },
243 { .center_freq = 2437, .hw_value = 6, },
244 { .center_freq = 2442, .hw_value = 7, },
245 { .center_freq = 2447, .hw_value = 8, },
246 { .center_freq = 2452, .hw_value = 9, },
247 { .center_freq = 2457, .hw_value = 10, },
248 { .center_freq = 2462, .hw_value = 11, },
249 };
250
251 static const struct ieee80211_rate mwl8k_rates[] = {
252 { .bitrate = 10, .hw_value = 2, },
253 { .bitrate = 20, .hw_value = 4, },
254 { .bitrate = 55, .hw_value = 11, },
255 { .bitrate = 60, .hw_value = 12, },
256 { .bitrate = 90, .hw_value = 18, },
257 { .bitrate = 110, .hw_value = 22, },
258 { .bitrate = 120, .hw_value = 24, },
259 { .bitrate = 180, .hw_value = 36, },
260 { .bitrate = 240, .hw_value = 48, },
261 { .bitrate = 360, .hw_value = 72, },
262 { .bitrate = 480, .hw_value = 96, },
263 { .bitrate = 540, .hw_value = 108, },
264 };
265
266 /* Set or get info from Firmware */
267 #define MWL8K_CMD_SET 0x0001
268 #define MWL8K_CMD_GET 0x0000
269
270 /* Firmware command codes */
271 #define MWL8K_CMD_CODE_DNLD 0x0001
272 #define MWL8K_CMD_GET_HW_SPEC 0x0003
273 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
274 #define MWL8K_CMD_GET_STAT 0x0014
275 #define MWL8K_CMD_RADIO_CONTROL 0x001c
276 #define MWL8K_CMD_RF_TX_POWER 0x001e
277 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
278 #define MWL8K_CMD_SET_POST_SCAN 0x0108
279 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
280 #define MWL8K_CMD_SET_AID 0x010d
281 #define MWL8K_CMD_SET_RATE 0x0110
282 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
283 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
284 #define MWL8K_CMD_SET_SLOT 0x0114
285 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
286 #define MWL8K_CMD_SET_WMM_MODE 0x0123
287 #define MWL8K_CMD_MIMO_CONFIG 0x0125
288 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
289 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
290 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
291 #define MWL8K_CMD_UPDATE_STADB 0x1123
292
293 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
294 {
295 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
296 snprintf(buf, bufsize, "%s", #x);\
297 return buf;\
298 } while (0)
299 switch (cmd & ~0x8000) {
300 MWL8K_CMDNAME(CODE_DNLD);
301 MWL8K_CMDNAME(GET_HW_SPEC);
302 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
303 MWL8K_CMDNAME(GET_STAT);
304 MWL8K_CMDNAME(RADIO_CONTROL);
305 MWL8K_CMDNAME(RF_TX_POWER);
306 MWL8K_CMDNAME(SET_PRE_SCAN);
307 MWL8K_CMDNAME(SET_POST_SCAN);
308 MWL8K_CMDNAME(SET_RF_CHANNEL);
309 MWL8K_CMDNAME(SET_AID);
310 MWL8K_CMDNAME(SET_RATE);
311 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
312 MWL8K_CMDNAME(RTS_THRESHOLD);
313 MWL8K_CMDNAME(SET_SLOT);
314 MWL8K_CMDNAME(SET_EDCA_PARAMS);
315 MWL8K_CMDNAME(SET_WMM_MODE);
316 MWL8K_CMDNAME(MIMO_CONFIG);
317 MWL8K_CMDNAME(USE_FIXED_RATE);
318 MWL8K_CMDNAME(ENABLE_SNIFFER);
319 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
320 MWL8K_CMDNAME(UPDATE_STADB);
321 default:
322 snprintf(buf, bufsize, "0x%x", cmd);
323 }
324 #undef MWL8K_CMDNAME
325
326 return buf;
327 }
328
329 /* Hardware and firmware reset */
330 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
331 {
332 iowrite32(MWL8K_H2A_INT_RESET,
333 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
334 iowrite32(MWL8K_H2A_INT_RESET,
335 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
336 msleep(20);
337 }
338
339 /* Release fw image */
340 static void mwl8k_release_fw(struct firmware **fw)
341 {
342 if (*fw == NULL)
343 return;
344 release_firmware(*fw);
345 *fw = NULL;
346 }
347
348 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
349 {
350 mwl8k_release_fw(&priv->fw.ucode);
351 mwl8k_release_fw(&priv->fw.helper);
352 }
353
354 /* Request fw image */
355 static int mwl8k_request_fw(struct mwl8k_priv *priv,
356 const char *fname, struct firmware **fw)
357 {
358 /* release current image */
359 if (*fw != NULL)
360 mwl8k_release_fw(fw);
361
362 return request_firmware((const struct firmware **)fw,
363 fname, &priv->pdev->dev);
364 }
365
366 static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
367 {
368 u8 filename[64];
369 int rc;
370
371 priv->part_num = part_num;
372
373 snprintf(filename, sizeof(filename),
374 "mwl8k/helper_%u.fw", priv->part_num);
375
376 rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
377 if (rc) {
378 printk(KERN_ERR
379 "%s Error requesting helper firmware file %s\n",
380 pci_name(priv->pdev), filename);
381 return rc;
382 }
383
384 snprintf(filename, sizeof(filename),
385 "mwl8k/fmimage_%u.fw", priv->part_num);
386
387 rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
388 if (rc) {
389 printk(KERN_ERR "%s Error requesting firmware file %s\n",
390 pci_name(priv->pdev), filename);
391 mwl8k_release_fw(&priv->fw.helper);
392 return rc;
393 }
394
395 return 0;
396 }
397
398 struct mwl8k_cmd_pkt {
399 __le16 code;
400 __le16 length;
401 __le16 seq_num;
402 __le16 result;
403 char payload[0];
404 } __attribute__((packed));
405
406 /*
407 * Firmware loading.
408 */
409 static int
410 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
411 {
412 void __iomem *regs = priv->regs;
413 dma_addr_t dma_addr;
414 int loops;
415
416 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
417 if (pci_dma_mapping_error(priv->pdev, dma_addr))
418 return -ENOMEM;
419
420 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
421 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
422 iowrite32(MWL8K_H2A_INT_DOORBELL,
423 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
424 iowrite32(MWL8K_H2A_INT_DUMMY,
425 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
426
427 loops = 1000;
428 do {
429 u32 int_code;
430
431 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
432 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
433 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
434 break;
435 }
436
437 udelay(1);
438 } while (--loops);
439
440 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
441
442 return loops ? 0 : -ETIMEDOUT;
443 }
444
445 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
446 const u8 *data, size_t length)
447 {
448 struct mwl8k_cmd_pkt *cmd;
449 int done;
450 int rc = 0;
451
452 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
453 if (cmd == NULL)
454 return -ENOMEM;
455
456 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
457 cmd->seq_num = 0;
458 cmd->result = 0;
459
460 done = 0;
461 while (length) {
462 int block_size = length > 256 ? 256 : length;
463
464 memcpy(cmd->payload, data + done, block_size);
465 cmd->length = cpu_to_le16(block_size);
466
467 rc = mwl8k_send_fw_load_cmd(priv, cmd,
468 sizeof(*cmd) + block_size);
469 if (rc)
470 break;
471
472 done += block_size;
473 length -= block_size;
474 }
475
476 if (!rc) {
477 cmd->length = 0;
478 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
479 }
480
481 kfree(cmd);
482
483 return rc;
484 }
485
486 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
487 const u8 *data, size_t length)
488 {
489 unsigned char *buffer;
490 int may_continue, rc = 0;
491 u32 done, prev_block_size;
492
493 buffer = kmalloc(1024, GFP_KERNEL);
494 if (buffer == NULL)
495 return -ENOMEM;
496
497 done = 0;
498 prev_block_size = 0;
499 may_continue = 1000;
500 while (may_continue > 0) {
501 u32 block_size;
502
503 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
504 if (block_size & 1) {
505 block_size &= ~1;
506 may_continue--;
507 } else {
508 done += prev_block_size;
509 length -= prev_block_size;
510 }
511
512 if (block_size > 1024 || block_size > length) {
513 rc = -EOVERFLOW;
514 break;
515 }
516
517 if (length == 0) {
518 rc = 0;
519 break;
520 }
521
522 if (block_size == 0) {
523 rc = -EPROTO;
524 may_continue--;
525 udelay(1);
526 continue;
527 }
528
529 prev_block_size = block_size;
530 memcpy(buffer, data + done, block_size);
531
532 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
533 if (rc)
534 break;
535 }
536
537 if (!rc && length != 0)
538 rc = -EREMOTEIO;
539
540 kfree(buffer);
541
542 return rc;
543 }
544
545 static int mwl8k_load_firmware(struct mwl8k_priv *priv)
546 {
547 int loops, rc;
548
549 const u8 *ucode = priv->fw.ucode->data;
550 size_t ucode_len = priv->fw.ucode->size;
551 const u8 *helper = priv->fw.helper->data;
552 size_t helper_len = priv->fw.helper->size;
553
554 if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
555 rc = mwl8k_load_fw_image(priv, helper, helper_len);
556 if (rc) {
557 printk(KERN_ERR "%s: unable to load firmware "
558 "helper image\n", pci_name(priv->pdev));
559 return rc;
560 }
561 msleep(1);
562
563 rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
564 } else {
565 rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
566 }
567
568 if (rc) {
569 printk(KERN_ERR "%s: unable to load firmware data\n",
570 pci_name(priv->pdev));
571 return rc;
572 }
573
574 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
575 msleep(1);
576
577 loops = 200000;
578 do {
579 if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
580 == MWL8K_FWSTA_READY)
581 break;
582 udelay(1);
583 } while (--loops);
584
585 return loops ? 0 : -ETIMEDOUT;
586 }
587
588
589 /*
590 * Defines shared between transmission and reception.
591 */
592 /* HT control fields for firmware */
593 struct ewc_ht_info {
594 __le16 control1;
595 __le16 control2;
596 __le16 control3;
597 } __attribute__((packed));
598
599 /* Firmware Station database operations */
600 #define MWL8K_STA_DB_ADD_ENTRY 0
601 #define MWL8K_STA_DB_MODIFY_ENTRY 1
602 #define MWL8K_STA_DB_DEL_ENTRY 2
603 #define MWL8K_STA_DB_FLUSH 3
604
605 /* Peer Entry flags - used to define the type of the peer node */
606 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
607
608 #define MWL8K_IEEE_LEGACY_DATA_RATES 12
609 #define MWL8K_MCS_BITMAP_SIZE 16
610
611 struct peer_capability_info {
612 /* Peer type - AP vs. STA. */
613 __u8 peer_type;
614
615 /* Basic 802.11 capabilities from assoc resp. */
616 __le16 basic_caps;
617
618 /* Set if peer supports 802.11n high throughput (HT). */
619 __u8 ht_support;
620
621 /* Valid if HT is supported. */
622 __le16 ht_caps;
623 __u8 extended_ht_caps;
624 struct ewc_ht_info ewc_info;
625
626 /* Legacy rate table. Intersection of our rates and peer rates. */
627 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
628
629 /* HT rate table. Intersection of our rates and peer rates. */
630 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
631 __u8 pad[16];
632
633 /* If set, interoperability mode, no proprietary extensions. */
634 __u8 interop;
635 __u8 pad2;
636 __u8 station_id;
637 __le16 amsdu_enabled;
638 } __attribute__((packed));
639
640 /* Inline functions to manipulate QoS field in data descriptor. */
641 static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
642 {
643 u16 val_mask = 1 << 4;
644
645 /* End of Service Period Bit 4 */
646 return qos | val_mask;
647 }
648
649 static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
650 {
651 u16 val_mask = 0x3;
652 u8 shift = 5;
653 u16 qos_mask = ~(val_mask << shift);
654
655 /* Ack Policy Bit 5-6 */
656 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
657 }
658
659 static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
660 {
661 u16 val_mask = 1 << 7;
662
663 /* AMSDU present Bit 7 */
664 return qos | val_mask;
665 }
666
667 static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
668 {
669 u16 val_mask = 0xff;
670 u8 shift = 8;
671 u16 qos_mask = ~(val_mask << shift);
672
673 /* Queue Length Bits 8-15 */
674 return (qos & qos_mask) | ((len & val_mask) << shift);
675 }
676
677 /* DMA header used by firmware and hardware. */
678 struct mwl8k_dma_data {
679 __le16 fwlen;
680 struct ieee80211_hdr wh;
681 } __attribute__((packed));
682
683 /* Routines to add/remove DMA header from skb. */
684 static inline void mwl8k_remove_dma_header(struct sk_buff *skb)
685 {
686 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)skb->data;
687 void *dst, *src = &tr->wh;
688 int hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
689 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
690
691 dst = (void *)tr + space;
692 if (dst != src) {
693 memmove(dst, src, hdrlen);
694 skb_pull(skb, space);
695 }
696 }
697
698 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
699 {
700 struct ieee80211_hdr *wh;
701 u32 hdrlen, pktlen;
702 struct mwl8k_dma_data *tr;
703
704 wh = (struct ieee80211_hdr *)skb->data;
705 hdrlen = ieee80211_hdrlen(wh->frame_control);
706 pktlen = skb->len;
707
708 /*
709 * Copy up/down the 802.11 header; the firmware requires
710 * we present a 2-byte payload length followed by a
711 * 4-address header (w/o QoS), followed (optionally) by
712 * any WEP/ExtIV header (but only filled in for CCMP).
713 */
714 if (hdrlen != sizeof(struct mwl8k_dma_data))
715 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
716
717 tr = (struct mwl8k_dma_data *)skb->data;
718 if (wh != &tr->wh)
719 memmove(&tr->wh, wh, hdrlen);
720
721 /* Clear addr4 */
722 memset(tr->wh.addr4, 0, ETH_ALEN);
723
724 /*
725 * Firmware length is the length of the fully formed "802.11
726 * payload". That is, everything except for the 802.11 header.
727 * This includes all crypto material including the MIC.
728 */
729 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
730 }
731
732
733 /*
734 * Packet reception.
735 */
736 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
737
738 struct mwl8k_rx_desc {
739 __le16 pkt_len;
740 __u8 link_quality;
741 __u8 noise_level;
742 __le32 pkt_phys_addr;
743 __le32 next_rx_desc_phys_addr;
744 __le16 qos_control;
745 __le16 rate_info;
746 __le32 pad0[4];
747 __u8 rssi;
748 __u8 channel;
749 __le16 pad1;
750 __u8 rx_ctrl;
751 __u8 rx_status;
752 __u8 pad2[2];
753 } __attribute__((packed));
754
755 #define MWL8K_RX_DESCS 256
756 #define MWL8K_RX_MAXSZ 3800
757
758 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
759 {
760 struct mwl8k_priv *priv = hw->priv;
761 struct mwl8k_rx_queue *rxq = priv->rxq + index;
762 int size;
763 int i;
764
765 rxq->rx_desc_count = 0;
766 rxq->rx_head = 0;
767 rxq->rx_tail = 0;
768
769 size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
770
771 rxq->rx_desc_area =
772 pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
773 if (rxq->rx_desc_area == NULL) {
774 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
775 priv->name);
776 return -ENOMEM;
777 }
778 memset(rxq->rx_desc_area, 0, size);
779
780 rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
781 sizeof(*rxq->rx_skb), GFP_KERNEL);
782 if (rxq->rx_skb == NULL) {
783 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
784 priv->name);
785 pci_free_consistent(priv->pdev, size,
786 rxq->rx_desc_area, rxq->rx_desc_dma);
787 return -ENOMEM;
788 }
789 memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
790
791 for (i = 0; i < MWL8K_RX_DESCS; i++) {
792 struct mwl8k_rx_desc *rx_desc;
793 int nexti;
794
795 rx_desc = rxq->rx_desc_area + i;
796 nexti = (i + 1) % MWL8K_RX_DESCS;
797
798 rx_desc->next_rx_desc_phys_addr =
799 cpu_to_le32(rxq->rx_desc_dma
800 + nexti * sizeof(*rx_desc));
801 rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
802 }
803
804 return 0;
805 }
806
807 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
808 {
809 struct mwl8k_priv *priv = hw->priv;
810 struct mwl8k_rx_queue *rxq = priv->rxq + index;
811 int refilled;
812
813 refilled = 0;
814 while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
815 struct sk_buff *skb;
816 int rx;
817
818 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
819 if (skb == NULL)
820 break;
821
822 rxq->rx_desc_count++;
823
824 rx = rxq->rx_tail;
825 rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
826
827 rxq->rx_desc_area[rx].pkt_phys_addr =
828 cpu_to_le32(pci_map_single(priv->pdev, skb->data,
829 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
830
831 rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
832 rxq->rx_skb[rx] = skb;
833 wmb();
834 rxq->rx_desc_area[rx].rx_ctrl = 0;
835
836 refilled++;
837 }
838
839 return refilled;
840 }
841
842 /* Must be called only when the card's reception is completely halted */
843 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
844 {
845 struct mwl8k_priv *priv = hw->priv;
846 struct mwl8k_rx_queue *rxq = priv->rxq + index;
847 int i;
848
849 for (i = 0; i < MWL8K_RX_DESCS; i++) {
850 if (rxq->rx_skb[i] != NULL) {
851 unsigned long addr;
852
853 addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
854 pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
855 PCI_DMA_FROMDEVICE);
856 kfree_skb(rxq->rx_skb[i]);
857 rxq->rx_skb[i] = NULL;
858 }
859 }
860
861 kfree(rxq->rx_skb);
862 rxq->rx_skb = NULL;
863
864 pci_free_consistent(priv->pdev,
865 MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
866 rxq->rx_desc_area, rxq->rx_desc_dma);
867 rxq->rx_desc_area = NULL;
868 }
869
870
871 /*
872 * Scan a list of BSSIDs to process for finalize join.
873 * Allows for extension to process multiple BSSIDs.
874 */
875 static inline int
876 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
877 {
878 return priv->capture_beacon &&
879 ieee80211_is_beacon(wh->frame_control) &&
880 !compare_ether_addr(wh->addr3, priv->capture_bssid);
881 }
882
883 static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
884 struct sk_buff *skb)
885 {
886 priv->capture_beacon = false;
887 memset(priv->capture_bssid, 0, ETH_ALEN);
888
889 /*
890 * Use GFP_ATOMIC as rxq_process is called from
891 * the primary interrupt handler, memory allocation call
892 * must not sleep.
893 */
894 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
895 if (priv->beacon_skb != NULL)
896 queue_work(priv->config_wq,
897 &priv->finalize_join_worker);
898 }
899
900 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
901 {
902 struct mwl8k_priv *priv = hw->priv;
903 struct mwl8k_rx_queue *rxq = priv->rxq + index;
904 int processed;
905
906 processed = 0;
907 while (rxq->rx_desc_count && limit--) {
908 struct mwl8k_rx_desc *rx_desc;
909 struct sk_buff *skb;
910 struct ieee80211_rx_status status;
911 unsigned long addr;
912 struct ieee80211_hdr *wh;
913
914 rx_desc = rxq->rx_desc_area + rxq->rx_head;
915 if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
916 break;
917 rmb();
918
919 skb = rxq->rx_skb[rxq->rx_head];
920 if (skb == NULL)
921 break;
922 rxq->rx_skb[rxq->rx_head] = NULL;
923
924 rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
925 rxq->rx_desc_count--;
926
927 addr = le32_to_cpu(rx_desc->pkt_phys_addr);
928 pci_unmap_single(priv->pdev, addr,
929 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
930
931 skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
932 mwl8k_remove_dma_header(skb);
933
934 wh = (struct ieee80211_hdr *)skb->data;
935
936 /*
937 * Check for pending join operation. save a copy of
938 * the beacon and schedule a tasklet to send finalize
939 * join command to the firmware.
940 */
941 if (mwl8k_capture_bssid(priv, wh))
942 mwl8k_save_beacon(priv, skb);
943
944 memset(&status, 0, sizeof(status));
945 status.mactime = 0;
946 status.signal = -rx_desc->rssi;
947 status.noise = -rx_desc->noise_level;
948 status.qual = rx_desc->link_quality;
949 status.antenna = 1;
950 status.rate_idx = 1;
951 status.flag = 0;
952 status.band = IEEE80211_BAND_2GHZ;
953 status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
954 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
955 ieee80211_rx_irqsafe(hw, skb);
956
957 processed++;
958 }
959
960 return processed;
961 }
962
963
964 /*
965 * Packet transmission.
966 */
967
968 /* Transmit queue assignment. */
969 enum {
970 MWL8K_WME_AC_BK = 0, /* background access */
971 MWL8K_WME_AC_BE = 1, /* best effort access */
972 MWL8K_WME_AC_VI = 2, /* video access */
973 MWL8K_WME_AC_VO = 3, /* voice access */
974 };
975
976 /* Transmit packet ACK policy */
977 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
978 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
979
980 #define GET_TXQ(_ac) (\
981 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
982 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
983 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
984 MWL8K_WME_AC_BE)
985
986 #define MWL8K_TXD_STATUS_OK 0x00000001
987 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
988 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
989 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
990 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
991
992 struct mwl8k_tx_desc {
993 __le32 status;
994 __u8 data_rate;
995 __u8 tx_priority;
996 __le16 qos_control;
997 __le32 pkt_phys_addr;
998 __le16 pkt_len;
999 __u8 dest_MAC_addr[ETH_ALEN];
1000 __le32 next_tx_desc_phys_addr;
1001 __le32 reserved;
1002 __le16 rate_info;
1003 __u8 peer_id;
1004 __u8 tx_frag_cnt;
1005 } __attribute__((packed));
1006
1007 #define MWL8K_TX_DESCS 128
1008
1009 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1010 {
1011 struct mwl8k_priv *priv = hw->priv;
1012 struct mwl8k_tx_queue *txq = priv->txq + index;
1013 int size;
1014 int i;
1015
1016 memset(&txq->tx_stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1017 txq->tx_stats.limit = MWL8K_TX_DESCS;
1018 txq->tx_head = 0;
1019 txq->tx_tail = 0;
1020
1021 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1022
1023 txq->tx_desc_area =
1024 pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
1025 if (txq->tx_desc_area == NULL) {
1026 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1027 priv->name);
1028 return -ENOMEM;
1029 }
1030 memset(txq->tx_desc_area, 0, size);
1031
1032 txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
1033 GFP_KERNEL);
1034 if (txq->tx_skb == NULL) {
1035 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1036 priv->name);
1037 pci_free_consistent(priv->pdev, size,
1038 txq->tx_desc_area, txq->tx_desc_dma);
1039 return -ENOMEM;
1040 }
1041 memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
1042
1043 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1044 struct mwl8k_tx_desc *tx_desc;
1045 int nexti;
1046
1047 tx_desc = txq->tx_desc_area + i;
1048 nexti = (i + 1) % MWL8K_TX_DESCS;
1049
1050 tx_desc->status = 0;
1051 tx_desc->next_tx_desc_phys_addr =
1052 cpu_to_le32(txq->tx_desc_dma +
1053 nexti * sizeof(*tx_desc));
1054 }
1055
1056 return 0;
1057 }
1058
1059 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1060 {
1061 iowrite32(MWL8K_H2A_INT_PPA_READY,
1062 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1063 iowrite32(MWL8K_H2A_INT_DUMMY,
1064 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1065 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1066 }
1067
1068 static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
1069 {
1070 return priv->pending_tx_pkts;
1071 }
1072
1073 struct mwl8k_txq_info {
1074 u32 fw_owned;
1075 u32 drv_owned;
1076 u32 unused;
1077 u32 len;
1078 u32 head;
1079 u32 tail;
1080 };
1081
1082 static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1083 struct mwl8k_txq_info *txinfo)
1084 {
1085 int count, desc, status;
1086 struct mwl8k_tx_queue *txq;
1087 struct mwl8k_tx_desc *tx_desc;
1088 int ndescs = 0;
1089
1090 memset(txinfo, 0, MWL8K_TX_QUEUES * sizeof(struct mwl8k_txq_info));
1091
1092 spin_lock_bh(&priv->tx_lock);
1093 for (count = 0; count < MWL8K_TX_QUEUES; count++) {
1094 txq = priv->txq + count;
1095 txinfo[count].len = txq->tx_stats.len;
1096 txinfo[count].head = txq->tx_head;
1097 txinfo[count].tail = txq->tx_tail;
1098 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1099 tx_desc = txq->tx_desc_area + desc;
1100 status = le32_to_cpu(tx_desc->status);
1101
1102 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1103 txinfo[count].fw_owned++;
1104 else
1105 txinfo[count].drv_owned++;
1106
1107 if (tx_desc->pkt_len == 0)
1108 txinfo[count].unused++;
1109 }
1110 }
1111 spin_unlock_bh(&priv->tx_lock);
1112
1113 return ndescs;
1114 }
1115
1116 /*
1117 * Must be called with hw->fw_mutex held and tx queues stopped.
1118 */
1119 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1120 {
1121 struct mwl8k_priv *priv = hw->priv;
1122 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1123 u32 count;
1124 unsigned long timeout;
1125
1126 might_sleep();
1127
1128 spin_lock_bh(&priv->tx_lock);
1129 count = mwl8k_txq_busy(priv);
1130 if (count) {
1131 priv->tx_wait = &cmd_wait;
1132 if (priv->radio_on)
1133 mwl8k_tx_start(priv);
1134 }
1135 spin_unlock_bh(&priv->tx_lock);
1136
1137 if (count) {
1138 struct mwl8k_txq_info txinfo[MWL8K_TX_QUEUES];
1139 int index;
1140 int newcount;
1141
1142 timeout = wait_for_completion_timeout(&cmd_wait,
1143 msecs_to_jiffies(5000));
1144 if (timeout)
1145 return 0;
1146
1147 spin_lock_bh(&priv->tx_lock);
1148 priv->tx_wait = NULL;
1149 newcount = mwl8k_txq_busy(priv);
1150 spin_unlock_bh(&priv->tx_lock);
1151
1152 printk(KERN_ERR "%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n",
1153 __func__, __LINE__, count, newcount);
1154
1155 mwl8k_scan_tx_ring(priv, txinfo);
1156 for (index = 0; index < MWL8K_TX_QUEUES; index++)
1157 printk(KERN_ERR
1158 "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
1159 index,
1160 txinfo[index].len,
1161 txinfo[index].head,
1162 txinfo[index].tail,
1163 txinfo[index].fw_owned,
1164 txinfo[index].drv_owned,
1165 txinfo[index].unused);
1166
1167 return -ETIMEDOUT;
1168 }
1169
1170 return 0;
1171 }
1172
1173 #define MWL8K_TXD_SUCCESS(status) \
1174 ((status) & (MWL8K_TXD_STATUS_OK | \
1175 MWL8K_TXD_STATUS_OK_RETRY | \
1176 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1177
1178 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1179 {
1180 struct mwl8k_priv *priv = hw->priv;
1181 struct mwl8k_tx_queue *txq = priv->txq + index;
1182 int wake = 0;
1183
1184 while (txq->tx_stats.len > 0) {
1185 int tx;
1186 struct mwl8k_tx_desc *tx_desc;
1187 unsigned long addr;
1188 int size;
1189 struct sk_buff *skb;
1190 struct ieee80211_tx_info *info;
1191 u32 status;
1192
1193 tx = txq->tx_head;
1194 tx_desc = txq->tx_desc_area + tx;
1195
1196 status = le32_to_cpu(tx_desc->status);
1197
1198 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1199 if (!force)
1200 break;
1201 tx_desc->status &=
1202 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1203 }
1204
1205 txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
1206 BUG_ON(txq->tx_stats.len == 0);
1207 txq->tx_stats.len--;
1208 priv->pending_tx_pkts--;
1209
1210 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1211 size = le16_to_cpu(tx_desc->pkt_len);
1212 skb = txq->tx_skb[tx];
1213 txq->tx_skb[tx] = NULL;
1214
1215 BUG_ON(skb == NULL);
1216 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1217
1218 mwl8k_remove_dma_header(skb);
1219
1220 /* Mark descriptor as unused */
1221 tx_desc->pkt_phys_addr = 0;
1222 tx_desc->pkt_len = 0;
1223
1224 info = IEEE80211_SKB_CB(skb);
1225 ieee80211_tx_info_clear_status(info);
1226 if (MWL8K_TXD_SUCCESS(status))
1227 info->flags |= IEEE80211_TX_STAT_ACK;
1228
1229 ieee80211_tx_status_irqsafe(hw, skb);
1230
1231 wake = 1;
1232 }
1233
1234 if (wake && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1235 ieee80211_wake_queue(hw, index);
1236 }
1237
1238 /* must be called only when the card's transmit is completely halted */
1239 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1240 {
1241 struct mwl8k_priv *priv = hw->priv;
1242 struct mwl8k_tx_queue *txq = priv->txq + index;
1243
1244 mwl8k_txq_reclaim(hw, index, 1);
1245
1246 kfree(txq->tx_skb);
1247 txq->tx_skb = NULL;
1248
1249 pci_free_consistent(priv->pdev,
1250 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1251 txq->tx_desc_area, txq->tx_desc_dma);
1252 txq->tx_desc_area = NULL;
1253 }
1254
1255 static int
1256 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1257 {
1258 struct mwl8k_priv *priv = hw->priv;
1259 struct ieee80211_tx_info *tx_info;
1260 struct mwl8k_vif *mwl8k_vif;
1261 struct ieee80211_hdr *wh;
1262 struct mwl8k_tx_queue *txq;
1263 struct mwl8k_tx_desc *tx;
1264 dma_addr_t dma;
1265 u32 txstatus;
1266 u8 txdatarate;
1267 u16 qos;
1268
1269 wh = (struct ieee80211_hdr *)skb->data;
1270 if (ieee80211_is_data_qos(wh->frame_control))
1271 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1272 else
1273 qos = 0;
1274
1275 mwl8k_add_dma_header(skb);
1276 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1277
1278 tx_info = IEEE80211_SKB_CB(skb);
1279 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1280
1281 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1282 u16 seqno = mwl8k_vif->seqno;
1283
1284 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1285 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1286 mwl8k_vif->seqno = seqno++ % 4096;
1287 }
1288
1289 /* Setup firmware control bit fields for each frame type. */
1290 txstatus = 0;
1291 txdatarate = 0;
1292 if (ieee80211_is_mgmt(wh->frame_control) ||
1293 ieee80211_is_ctl(wh->frame_control)) {
1294 txdatarate = 0;
1295 qos = mwl8k_qos_setbit_eosp(qos);
1296 /* Set Queue size to unspecified */
1297 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1298 } else if (ieee80211_is_data(wh->frame_control)) {
1299 txdatarate = 1;
1300 if (is_multicast_ether_addr(wh->addr1))
1301 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1302
1303 /* Send pkt in an aggregate if AMPDU frame. */
1304 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1305 qos = mwl8k_qos_setbit_ack(qos,
1306 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1307 else
1308 qos = mwl8k_qos_setbit_ack(qos,
1309 MWL8K_TXD_ACK_POLICY_NORMAL);
1310
1311 if (qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT)
1312 qos = mwl8k_qos_setbit_amsdu(qos);
1313 }
1314
1315 dma = pci_map_single(priv->pdev, skb->data,
1316 skb->len, PCI_DMA_TODEVICE);
1317
1318 if (pci_dma_mapping_error(priv->pdev, dma)) {
1319 printk(KERN_DEBUG "%s: failed to dma map skb, "
1320 "dropping TX frame.\n", priv->name);
1321 dev_kfree_skb(skb);
1322 return NETDEV_TX_OK;
1323 }
1324
1325 spin_lock_bh(&priv->tx_lock);
1326
1327 txq = priv->txq + index;
1328
1329 BUG_ON(txq->tx_skb[txq->tx_tail] != NULL);
1330 txq->tx_skb[txq->tx_tail] = skb;
1331
1332 tx = txq->tx_desc_area + txq->tx_tail;
1333 tx->data_rate = txdatarate;
1334 tx->tx_priority = index;
1335 tx->qos_control = cpu_to_le16(qos);
1336 tx->pkt_phys_addr = cpu_to_le32(dma);
1337 tx->pkt_len = cpu_to_le16(skb->len);
1338 tx->rate_info = 0;
1339 tx->peer_id = mwl8k_vif->peer_id;
1340 wmb();
1341 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1342
1343 txq->tx_stats.count++;
1344 txq->tx_stats.len++;
1345 priv->pending_tx_pkts++;
1346
1347 txq->tx_tail++;
1348 if (txq->tx_tail == MWL8K_TX_DESCS)
1349 txq->tx_tail = 0;
1350
1351 if (txq->tx_head == txq->tx_tail)
1352 ieee80211_stop_queue(hw, index);
1353
1354 mwl8k_tx_start(priv);
1355
1356 spin_unlock_bh(&priv->tx_lock);
1357
1358 return NETDEV_TX_OK;
1359 }
1360
1361
1362 /*
1363 * Firmware access.
1364 *
1365 * We have the following requirements for issuing firmware commands:
1366 * - Some commands require that the packet transmit path is idle when
1367 * the command is issued. (For simplicity, we'll just quiesce the
1368 * transmit path for every command.)
1369 * - There are certain sequences of commands that need to be issued to
1370 * the hardware sequentially, with no other intervening commands.
1371 *
1372 * This leads to an implementation of a "firmware lock" as a mutex that
1373 * can be taken recursively, and which is taken by both the low-level
1374 * command submission function (mwl8k_post_cmd) as well as any users of
1375 * that function that require issuing of an atomic sequence of commands,
1376 * and quiesces the transmit path whenever it's taken.
1377 */
1378 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1379 {
1380 struct mwl8k_priv *priv = hw->priv;
1381
1382 if (priv->fw_mutex_owner != current) {
1383 int rc;
1384
1385 mutex_lock(&priv->fw_mutex);
1386 ieee80211_stop_queues(hw);
1387
1388 rc = mwl8k_tx_wait_empty(hw);
1389 if (rc) {
1390 ieee80211_wake_queues(hw);
1391 mutex_unlock(&priv->fw_mutex);
1392
1393 return rc;
1394 }
1395
1396 priv->fw_mutex_owner = current;
1397 }
1398
1399 priv->fw_mutex_depth++;
1400
1401 return 0;
1402 }
1403
1404 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1405 {
1406 struct mwl8k_priv *priv = hw->priv;
1407
1408 if (!--priv->fw_mutex_depth) {
1409 ieee80211_wake_queues(hw);
1410 priv->fw_mutex_owner = NULL;
1411 mutex_unlock(&priv->fw_mutex);
1412 }
1413 }
1414
1415
1416 /*
1417 * Command processing.
1418 */
1419
1420 /* Timeout firmware commands after 2000ms */
1421 #define MWL8K_CMD_TIMEOUT_MS 2000
1422
1423 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1424 {
1425 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1426 struct mwl8k_priv *priv = hw->priv;
1427 void __iomem *regs = priv->regs;
1428 dma_addr_t dma_addr;
1429 unsigned int dma_size;
1430 int rc;
1431 unsigned long timeout = 0;
1432 u8 buf[32];
1433
1434 cmd->result = 0xFFFF;
1435 dma_size = le16_to_cpu(cmd->length);
1436 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1437 PCI_DMA_BIDIRECTIONAL);
1438 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1439 return -ENOMEM;
1440
1441 rc = mwl8k_fw_lock(hw);
1442 if (rc)
1443 return rc;
1444
1445 priv->hostcmd_wait = &cmd_wait;
1446 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1447 iowrite32(MWL8K_H2A_INT_DOORBELL,
1448 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1449 iowrite32(MWL8K_H2A_INT_DUMMY,
1450 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1451
1452 timeout = wait_for_completion_timeout(&cmd_wait,
1453 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1454
1455 priv->hostcmd_wait = NULL;
1456
1457 mwl8k_fw_unlock(hw);
1458
1459 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1460 PCI_DMA_BIDIRECTIONAL);
1461
1462 if (!timeout) {
1463 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1464 priv->name,
1465 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1466 MWL8K_CMD_TIMEOUT_MS);
1467 rc = -ETIMEDOUT;
1468 } else {
1469 rc = cmd->result ? -EINVAL : 0;
1470 if (rc)
1471 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1472 priv->name,
1473 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1474 cmd->result);
1475 }
1476
1477 return rc;
1478 }
1479
1480 /*
1481 * GET_HW_SPEC.
1482 */
1483 struct mwl8k_cmd_get_hw_spec {
1484 struct mwl8k_cmd_pkt header;
1485 __u8 hw_rev;
1486 __u8 host_interface;
1487 __le16 num_mcaddrs;
1488 __u8 perm_addr[ETH_ALEN];
1489 __le16 region_code;
1490 __le32 fw_rev;
1491 __le32 ps_cookie;
1492 __le32 caps;
1493 __u8 mcs_bitmap[16];
1494 __le32 rx_queue_ptr;
1495 __le32 num_tx_queues;
1496 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1497 __le32 caps2;
1498 __le32 num_tx_desc_per_queue;
1499 __le32 total_rx_desc;
1500 } __attribute__((packed));
1501
1502 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1503 {
1504 struct mwl8k_priv *priv = hw->priv;
1505 struct mwl8k_cmd_get_hw_spec *cmd;
1506 int rc;
1507 int i;
1508
1509 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1510 if (cmd == NULL)
1511 return -ENOMEM;
1512
1513 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1514 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1515
1516 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1517 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1518 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
1519 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1520 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1521 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
1522 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1523 cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
1524
1525 rc = mwl8k_post_cmd(hw, &cmd->header);
1526
1527 if (!rc) {
1528 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1529 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1530 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1531 priv->hw_rev = cmd->hw_rev;
1532 }
1533
1534 kfree(cmd);
1535 return rc;
1536 }
1537
1538 /*
1539 * CMD_MAC_MULTICAST_ADR.
1540 */
1541 struct mwl8k_cmd_mac_multicast_adr {
1542 struct mwl8k_cmd_pkt header;
1543 __le16 action;
1544 __le16 numaddr;
1545 __u8 addr[0][ETH_ALEN];
1546 };
1547
1548 #define MWL8K_ENABLE_RX_MULTICAST 0x000F
1549
1550 static struct mwl8k_cmd_pkt *
1551 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
1552 int mc_count, struct dev_addr_list *mclist)
1553 {
1554 struct mwl8k_priv *priv = hw->priv;
1555 struct mwl8k_cmd_mac_multicast_adr *cmd;
1556 int size;
1557 int i;
1558
1559 if (mc_count > priv->num_mcaddrs)
1560 mc_count = priv->num_mcaddrs;
1561
1562 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1563
1564 cmd = kzalloc(size, GFP_ATOMIC);
1565 if (cmd == NULL)
1566 return NULL;
1567
1568 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1569 cmd->header.length = cpu_to_le16(size);
1570 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1571 cmd->numaddr = cpu_to_le16(mc_count);
1572
1573 for (i = 0; i < mc_count && mclist; i++) {
1574 if (mclist->da_addrlen != ETH_ALEN) {
1575 kfree(cmd);
1576 return NULL;
1577 }
1578 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1579 mclist = mclist->next;
1580 }
1581
1582 return &cmd->header;
1583 }
1584
1585 /*
1586 * CMD_802_11_GET_STAT.
1587 */
1588 struct mwl8k_cmd_802_11_get_stat {
1589 struct mwl8k_cmd_pkt header;
1590 __le16 action;
1591 __le32 stats[64];
1592 } __attribute__((packed));
1593
1594 #define MWL8K_STAT_ACK_FAILURE 9
1595 #define MWL8K_STAT_RTS_FAILURE 12
1596 #define MWL8K_STAT_FCS_ERROR 24
1597 #define MWL8K_STAT_RTS_SUCCESS 11
1598
1599 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1600 struct ieee80211_low_level_stats *stats)
1601 {
1602 struct mwl8k_cmd_802_11_get_stat *cmd;
1603 int rc;
1604
1605 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1606 if (cmd == NULL)
1607 return -ENOMEM;
1608
1609 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1610 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1611 cmd->action = cpu_to_le16(MWL8K_CMD_GET);
1612
1613 rc = mwl8k_post_cmd(hw, &cmd->header);
1614 if (!rc) {
1615 stats->dot11ACKFailureCount =
1616 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1617 stats->dot11RTSFailureCount =
1618 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1619 stats->dot11FCSErrorCount =
1620 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1621 stats->dot11RTSSuccessCount =
1622 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1623 }
1624 kfree(cmd);
1625
1626 return rc;
1627 }
1628
1629 /*
1630 * CMD_802_11_RADIO_CONTROL.
1631 */
1632 struct mwl8k_cmd_802_11_radio_control {
1633 struct mwl8k_cmd_pkt header;
1634 __le16 action;
1635 __le16 control;
1636 __le16 radio_on;
1637 } __attribute__((packed));
1638
1639 static int
1640 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1641 {
1642 struct mwl8k_priv *priv = hw->priv;
1643 struct mwl8k_cmd_802_11_radio_control *cmd;
1644 int rc;
1645
1646 if (enable == priv->radio_on && !force)
1647 return 0;
1648
1649 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1650 if (cmd == NULL)
1651 return -ENOMEM;
1652
1653 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1654 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1655 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1656 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1657 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1658
1659 rc = mwl8k_post_cmd(hw, &cmd->header);
1660 kfree(cmd);
1661
1662 if (!rc)
1663 priv->radio_on = enable;
1664
1665 return rc;
1666 }
1667
1668 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw *hw)
1669 {
1670 return mwl8k_cmd_802_11_radio_control(hw, 0, 0);
1671 }
1672
1673 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw *hw)
1674 {
1675 return mwl8k_cmd_802_11_radio_control(hw, 1, 0);
1676 }
1677
1678 static int
1679 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1680 {
1681 struct mwl8k_priv *priv;
1682
1683 if (hw == NULL || hw->priv == NULL)
1684 return -EINVAL;
1685 priv = hw->priv;
1686
1687 priv->radio_short_preamble = short_preamble;
1688
1689 return mwl8k_cmd_802_11_radio_control(hw, 1, 1);
1690 }
1691
1692 /*
1693 * CMD_802_11_RF_TX_POWER.
1694 */
1695 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1696
1697 struct mwl8k_cmd_802_11_rf_tx_power {
1698 struct mwl8k_cmd_pkt header;
1699 __le16 action;
1700 __le16 support_level;
1701 __le16 current_level;
1702 __le16 reserved;
1703 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1704 } __attribute__((packed));
1705
1706 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1707 {
1708 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
1709 int rc;
1710
1711 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1712 if (cmd == NULL)
1713 return -ENOMEM;
1714
1715 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1716 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1717 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1718 cmd->support_level = cpu_to_le16(dBm);
1719
1720 rc = mwl8k_post_cmd(hw, &cmd->header);
1721 kfree(cmd);
1722
1723 return rc;
1724 }
1725
1726 /*
1727 * CMD_SET_PRE_SCAN.
1728 */
1729 struct mwl8k_cmd_set_pre_scan {
1730 struct mwl8k_cmd_pkt header;
1731 } __attribute__((packed));
1732
1733 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1734 {
1735 struct mwl8k_cmd_set_pre_scan *cmd;
1736 int rc;
1737
1738 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1739 if (cmd == NULL)
1740 return -ENOMEM;
1741
1742 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1743 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1744
1745 rc = mwl8k_post_cmd(hw, &cmd->header);
1746 kfree(cmd);
1747
1748 return rc;
1749 }
1750
1751 /*
1752 * CMD_SET_POST_SCAN.
1753 */
1754 struct mwl8k_cmd_set_post_scan {
1755 struct mwl8k_cmd_pkt header;
1756 __le32 isibss;
1757 __u8 bssid[ETH_ALEN];
1758 } __attribute__((packed));
1759
1760 static int
1761 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 *mac)
1762 {
1763 struct mwl8k_cmd_set_post_scan *cmd;
1764 int rc;
1765
1766 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1767 if (cmd == NULL)
1768 return -ENOMEM;
1769
1770 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
1771 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1772 cmd->isibss = 0;
1773 memcpy(cmd->bssid, mac, ETH_ALEN);
1774
1775 rc = mwl8k_post_cmd(hw, &cmd->header);
1776 kfree(cmd);
1777
1778 return rc;
1779 }
1780
1781 /*
1782 * CMD_SET_RF_CHANNEL.
1783 */
1784 struct mwl8k_cmd_set_rf_channel {
1785 struct mwl8k_cmd_pkt header;
1786 __le16 action;
1787 __u8 current_channel;
1788 __le32 channel_flags;
1789 } __attribute__((packed));
1790
1791 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1792 struct ieee80211_channel *channel)
1793 {
1794 struct mwl8k_cmd_set_rf_channel *cmd;
1795 int rc;
1796
1797 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1798 if (cmd == NULL)
1799 return -ENOMEM;
1800
1801 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
1802 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1803 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1804 cmd->current_channel = channel->hw_value;
1805 if (channel->band == IEEE80211_BAND_2GHZ)
1806 cmd->channel_flags = cpu_to_le32(0x00000081);
1807 else
1808 cmd->channel_flags = cpu_to_le32(0x00000000);
1809
1810 rc = mwl8k_post_cmd(hw, &cmd->header);
1811 kfree(cmd);
1812
1813 return rc;
1814 }
1815
1816 /*
1817 * CMD_SET_SLOT.
1818 */
1819 struct mwl8k_cmd_set_slot {
1820 struct mwl8k_cmd_pkt header;
1821 __le16 action;
1822 __u8 short_slot;
1823 } __attribute__((packed));
1824
1825 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
1826 {
1827 struct mwl8k_cmd_set_slot *cmd;
1828 int rc;
1829
1830 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1831 if (cmd == NULL)
1832 return -ENOMEM;
1833
1834 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1835 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1836 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1837 cmd->short_slot = short_slot_time;
1838
1839 rc = mwl8k_post_cmd(hw, &cmd->header);
1840 kfree(cmd);
1841
1842 return rc;
1843 }
1844
1845 /*
1846 * CMD_MIMO_CONFIG.
1847 */
1848 struct mwl8k_cmd_mimo_config {
1849 struct mwl8k_cmd_pkt header;
1850 __le32 action;
1851 __u8 rx_antenna_map;
1852 __u8 tx_antenna_map;
1853 } __attribute__((packed));
1854
1855 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1856 {
1857 struct mwl8k_cmd_mimo_config *cmd;
1858 int rc;
1859
1860 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1861 if (cmd == NULL)
1862 return -ENOMEM;
1863
1864 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
1865 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1866 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
1867 cmd->rx_antenna_map = rx;
1868 cmd->tx_antenna_map = tx;
1869
1870 rc = mwl8k_post_cmd(hw, &cmd->header);
1871 kfree(cmd);
1872
1873 return rc;
1874 }
1875
1876 /*
1877 * CMD_ENABLE_SNIFFER.
1878 */
1879 struct mwl8k_cmd_enable_sniffer {
1880 struct mwl8k_cmd_pkt header;
1881 __le32 action;
1882 } __attribute__((packed));
1883
1884 static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
1885 {
1886 struct mwl8k_cmd_enable_sniffer *cmd;
1887 int rc;
1888
1889 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1890 if (cmd == NULL)
1891 return -ENOMEM;
1892
1893 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
1894 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1895 cmd->action = cpu_to_le32(!!enable);
1896
1897 rc = mwl8k_post_cmd(hw, &cmd->header);
1898 kfree(cmd);
1899
1900 return rc;
1901 }
1902
1903 /*
1904 * CMD_SET_RATEADAPT_MODE.
1905 */
1906 struct mwl8k_cmd_set_rate_adapt_mode {
1907 struct mwl8k_cmd_pkt header;
1908 __le16 action;
1909 __le16 mode;
1910 } __attribute__((packed));
1911
1912 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
1913 {
1914 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
1915 int rc;
1916
1917 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1918 if (cmd == NULL)
1919 return -ENOMEM;
1920
1921 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
1922 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1923 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1924 cmd->mode = cpu_to_le16(mode);
1925
1926 rc = mwl8k_post_cmd(hw, &cmd->header);
1927 kfree(cmd);
1928
1929 return rc;
1930 }
1931
1932 /*
1933 * CMD_SET_WMM_MODE.
1934 */
1935 struct mwl8k_cmd_set_wmm {
1936 struct mwl8k_cmd_pkt header;
1937 __le16 action;
1938 } __attribute__((packed));
1939
1940 static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
1941 {
1942 struct mwl8k_priv *priv = hw->priv;
1943 struct mwl8k_cmd_set_wmm *cmd;
1944 int rc;
1945
1946 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1947 if (cmd == NULL)
1948 return -ENOMEM;
1949
1950 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
1951 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1952 cmd->action = cpu_to_le16(!!enable);
1953
1954 rc = mwl8k_post_cmd(hw, &cmd->header);
1955 kfree(cmd);
1956
1957 if (!rc)
1958 priv->wmm_enabled = enable;
1959
1960 return rc;
1961 }
1962
1963 /*
1964 * CMD_SET_RTS_THRESHOLD.
1965 */
1966 struct mwl8k_cmd_rts_threshold {
1967 struct mwl8k_cmd_pkt header;
1968 __le16 action;
1969 __le16 threshold;
1970 } __attribute__((packed));
1971
1972 static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
1973 u16 action, u16 *threshold)
1974 {
1975 struct mwl8k_cmd_rts_threshold *cmd;
1976 int rc;
1977
1978 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1979 if (cmd == NULL)
1980 return -ENOMEM;
1981
1982 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
1983 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1984 cmd->action = cpu_to_le16(action);
1985 cmd->threshold = cpu_to_le16(*threshold);
1986
1987 rc = mwl8k_post_cmd(hw, &cmd->header);
1988 kfree(cmd);
1989
1990 return rc;
1991 }
1992
1993 /*
1994 * CMD_SET_EDCA_PARAMS.
1995 */
1996 struct mwl8k_cmd_set_edca_params {
1997 struct mwl8k_cmd_pkt header;
1998
1999 /* See MWL8K_SET_EDCA_XXX below */
2000 __le16 action;
2001
2002 /* TX opportunity in units of 32 us */
2003 __le16 txop;
2004
2005 /* Log exponent of max contention period: 0...15*/
2006 __u8 log_cw_max;
2007
2008 /* Log exponent of min contention period: 0...15 */
2009 __u8 log_cw_min;
2010
2011 /* Adaptive interframe spacing in units of 32us */
2012 __u8 aifs;
2013
2014 /* TX queue to configure */
2015 __u8 txq;
2016 } __attribute__((packed));
2017
2018 #define MWL8K_SET_EDCA_CW 0x01
2019 #define MWL8K_SET_EDCA_TXOP 0x02
2020 #define MWL8K_SET_EDCA_AIFS 0x04
2021
2022 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2023 MWL8K_SET_EDCA_TXOP | \
2024 MWL8K_SET_EDCA_AIFS)
2025
2026 static int
2027 mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2028 __u16 cw_min, __u16 cw_max,
2029 __u8 aifs, __u16 txop)
2030 {
2031 struct mwl8k_cmd_set_edca_params *cmd;
2032 int rc;
2033
2034 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2035 if (cmd == NULL)
2036 return -ENOMEM;
2037
2038 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2039 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2040 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2041 cmd->txop = cpu_to_le16(txop);
2042 cmd->log_cw_max = (u8)ilog2(cw_max + 1);
2043 cmd->log_cw_min = (u8)ilog2(cw_min + 1);
2044 cmd->aifs = aifs;
2045 cmd->txq = qnum;
2046
2047 rc = mwl8k_post_cmd(hw, &cmd->header);
2048 kfree(cmd);
2049
2050 return rc;
2051 }
2052
2053 /*
2054 * CMD_FINALIZE_JOIN.
2055 */
2056
2057 /* FJ beacon buffer size is compiled into the firmware. */
2058 #define MWL8K_FJ_BEACON_MAXLEN 128
2059
2060 struct mwl8k_cmd_finalize_join {
2061 struct mwl8k_cmd_pkt header;
2062 __le32 sleep_interval; /* Number of beacon periods to sleep */
2063 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2064 } __attribute__((packed));
2065
2066 static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2067 __u16 framelen, __u16 dtim)
2068 {
2069 struct mwl8k_cmd_finalize_join *cmd;
2070 struct ieee80211_mgmt *payload = frame;
2071 u16 hdrlen;
2072 u32 payload_len;
2073 int rc;
2074
2075 if (frame == NULL)
2076 return -EINVAL;
2077
2078 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2079 if (cmd == NULL)
2080 return -ENOMEM;
2081
2082 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2083 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2084 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2085
2086 hdrlen = ieee80211_hdrlen(payload->frame_control);
2087
2088 payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
2089
2090 /* XXX TBD Might just have to abort and return an error */
2091 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2092 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2093 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2094 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2095
2096 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2097 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2098
2099 if (payload && payload_len)
2100 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2101
2102 rc = mwl8k_post_cmd(hw, &cmd->header);
2103 kfree(cmd);
2104 return rc;
2105 }
2106
2107 /*
2108 * CMD_UPDATE_STADB.
2109 */
2110 struct mwl8k_cmd_update_sta_db {
2111 struct mwl8k_cmd_pkt header;
2112
2113 /* See STADB_ACTION_TYPE */
2114 __le32 action;
2115
2116 /* Peer MAC address */
2117 __u8 peer_addr[ETH_ALEN];
2118
2119 __le32 reserved;
2120
2121 /* Peer info - valid during add/update. */
2122 struct peer_capability_info peer_info;
2123 } __attribute__((packed));
2124
2125 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2126 struct ieee80211_vif *vif, __u32 action)
2127 {
2128 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2129 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2130 struct mwl8k_cmd_update_sta_db *cmd;
2131 struct peer_capability_info *peer_info;
2132 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2133 int rc;
2134 __u8 count, *rates;
2135
2136 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2137 if (cmd == NULL)
2138 return -ENOMEM;
2139
2140 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2141 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2142
2143 cmd->action = cpu_to_le32(action);
2144 peer_info = &cmd->peer_info;
2145 memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
2146
2147 switch (action) {
2148 case MWL8K_STA_DB_ADD_ENTRY:
2149 case MWL8K_STA_DB_MODIFY_ENTRY:
2150 /* Build peer_info block */
2151 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2152 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2153 peer_info->interop = 1;
2154 peer_info->amsdu_enabled = 0;
2155
2156 rates = peer_info->legacy_rates;
2157 for (count = 0; count < mv_vif->legacy_nrates; count++)
2158 rates[count] = bitrates[count].hw_value;
2159
2160 rc = mwl8k_post_cmd(hw, &cmd->header);
2161 if (rc == 0)
2162 mv_vif->peer_id = peer_info->station_id;
2163
2164 break;
2165
2166 case MWL8K_STA_DB_DEL_ENTRY:
2167 case MWL8K_STA_DB_FLUSH:
2168 default:
2169 rc = mwl8k_post_cmd(hw, &cmd->header);
2170 if (rc == 0)
2171 mv_vif->peer_id = 0;
2172 break;
2173 }
2174 kfree(cmd);
2175
2176 return rc;
2177 }
2178
2179 /*
2180 * CMD_SET_AID.
2181 */
2182 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2183
2184 #define MWL8K_FRAME_PROT_DISABLED 0x00
2185 #define MWL8K_FRAME_PROT_11G 0x07
2186 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2187 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2188
2189 struct mwl8k_cmd_update_set_aid {
2190 struct mwl8k_cmd_pkt header;
2191 __le16 aid;
2192
2193 /* AP's MAC address (BSSID) */
2194 __u8 bssid[ETH_ALEN];
2195 __le16 protection_mode;
2196 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2197 } __attribute__((packed));
2198
2199 static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2200 struct ieee80211_vif *vif)
2201 {
2202 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2203 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2204 struct mwl8k_cmd_update_set_aid *cmd;
2205 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2206 int count;
2207 u16 prot_mode;
2208 int rc;
2209
2210 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2211 if (cmd == NULL)
2212 return -ENOMEM;
2213
2214 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2215 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2216 cmd->aid = cpu_to_le16(info->aid);
2217
2218 memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
2219
2220 if (info->use_cts_prot) {
2221 prot_mode = MWL8K_FRAME_PROT_11G;
2222 } else {
2223 switch (info->ht_operation_mode &
2224 IEEE80211_HT_OP_MODE_PROTECTION) {
2225 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2226 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2227 break;
2228 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2229 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2230 break;
2231 default:
2232 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2233 break;
2234 }
2235 }
2236 cmd->protection_mode = cpu_to_le16(prot_mode);
2237
2238 for (count = 0; count < mv_vif->legacy_nrates; count++)
2239 cmd->supp_rates[count] = bitrates[count].hw_value;
2240
2241 rc = mwl8k_post_cmd(hw, &cmd->header);
2242 kfree(cmd);
2243
2244 return rc;
2245 }
2246
2247 /*
2248 * CMD_SET_RATE.
2249 */
2250 struct mwl8k_cmd_update_rateset {
2251 struct mwl8k_cmd_pkt header;
2252 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2253
2254 /* Bitmap for supported MCS codes. */
2255 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
2256 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
2257 } __attribute__((packed));
2258
2259 static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2260 struct ieee80211_vif *vif)
2261 {
2262 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2263 struct mwl8k_cmd_update_rateset *cmd;
2264 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2265 int count;
2266 int rc;
2267
2268 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2269 if (cmd == NULL)
2270 return -ENOMEM;
2271
2272 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2273 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2274
2275 for (count = 0; count < mv_vif->legacy_nrates; count++)
2276 cmd->legacy_rates[count] = bitrates[count].hw_value;
2277
2278 rc = mwl8k_post_cmd(hw, &cmd->header);
2279 kfree(cmd);
2280
2281 return rc;
2282 }
2283
2284 /*
2285 * CMD_USE_FIXED_RATE.
2286 */
2287 #define MWL8K_RATE_TABLE_SIZE 8
2288 #define MWL8K_UCAST_RATE 0
2289 #define MWL8K_USE_AUTO_RATE 0x0002
2290
2291 struct mwl8k_rate_entry {
2292 /* Set to 1 if HT rate, 0 if legacy. */
2293 __le32 is_ht_rate;
2294
2295 /* Set to 1 to use retry_count field. */
2296 __le32 enable_retry;
2297
2298 /* Specified legacy rate or MCS. */
2299 __le32 rate;
2300
2301 /* Number of allowed retries. */
2302 __le32 retry_count;
2303 } __attribute__((packed));
2304
2305 struct mwl8k_rate_table {
2306 /* 1 to allow specified rate and below */
2307 __le32 allow_rate_drop;
2308 __le32 num_rates;
2309 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2310 } __attribute__((packed));
2311
2312 struct mwl8k_cmd_use_fixed_rate {
2313 struct mwl8k_cmd_pkt header;
2314 __le32 action;
2315 struct mwl8k_rate_table rate_table;
2316
2317 /* Unicast, Broadcast or Multicast */
2318 __le32 rate_type;
2319 __le32 reserved1;
2320 __le32 reserved2;
2321 } __attribute__((packed));
2322
2323 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2324 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2325 {
2326 struct mwl8k_cmd_use_fixed_rate *cmd;
2327 int count;
2328 int rc;
2329
2330 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2331 if (cmd == NULL)
2332 return -ENOMEM;
2333
2334 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2335 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2336
2337 cmd->action = cpu_to_le32(action);
2338 cmd->rate_type = cpu_to_le32(rate_type);
2339
2340 if (rate_table != NULL) {
2341 /* Copy over each field manually so
2342 * that bitflipping can be done
2343 */
2344 cmd->rate_table.allow_rate_drop =
2345 cpu_to_le32(rate_table->allow_rate_drop);
2346 cmd->rate_table.num_rates =
2347 cpu_to_le32(rate_table->num_rates);
2348
2349 for (count = 0; count < rate_table->num_rates; count++) {
2350 struct mwl8k_rate_entry *dst =
2351 &cmd->rate_table.rate_entry[count];
2352 struct mwl8k_rate_entry *src =
2353 &rate_table->rate_entry[count];
2354
2355 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2356 dst->enable_retry = cpu_to_le32(src->enable_retry);
2357 dst->rate = cpu_to_le32(src->rate);
2358 dst->retry_count = cpu_to_le32(src->retry_count);
2359 }
2360 }
2361
2362 rc = mwl8k_post_cmd(hw, &cmd->header);
2363 kfree(cmd);
2364
2365 return rc;
2366 }
2367
2368
2369 /*
2370 * Interrupt handling.
2371 */
2372 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2373 {
2374 struct ieee80211_hw *hw = dev_id;
2375 struct mwl8k_priv *priv = hw->priv;
2376 u32 status;
2377
2378 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2379 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2380
2381 if (!status)
2382 return IRQ_NONE;
2383
2384 if (status & MWL8K_A2H_INT_TX_DONE)
2385 tasklet_schedule(&priv->tx_reclaim_task);
2386
2387 if (status & MWL8K_A2H_INT_RX_READY) {
2388 while (rxq_process(hw, 0, 1))
2389 rxq_refill(hw, 0, 1);
2390 }
2391
2392 if (status & MWL8K_A2H_INT_OPC_DONE) {
2393 if (priv->hostcmd_wait != NULL)
2394 complete(priv->hostcmd_wait);
2395 }
2396
2397 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2398 if (!mutex_is_locked(&priv->fw_mutex) &&
2399 priv->radio_on && mwl8k_txq_busy(priv))
2400 mwl8k_tx_start(priv);
2401 }
2402
2403 return IRQ_HANDLED;
2404 }
2405
2406
2407 /*
2408 * Core driver operations.
2409 */
2410 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2411 {
2412 struct mwl8k_priv *priv = hw->priv;
2413 int index = skb_get_queue_mapping(skb);
2414 int rc;
2415
2416 if (priv->current_channel == NULL) {
2417 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2418 "disabled\n", priv->name);
2419 dev_kfree_skb(skb);
2420 return NETDEV_TX_OK;
2421 }
2422
2423 rc = mwl8k_txq_xmit(hw, index, skb);
2424
2425 return rc;
2426 }
2427
2428 struct mwl8k_work_struct {
2429 /* Initialized by mwl8k_queue_work(). */
2430 struct work_struct wt;
2431
2432 /* Required field passed in to mwl8k_queue_work(). */
2433 struct ieee80211_hw *hw;
2434
2435 /* Required field passed in to mwl8k_queue_work(). */
2436 int (*wfunc)(struct work_struct *w);
2437
2438 /* Initialized by mwl8k_queue_work(). */
2439 struct completion *cmd_wait;
2440
2441 /* Result code. */
2442 int rc;
2443 };
2444
2445 static void mwl8k_config_thread(struct work_struct *wt)
2446 {
2447 struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
2448 struct ieee80211_hw *hw = worker->hw;
2449 int rc = 0;
2450
2451 rc = mwl8k_fw_lock(hw);
2452 if (!rc) {
2453 rc = worker->wfunc(wt);
2454 mwl8k_fw_unlock(hw);
2455 }
2456
2457 worker->rc = rc;
2458 complete(worker->cmd_wait);
2459 }
2460
2461 static int mwl8k_queue_work(struct ieee80211_hw *hw,
2462 struct mwl8k_work_struct *worker,
2463 int (*wfunc)(struct work_struct *w))
2464 {
2465 struct mwl8k_priv *priv = hw->priv;
2466 unsigned long timeout = 0;
2467 int rc = 0;
2468
2469 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2470
2471 worker->hw = hw;
2472 worker->cmd_wait = &cmd_wait;
2473 worker->rc = 1;
2474 worker->wfunc = wfunc;
2475
2476 INIT_WORK(&worker->wt, mwl8k_config_thread);
2477 queue_work(priv->config_wq, &worker->wt);
2478
2479 timeout = wait_for_completion_timeout(&cmd_wait,
2480 msecs_to_jiffies(10000));
2481
2482 if (timeout)
2483 rc = worker->rc;
2484 else {
2485 cancel_work_sync(&worker->wt);
2486 rc = -ETIMEDOUT;
2487 }
2488
2489 return rc;
2490 }
2491
2492 static int mwl8k_start(struct ieee80211_hw *hw)
2493 {
2494 struct mwl8k_priv *priv = hw->priv;
2495 int rc;
2496
2497 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
2498 IRQF_SHARED, MWL8K_NAME, hw);
2499 if (rc) {
2500 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2501 priv->name);
2502 return -EIO;
2503 }
2504
2505 /* Enable tx reclaim tasklet */
2506 tasklet_enable(&priv->tx_reclaim_task);
2507
2508 /* Enable interrupts */
2509 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2510
2511 rc = mwl8k_fw_lock(hw);
2512 if (!rc) {
2513 rc = mwl8k_cmd_802_11_radio_enable(hw);
2514
2515 if (!rc)
2516 rc = mwl8k_cmd_set_pre_scan(hw);
2517
2518 if (!rc)
2519 rc = mwl8k_cmd_set_post_scan(hw,
2520 "\x00\x00\x00\x00\x00\x00");
2521
2522 if (!rc)
2523 rc = mwl8k_cmd_setrateadaptmode(hw, 0);
2524
2525 if (!rc)
2526 rc = mwl8k_set_wmm(hw, 0);
2527
2528 if (!rc)
2529 rc = mwl8k_enable_sniffer(hw, 0);
2530
2531 mwl8k_fw_unlock(hw);
2532 }
2533
2534 if (rc) {
2535 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2536 free_irq(priv->pdev->irq, hw);
2537 tasklet_disable(&priv->tx_reclaim_task);
2538 }
2539
2540 return rc;
2541 }
2542
2543 static void mwl8k_stop(struct ieee80211_hw *hw)
2544 {
2545 struct mwl8k_priv *priv = hw->priv;
2546 int i;
2547
2548 mwl8k_cmd_802_11_radio_disable(hw);
2549
2550 ieee80211_stop_queues(hw);
2551
2552 /* Disable interrupts */
2553 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2554 free_irq(priv->pdev->irq, hw);
2555
2556 /* Stop finalize join worker */
2557 cancel_work_sync(&priv->finalize_join_worker);
2558 if (priv->beacon_skb != NULL)
2559 dev_kfree_skb(priv->beacon_skb);
2560
2561 /* Stop tx reclaim tasklet */
2562 tasklet_disable(&priv->tx_reclaim_task);
2563
2564 /* Stop config thread */
2565 flush_workqueue(priv->config_wq);
2566
2567 /* Return all skbs to mac80211 */
2568 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2569 mwl8k_txq_reclaim(hw, i, 1);
2570 }
2571
2572 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2573 struct ieee80211_if_init_conf *conf)
2574 {
2575 struct mwl8k_priv *priv = hw->priv;
2576 struct mwl8k_vif *mwl8k_vif;
2577
2578 /*
2579 * We only support one active interface at a time.
2580 */
2581 if (priv->vif != NULL)
2582 return -EBUSY;
2583
2584 /*
2585 * We only support managed interfaces for now.
2586 */
2587 if (conf->type != NL80211_IFTYPE_STATION)
2588 return -EINVAL;
2589
2590 /* Clean out driver private area */
2591 mwl8k_vif = MWL8K_VIF(conf->vif);
2592 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2593
2594 /* Save the mac address */
2595 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
2596
2597 /* Back pointer to parent config block */
2598 mwl8k_vif->priv = priv;
2599
2600 /* Setup initial PHY parameters */
2601 memcpy(mwl8k_vif->legacy_rates,
2602 priv->rates, sizeof(mwl8k_vif->legacy_rates));
2603 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
2604
2605 /* Set Initial sequence number to zero */
2606 mwl8k_vif->seqno = 0;
2607
2608 priv->vif = conf->vif;
2609 priv->current_channel = NULL;
2610
2611 return 0;
2612 }
2613
2614 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2615 struct ieee80211_if_init_conf *conf)
2616 {
2617 struct mwl8k_priv *priv = hw->priv;
2618
2619 if (priv->vif == NULL)
2620 return;
2621
2622 priv->vif = NULL;
2623 }
2624
2625 struct mwl8k_config_worker {
2626 struct mwl8k_work_struct header;
2627 u32 changed;
2628 };
2629
2630 static int mwl8k_config_wt(struct work_struct *wt)
2631 {
2632 struct mwl8k_config_worker *worker =
2633 (struct mwl8k_config_worker *)wt;
2634 struct ieee80211_hw *hw = worker->header.hw;
2635 struct ieee80211_conf *conf = &hw->conf;
2636 struct mwl8k_priv *priv = hw->priv;
2637 int rc = 0;
2638
2639 if (conf->flags & IEEE80211_CONF_IDLE) {
2640 mwl8k_cmd_802_11_radio_disable(hw);
2641 priv->current_channel = NULL;
2642 goto mwl8k_config_exit;
2643 }
2644
2645 if (mwl8k_cmd_802_11_radio_enable(hw)) {
2646 rc = -EINVAL;
2647 goto mwl8k_config_exit;
2648 }
2649
2650 priv->current_channel = conf->channel;
2651
2652 if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
2653 rc = -EINVAL;
2654 goto mwl8k_config_exit;
2655 }
2656
2657 if (conf->power_level > 18)
2658 conf->power_level = 18;
2659 if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
2660 rc = -EINVAL;
2661 goto mwl8k_config_exit;
2662 }
2663
2664 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
2665 rc = -EINVAL;
2666
2667 mwl8k_config_exit:
2668 return rc;
2669 }
2670
2671 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2672 {
2673 int rc = 0;
2674 struct mwl8k_config_worker *worker;
2675
2676 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2677 if (worker == NULL)
2678 return -ENOMEM;
2679
2680 worker->changed = changed;
2681
2682 rc = mwl8k_queue_work(hw, &worker->header, mwl8k_config_wt);
2683 if (rc == -ETIMEDOUT) {
2684 printk(KERN_ERR "%s() timed out.\n", __func__);
2685 rc = -EINVAL;
2686 }
2687
2688 kfree(worker);
2689
2690 /*
2691 * mac80211 will crash on anything other than -EINVAL on
2692 * error. Looks like wireless extensions which calls mac80211
2693 * may be the actual culprit...
2694 */
2695 return rc ? -EINVAL : 0;
2696 }
2697
2698 struct mwl8k_bss_info_changed_worker {
2699 struct mwl8k_work_struct header;
2700 struct ieee80211_vif *vif;
2701 struct ieee80211_bss_conf *info;
2702 u32 changed;
2703 };
2704
2705 static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
2706 {
2707 struct mwl8k_bss_info_changed_worker *worker =
2708 (struct mwl8k_bss_info_changed_worker *)wt;
2709 struct ieee80211_hw *hw = worker->header.hw;
2710 struct ieee80211_vif *vif = worker->vif;
2711 struct ieee80211_bss_conf *info = worker->info;
2712 u32 changed;
2713 int rc;
2714
2715 struct mwl8k_priv *priv = hw->priv;
2716 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2717
2718 changed = worker->changed;
2719 priv->capture_beacon = false;
2720
2721 if (info->assoc) {
2722 memcpy(&mwl8k_vif->bss_info, info,
2723 sizeof(struct ieee80211_bss_conf));
2724
2725 /* Install rates */
2726 if (mwl8k_update_rateset(hw, vif))
2727 goto mwl8k_bss_info_changed_exit;
2728
2729 /* Turn on rate adaptation */
2730 if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
2731 MWL8K_UCAST_RATE, NULL))
2732 goto mwl8k_bss_info_changed_exit;
2733
2734 /* Set radio preamble */
2735 if (mwl8k_set_radio_preamble(hw, info->use_short_preamble))
2736 goto mwl8k_bss_info_changed_exit;
2737
2738 /* Set slot time */
2739 if (mwl8k_cmd_set_slot(hw, info->use_short_slot))
2740 goto mwl8k_bss_info_changed_exit;
2741
2742 /* Update peer rate info */
2743 if (mwl8k_cmd_update_sta_db(hw, vif,
2744 MWL8K_STA_DB_MODIFY_ENTRY))
2745 goto mwl8k_bss_info_changed_exit;
2746
2747 /* Set AID */
2748 if (mwl8k_cmd_set_aid(hw, vif))
2749 goto mwl8k_bss_info_changed_exit;
2750
2751 /*
2752 * Finalize the join. Tell rx handler to process
2753 * next beacon from our BSSID.
2754 */
2755 memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
2756 priv->capture_beacon = true;
2757 } else {
2758 mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
2759 memset(&mwl8k_vif->bss_info, 0,
2760 sizeof(struct ieee80211_bss_conf));
2761 memset(mwl8k_vif->bssid, 0, ETH_ALEN);
2762 }
2763
2764 mwl8k_bss_info_changed_exit:
2765 rc = 0;
2766 return rc;
2767 }
2768
2769 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
2770 struct ieee80211_vif *vif,
2771 struct ieee80211_bss_conf *info,
2772 u32 changed)
2773 {
2774 struct mwl8k_bss_info_changed_worker *worker;
2775 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2776 int rc;
2777
2778 if (changed & BSS_CHANGED_BSSID)
2779 memcpy(mv_vif->bssid, info->bssid, ETH_ALEN);
2780
2781 if ((changed & BSS_CHANGED_ASSOC) == 0)
2782 return;
2783
2784 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2785 if (worker == NULL)
2786 return;
2787
2788 worker->vif = vif;
2789 worker->info = info;
2790 worker->changed = changed;
2791 rc = mwl8k_queue_work(hw, &worker->header, mwl8k_bss_info_changed_wt);
2792 kfree(worker);
2793 if (rc == -ETIMEDOUT)
2794 printk(KERN_ERR "%s() timed out\n", __func__);
2795 }
2796
2797 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
2798 int mc_count, struct dev_addr_list *mclist)
2799 {
2800 struct mwl8k_cmd_pkt *cmd;
2801
2802 cmd = __mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
2803
2804 return (unsigned long)cmd;
2805 }
2806
2807 struct mwl8k_configure_filter_worker {
2808 struct mwl8k_work_struct header;
2809 unsigned int changed_flags;
2810 unsigned int total_flags;
2811 struct mwl8k_cmd_pkt *multicast_adr_cmd;
2812 };
2813
2814 #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
2815
2816 static int mwl8k_configure_filter_wt(struct work_struct *wt)
2817 {
2818 struct mwl8k_configure_filter_worker *worker =
2819 (struct mwl8k_configure_filter_worker *)wt;
2820 struct ieee80211_hw *hw = worker->header.hw;
2821 struct mwl8k_priv *priv = hw->priv;
2822 int rc = 0;
2823
2824 if (worker->changed_flags & FIF_BCN_PRBRESP_PROMISC) {
2825 if (worker->total_flags & FIF_BCN_PRBRESP_PROMISC)
2826 rc = mwl8k_cmd_set_pre_scan(hw);
2827 else {
2828 u8 *bssid;
2829
2830 bssid = "\x00\x00\x00\x00\x00\x00";
2831 if (priv->vif != NULL)
2832 bssid = MWL8K_VIF(priv->vif)->bssid;
2833
2834 rc = mwl8k_cmd_set_post_scan(hw, bssid);
2835 }
2836 }
2837
2838 if (!rc && worker->multicast_adr_cmd != NULL)
2839 rc = mwl8k_post_cmd(hw, worker->multicast_adr_cmd);
2840 kfree(worker->multicast_adr_cmd);
2841
2842 return rc;
2843 }
2844
2845 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
2846 unsigned int changed_flags,
2847 unsigned int *total_flags,
2848 u64 multicast)
2849 {
2850 struct mwl8k_configure_filter_worker *worker;
2851
2852 /* Clear unsupported feature flags */
2853 *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
2854
2855 if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS))
2856 return;
2857
2858 worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
2859 if (worker == NULL)
2860 return;
2861
2862 worker->changed_flags = changed_flags;
2863 worker->total_flags = *total_flags;
2864 worker->multicast_adr_cmd = (void *)(unsigned long)multicast;
2865
2866 mwl8k_queue_work(hw, &worker->header, mwl8k_configure_filter_wt);
2867 }
2868
2869 struct mwl8k_set_rts_threshold_worker {
2870 struct mwl8k_work_struct header;
2871 u32 value;
2872 };
2873
2874 static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
2875 {
2876 struct mwl8k_set_rts_threshold_worker *worker =
2877 (struct mwl8k_set_rts_threshold_worker *)wt;
2878
2879 struct ieee80211_hw *hw = worker->header.hw;
2880 u16 threshold = (u16)(worker->value);
2881 int rc;
2882
2883 rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
2884
2885 return rc;
2886 }
2887
2888 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
2889 {
2890 int rc;
2891 struct mwl8k_set_rts_threshold_worker *worker;
2892
2893 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2894 if (worker == NULL)
2895 return -ENOMEM;
2896
2897 worker->value = value;
2898
2899 rc = mwl8k_queue_work(hw, &worker->header, mwl8k_set_rts_threshold_wt);
2900 kfree(worker);
2901
2902 if (rc == -ETIMEDOUT) {
2903 printk(KERN_ERR "%s() timed out\n", __func__);
2904 rc = -EINVAL;
2905 }
2906
2907 return rc;
2908 }
2909
2910 struct mwl8k_conf_tx_worker {
2911 struct mwl8k_work_struct header;
2912 u16 queue;
2913 const struct ieee80211_tx_queue_params *params;
2914 };
2915
2916 static int mwl8k_conf_tx_wt(struct work_struct *wt)
2917 {
2918 struct mwl8k_conf_tx_worker *worker =
2919 (struct mwl8k_conf_tx_worker *)wt;
2920
2921 struct ieee80211_hw *hw = worker->header.hw;
2922 u16 queue = worker->queue;
2923 const struct ieee80211_tx_queue_params *params = worker->params;
2924
2925 struct mwl8k_priv *priv = hw->priv;
2926 int rc = 0;
2927
2928 if (!priv->wmm_enabled) {
2929 if (mwl8k_set_wmm(hw, 1)) {
2930 rc = -EINVAL;
2931 goto mwl8k_conf_tx_exit;
2932 }
2933 }
2934
2935 if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
2936 params->cw_max, params->aifs, params->txop))
2937 rc = -EINVAL;
2938 mwl8k_conf_tx_exit:
2939 return rc;
2940 }
2941
2942 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
2943 const struct ieee80211_tx_queue_params *params)
2944 {
2945 int rc;
2946 struct mwl8k_conf_tx_worker *worker;
2947
2948 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2949 if (worker == NULL)
2950 return -ENOMEM;
2951
2952 worker->queue = queue;
2953 worker->params = params;
2954 rc = mwl8k_queue_work(hw, &worker->header, mwl8k_conf_tx_wt);
2955 kfree(worker);
2956 if (rc == -ETIMEDOUT) {
2957 printk(KERN_ERR "%s() timed out\n", __func__);
2958 rc = -EINVAL;
2959 }
2960 return rc;
2961 }
2962
2963 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
2964 struct ieee80211_tx_queue_stats *stats)
2965 {
2966 struct mwl8k_priv *priv = hw->priv;
2967 struct mwl8k_tx_queue *txq;
2968 int index;
2969
2970 spin_lock_bh(&priv->tx_lock);
2971 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
2972 txq = priv->txq + index;
2973 memcpy(&stats[index], &txq->tx_stats,
2974 sizeof(struct ieee80211_tx_queue_stats));
2975 }
2976 spin_unlock_bh(&priv->tx_lock);
2977 return 0;
2978 }
2979
2980 struct mwl8k_get_stats_worker {
2981 struct mwl8k_work_struct header;
2982 struct ieee80211_low_level_stats *stats;
2983 };
2984
2985 static int mwl8k_get_stats_wt(struct work_struct *wt)
2986 {
2987 struct mwl8k_get_stats_worker *worker =
2988 (struct mwl8k_get_stats_worker *)wt;
2989
2990 return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
2991 }
2992
2993 static int mwl8k_get_stats(struct ieee80211_hw *hw,
2994 struct ieee80211_low_level_stats *stats)
2995 {
2996 int rc;
2997 struct mwl8k_get_stats_worker *worker;
2998
2999 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3000 if (worker == NULL)
3001 return -ENOMEM;
3002
3003 worker->stats = stats;
3004 rc = mwl8k_queue_work(hw, &worker->header, mwl8k_get_stats_wt);
3005
3006 kfree(worker);
3007 if (rc == -ETIMEDOUT) {
3008 printk(KERN_ERR "%s() timed out\n", __func__);
3009 rc = -EINVAL;
3010 }
3011
3012 return rc;
3013 }
3014
3015 static const struct ieee80211_ops mwl8k_ops = {
3016 .tx = mwl8k_tx,
3017 .start = mwl8k_start,
3018 .stop = mwl8k_stop,
3019 .add_interface = mwl8k_add_interface,
3020 .remove_interface = mwl8k_remove_interface,
3021 .config = mwl8k_config,
3022 .bss_info_changed = mwl8k_bss_info_changed,
3023 .prepare_multicast = mwl8k_prepare_multicast,
3024 .configure_filter = mwl8k_configure_filter,
3025 .set_rts_threshold = mwl8k_set_rts_threshold,
3026 .conf_tx = mwl8k_conf_tx,
3027 .get_tx_stats = mwl8k_get_tx_stats,
3028 .get_stats = mwl8k_get_stats,
3029 };
3030
3031 static void mwl8k_tx_reclaim_handler(unsigned long data)
3032 {
3033 int i;
3034 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3035 struct mwl8k_priv *priv = hw->priv;
3036
3037 spin_lock_bh(&priv->tx_lock);
3038 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3039 mwl8k_txq_reclaim(hw, i, 0);
3040
3041 if (priv->tx_wait != NULL && mwl8k_txq_busy(priv) == 0) {
3042 complete(priv->tx_wait);
3043 priv->tx_wait = NULL;
3044 }
3045 spin_unlock_bh(&priv->tx_lock);
3046 }
3047
3048 static void mwl8k_finalize_join_worker(struct work_struct *work)
3049 {
3050 struct mwl8k_priv *priv =
3051 container_of(work, struct mwl8k_priv, finalize_join_worker);
3052 struct sk_buff *skb = priv->beacon_skb;
3053 u8 dtim = MWL8K_VIF(priv->vif)->bss_info.dtim_period;
3054
3055 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
3056 dev_kfree_skb(skb);
3057
3058 priv->beacon_skb = NULL;
3059 }
3060
3061 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3062 const struct pci_device_id *id)
3063 {
3064 struct ieee80211_hw *hw;
3065 struct mwl8k_priv *priv;
3066 int rc;
3067 int i;
3068 u8 *fw;
3069
3070 rc = pci_enable_device(pdev);
3071 if (rc) {
3072 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3073 MWL8K_NAME);
3074 return rc;
3075 }
3076
3077 rc = pci_request_regions(pdev, MWL8K_NAME);
3078 if (rc) {
3079 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3080 MWL8K_NAME);
3081 return rc;
3082 }
3083
3084 pci_set_master(pdev);
3085
3086 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3087 if (hw == NULL) {
3088 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3089 rc = -ENOMEM;
3090 goto err_free_reg;
3091 }
3092
3093 priv = hw->priv;
3094 priv->hw = hw;
3095 priv->pdev = pdev;
3096 priv->wmm_enabled = false;
3097 priv->pending_tx_pkts = 0;
3098 strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
3099
3100 SET_IEEE80211_DEV(hw, &pdev->dev);
3101 pci_set_drvdata(pdev, hw);
3102
3103 priv->regs = pci_iomap(pdev, 1, 0x10000);
3104 if (priv->regs == NULL) {
3105 printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
3106 goto err_iounmap;
3107 }
3108
3109 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3110 priv->band.band = IEEE80211_BAND_2GHZ;
3111 priv->band.channels = priv->channels;
3112 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3113 priv->band.bitrates = priv->rates;
3114 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3115 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3116
3117 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3118 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3119
3120 /*
3121 * Extra headroom is the size of the required DMA header
3122 * minus the size of the smallest 802.11 frame (CTS frame).
3123 */
3124 hw->extra_tx_headroom =
3125 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3126
3127 hw->channel_change_time = 10;
3128
3129 hw->queues = MWL8K_TX_QUEUES;
3130
3131 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
3132
3133 /* Set rssi and noise values to dBm */
3134 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3135 hw->vif_data_size = sizeof(struct mwl8k_vif);
3136 priv->vif = NULL;
3137
3138 /* Set default radio state and preamble */
3139 priv->radio_on = 0;
3140 priv->radio_short_preamble = 0;
3141
3142 /* Finalize join worker */
3143 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3144
3145 /* TX reclaim tasklet */
3146 tasklet_init(&priv->tx_reclaim_task,
3147 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3148 tasklet_disable(&priv->tx_reclaim_task);
3149
3150 /* Config workthread */
3151 priv->config_wq = create_singlethread_workqueue("mwl8k_config");
3152 if (priv->config_wq == NULL)
3153 goto err_iounmap;
3154
3155 /* Power management cookie */
3156 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3157 if (priv->cookie == NULL)
3158 goto err_iounmap;
3159
3160 rc = mwl8k_rxq_init(hw, 0);
3161 if (rc)
3162 goto err_iounmap;
3163 rxq_refill(hw, 0, INT_MAX);
3164
3165 mutex_init(&priv->fw_mutex);
3166 priv->fw_mutex_owner = NULL;
3167 priv->fw_mutex_depth = 0;
3168 priv->tx_wait = NULL;
3169 priv->hostcmd_wait = NULL;
3170
3171 spin_lock_init(&priv->tx_lock);
3172
3173 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3174 rc = mwl8k_txq_init(hw, i);
3175 if (rc)
3176 goto err_free_queues;
3177 }
3178
3179 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3180 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3181 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3182 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3183
3184 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
3185 IRQF_SHARED, MWL8K_NAME, hw);
3186 if (rc) {
3187 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3188 priv->name);
3189 goto err_free_queues;
3190 }
3191
3192 /* Reset firmware and hardware */
3193 mwl8k_hw_reset(priv);
3194
3195 /* Ask userland hotplug daemon for the device firmware */
3196 rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
3197 if (rc) {
3198 printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
3199 goto err_free_irq;
3200 }
3201
3202 /* Load firmware into hardware */
3203 rc = mwl8k_load_firmware(priv);
3204 if (rc) {
3205 printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
3206 goto err_stop_firmware;
3207 }
3208
3209 /* Reclaim memory once firmware is successfully loaded */
3210 mwl8k_release_firmware(priv);
3211
3212 /*
3213 * Temporarily enable interrupts. Initial firmware host
3214 * commands use interrupts and avoids polling. Disable
3215 * interrupts when done.
3216 */
3217 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3218
3219 /* Get config data, mac addrs etc */
3220 rc = mwl8k_cmd_get_hw_spec(hw);
3221 if (rc) {
3222 printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
3223 goto err_stop_firmware;
3224 }
3225
3226 /* Turn radio off */
3227 rc = mwl8k_cmd_802_11_radio_disable(hw);
3228 if (rc) {
3229 printk(KERN_ERR "%s: Cannot disable\n", priv->name);
3230 goto err_stop_firmware;
3231 }
3232
3233 /* Disable interrupts */
3234 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3235 free_irq(priv->pdev->irq, hw);
3236
3237 rc = ieee80211_register_hw(hw);
3238 if (rc) {
3239 printk(KERN_ERR "%s: Cannot register device\n", priv->name);
3240 goto err_stop_firmware;
3241 }
3242
3243 fw = (u8 *)&priv->fw_rev;
3244 printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
3245 MWL8K_DESC);
3246 printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
3247 priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
3248 printk(KERN_INFO "%s: MAC Address: %pM\n", priv->name,
3249 hw->wiphy->perm_addr);
3250
3251 return 0;
3252
3253 err_stop_firmware:
3254 mwl8k_hw_reset(priv);
3255 mwl8k_release_firmware(priv);
3256
3257 err_free_irq:
3258 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3259 free_irq(priv->pdev->irq, hw);
3260
3261 err_free_queues:
3262 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3263 mwl8k_txq_deinit(hw, i);
3264 mwl8k_rxq_deinit(hw, 0);
3265
3266 err_iounmap:
3267 if (priv->cookie != NULL)
3268 pci_free_consistent(priv->pdev, 4,
3269 priv->cookie, priv->cookie_dma);
3270
3271 if (priv->regs != NULL)
3272 pci_iounmap(pdev, priv->regs);
3273
3274 if (priv->config_wq != NULL)
3275 destroy_workqueue(priv->config_wq);
3276
3277 pci_set_drvdata(pdev, NULL);
3278 ieee80211_free_hw(hw);
3279
3280 err_free_reg:
3281 pci_release_regions(pdev);
3282 pci_disable_device(pdev);
3283
3284 return rc;
3285 }
3286
3287 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3288 {
3289 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3290 }
3291
3292 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3293 {
3294 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3295 struct mwl8k_priv *priv;
3296 int i;
3297
3298 if (hw == NULL)
3299 return;
3300 priv = hw->priv;
3301
3302 ieee80211_stop_queues(hw);
3303
3304 ieee80211_unregister_hw(hw);
3305
3306 /* Remove tx reclaim tasklet */
3307 tasklet_kill(&priv->tx_reclaim_task);
3308
3309 /* Stop config thread */
3310 destroy_workqueue(priv->config_wq);
3311
3312 /* Stop hardware */
3313 mwl8k_hw_reset(priv);
3314
3315 /* Return all skbs to mac80211 */
3316 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3317 mwl8k_txq_reclaim(hw, i, 1);
3318
3319 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3320 mwl8k_txq_deinit(hw, i);
3321
3322 mwl8k_rxq_deinit(hw, 0);
3323
3324 pci_free_consistent(priv->pdev, 4,
3325 priv->cookie, priv->cookie_dma);
3326
3327 pci_iounmap(pdev, priv->regs);
3328 pci_set_drvdata(pdev, NULL);
3329 ieee80211_free_hw(hw);
3330 pci_release_regions(pdev);
3331 pci_disable_device(pdev);
3332 }
3333
3334 static struct pci_driver mwl8k_driver = {
3335 .name = MWL8K_NAME,
3336 .id_table = mwl8k_table,
3337 .probe = mwl8k_probe,
3338 .remove = __devexit_p(mwl8k_remove),
3339 .shutdown = __devexit_p(mwl8k_shutdown),
3340 };
3341
3342 static int __init mwl8k_init(void)
3343 {
3344 return pci_register_driver(&mwl8k_driver);
3345 }
3346
3347 static void __exit mwl8k_exit(void)
3348 {
3349 pci_unregister_driver(&mwl8k_driver);
3350 }
3351
3352 module_init(mwl8k_init);
3353 module_exit(mwl8k_exit);
Linux 2.6 libata-dev (mirror)