3 This document describes the Linux kernel Makefiles.
10 --- 3.1 Goal definitions
11 --- 3.2 Built-in object goals - obj-y
12 --- 3.3 Loadable module goals - obj-m
13 --- 3.4 Objects which export symbols
14 --- 3.5 Library file goals - lib-y
15 --- 3.6 Descending down in directories
16 --- 3.7 Compilation flags
17 --- 3.8 Command line dependency
18 --- 3.9 Dependency tracking
19 --- 3.10 Special Rules
20 --- 3.11 $(CC) support functions
21 --- 3.12 $(LD) support functions
23 === 4 Host Program support
24 --- 4.1 Simple Host Program
25 --- 4.2 Composite Host Programs
26 --- 4.3 Defining shared libraries
27 --- 4.4 Using C++ for host programs
28 --- 4.5 Controlling compiler options for host programs
29 --- 4.6 When host programs are actually built
30 --- 4.7 Using hostprogs-$(CONFIG_FOO)
32 === 5 Kbuild clean infrastructure
34 === 6 Architecture Makefiles
35 --- 6.1 Set variables to tweak the build to the architecture
36 --- 6.2 Add prerequisites to archprepare:
37 --- 6.3 List directories to visit when descending
38 --- 6.4 Architecture-specific boot images
39 --- 6.5 Building non-kbuild targets
40 --- 6.6 Commands useful for building a boot image
41 --- 6.7 Custom kbuild commands
42 --- 6.8 Preprocessing linker scripts
44 === 7 Kbuild syntax for exported headers
48 --- 7.4 unifdef-y (deprecated)
50 === 8 Kbuild Variables
51 === 9 Makefile language
57 The Makefiles have five parts:
59 Makefile the top Makefile.
60 .config the kernel configuration file.
61 arch/$(ARCH)/Makefile the arch Makefile.
62 scripts/Makefile.* common rules etc. for all kbuild Makefiles.
63 kbuild Makefiles there are about 500 of these.
65 The top Makefile reads the .config file, which comes from the kernel
66 configuration process.
68 The top Makefile is responsible for building two major products: vmlinux
69 (the resident kernel image) and modules (any module files).
70 It builds these goals by recursively descending into the subdirectories of
71 the kernel source tree.
72 The list of subdirectories which are visited depends upon the kernel
73 configuration. The top Makefile textually includes an arch Makefile
74 with the name arch/$(ARCH)/Makefile. The arch Makefile supplies
75 architecture-specific information to the top Makefile.
77 Each subdirectory has a kbuild Makefile which carries out the commands
78 passed down from above. The kbuild Makefile uses information from the
79 .config file to construct various file lists used by kbuild to build
80 any built-in or modular targets.
82 scripts/Makefile.* contains all the definitions/rules etc. that
83 are used to build the kernel based on the kbuild makefiles.
88 People have four different relationships with the kernel Makefiles.
90 *Users* are people who build kernels. These people type commands such as
91 "make menuconfig" or "make". They usually do not read or edit
92 any kernel Makefiles (or any other source files).
94 *Normal developers* are people who work on features such as device
95 drivers, file systems, and network protocols. These people need to
96 maintain the kbuild Makefiles for the subsystem they are
97 working on. In order to do this effectively, they need some overall
98 knowledge about the kernel Makefiles, plus detailed knowledge about the
99 public interface for kbuild.
101 *Arch developers* are people who work on an entire architecture, such
102 as sparc or ia64. Arch developers need to know about the arch Makefile
103 as well as kbuild Makefiles.
105 *Kbuild developers* are people who work on the kernel build system itself.
106 These people need to know about all aspects of the kernel Makefiles.
108 This document is aimed towards normal developers and arch developers.
111 === 3 The kbuild files
113 Most Makefiles within the kernel are kbuild Makefiles that use the
114 kbuild infrastructure. This chapter introduces the syntax used in the
116 The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can
117 be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'
120 Section 3.1 "Goal definitions" is a quick intro, further chapters provide
121 more details, with real examples.
123 --- 3.1 Goal definitions
125 Goal definitions are the main part (heart) of the kbuild Makefile.
126 These lines define the files to be built, any special compilation
127 options, and any subdirectories to be entered recursively.
129 The most simple kbuild makefile contains one line:
134 This tells kbuild that there is one object in that directory, named
135 foo.o. foo.o will be built from foo.c or foo.S.
137 If foo.o shall be built as a module, the variable obj-m is used.
138 Therefore the following pattern is often used:
141 obj-$(CONFIG_FOO) += foo.o
143 $(CONFIG_FOO) evaluates to either y (for built-in) or m (for module).
144 If CONFIG_FOO is neither y nor m, then the file will not be compiled
147 --- 3.2 Built-in object goals - obj-y
149 The kbuild Makefile specifies object files for vmlinux
150 in the $(obj-y) lists. These lists depend on the kernel
153 Kbuild compiles all the $(obj-y) files. It then calls
154 "$(LD) -r" to merge these files into one built-in.o file.
155 built-in.o is later linked into vmlinux by the parent Makefile.
157 The order of files in $(obj-y) is significant. Duplicates in
158 the lists are allowed: the first instance will be linked into
159 built-in.o and succeeding instances will be ignored.
161 Link order is significant, because certain functions
162 (module_init() / __initcall) will be called during boot in the
163 order they appear. So keep in mind that changing the link
164 order may e.g. change the order in which your SCSI
165 controllers are detected, and thus your disks are renumbered.
168 #drivers/isdn/i4l/Makefile
169 # Makefile for the kernel ISDN subsystem and device drivers.
170 # Each configuration option enables a list of files.
171 obj-$(CONFIG_ISDN_I4L) += isdn.o
172 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
174 --- 3.3 Loadable module goals - obj-m
176 $(obj-m) specify object files which are built as loadable
179 A module may be built from one source file or several source
180 files. In the case of one source file, the kbuild makefile
181 simply adds the file to $(obj-m).
184 #drivers/isdn/i4l/Makefile
185 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
187 Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm'
189 If a kernel module is built from several source files, you specify
190 that you want to build a module in the same way as above; however,
191 kbuild needs to know which object files you want to build your
192 module from, so you have to tell it by setting a $(<module_name>-y)
196 #drivers/isdn/i4l/Makefile
197 obj-$(CONFIG_ISDN_I4L) += isdn.o
198 isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o
200 In this example, the module name will be isdn.o. Kbuild will
201 compile the objects listed in $(isdn-y) and then run
202 "$(LD) -r" on the list of these files to generate isdn.o.
204 Due to kbuild recognizing $(<module_name>-y) for composite objects,
205 you can use the value of a CONFIG_ symbol to optionally include an
206 object file as part of a composite object.
210 obj-$(CONFIG_EXT2_FS) += ext2.o
211 ext2-y := balloc.o dir.o file.o ialloc.o inode.o ioctl.o \
212 namei.o super.o symlink.o
213 ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \
216 In this example, xattr.o, xattr_user.o and xattr_trusted.o are only
217 part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR)
220 Note: Of course, when you are building objects into the kernel,
221 the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,
222 kbuild will build an ext2.o file for you out of the individual
223 parts and then link this into built-in.o, as you would expect.
225 --- 3.4 Objects which export symbols
227 No special notation is required in the makefiles for
228 modules exporting symbols.
230 --- 3.5 Library file goals - lib-y
232 Objects listed with obj-* are used for modules, or
233 combined in a built-in.o for that specific directory.
234 There is also the possibility to list objects that will
235 be included in a library, lib.a.
236 All objects listed with lib-y are combined in a single
237 library for that directory.
238 Objects that are listed in obj-y and additionally listed in
239 lib-y will not be included in the library, since they will
240 be accessible anyway.
241 For consistency, objects listed in lib-m will be included in lib.a.
243 Note that the same kbuild makefile may list files to be built-in
244 and to be part of a library. Therefore the same directory
245 may contain both a built-in.o and a lib.a file.
248 #arch/x86/lib/Makefile
251 This will create a library lib.a based on delay.o. For kbuild to
252 actually recognize that there is a lib.a being built, the directory
253 shall be listed in libs-y.
254 See also "6.3 List directories to visit when descending".
256 Use of lib-y is normally restricted to lib/ and arch/*/lib.
258 --- 3.6 Descending down in directories
260 A Makefile is only responsible for building objects in its own
261 directory. Files in subdirectories should be taken care of by
262 Makefiles in these subdirs. The build system will automatically
263 invoke make recursively in subdirectories, provided you let it know of
266 To do so, obj-y and obj-m are used.
267 ext2 lives in a separate directory, and the Makefile present in fs/
268 tells kbuild to descend down using the following assignment.
272 obj-$(CONFIG_EXT2_FS) += ext2/
274 If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular)
275 the corresponding obj- variable will be set, and kbuild will descend
276 down in the ext2 directory.
277 Kbuild only uses this information to decide that it needs to visit
278 the directory, it is the Makefile in the subdirectory that
279 specifies what is modules and what is built-in.
281 It is good practice to use a CONFIG_ variable when assigning directory
282 names. This allows kbuild to totally skip the directory if the
283 corresponding CONFIG_ option is neither 'y' nor 'm'.
285 --- 3.7 Compilation flags
287 ccflags-y, asflags-y and ldflags-y
288 These three flags apply only to the kbuild makefile in which they
289 are assigned. They are used for all the normal cc, as and ld
290 invocations happening during a recursive build.
291 Note: Flags with the same behaviour were previously named:
292 EXTRA_CFLAGS, EXTRA_AFLAGS and EXTRA_LDFLAGS.
293 They are still supported but their usage is deprecated.
295 ccflags-y specifies options for compiling with $(CC).
298 # drivers/acpi/Makefile
300 ccflags-$(CONFIG_ACPI_DEBUG) += -DACPI_DEBUG_OUTPUT
302 This variable is necessary because the top Makefile owns the
303 variable $(KBUILD_CFLAGS) and uses it for compilation flags for the
306 asflags-y specifies options for assembling with $(AS).
309 #arch/sparc/kernel/Makefile
312 ldflags-y specifies options for linking with $(LD).
315 #arch/cris/boot/compressed/Makefile
316 ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds
318 subdir-ccflags-y, subdir-asflags-y
319 The two flags listed above are similar to ccflags-y and asflags-y.
320 The difference is that the subdir- variants have effect for the kbuild
321 file where they are present and all subdirectories.
322 Options specified using subdir-* are added to the commandline before
323 the options specified using the non-subdir variants.
326 subdir-ccflags-y := -Werror
330 CFLAGS_$@ and AFLAGS_$@ only apply to commands in current
333 $(CFLAGS_$@) specifies per-file options for $(CC). The $@
334 part has a literal value which specifies the file that it is for.
337 # drivers/scsi/Makefile
338 CFLAGS_aha152x.o = -DAHA152X_STAT -DAUTOCONF
339 CFLAGS_gdth.o = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ \
342 These two lines specify compilation flags for aha152x.o and gdth.o.
344 $(AFLAGS_$@) is a similar feature for source files in assembly
348 # arch/arm/kernel/Makefile
349 AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET)
350 AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
351 AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
354 --- 3.9 Dependency tracking
356 Kbuild tracks dependencies on the following:
357 1) All prerequisite files (both *.c and *.h)
358 2) CONFIG_ options used in all prerequisite files
359 3) Command-line used to compile target
361 Thus, if you change an option to $(CC) all affected files will
364 --- 3.10 Special Rules
366 Special rules are used when the kbuild infrastructure does
367 not provide the required support. A typical example is
368 header files generated during the build process.
369 Another example are the architecture-specific Makefiles which
370 need special rules to prepare boot images etc.
372 Special rules are written as normal Make rules.
373 Kbuild is not executing in the directory where the Makefile is
374 located, so all special rules shall provide a relative
375 path to prerequisite files and target files.
377 Two variables are used when defining special rules:
380 $(src) is a relative path which points to the directory
381 where the Makefile is located. Always use $(src) when
382 referring to files located in the src tree.
385 $(obj) is a relative path which points to the directory
386 where the target is saved. Always use $(obj) when
387 referring to generated files.
390 #drivers/scsi/Makefile
391 $(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl
392 $(CPP) -DCHIP=810 - < $< | ... $(src)/script_asm.pl
394 This is a special rule, following the normal syntax
396 The target file depends on two prerequisite files. References
397 to the target file are prefixed with $(obj), references
398 to prerequisites are referenced with $(src) (because they are not
402 echoing information to user in a rule is often a good practice
403 but when execution "make -s" one does not expect to see any output
404 except for warnings/errors.
405 To support this kbuild define $(kecho) which will echo out the
406 text following $(kecho) to stdout except if "make -s" is used.
409 #arch/blackfin/boot/Makefile
410 $(obj)/vmImage: $(obj)/vmlinux.gz
411 $(call if_changed,uimage)
412 @$(kecho) 'Kernel: $@ is ready'
415 --- 3.11 $(CC) support functions
417 The kernel may be built with several different versions of
418 $(CC), each supporting a unique set of features and options.
419 kbuild provide basic support to check for valid options for $(CC).
420 $(CC) is usually the gcc compiler, but other alternatives are
424 as-option is used to check if $(CC) -- when used to compile
425 assembler (*.S) files -- supports the given option. An optional
426 second option may be specified if the first option is not supported.
430 cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)
432 In the above example, cflags-y will be assigned the option
433 -Wa$(comma)-isa=$(isa-y) if it is supported by $(CC).
434 The second argument is optional, and if supplied will be used
435 if first argument is not supported.
438 cc-ldoption is used to check if $(CC) when used to link object files
439 supports the given option. An optional second option may be
440 specified if first option are not supported.
443 #arch/i386/kernel/Makefile
444 vsyscall-flags += $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
446 In the above example, vsyscall-flags will be assigned the option
447 -Wl$(comma)--hash-style=sysv if it is supported by $(CC).
448 The second argument is optional, and if supplied will be used
449 if first argument is not supported.
452 as-instr checks if the assembler reports a specific instruction
453 and then outputs either option1 or option2
454 C escapes are supported in the test instruction
455 Note: as-instr-option uses KBUILD_AFLAGS for $(AS) options
458 cc-option is used to check if $(CC) supports a given option, and not
459 supported to use an optional second option.
463 cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)
465 In the above example, cflags-y will be assigned the option
466 -march=pentium-mmx if supported by $(CC), otherwise -march=i586.
467 The second argument to cc-option is optional, and if omitted,
468 cflags-y will be assigned no value if first option is not supported.
469 Note: cc-option uses KBUILD_CFLAGS for $(CC) options
472 cc-option-yn is used to check if gcc supports a given option
473 and return 'y' if supported, otherwise 'n'.
477 biarch := $(call cc-option-yn, -m32)
478 aflags-$(biarch) += -a32
479 cflags-$(biarch) += -m32
481 In the above example, $(biarch) is set to y if $(CC) supports the -m32
482 option. When $(biarch) equals 'y', the expanded variables $(aflags-y)
483 and $(cflags-y) will be assigned the values -a32 and -m32,
485 Note: cc-option-yn uses KBUILD_CFLAGS for $(CC) options
488 gcc versions >= 3.0 changed the type of options used to specify
489 alignment of functions, loops etc. $(cc-option-align), when used
490 as prefix to the align options, will select the right prefix:
492 cc-option-align = -malign
494 cc-option-align = -falign
497 KBUILD_CFLAGS += $(cc-option-align)-functions=4
499 In the above example, the option -falign-functions=4 is used for
500 gcc >= 3.00. For gcc < 3.00, -malign-functions=4 is used.
501 Note: cc-option-align uses KBUILD_CFLAGS for $(CC) options
504 cc-version returns a numerical version of the $(CC) compiler version.
505 The format is <major><minor> where both are two digits. So for example
506 gcc 3.41 would return 0341.
507 cc-version is useful when a specific $(CC) version is faulty in one
508 area, for example -mregparm=3 was broken in some gcc versions
509 even though the option was accepted by gcc.
513 cflags-y += $(shell \
514 if [ $(call cc-version) -ge 0300 ] ; then \
515 echo "-mregparm=3"; fi ;)
517 In the above example, -mregparm=3 is only used for gcc version greater
518 than or equal to gcc 3.0.
521 cc-ifversion tests the version of $(CC) and equals last argument if
522 version expression is true.
525 #fs/reiserfs/Makefile
526 ccflags-y := $(call cc-ifversion, -lt, 0402, -O1)
528 In this example, ccflags-y will be assigned the value -O1 if the
529 $(CC) version is less than 4.2.
530 cc-ifversion takes all the shell operators:
531 -eq, -ne, -lt, -le, -gt, and -ge
532 The third parameter may be a text as in this example, but it may also
533 be an expanded variable or a macro.
536 cc-fullversion is useful when the exact version of gcc is needed.
537 One typical use-case is when a specific GCC version is broken.
538 cc-fullversion points out a more specific version than cc-version does.
541 #arch/powerpc/Makefile
542 $(Q)if test "$(call cc-fullversion)" = "040200" ; then \
543 echo -n '*** GCC-4.2.0 cannot compile the 64-bit powerpc ' ; \
547 In this example for a specific GCC version the build will error out explaining
548 to the user why it stops.
551 cc-cross-prefix is used to check if there exists a $(CC) in path with
552 one of the listed prefixes. The first prefix where there exist a
553 prefix$(CC) in the PATH is returned - and if no prefix$(CC) is found
554 then nothing is returned.
555 Additional prefixes are separated by a single space in the
556 call of cc-cross-prefix.
557 This functionality is useful for architecture Makefiles that try
558 to set CROSS_COMPILE to well-known values but may have several
559 values to select between.
560 It is recommended only to try to set CROSS_COMPILE if it is a cross
561 build (host arch is different from target arch). And if CROSS_COMPILE
562 is already set then leave it with the old value.
566 ifneq ($(SUBARCH),$(ARCH))
567 ifeq ($(CROSS_COMPILE),)
568 CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu-)
572 --- 3.12 $(LD) support functions
575 ld-option is used to check if $(LD) supports the supplied option.
576 ld-option takes two options as arguments.
577 The second argument is an optional option that can be used if the
578 first option is not supported by $(LD).
582 LDFLAGS_vmlinux += $(call really-ld-option, -X)
585 === 4 Host Program support
587 Kbuild supports building executables on the host for use during the
589 Two steps are required in order to use a host executable.
591 The first step is to tell kbuild that a host program exists. This is
592 done utilising the variable hostprogs-y.
594 The second step is to add an explicit dependency to the executable.
595 This can be done in two ways. Either add the dependency in a rule,
596 or utilise the variable $(always).
597 Both possibilities are described in the following.
599 --- 4.1 Simple Host Program
601 In some cases there is a need to compile and run a program on the
602 computer where the build is running.
603 The following line tells kbuild that the program bin2hex shall be
604 built on the build host.
607 hostprogs-y := bin2hex
609 Kbuild assumes in the above example that bin2hex is made from a single
610 c-source file named bin2hex.c located in the same directory as
613 --- 4.2 Composite Host Programs
615 Host programs can be made up based on composite objects.
616 The syntax used to define composite objects for host programs is
617 similar to the syntax used for kernel objects.
618 $(<executable>-objs) lists all objects used to link the final
622 #scripts/lxdialog/Makefile
623 hostprogs-y := lxdialog
624 lxdialog-objs := checklist.o lxdialog.o
626 Objects with extension .o are compiled from the corresponding .c
627 files. In the above example, checklist.c is compiled to checklist.o
628 and lxdialog.c is compiled to lxdialog.o.
629 Finally, the two .o files are linked to the executable, lxdialog.
630 Note: The syntax <executable>-y is not permitted for host-programs.
632 --- 4.3 Defining shared libraries
634 Objects with extension .so are considered shared libraries, and
635 will be compiled as position independent objects.
636 Kbuild provides support for shared libraries, but the usage
638 In the following example the libkconfig.so shared library is used
639 to link the executable conf.
642 #scripts/kconfig/Makefile
644 conf-objs := conf.o libkconfig.so
645 libkconfig-objs := expr.o type.o
647 Shared libraries always require a corresponding -objs line, and
648 in the example above the shared library libkconfig is composed by
649 the two objects expr.o and type.o.
650 expr.o and type.o will be built as position independent code and
651 linked as a shared library libkconfig.so. C++ is not supported for
654 --- 4.4 Using C++ for host programs
656 kbuild offers support for host programs written in C++. This was
657 introduced solely to support kconfig, and is not recommended
661 #scripts/kconfig/Makefile
663 qconf-cxxobjs := qconf.o
665 In the example above the executable is composed of the C++ file
666 qconf.cc - identified by $(qconf-cxxobjs).
668 If qconf is composed by a mixture of .c and .cc files, then an
669 additional line can be used to identify this.
672 #scripts/kconfig/Makefile
674 qconf-cxxobjs := qconf.o
675 qconf-objs := check.o
677 --- 4.5 Controlling compiler options for host programs
679 When compiling host programs, it is possible to set specific flags.
680 The programs will always be compiled utilising $(HOSTCC) passed
681 the options specified in $(HOSTCFLAGS).
682 To set flags that will take effect for all host programs created
683 in that Makefile, use the variable HOST_EXTRACFLAGS.
686 #scripts/lxdialog/Makefile
687 HOST_EXTRACFLAGS += -I/usr/include/ncurses
689 To set specific flags for a single file the following construction
693 #arch/ppc64/boot/Makefile
694 HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE)
696 It is also possible to specify additional options to the linker.
699 #scripts/kconfig/Makefile
700 HOSTLOADLIBES_qconf := -L$(QTDIR)/lib
702 When linking qconf, it will be passed the extra option
705 --- 4.6 When host programs are actually built
707 Kbuild will only build host-programs when they are referenced
709 This is possible in two ways:
711 (1) List the prerequisite explicitly in a special rule.
714 #drivers/pci/Makefile
715 hostprogs-y := gen-devlist
716 $(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist
717 ( cd $(obj); ./gen-devlist ) < $<
719 The target $(obj)/devlist.h will not be built before
720 $(obj)/gen-devlist is updated. Note that references to
721 the host programs in special rules must be prefixed with $(obj).
724 When there is no suitable special rule, and the host program
725 shall be built when a makefile is entered, the $(always)
726 variable shall be used.
729 #scripts/lxdialog/Makefile
730 hostprogs-y := lxdialog
731 always := $(hostprogs-y)
733 This will tell kbuild to build lxdialog even if not referenced in
736 --- 4.7 Using hostprogs-$(CONFIG_FOO)
738 A typical pattern in a Kbuild file looks like this:
742 hostprogs-$(CONFIG_KALLSYMS) += kallsyms
744 Kbuild knows about both 'y' for built-in and 'm' for module.
745 So if a config symbol evaluate to 'm', kbuild will still build
746 the binary. In other words, Kbuild handles hostprogs-m exactly
747 like hostprogs-y. But only hostprogs-y is recommended to be used
748 when no CONFIG symbols are involved.
750 === 5 Kbuild clean infrastructure
752 "make clean" deletes most generated files in the obj tree where the kernel
753 is compiled. This includes generated files such as host programs.
754 Kbuild knows targets listed in $(hostprogs-y), $(hostprogs-m), $(always),
755 $(extra-y) and $(targets). They are all deleted during "make clean".
756 Files matching the patterns "*.[oas]", "*.ko", plus some additional files
757 generated by kbuild are deleted all over the kernel src tree when
758 "make clean" is executed.
760 Additional files can be specified in kbuild makefiles by use of $(clean-files).
763 #drivers/pci/Makefile
764 clean-files := devlist.h classlist.h
766 When executing "make clean", the two files "devlist.h classlist.h" will
767 be deleted. Kbuild will assume files to be in same relative directory as the
768 Makefile except if an absolute path is specified (path starting with '/').
770 To delete a directory hierarchy use:
773 #scripts/package/Makefile
774 clean-dirs := $(objtree)/debian/
776 This will delete the directory debian, including all subdirectories.
777 Kbuild will assume the directories to be in the same relative path as the
778 Makefile if no absolute path is specified (path does not start with '/').
780 Usually kbuild descends down in subdirectories due to "obj-* := dir/",
781 but in the architecture makefiles where the kbuild infrastructure
782 is not sufficient this sometimes needs to be explicit.
785 #arch/i386/boot/Makefile
786 subdir- := compressed/
788 The above assignment instructs kbuild to descend down in the
789 directory compressed/ when "make clean" is executed.
791 To support the clean infrastructure in the Makefiles that builds the
792 final bootimage there is an optional target named archclean:
797 $(Q)$(MAKE) $(clean)=arch/i386/boot
799 When "make clean" is executed, make will descend down in arch/i386/boot,
800 and clean as usual. The Makefile located in arch/i386/boot/ may use
801 the subdir- trick to descend further down.
803 Note 1: arch/$(ARCH)/Makefile cannot use "subdir-", because that file is
804 included in the top level makefile, and the kbuild infrastructure
805 is not operational at that point.
807 Note 2: All directories listed in core-y, libs-y, drivers-y and net-y will
808 be visited during "make clean".
810 === 6 Architecture Makefiles
812 The top level Makefile sets up the environment and does the preparation,
813 before starting to descend down in the individual directories.
814 The top level makefile contains the generic part, whereas
815 arch/$(ARCH)/Makefile contains what is required to set up kbuild
816 for said architecture.
817 To do so, arch/$(ARCH)/Makefile sets up a number of variables and defines
820 When kbuild executes, the following steps are followed (roughly):
821 1) Configuration of the kernel => produce .config
822 2) Store kernel version in include/linux/version.h
823 3) Symlink include/asm to include/asm-$(ARCH)
824 4) Updating all other prerequisites to the target prepare:
825 - Additional prerequisites are specified in arch/$(ARCH)/Makefile
826 5) Recursively descend down in all directories listed in
827 init-* core* drivers-* net-* libs-* and build all targets.
828 - The values of the above variables are expanded in arch/$(ARCH)/Makefile.
829 6) All object files are then linked and the resulting file vmlinux is
830 located at the root of the obj tree.
831 The very first objects linked are listed in head-y, assigned by
832 arch/$(ARCH)/Makefile.
833 7) Finally, the architecture-specific part does any required post processing
834 and builds the final bootimage.
835 - This includes building boot records
836 - Preparing initrd images and the like
839 --- 6.1 Set variables to tweak the build to the architecture
841 LDFLAGS Generic $(LD) options
843 Flags used for all invocations of the linker.
844 Often specifying the emulation is sufficient.
848 LDFLAGS := -m elf_s390
849 Note: ldflags-y can be used to further customise
850 the flags used. See chapter 3.7.
852 LDFLAGS_MODULE Options for $(LD) when linking modules
854 LDFLAGS_MODULE is used to set specific flags for $(LD) when
855 linking the .ko files used for modules.
856 Default is "-r", for relocatable output.
858 LDFLAGS_vmlinux Options for $(LD) when linking vmlinux
860 LDFLAGS_vmlinux is used to specify additional flags to pass to
861 the linker when linking the final vmlinux image.
862 LDFLAGS_vmlinux uses the LDFLAGS_$@ support.
866 LDFLAGS_vmlinux := -e stext
868 OBJCOPYFLAGS objcopy flags
870 When $(call if_changed,objcopy) is used to translate a .o file,
871 the flags specified in OBJCOPYFLAGS will be used.
872 $(call if_changed,objcopy) is often used to generate raw binaries on
877 OBJCOPYFLAGS := -O binary
879 #arch/s390/boot/Makefile
880 $(obj)/image: vmlinux FORCE
881 $(call if_changed,objcopy)
883 In this example, the binary $(obj)/image is a binary version of
884 vmlinux. The usage of $(call if_changed,xxx) will be described later.
886 KBUILD_AFLAGS $(AS) assembler flags
888 Default value - see top level Makefile
889 Append or modify as required per architecture.
892 #arch/sparc64/Makefile
893 KBUILD_AFLAGS += -m64 -mcpu=ultrasparc
895 KBUILD_CFLAGS $(CC) compiler flags
897 Default value - see top level Makefile
898 Append or modify as required per architecture.
900 Often, the KBUILD_CFLAGS variable depends on the configuration.
904 cflags-$(CONFIG_M386) += -march=i386
905 KBUILD_CFLAGS += $(cflags-y)
907 Many arch Makefiles dynamically run the target C compiler to
908 probe supported options:
913 cflags-$(CONFIG_MPENTIUMII) += $(call cc-option,\
914 -march=pentium2,-march=i686)
916 # Disable unit-at-a-time mode ...
917 KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time)
921 The first example utilises the trick that a config option expands
922 to 'y' when selected.
924 CFLAGS_KERNEL $(CC) options specific for built-in
926 $(CFLAGS_KERNEL) contains extra C compiler flags used to compile
927 resident kernel code.
929 CFLAGS_MODULE $(CC) options specific for modules
931 $(CFLAGS_MODULE) contains extra C compiler flags used to compile code
932 for loadable kernel modules.
935 --- 6.2 Add prerequisites to archprepare:
937 The archprepare: rule is used to list prerequisites that need to be
938 built before starting to descend down in the subdirectories.
939 This is usually used for header files containing assembler constants.
943 archprepare: maketools
945 In this example, the file target maketools will be processed
946 before descending down in the subdirectories.
947 See also chapter XXX-TODO that describe how kbuild supports
948 generating offset header files.
951 --- 6.3 List directories to visit when descending
953 An arch Makefile cooperates with the top Makefile to define variables
954 which specify how to build the vmlinux file. Note that there is no
955 corresponding arch-specific section for modules; the module-building
956 machinery is all architecture-independent.
959 head-y, init-y, core-y, libs-y, drivers-y, net-y
961 $(head-y) lists objects to be linked first in vmlinux.
962 $(libs-y) lists directories where a lib.a archive can be located.
963 The rest list directories where a built-in.o object file can be
966 $(init-y) objects will be located after $(head-y).
967 Then the rest follows in this order:
968 $(core-y), $(libs-y), $(drivers-y) and $(net-y).
970 The top level Makefile defines values for all generic directories,
971 and arch/$(ARCH)/Makefile only adds architecture-specific directories.
974 #arch/sparc64/Makefile
975 core-y += arch/sparc64/kernel/
976 libs-y += arch/sparc64/prom/ arch/sparc64/lib/
977 drivers-$(CONFIG_OPROFILE) += arch/sparc64/oprofile/
980 --- 6.4 Architecture-specific boot images
982 An arch Makefile specifies goals that take the vmlinux file, compress
983 it, wrap it in bootstrapping code, and copy the resulting files
984 somewhere. This includes various kinds of installation commands.
985 The actual goals are not standardized across architectures.
987 It is common to locate any additional processing in a boot/
988 directory below arch/$(ARCH)/.
990 Kbuild does not provide any smart way to support building a
991 target specified in boot/. Therefore arch/$(ARCH)/Makefile shall
992 call make manually to build a target in boot/.
994 The recommended approach is to include shortcuts in
995 arch/$(ARCH)/Makefile, and use the full path when calling down
996 into the arch/$(ARCH)/boot/Makefile.
1000 boot := arch/i386/boot
1002 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
1004 "$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke
1005 make in a subdirectory.
1007 There are no rules for naming architecture-specific targets,
1008 but executing "make help" will list all relevant targets.
1009 To support this, $(archhelp) must be defined.
1014 echo '* bzImage - Image (arch/$(ARCH)/boot/bzImage)'
1017 When make is executed without arguments, the first goal encountered
1018 will be built. In the top level Makefile the first goal present
1020 An architecture shall always, per default, build a bootable image.
1021 In "make help", the default goal is highlighted with a '*'.
1022 Add a new prerequisite to all: to select a default goal different
1029 When "make" is executed without arguments, bzImage will be built.
1031 --- 6.5 Building non-kbuild targets
1035 extra-y specify additional targets created in the current
1036 directory, in addition to any targets specified by obj-*.
1038 Listing all targets in extra-y is required for two purposes:
1039 1) Enable kbuild to check changes in command lines
1040 - When $(call if_changed,xxx) is used
1041 2) kbuild knows what files to delete during "make clean"
1044 #arch/i386/kernel/Makefile
1045 extra-y := head.o init_task.o
1047 In this example, extra-y is used to list object files that
1048 shall be built, but shall not be linked as part of built-in.o.
1051 --- 6.6 Commands useful for building a boot image
1053 Kbuild provides a few macros that are useful when building a
1058 if_changed is the infrastructure used for the following commands.
1061 target: source(s) FORCE
1062 $(call if_changed,ld/objcopy/gzip)
1064 When the rule is evaluated, it is checked to see if any files
1065 need an update, or the command line has changed since the last
1066 invocation. The latter will force a rebuild if any options
1067 to the executable have changed.
1068 Any target that utilises if_changed must be listed in $(targets),
1069 otherwise the command line check will fail, and the target will
1071 Assignments to $(targets) are without $(obj)/ prefix.
1072 if_changed may be used in conjunction with custom commands as
1073 defined in 6.7 "Custom kbuild commands".
1075 Note: It is a typical mistake to forget the FORCE prerequisite.
1076 Another common pitfall is that whitespace is sometimes
1077 significant; for instance, the below will fail (note the extra space
1079 target: source(s) FORCE
1080 #WRONG!# $(call if_changed, ld/objcopy/gzip)
1083 Link target. Often, LDFLAGS_$@ is used to set specific options to ld.
1086 Copy binary. Uses OBJCOPYFLAGS usually specified in
1087 arch/$(ARCH)/Makefile.
1088 OBJCOPYFLAGS_$@ may be used to set additional options.
1091 Compress target. Use maximum compression to compress target.
1094 #arch/i386/boot/Makefile
1095 LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary
1096 LDFLAGS_setup := -Ttext 0x0 -s --oformat binary -e begtext
1098 targets += setup setup.o bootsect bootsect.o
1099 $(obj)/setup $(obj)/bootsect: %: %.o FORCE
1100 $(call if_changed,ld)
1102 In this example, there are two possible targets, requiring different
1103 options to the linker. The linker options are specified using the
1104 LDFLAGS_$@ syntax - one for each potential target.
1105 $(targets) are assigned all potential targets, by which kbuild knows
1106 the targets and will:
1107 1) check for commandline changes
1108 2) delete target during make clean
1110 The ": %: %.o" part of the prerequisite is a shorthand that
1111 free us from listing the setup.o and bootsect.o files.
1112 Note: It is a common mistake to forget the "target :=" assignment,
1113 resulting in the target file being recompiled for no
1117 --- 6.7 Custom kbuild commands
1119 When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand
1120 of a command is normally displayed.
1121 To enable this behaviour for custom commands kbuild requires
1122 two variables to be set:
1123 quiet_cmd_<command> - what shall be echoed
1124 cmd_<command> - the command to execute
1128 quiet_cmd_image = BUILD $@
1129 cmd_image = $(obj)/tools/build $(BUILDFLAGS) \
1130 $(obj)/vmlinux.bin > $@
1133 $(obj)/bzImage: $(obj)/vmlinux.bin $(obj)/tools/build FORCE
1134 $(call if_changed,image)
1135 @echo 'Kernel: $@ is ready'
1137 When updating the $(obj)/bzImage target, the line
1139 BUILD arch/i386/boot/bzImage
1141 will be displayed with "make KBUILD_VERBOSE=0".
1144 --- 6.8 Preprocessing linker scripts
1146 When the vmlinux image is built, the linker script
1147 arch/$(ARCH)/kernel/vmlinux.lds is used.
1148 The script is a preprocessed variant of the file vmlinux.lds.S
1149 located in the same directory.
1150 kbuild knows .lds files and includes a rule *lds.S -> *lds.
1153 #arch/i386/kernel/Makefile
1154 always := vmlinux.lds
1157 export CPPFLAGS_vmlinux.lds += -P -C -U$(ARCH)
1159 The assignment to $(always) is used to tell kbuild to build the
1161 The assignment to $(CPPFLAGS_vmlinux.lds) tells kbuild to use the
1162 specified options when building the target vmlinux.lds.
1164 When building the *.lds target, kbuild uses the variables:
1165 KBUILD_CPPFLAGS : Set in top-level Makefile
1166 cppflags-y : May be set in the kbuild makefile
1167 CPPFLAGS_$(@F) : Target specific flags.
1168 Note that the full filename is used in this
1171 The kbuild infrastructure for *lds file are used in several
1172 architecture-specific files.
1174 === 7 Kbuild syntax for exported headers
1176 The kernel include a set of headers that is exported to userspace.
1177 Many headers can be exported as-is but other headers require a
1178 minimal pre-processing before they are ready for user-space.
1179 The pre-processing does:
1180 - drop kernel specific annotations
1181 - drop include of compiler.h
1182 - drop all sections that are kernel internal (guarded by ifdef __KERNEL__)
1184 Each relevant directory contains a file name "Kbuild" which specifies the
1185 headers to be exported.
1186 See subsequent chapter for the syntax of the Kbuild file.
1190 header-y specify header files to be exported.
1193 #include/linux/Kbuild
1195 header-y += aio_abi.h
1197 The convention is to list one file per line and
1198 preferably in alphabetic order.
1200 header-y also specify which subdirectories to visit.
1201 A subdirectory is identified by a trailing '/' which
1202 can be seen in the example above for the usb subdirectory.
1204 Subdirectories are visited before their parent directories.
1208 objhdr-y specifies generated files to be exported.
1209 Generated files are special as they need to be looked
1210 up in another directory when doing 'make O=...' builds.
1213 #include/linux/Kbuild
1214 objhdr-y += version.h
1216 --- 7.3 destination-y
1218 When an architecture have a set of exported headers that needs to be
1219 exported to a different directory destination-y is used.
1220 destination-y specify the destination directory for all exported
1221 headers in the file where it is present.
1224 #arch/xtensa/platforms/s6105/include/platform/Kbuild
1225 destination-y := include/linux
1227 In the example above all exported headers in the Kbuild file
1228 will be located in the directory "include/linux" when exported.
1231 --- 7.4 unifdef-y (deprecated)
1233 unifdef-y is deprecated. A direct replacement is header-y.
1236 === 8 Kbuild Variables
1238 The top Makefile exports the following variables:
1240 VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION
1242 These variables define the current kernel version. A few arch
1243 Makefiles actually use these values directly; they should use
1244 $(KERNELRELEASE) instead.
1246 $(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic
1247 three-part version number, such as "2", "4", and "0". These three
1248 values are always numeric.
1250 $(EXTRAVERSION) defines an even tinier sublevel for pre-patches
1251 or additional patches. It is usually some non-numeric string
1252 such as "-pre4", and is often blank.
1256 $(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable
1257 for constructing installation directory names or showing in
1258 version strings. Some arch Makefiles use it for this purpose.
1262 This variable defines the target architecture, such as "i386",
1263 "arm", or "sparc". Some kbuild Makefiles test $(ARCH) to
1264 determine which files to compile.
1266 By default, the top Makefile sets $(ARCH) to be the same as the
1267 host system architecture. For a cross build, a user may
1268 override the value of $(ARCH) on the command line:
1275 This variable defines a place for the arch Makefiles to install
1276 the resident kernel image and System.map file.
1277 Use this for architecture-specific install targets.
1279 INSTALL_MOD_PATH, MODLIB
1281 $(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module
1282 installation. This variable is not defined in the Makefile but
1283 may be passed in by the user if desired.
1285 $(MODLIB) specifies the directory for module installation.
1286 The top Makefile defines $(MODLIB) to
1287 $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE). The user may
1288 override this value on the command line if desired.
1292 If this variable is specified, will cause modules to be stripped
1293 after they are installed. If INSTALL_MOD_STRIP is '1', then the
1294 default option --strip-debug will be used. Otherwise,
1295 INSTALL_MOD_STRIP will used as the option(s) to the strip command.
1298 === 9 Makefile language
1300 The kernel Makefiles are designed to be run with GNU Make. The Makefiles
1301 use only the documented features of GNU Make, but they do use many
1304 GNU Make supports elementary list-processing functions. The kernel
1305 Makefiles use a novel style of list building and manipulation with few
1308 GNU Make has two assignment operators, ":=" and "=". ":=" performs
1309 immediate evaluation of the right-hand side and stores an actual string
1310 into the left-hand side. "=" is like a formula definition; it stores the
1311 right-hand side in an unevaluated form and then evaluates this form each
1312 time the left-hand side is used.
1314 There are some cases where "=" is appropriate. Usually, though, ":="
1315 is the right choice.
1319 Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net>
1320 Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de>
1321 Updates by Sam Ravnborg <sam@ravnborg.org>
1322 Language QA by Jan Engelhardt <jengelh@gmx.de>
1326 - Describe how kbuild supports shipped files with _shipped.
1327 - Generating offset header files.
1328 - Add more variables to section 7?