1 /***********************************
3 ************************************/
7 #define MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES 256
15 }__attribute__((packed
));
16 typedef struct _LEADER LEADER
,*PLEADER
;
18 struct _PACKETTOSEND
{
21 }__attribute__((packed
));
22 typedef struct _PACKETTOSEND PACKETTOSEND
, *PPACKETTOSEND
;
25 struct _CONTROL_PACKET
{
28 struct _CONTROL_PACKET
* next
;
29 }__attribute__((packed
));
30 typedef struct _CONTROL_PACKET CONTROL_PACKET
,*PCONTROL_PACKET
;
36 }__attribute__((packed
));
37 typedef struct link_request LINK_REQUEST
, *PLINK_REQUEST
;
40 //classification extension is added
41 typedef struct _ADD_CONNECTION
{
42 ULONG SrcIpAddressCount
;
43 ULONG SrcIpAddress
[MAX_CONNECTIONS
];
44 ULONG SrcIpMask
[MAX_CONNECTIONS
];
46 ULONG DestIpAddressCount
;
47 ULONG DestIpAddress
[MAX_CONNECTIONS
];
48 ULONG DestIpMask
[MAX_CONNECTIONS
];
58 } ADD_CONNECTION
,*PADD_CONNECTION
;
61 typedef struct _CLASSIFICATION_RULE
{
63 UCHAR ucIPSrcAddr
[32];
64 UCHAR ucIPDestAddrLen
;
65 UCHAR ucIPDestAddr
[32];
66 UCHAR ucSrcPortRangeLen
;
67 UCHAR ucSrcPortRange
[4];
68 UCHAR ucDestPortRangeLen
;
69 UCHAR ucDestPortRange
[4];
71 } CLASSIFICATION_RULE
,*PCLASSIFICATION_RULE
;
73 typedef struct _CLASSIFICATION_ONLY
{
80 UCHAR ucDestinationAddress
[16];
81 } CLASSIFICATION_ONLY
, *PCLASSIFICATION_ONLY
;
84 #define MAX_IP_RANGE_LENGTH 4
85 #define MAX_PORT_RANGE 4
86 #define MAX_PROTOCOL_LENGTH 32
87 #define IPV6_ADDRESS_SIZEINBYTES 0x10
89 typedef union _U_IP_ADDRESS
{
91 ULONG ulIpv4Addr
[MAX_IP_RANGE_LENGTH
];//Source Ip Address Range
92 ULONG ulIpv4Mask
[MAX_IP_RANGE_LENGTH
];//Source Ip Mask Address Range
95 ULONG ulIpv6Addr
[MAX_IP_RANGE_LENGTH
* 4];//Source Ip Address Range
96 ULONG ulIpv6Mask
[MAX_IP_RANGE_LENGTH
* 4];//Source Ip Mask Address Range
100 UCHAR ucIpv4Address
[MAX_IP_RANGE_LENGTH
* IP_LENGTH_OF_ADDRESS
];
101 UCHAR ucIpv4Mask
[MAX_IP_RANGE_LENGTH
* IP_LENGTH_OF_ADDRESS
];
104 UCHAR ucIpv6Address
[MAX_IP_RANGE_LENGTH
* IPV6_ADDRESS_SIZEINBYTES
];
105 UCHAR ucIpv6Mask
[MAX_IP_RANGE_LENGTH
* IPV6_ADDRESS_SIZEINBYTES
];
110 typedef struct _S_HDR_SUPRESSION_CONTEXTINFO
{
112 UCHAR ucaHdrSupressionInBuf
[MAX_PHS_LENGTHS
]; //Intermediate buffer to accumulate pkt Header for PHS
113 UCHAR ucaHdrSupressionOutBuf
[MAX_PHS_LENGTHS
+ PHSI_LEN
]; //Intermediate buffer containing pkt Header after PHS
115 }S_HDR_SUPRESSION_CONTEXTINFO
;
118 typedef struct _S_CLASSIFIER_RULE
{
121 B_UINT16 uiClassifierRuleIndex
;
124 B_UINT8 u8ClassifierRulePriority
; //This field detemines the Classifier Priority
125 U_IP_ADDRESS stSrcIpAddress
;
126 UCHAR ucIPSourceAddressLength
;//Ip Source Address Length
128 U_IP_ADDRESS stDestIpAddress
;
129 UCHAR ucIPDestinationAddressLength
;//Ip Destination Address Length
130 UCHAR ucIPTypeOfServiceLength
;//Type of service Length
131 UCHAR ucTosLow
;//Tos Low
132 UCHAR ucTosHigh
;//Tos High
133 UCHAR ucTosMask
;//Tos Mask
135 UCHAR ucProtocolLength
;//protocol Length
136 UCHAR ucProtocol
[MAX_PROTOCOL_LENGTH
];//protocol Length
137 USHORT usSrcPortRangeLo
[MAX_PORT_RANGE
];
138 USHORT usSrcPortRangeHi
[MAX_PORT_RANGE
];
139 UCHAR ucSrcPortRangeLength
;
141 USHORT usDestPortRangeLo
[MAX_PORT_RANGE
];
142 USHORT usDestPortRangeHi
[MAX_PORT_RANGE
];
143 UCHAR ucDestPortRangeLength
;
145 BOOLEAN bProtocolValid
;
147 BOOLEAN bDestIpValid
;
150 //For IPv6 Addressing
152 BOOLEAN bIpv6Protocol
;
155 UCHAR u8AssociatedPHSI
;
157 //Classification fields for ETH CS
158 UCHAR ucEthCSSrcMACLen
;
159 UCHAR au8EThCSSrcMAC
[MAC_ADDRESS_SIZE
];
160 UCHAR au8EThCSSrcMACMask
[MAC_ADDRESS_SIZE
];
161 UCHAR ucEthCSDestMACLen
;
162 UCHAR au8EThCSDestMAC
[MAC_ADDRESS_SIZE
];
163 UCHAR au8EThCSDestMACMask
[MAC_ADDRESS_SIZE
];
164 UCHAR ucEtherTypeLen
;
165 UCHAR au8EthCSEtherType
[NUM_ETHERTYPE_BYTES
];
166 UCHAR usUserPriority
[2];
168 USHORT usValidityBitMap
;
170 //typedef struct _S_CLASSIFIER_RULE S_CLASSIFIER_RULE;
172 typedef struct _S_FRAGMENTED_PACKET_INFO
{
174 ULONG ulSrcIpAddress
;
175 USHORT usIpIdentification
;
176 S_CLASSIFIER_RULE
*pstMatchedClassifierEntry
;
177 BOOLEAN bOutOfOrderFragment
;
178 }S_FRAGMENTED_PACKET_INFO
,*PS_FRAGMENTED_PACKET_INFO
;
180 struct _packet_info
{
181 //classification extension Rule
185 // This field determines the priority of the SF Queues
186 B_UINT8 u8TrafficPriority
;
190 BOOLEAN bActivateRequestSent
;
192 B_UINT8 u8QueueType
;//BE or rtPS
194 UINT uiMaxBucketSize
;//maximum size of the bucket for the queue
195 UINT uiCurrentQueueDepthOnTarget
;
196 UINT uiCurrentBytesOnHost
;
197 UINT uiCurrentPacketsOnHost
;
198 UINT uiDroppedCountBytes
;
199 UINT uiDroppedCountPackets
;
202 UINT uiCurrentDrainRate
;
203 UINT uiThisPeriodSentBytes
;
204 LARGE_INTEGER liDrainCalculated
;
205 UINT uiCurrentTokenCount
;
206 LARGE_INTEGER liLastUpdateTokenAt
;
207 UINT uiMaxAllowedRate
;
208 UINT NumOfPacketsSent
;
211 S_MIBS_EXTSERVICEFLOW_PARAMETERS stMibsExtServiceFlowTable
;
212 UINT uiCurrentRxRate
;
213 UINT uiThisPeriodRxBytes
;
221 struct sk_buff
* FirstTxQueue
;
222 struct sk_buff
* LastTxQueue
;
225 struct sk_buff
* ControlHead
;
226 struct sk_buff
* ControlTail
;
229 BOOLEAN bProtocolValid
;
231 BOOLEAN bDestIpValid
;
235 BOOLEAN bAdmittedSet
;
236 BOOLEAN bAuthorizedSet
;
237 BOOLEAN bClassifierPriority
;
238 UCHAR ucServiceClassName
[MAX_CLASS_NAME_LENGTH
];
239 BOOLEAN bHeaderSuppressionEnabled
;
240 spinlock_t SFQueueLock
;
241 void *pstSFIndication
;
242 struct timeval stLastUpdateTokenAt
;
243 atomic_t uiPerSFTxResourceCount
;
248 typedef struct _packet_info PacketInfo
;
251 typedef struct _PER_TARANG_DATA
{
252 struct _PER_TARANG_DATA
* next
;
253 struct _MINI_ADAPTER
* Adapter
;
254 struct sk_buff
* RxAppControlHead
;
255 struct sk_buff
* RxAppControlTail
;
256 volatile INT AppCtrlQueueLen
;
257 BOOLEAN MacTracingEnabled
;
258 BOOLEAN bApplicationToExit
;
259 S_MIBS_DROPPED_APP_CNTRL_MESSAGES stDroppedAppCntrlMsgs
;
260 ULONG RxCntrlMsgBitMask
;
261 } PER_TARANG_DATA
, *PPER_TARANG_DATA
;
265 typedef struct _TARGET_PARAMS
{
266 B_UINT32 m_u32CfgVersion
;
268 // Scanning Related Params
269 B_UINT32 m_u32CenterFrequency
;
270 B_UINT32 m_u32BandAScan
;
271 B_UINT32 m_u32BandBScan
;
272 B_UINT32 m_u32BandCScan
;
275 B_UINT32 m_u32minGrantsize
; // size of minimum grant is 0 or 6
276 B_UINT32 m_u32PHSEnable
;
279 B_UINT32 m_u32HoEnable
;
280 B_UINT32 m_u32HoReserved1
;
281 B_UINT32 m_u32HoReserved2
;
283 // Power Control Params
284 B_UINT32 m_u32MimoEnable
;
285 B_UINT32 m_u32SecurityEnable
;
287 * bit 1: 1 Idlemode enable;
288 * bit 2: 1 Sleepmode Enable
290 B_UINT32 m_u32PowerSavingModesEnable
;
291 /* PowerSaving Mode Options:
292 bit 0 = 1: CPE mode - to keep pcmcia if alive;
293 bit 1 = 1: CINR reporing in Idlemode Msg
294 bit 2 = 1: Default PSC Enable in sleepmode*/
295 B_UINT32 m_u32PowerSavingModeOptions
;
297 B_UINT32 m_u32ArqEnable
;
299 // From Version #3, the HARQ section renamed as general
300 B_UINT32 m_u32HarqEnable
;
301 // EEPROM Param Location
302 B_UINT32 m_u32EEPROMFlag
;
303 /* BINARY TYPE - 4th MSByte:
304 * Interface Type - 3rd MSByte:
305 * Vendor Type - 2nd MSByte
308 B_UINT32 m_u32Customize
;
309 B_UINT32 m_u32ConfigBW
; /* In Hz */
310 B_UINT32 m_u32ShutDownTimer
;
313 B_UINT32 m_u32RadioParameter
;
314 B_UINT32 m_u32PhyParameter1
;
315 B_UINT32 m_u32PhyParameter2
;
316 B_UINT32 m_u32PhyParameter3
;
318 /* in eval mode only;
319 * lower 16bits = basic cid for testing;
320 * then bit 16 is test cqich,
321 * bit 17 test init rang;
322 * bit 18 test periodic rang
323 * bit 19 is test harq ack/nack
325 B_UINT32 m_u32TestOptions
;
327 B_UINT32 m_u32MaxMACDataperDLFrame
;
328 B_UINT32 m_u32MaxMACDataperULFrame
;
330 B_UINT32 m_u32Corr2MacFlags
;
332 //adding driver params.
333 B_UINT32 HostDrvrConfig1
;
334 B_UINT32 HostDrvrConfig2
;
335 B_UINT32 HostDrvrConfig3
;
336 B_UINT32 HostDrvrConfig4
;
337 B_UINT32 HostDrvrConfig5
;
338 B_UINT32 HostDrvrConfig6
;
339 B_UINT32 m_u32SegmentedPUSCenable
;
341 // BAMC enable - but 4.x does not support this feature
342 // This is added just to sync 4.x and 5.x CFGs
343 B_UINT32 m_u32BandAMCEnable
;
344 } STARGETPARAMS
, *PSTARGETPARAMS
;
347 typedef struct _STTARGETDSXBUFFER
{
348 ULONG ulTargetDsxBuffer
;
351 }STTARGETDSXBUFFER
, *PSTTARGETDSXBUFFER
;
353 typedef INT (*FP_FLASH_WRITE
)(struct _MINI_ADAPTER
*,UINT
,PVOID
);
355 typedef INT (*FP_FLASH_WRITE_STATUS
)(struct _MINI_ADAPTER
*,UINT
,PVOID
);
358 Driver adapter data structure
360 struct _MINI_ADAPTER
{
361 struct _MINI_ADAPTER
*next
;
362 struct net_device
*dev
;
366 atomic_t ApplicationRunning
;
367 volatile INT CtrlQueueLen
;
368 atomic_t AppCtrlQueueLen
;
369 BOOLEAN AppCtrlQueueOverFlow
;
370 atomic_t CurrentApplicationCount
;
371 atomic_t RegisteredApplicationCount
;
372 BOOLEAN LinkUpStatus
;
374 u32 StatisticsPointer
;
375 struct sk_buff
*RxControlHead
;
376 struct sk_buff
*RxControlTail
;
378 struct semaphore RxAppControlQueuelock
;
379 struct semaphore fw_download_sema
;
381 PPER_TARANG_DATA pTarangs
;
382 spinlock_t control_queue_lock
;
383 wait_queue_head_t process_read_wait_queue
;
385 // the pointer to the first packet we have queued in send
386 // deserialized miniport support variables
387 atomic_t TotalPacketCount
;
390 // this to keep track of the Tx and Rx MailBox Registers.
391 atomic_t CurrNumFreeTxDesc
;
392 // to keep track the no of byte received
393 USHORT PrevNumRecvDescs
;
394 USHORT CurrNumRecvDescs
;
396 PacketInfo PackInfo
[NO_OF_QUEUES
];
397 S_CLASSIFIER_RULE astClassifierTable
[MAX_CLASSIFIERS
];
398 BOOLEAN TransferMode
;
400 /*************** qos ******************/
401 BOOLEAN bETHCSEnabled
;
404 ULONG rtPSBucketSize
;
411 wait_queue_head_t tx_packet_wait_queue
;
412 wait_queue_head_t process_rx_cntrlpkt
;
413 atomic_t process_waiting
;
414 BOOLEAN fw_download_done
;
416 char *txctlpacket
[MAX_CNTRL_PKTS
];
417 atomic_t cntrlpktCnt
;
418 atomic_t index_app_read_cntrlpkt
;
419 atomic_t index_wr_txcntrlpkt
;
420 atomic_t index_rd_txcntrlpkt
;
422 struct semaphore rdmwrmsync
;
424 STTARGETDSXBUFFER astTargetDsxBuffer
[MAX_TARGET_DSX_BUFFERS
];
425 ULONG ulFreeTargetBufferCnt
;
426 ULONG ulCurrentTargetBuffer
;
427 ULONG ulTotalTargetBuffersAvailable
;
429 unsigned long chip_id
;
431 wait_queue_head_t lowpower_mode_wait_queue
;
434 BOOLEAN bBinDownloaded
;
435 BOOLEAN bCfgDownloaded
;
436 BOOLEAN bSyncUpRequestSent
;
437 USHORT usBestEffortQueueIndex
;
439 wait_queue_head_t ioctl_fw_dnld_wait_queue
;
440 BOOLEAN waiting_to_fw_download_done
;
441 pid_t fw_download_process_pid
;
442 PSTARGETPARAMS pstargetparams
;
443 BOOLEAN device_removed
;
444 BOOLEAN DeviceAccess
;
445 BOOLEAN bIsAutoCorrectEnabled
;
446 BOOLEAN bDDRInitDone
;
448 ULONG ulPowerSaveMode
;
449 spinlock_t txtransmitlock
;
450 B_UINT8 txtransmit_running
;
451 /* Thread for control packet handling */
452 struct task_struct
*control_packet_handler
;
453 /* thread for transmitting packets. */
454 struct task_struct
*transmit_packet_thread
;
456 /* LED Related Structures */
457 LED_INFO_STRUCT LEDInfo
;
459 /* Driver State for LED Blinking */
460 LedEventInfo_t DriverState
;
461 /* Interface Specific */
462 PVOID pvInterfaceAdapter
;
463 int (*bcm_file_download
)( PVOID
,
466 int (*bcm_file_readback_from_chip
)( PVOID
,
469 INT (*interface_rdm
)(PVOID
,
473 INT (*interface_wrm
)(PVOID
,
477 int (*interface_transmit
)(PVOID
, PVOID
, UINT
);
479 BOOLEAN bDregRequestSentInIdleMode
;
480 BOOLEAN bTriedToWakeUpFromlowPowerMode
;
482 BOOLEAN bWakeUpDevice
;
483 unsigned int usIdleModePattern
;
484 //BOOLEAN bTriedToWakeUpFromShutdown;
485 BOOLEAN bLinkDownRequested
;
488 PHS_DEVICE_EXTENSION stBCMPhsContext
;
489 S_HDR_SUPRESSION_CONTEXTINFO stPhsTxContextInfo
;
490 uint8_t ucaPHSPktRestoreBuf
[2048];
495 UINT32 aTxPktSizeHist
[MIBS_MAX_HIST_ENTRIES
];
496 UINT32 aRxPktSizeHist
[MIBS_MAX_HIST_ENTRIES
];
497 S_FRAGMENTED_PACKET_INFO astFragmentedPktClassifierTable
[MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES
];
502 UINT uiSectorSizeInCFG
;
503 BOOLEAN bSectorSizeOverride
;
504 BOOLEAN bStatusWrite
;
506 UINT uiVendorExtnFlag
;
507 //it will always represent chosen DSD at any point of time.
508 // Generally it is Active DSD but in case of NVM RD/WR it might be different.
509 UINT ulFlashCalStart
;
510 ULONG ulFlashControlSectionStart
;
511 ULONG ulFlashWriteSize
;
513 FP_FLASH_WRITE fpFlashWrite
;
514 FP_FLASH_WRITE_STATUS fpFlashWriteWithStatusCheck
;
517 struct semaphore NVMRdmWrmLock
;
519 struct device
*pstCreatedClassDevice
;
521 // BOOLEAN InterfaceUpStatus;
522 PFLASH2X_CS_INFO psFlash2xCSInfo
;
523 PFLASH_CS_INFO psFlashCSInfo
;
524 PFLASH2X_VENDORSPECIFIC_INFO psFlash2xVendorInfo
;
525 UINT uiFlashBaseAdd
; //Flash start address
526 UINT uiActiveISOOffset
; //Active ISO offset chosen before f/w download
527 FLASH2X_SECTION_VAL eActiveISO
; //Active ISO section val
528 FLASH2X_SECTION_VAL eActiveDSD
; //Active DSD val chosen before f/w download
529 UINT uiActiveDSDOffsetAtFwDld
; //For accessing Active DSD chosen before f/w download
530 UINT uiFlashLayoutMajorVersion
;
531 UINT uiFlashLayoutMinorVersion
;
532 BOOLEAN bAllDSDWriteAllow
;
533 BOOLEAN bSigCorrupted
;
534 //this should be set who so ever want to change the Headers. after Wrtie it should be reset immediately.
535 BOOLEAN bHeaderChangeAllowed
;
537 BOOLEAN bEndPointHalted
;
538 //while bFlashRawRead will be true, Driver ignore map lay out and consider flash as of without any map.
539 BOOLEAN bFlashRawRead
;
540 BOOLEAN bPreparingForLowPowerMode
;
542 UINT syscfgBefFwDld
;
543 BOOLEAN StopAllXaction
;
544 UINT32 liTimeSinceLastNetEntry
; //Used to Support extended CAPI requirements from
545 struct semaphore LowPowerModeSync
;
546 ULONG liDrainCalculated
;
549 S_BCM_DEBUG_STATE stDebugState
;
552 typedef struct _MINI_ADAPTER MINI_ADAPTER
, *PMINI_ADAPTER
;
554 #define GET_BCM_ADAPTER(net_dev) netdev_priv(net_dev)
556 struct _ETH_HEADER_STRUC
{
557 UCHAR au8DestinationAddress
[6];
558 UCHAR au8SourceAddress
[6];
560 }__attribute__((packed
));
561 typedef struct _ETH_HEADER_STRUC ETH_HEADER_STRUC
, *PETH_HEADER_STRUC
;
564 typedef struct FirmwareInfo
{
565 void __user
* pvMappedFirmwareAddress
;
566 ULONG u32FirmwareLength
;
567 ULONG u32StartingAddress
;
568 }__attribute__((packed
)) FIRMWARE_INFO
, *PFIRMWARE_INFO
;
570 // holds the value of net_device structure..
571 extern struct net_device
*gblpnetdev
;
572 typedef struct _cntl_pkt
{
573 PMINI_ADAPTER Adapter
;
576 typedef LINK_REQUEST CONTROL_MESSAGE
;
578 typedef struct _DDR_SETTING
{
581 }DDR_SETTING
, *PDDR_SETTING
;
582 typedef DDR_SETTING DDR_SET_NODE
, *PDDR_SET_NODE
;
584 InitAdapter(PMINI_ADAPTER psAdapter
);
586 // =====================================================================
587 // Beceem vendor request codes for EP0
588 // =====================================================================
590 #define BCM_REQUEST_READ 0x2
591 #define BCM_REQUEST_WRITE 0x1
592 #define EP2_MPS_REG 0x0F0110A0
595 #define EP2_CFG_REG 0x0F0110A8
596 #define EP2_CFG_INT 0x27
597 #define EP2_CFG_BULK 0x25
599 #define EP4_MPS_REG 0x0F0110F0
602 #define EP4_CFG_REG 0x0F0110F8
604 #define ISO_MPS_REG 0x0F0110C8
605 #define ISO_MPS 0x00000000
616 typedef enum eInterface_setting
{
617 DEFAULT_SETTING_0
= 0,
618 ALTERNATE_SETTING_1
= 1,
621 #endif //__ADAPTER_H__