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qeth: synchronize configuration interface
[linux-2.6/libata-dev.git] / drivers / s390 / net / qeth_core_main.c
blobfd1f48c771fce241705aa0fcbaacdaa62405ddc6
1 /*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007, 2009
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
11 #define KMSG_COMPONENT "qeth"
12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/string.h>
17 #include <linux/errno.h>
18 #include <linux/kernel.h>
19 #include <linux/ip.h>
20 #include <linux/tcp.h>
21 #include <linux/mii.h>
22 #include <linux/kthread.h>
23 #include <linux/slab.h>
24
25 #include <asm/ebcdic.h>
26 #include <asm/io.h>
27
28 #include "qeth_core.h"
29
30 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
31 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
32 /* N P A M L V H */
33 [QETH_DBF_SETUP] = {"qeth_setup",
34 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
35 [QETH_DBF_QERR] = {"qeth_qerr",
36 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
37 [QETH_DBF_TRACE] = {"qeth_trace",
38 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
39 [QETH_DBF_MSG] = {"qeth_msg",
40 8, 1, 128, 3, &debug_sprintf_view, NULL},
41 [QETH_DBF_SENSE] = {"qeth_sense",
42 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
43 [QETH_DBF_MISC] = {"qeth_misc",
44 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
45 [QETH_DBF_CTRL] = {"qeth_control",
46 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
47 };
48 EXPORT_SYMBOL_GPL(qeth_dbf);
49
50 struct qeth_card_list_struct qeth_core_card_list;
51 EXPORT_SYMBOL_GPL(qeth_core_card_list);
52 struct kmem_cache *qeth_core_header_cache;
53 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
54
55 static struct device *qeth_core_root_dev;
56 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
57 static struct lock_class_key qdio_out_skb_queue_key;
58
59 static void qeth_send_control_data_cb(struct qeth_channel *,
60 struct qeth_cmd_buffer *);
61 static int qeth_issue_next_read(struct qeth_card *);
62 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
63 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
64 static void qeth_free_buffer_pool(struct qeth_card *);
65 static int qeth_qdio_establish(struct qeth_card *);
66
67
68 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
69 struct qdio_buffer *buffer, int is_tso,
70 int *next_element_to_fill)
71 {
72 struct skb_frag_struct *frag;
73 int fragno;
74 unsigned long addr;
75 int element, cnt, dlen;
76
77 fragno = skb_shinfo(skb)->nr_frags;
78 element = *next_element_to_fill;
79 dlen = 0;
80
81 if (is_tso)
82 buffer->element[element].flags =
83 SBAL_FLAGS_MIDDLE_FRAG;
84 else
85 buffer->element[element].flags =
86 SBAL_FLAGS_FIRST_FRAG;
87 dlen = skb->len - skb->data_len;
88 if (dlen) {
89 buffer->element[element].addr = skb->data;
90 buffer->element[element].length = dlen;
91 element++;
92 }
93 for (cnt = 0; cnt < fragno; cnt++) {
94 frag = &skb_shinfo(skb)->frags[cnt];
95 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
96 frag->page_offset;
97 buffer->element[element].addr = (char *)addr;
98 buffer->element[element].length = frag->size;
99 if (cnt < (fragno - 1))
100 buffer->element[element].flags =
101 SBAL_FLAGS_MIDDLE_FRAG;
102 else
103 buffer->element[element].flags =
104 SBAL_FLAGS_LAST_FRAG;
105 element++;
106 }
107 *next_element_to_fill = element;
108 }
109
110 static inline const char *qeth_get_cardname(struct qeth_card *card)
111 {
112 if (card->info.guestlan) {
113 switch (card->info.type) {
114 case QETH_CARD_TYPE_OSAE:
115 return " Guest LAN QDIO";
116 case QETH_CARD_TYPE_IQD:
117 return " Guest LAN Hiper";
118 default:
119 return " unknown";
120 }
121 } else {
122 switch (card->info.type) {
123 case QETH_CARD_TYPE_OSAE:
124 return " OSD Express";
125 case QETH_CARD_TYPE_IQD:
126 return " HiperSockets";
127 case QETH_CARD_TYPE_OSN:
128 return " OSN QDIO";
129 default:
130 return " unknown";
131 }
132 }
133 return " n/a";
134 }
135
136 /* max length to be returned: 14 */
137 const char *qeth_get_cardname_short(struct qeth_card *card)
138 {
139 if (card->info.guestlan) {
140 switch (card->info.type) {
141 case QETH_CARD_TYPE_OSAE:
142 return "GuestLAN QDIO";
143 case QETH_CARD_TYPE_IQD:
144 return "GuestLAN Hiper";
145 default:
146 return "unknown";
147 }
148 } else {
149 switch (card->info.type) {
150 case QETH_CARD_TYPE_OSAE:
151 switch (card->info.link_type) {
152 case QETH_LINK_TYPE_FAST_ETH:
153 return "OSD_100";
154 case QETH_LINK_TYPE_HSTR:
155 return "HSTR";
156 case QETH_LINK_TYPE_GBIT_ETH:
157 return "OSD_1000";
158 case QETH_LINK_TYPE_10GBIT_ETH:
159 return "OSD_10GIG";
160 case QETH_LINK_TYPE_LANE_ETH100:
161 return "OSD_FE_LANE";
162 case QETH_LINK_TYPE_LANE_TR:
163 return "OSD_TR_LANE";
164 case QETH_LINK_TYPE_LANE_ETH1000:
165 return "OSD_GbE_LANE";
166 case QETH_LINK_TYPE_LANE:
167 return "OSD_ATM_LANE";
168 default:
169 return "OSD_Express";
170 }
171 case QETH_CARD_TYPE_IQD:
172 return "HiperSockets";
173 case QETH_CARD_TYPE_OSN:
174 return "OSN";
175 default:
176 return "unknown";
177 }
178 }
179 return "n/a";
180 }
181
182 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
183 int clear_start_mask)
184 {
185 unsigned long flags;
186
187 spin_lock_irqsave(&card->thread_mask_lock, flags);
188 card->thread_allowed_mask = threads;
189 if (clear_start_mask)
190 card->thread_start_mask &= threads;
191 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
192 wake_up(&card->wait_q);
193 }
194 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
195
196 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
197 {
198 unsigned long flags;
199 int rc = 0;
200
201 spin_lock_irqsave(&card->thread_mask_lock, flags);
202 rc = (card->thread_running_mask & threads);
203 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
204 return rc;
205 }
206 EXPORT_SYMBOL_GPL(qeth_threads_running);
207
208 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
209 {
210 return wait_event_interruptible(card->wait_q,
211 qeth_threads_running(card, threads) == 0);
212 }
213 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
214
215 void qeth_clear_working_pool_list(struct qeth_card *card)
216 {
217 struct qeth_buffer_pool_entry *pool_entry, *tmp;
218
219 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
220 list_for_each_entry_safe(pool_entry, tmp,
221 &card->qdio.in_buf_pool.entry_list, list){
222 list_del(&pool_entry->list);
223 }
224 }
225 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
226
227 static int qeth_alloc_buffer_pool(struct qeth_card *card)
228 {
229 struct qeth_buffer_pool_entry *pool_entry;
230 void *ptr;
231 int i, j;
232
233 QETH_DBF_TEXT(TRACE, 5, "alocpool");
234 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
235 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
236 if (!pool_entry) {
237 qeth_free_buffer_pool(card);
238 return -ENOMEM;
239 }
240 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
241 ptr = (void *) __get_free_page(GFP_KERNEL);
242 if (!ptr) {
243 while (j > 0)
244 free_page((unsigned long)
245 pool_entry->elements[--j]);
246 kfree(pool_entry);
247 qeth_free_buffer_pool(card);
248 return -ENOMEM;
249 }
250 pool_entry->elements[j] = ptr;
251 }
252 list_add(&pool_entry->init_list,
253 &card->qdio.init_pool.entry_list);
254 }
255 return 0;
256 }
257
258 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
259 {
260 QETH_DBF_TEXT(TRACE, 2, "realcbp");
261
262 if ((card->state != CARD_STATE_DOWN) &&
263 (card->state != CARD_STATE_RECOVER))
264 return -EPERM;
265
266 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
267 qeth_clear_working_pool_list(card);
268 qeth_free_buffer_pool(card);
269 card->qdio.in_buf_pool.buf_count = bufcnt;
270 card->qdio.init_pool.buf_count = bufcnt;
271 return qeth_alloc_buffer_pool(card);
272 }
273 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
274
275 static int qeth_issue_next_read(struct qeth_card *card)
276 {
277 int rc;
278 struct qeth_cmd_buffer *iob;
279
280 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
281 if (card->read.state != CH_STATE_UP)
282 return -EIO;
283 iob = qeth_get_buffer(&card->read);
284 if (!iob) {
285 dev_warn(&card->gdev->dev, "The qeth device driver "
286 "failed to recover an error on the device\n");
287 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
288 "available\n", dev_name(&card->gdev->dev));
289 return -ENOMEM;
290 }
291 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
292 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
293 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
294 (addr_t) iob, 0, 0);
295 if (rc) {
296 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
297 "rc=%i\n", dev_name(&card->gdev->dev), rc);
298 atomic_set(&card->read.irq_pending, 0);
299 qeth_schedule_recovery(card);
300 wake_up(&card->wait_q);
301 }
302 return rc;
303 }
304
305 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
306 {
307 struct qeth_reply *reply;
308
309 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
310 if (reply) {
311 atomic_set(&reply->refcnt, 1);
312 atomic_set(&reply->received, 0);
313 reply->card = card;
314 };
315 return reply;
316 }
317
318 static void qeth_get_reply(struct qeth_reply *reply)
319 {
320 WARN_ON(atomic_read(&reply->refcnt) <= 0);
321 atomic_inc(&reply->refcnt);
322 }
323
324 static void qeth_put_reply(struct qeth_reply *reply)
325 {
326 WARN_ON(atomic_read(&reply->refcnt) <= 0);
327 if (atomic_dec_and_test(&reply->refcnt))
328 kfree(reply);
329 }
330
331 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
332 struct qeth_card *card)
333 {
334 char *ipa_name;
335 int com = cmd->hdr.command;
336 ipa_name = qeth_get_ipa_cmd_name(com);
337 if (rc)
338 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
339 ipa_name, com, QETH_CARD_IFNAME(card),
340 rc, qeth_get_ipa_msg(rc));
341 else
342 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
343 ipa_name, com, QETH_CARD_IFNAME(card));
344 }
345
346 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
347 struct qeth_cmd_buffer *iob)
348 {
349 struct qeth_ipa_cmd *cmd = NULL;
350
351 QETH_DBF_TEXT(TRACE, 5, "chkipad");
352 if (IS_IPA(iob->data)) {
353 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
354 if (IS_IPA_REPLY(cmd)) {
355 if (cmd->hdr.command != IPA_CMD_SETCCID &&
356 cmd->hdr.command != IPA_CMD_DELCCID &&
357 cmd->hdr.command != IPA_CMD_MODCCID &&
358 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
359 qeth_issue_ipa_msg(cmd,
360 cmd->hdr.return_code, card);
361 return cmd;
362 } else {
363 switch (cmd->hdr.command) {
364 case IPA_CMD_STOPLAN:
365 dev_warn(&card->gdev->dev,
366 "The link for interface %s on CHPID"
367 " 0x%X failed\n",
368 QETH_CARD_IFNAME(card),
369 card->info.chpid);
370 card->lan_online = 0;
371 if (card->dev && netif_carrier_ok(card->dev))
372 netif_carrier_off(card->dev);
373 return NULL;
374 case IPA_CMD_STARTLAN:
375 dev_info(&card->gdev->dev,
376 "The link for %s on CHPID 0x%X has"
377 " been restored\n",
378 QETH_CARD_IFNAME(card),
379 card->info.chpid);
380 netif_carrier_on(card->dev);
381 card->lan_online = 1;
382 qeth_schedule_recovery(card);
383 return NULL;
384 case IPA_CMD_MODCCID:
385 return cmd;
386 case IPA_CMD_REGISTER_LOCAL_ADDR:
387 QETH_DBF_TEXT(TRACE, 3, "irla");
388 break;
389 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
390 QETH_DBF_TEXT(TRACE, 3, "urla");
391 break;
392 default:
393 QETH_DBF_MESSAGE(2, "Received data is IPA "
394 "but not a reply!\n");
395 break;
396 }
397 }
398 }
399 return cmd;
400 }
401
402 void qeth_clear_ipacmd_list(struct qeth_card *card)
403 {
404 struct qeth_reply *reply, *r;
405 unsigned long flags;
406
407 QETH_DBF_TEXT(TRACE, 4, "clipalst");
408
409 spin_lock_irqsave(&card->lock, flags);
410 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
411 qeth_get_reply(reply);
412 reply->rc = -EIO;
413 atomic_inc(&reply->received);
414 list_del_init(&reply->list);
415 wake_up(&reply->wait_q);
416 qeth_put_reply(reply);
417 }
418 spin_unlock_irqrestore(&card->lock, flags);
419 }
420 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
421
422 static int qeth_check_idx_response(unsigned char *buffer)
423 {
424 if (!buffer)
425 return 0;
426
427 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
428 if ((buffer[2] & 0xc0) == 0xc0) {
429 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
430 "with cause code 0x%02x%s\n",
431 buffer[4],
432 ((buffer[4] == 0x22) ?
433 " -- try another portname" : ""));
434 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
435 QETH_DBF_TEXT(TRACE, 2, " idxterm");
436 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
437 return -EIO;
438 }
439 return 0;
440 }
441
442 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
443 __u32 len)
444 {
445 struct qeth_card *card;
446
447 QETH_DBF_TEXT(TRACE, 4, "setupccw");
448 card = CARD_FROM_CDEV(channel->ccwdev);
449 if (channel == &card->read)
450 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
451 else
452 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
453 channel->ccw.count = len;
454 channel->ccw.cda = (__u32) __pa(iob);
455 }
456
457 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
458 {
459 __u8 index;
460
461 QETH_DBF_TEXT(TRACE, 6, "getbuff");
462 index = channel->io_buf_no;
463 do {
464 if (channel->iob[index].state == BUF_STATE_FREE) {
465 channel->iob[index].state = BUF_STATE_LOCKED;
466 channel->io_buf_no = (channel->io_buf_no + 1) %
467 QETH_CMD_BUFFER_NO;
468 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
469 return channel->iob + index;
470 }
471 index = (index + 1) % QETH_CMD_BUFFER_NO;
472 } while (index != channel->io_buf_no);
473
474 return NULL;
475 }
476
477 void qeth_release_buffer(struct qeth_channel *channel,
478 struct qeth_cmd_buffer *iob)
479 {
480 unsigned long flags;
481
482 QETH_DBF_TEXT(TRACE, 6, "relbuff");
483 spin_lock_irqsave(&channel->iob_lock, flags);
484 memset(iob->data, 0, QETH_BUFSIZE);
485 iob->state = BUF_STATE_FREE;
486 iob->callback = qeth_send_control_data_cb;
487 iob->rc = 0;
488 spin_unlock_irqrestore(&channel->iob_lock, flags);
489 }
490 EXPORT_SYMBOL_GPL(qeth_release_buffer);
491
492 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
493 {
494 struct qeth_cmd_buffer *buffer = NULL;
495 unsigned long flags;
496
497 spin_lock_irqsave(&channel->iob_lock, flags);
498 buffer = __qeth_get_buffer(channel);
499 spin_unlock_irqrestore(&channel->iob_lock, flags);
500 return buffer;
501 }
502
503 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
504 {
505 struct qeth_cmd_buffer *buffer;
506 wait_event(channel->wait_q,
507 ((buffer = qeth_get_buffer(channel)) != NULL));
508 return buffer;
509 }
510 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
511
512 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
513 {
514 int cnt;
515
516 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
517 qeth_release_buffer(channel, &channel->iob[cnt]);
518 channel->buf_no = 0;
519 channel->io_buf_no = 0;
520 }
521 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
522
523 static void qeth_send_control_data_cb(struct qeth_channel *channel,
524 struct qeth_cmd_buffer *iob)
525 {
526 struct qeth_card *card;
527 struct qeth_reply *reply, *r;
528 struct qeth_ipa_cmd *cmd;
529 unsigned long flags;
530 int keep_reply;
531
532 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
533
534 card = CARD_FROM_CDEV(channel->ccwdev);
535 if (qeth_check_idx_response(iob->data)) {
536 qeth_clear_ipacmd_list(card);
537 if (((iob->data[2] & 0xc0) == 0xc0) && iob->data[4] == 0xf6)
538 dev_err(&card->gdev->dev,
539 "The qeth device is not configured "
540 "for the OSI layer required by z/VM\n");
541 else
542 qeth_schedule_recovery(card);
543 goto out;
544 }
545
546 cmd = qeth_check_ipa_data(card, iob);
547 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
548 goto out;
549 /*in case of OSN : check if cmd is set */
550 if (card->info.type == QETH_CARD_TYPE_OSN &&
551 cmd &&
552 cmd->hdr.command != IPA_CMD_STARTLAN &&
553 card->osn_info.assist_cb != NULL) {
554 card->osn_info.assist_cb(card->dev, cmd);
555 goto out;
556 }
557
558 spin_lock_irqsave(&card->lock, flags);
559 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
560 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
561 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
562 qeth_get_reply(reply);
563 list_del_init(&reply->list);
564 spin_unlock_irqrestore(&card->lock, flags);
565 keep_reply = 0;
566 if (reply->callback != NULL) {
567 if (cmd) {
568 reply->offset = (__u16)((char *)cmd -
569 (char *)iob->data);
570 keep_reply = reply->callback(card,
571 reply,
572 (unsigned long)cmd);
573 } else
574 keep_reply = reply->callback(card,
575 reply,
576 (unsigned long)iob);
577 }
578 if (cmd)
579 reply->rc = (u16) cmd->hdr.return_code;
580 else if (iob->rc)
581 reply->rc = iob->rc;
582 if (keep_reply) {
583 spin_lock_irqsave(&card->lock, flags);
584 list_add_tail(&reply->list,
585 &card->cmd_waiter_list);
586 spin_unlock_irqrestore(&card->lock, flags);
587 } else {
588 atomic_inc(&reply->received);
589 wake_up(&reply->wait_q);
590 }
591 qeth_put_reply(reply);
592 goto out;
593 }
594 }
595 spin_unlock_irqrestore(&card->lock, flags);
596 out:
597 memcpy(&card->seqno.pdu_hdr_ack,
598 QETH_PDU_HEADER_SEQ_NO(iob->data),
599 QETH_SEQ_NO_LENGTH);
600 qeth_release_buffer(channel, iob);
601 }
602
603 static int qeth_setup_channel(struct qeth_channel *channel)
604 {
605 int cnt;
606
607 QETH_DBF_TEXT(SETUP, 2, "setupch");
608 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
609 channel->iob[cnt].data = (char *)
610 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
611 if (channel->iob[cnt].data == NULL)
612 break;
613 channel->iob[cnt].state = BUF_STATE_FREE;
614 channel->iob[cnt].channel = channel;
615 channel->iob[cnt].callback = qeth_send_control_data_cb;
616 channel->iob[cnt].rc = 0;
617 }
618 if (cnt < QETH_CMD_BUFFER_NO) {
619 while (cnt-- > 0)
620 kfree(channel->iob[cnt].data);
621 return -ENOMEM;
622 }
623 channel->buf_no = 0;
624 channel->io_buf_no = 0;
625 atomic_set(&channel->irq_pending, 0);
626 spin_lock_init(&channel->iob_lock);
627
628 init_waitqueue_head(&channel->wait_q);
629 return 0;
630 }
631
632 static int qeth_set_thread_start_bit(struct qeth_card *card,
633 unsigned long thread)
634 {
635 unsigned long flags;
636
637 spin_lock_irqsave(&card->thread_mask_lock, flags);
638 if (!(card->thread_allowed_mask & thread) ||
639 (card->thread_start_mask & thread)) {
640 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
641 return -EPERM;
642 }
643 card->thread_start_mask |= thread;
644 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
645 return 0;
646 }
647
648 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
649 {
650 unsigned long flags;
651
652 spin_lock_irqsave(&card->thread_mask_lock, flags);
653 card->thread_start_mask &= ~thread;
654 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
655 wake_up(&card->wait_q);
656 }
657 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
658
659 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
660 {
661 unsigned long flags;
662
663 spin_lock_irqsave(&card->thread_mask_lock, flags);
664 card->thread_running_mask &= ~thread;
665 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
666 wake_up(&card->wait_q);
667 }
668 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
669
670 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
671 {
672 unsigned long flags;
673 int rc = 0;
674
675 spin_lock_irqsave(&card->thread_mask_lock, flags);
676 if (card->thread_start_mask & thread) {
677 if ((card->thread_allowed_mask & thread) &&
678 !(card->thread_running_mask & thread)) {
679 rc = 1;
680 card->thread_start_mask &= ~thread;
681 card->thread_running_mask |= thread;
682 } else
683 rc = -EPERM;
684 }
685 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
686 return rc;
687 }
688
689 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
690 {
691 int rc = 0;
692
693 wait_event(card->wait_q,
694 (rc = __qeth_do_run_thread(card, thread)) >= 0);
695 return rc;
696 }
697 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
698
699 void qeth_schedule_recovery(struct qeth_card *card)
700 {
701 QETH_DBF_TEXT(TRACE, 2, "startrec");
702 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
703 schedule_work(&card->kernel_thread_starter);
704 }
705 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
706
707 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
708 {
709 int dstat, cstat;
710 char *sense;
711
712 sense = (char *) irb->ecw;
713 cstat = irb->scsw.cmd.cstat;
714 dstat = irb->scsw.cmd.dstat;
715
716 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
717 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
718 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
719 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
720 dev_warn(&cdev->dev, "The qeth device driver "
721 "failed to recover an error on the device\n");
722 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x ",
723 dev_name(&cdev->dev), dstat, cstat);
724 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
725 16, 1, irb, 64, 1);
726 return 1;
727 }
728
729 if (dstat & DEV_STAT_UNIT_CHECK) {
730 if (sense[SENSE_RESETTING_EVENT_BYTE] &
731 SENSE_RESETTING_EVENT_FLAG) {
732 QETH_DBF_TEXT(TRACE, 2, "REVIND");
733 return 1;
734 }
735 if (sense[SENSE_COMMAND_REJECT_BYTE] &
736 SENSE_COMMAND_REJECT_FLAG) {
737 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
738 return 1;
739 }
740 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
741 QETH_DBF_TEXT(TRACE, 2, "AFFE");
742 return 1;
743 }
744 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
745 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
746 return 0;
747 }
748 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
749 return 1;
750 }
751 return 0;
752 }
753
754 static long __qeth_check_irb_error(struct ccw_device *cdev,
755 unsigned long intparm, struct irb *irb)
756 {
757 if (!IS_ERR(irb))
758 return 0;
759
760 switch (PTR_ERR(irb)) {
761 case -EIO:
762 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
763 dev_name(&cdev->dev));
764 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
765 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
766 break;
767 case -ETIMEDOUT:
768 dev_warn(&cdev->dev, "A hardware operation timed out"
769 " on the device\n");
770 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
771 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
772 if (intparm == QETH_RCD_PARM) {
773 struct qeth_card *card = CARD_FROM_CDEV(cdev);
774
775 if (card && (card->data.ccwdev == cdev)) {
776 card->data.state = CH_STATE_DOWN;
777 wake_up(&card->wait_q);
778 }
779 }
780 break;
781 default:
782 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
783 dev_name(&cdev->dev), PTR_ERR(irb));
784 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
785 QETH_DBF_TEXT(TRACE, 2, " rc???");
786 }
787 return PTR_ERR(irb);
788 }
789
790 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
791 struct irb *irb)
792 {
793 int rc;
794 int cstat, dstat;
795 struct qeth_cmd_buffer *buffer;
796 struct qeth_channel *channel;
797 struct qeth_card *card;
798 struct qeth_cmd_buffer *iob;
799 __u8 index;
800
801 QETH_DBF_TEXT(TRACE, 5, "irq");
802
803 if (__qeth_check_irb_error(cdev, intparm, irb))
804 return;
805 cstat = irb->scsw.cmd.cstat;
806 dstat = irb->scsw.cmd.dstat;
807
808 card = CARD_FROM_CDEV(cdev);
809 if (!card)
810 return;
811
812 if (card->read.ccwdev == cdev) {
813 channel = &card->read;
814 QETH_DBF_TEXT(TRACE, 5, "read");
815 } else if (card->write.ccwdev == cdev) {
816 channel = &card->write;
817 QETH_DBF_TEXT(TRACE, 5, "write");
818 } else {
819 channel = &card->data;
820 QETH_DBF_TEXT(TRACE, 5, "data");
821 }
822 atomic_set(&channel->irq_pending, 0);
823
824 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
825 channel->state = CH_STATE_STOPPED;
826
827 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
828 channel->state = CH_STATE_HALTED;
829
830 /*let's wake up immediately on data channel*/
831 if ((channel == &card->data) && (intparm != 0) &&
832 (intparm != QETH_RCD_PARM))
833 goto out;
834
835 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
836 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
837 /* we don't have to handle this further */
838 intparm = 0;
839 }
840 if (intparm == QETH_HALT_CHANNEL_PARM) {
841 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
842 /* we don't have to handle this further */
843 intparm = 0;
844 }
845 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
846 (dstat & DEV_STAT_UNIT_CHECK) ||
847 (cstat)) {
848 if (irb->esw.esw0.erw.cons) {
849 dev_warn(&channel->ccwdev->dev,
850 "The qeth device driver failed to recover "
851 "an error on the device\n");
852 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
853 "0x%X dstat 0x%X\n",
854 dev_name(&channel->ccwdev->dev), cstat, dstat);
855 print_hex_dump(KERN_WARNING, "qeth: irb ",
856 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
857 print_hex_dump(KERN_WARNING, "qeth: sense data ",
858 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
859 }
860 if (intparm == QETH_RCD_PARM) {
861 channel->state = CH_STATE_DOWN;
862 goto out;
863 }
864 rc = qeth_get_problem(cdev, irb);
865 if (rc) {
866 qeth_clear_ipacmd_list(card);
867 qeth_schedule_recovery(card);
868 goto out;
869 }
870 }
871
872 if (intparm == QETH_RCD_PARM) {
873 channel->state = CH_STATE_RCD_DONE;
874 goto out;
875 }
876 if (intparm) {
877 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
878 buffer->state = BUF_STATE_PROCESSED;
879 }
880 if (channel == &card->data)
881 return;
882 if (channel == &card->read &&
883 channel->state == CH_STATE_UP)
884 qeth_issue_next_read(card);
885
886 iob = channel->iob;
887 index = channel->buf_no;
888 while (iob[index].state == BUF_STATE_PROCESSED) {
889 if (iob[index].callback != NULL)
890 iob[index].callback(channel, iob + index);
891
892 index = (index + 1) % QETH_CMD_BUFFER_NO;
893 }
894 channel->buf_no = index;
895 out:
896 wake_up(&card->wait_q);
897 return;
898 }
899
900 static void __qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
901 struct qeth_qdio_out_buffer *buf, unsigned int qeth_skip_skb)
902 {
903 int i;
904 struct sk_buff *skb;
905
906 /* is PCI flag set on buffer? */
907 if (buf->buffer->element[0].flags & 0x40)
908 atomic_dec(&queue->set_pci_flags_count);
909
910 if (!qeth_skip_skb) {
911 skb = skb_dequeue(&buf->skb_list);
912 while (skb) {
913 atomic_dec(&skb->users);
914 dev_kfree_skb_any(skb);
915 skb = skb_dequeue(&buf->skb_list);
916 }
917 }
918 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
919 if (buf->buffer->element[i].addr && buf->is_header[i])
920 kmem_cache_free(qeth_core_header_cache,
921 buf->buffer->element[i].addr);
922 buf->is_header[i] = 0;
923 buf->buffer->element[i].length = 0;
924 buf->buffer->element[i].addr = NULL;
925 buf->buffer->element[i].flags = 0;
926 }
927 buf->buffer->element[15].flags = 0;
928 buf->next_element_to_fill = 0;
929 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
930 }
931
932 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
933 struct qeth_qdio_out_buffer *buf)
934 {
935 __qeth_clear_output_buffer(queue, buf, 0);
936 }
937
938 void qeth_clear_qdio_buffers(struct qeth_card *card)
939 {
940 int i, j;
941
942 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
943 /* clear outbound buffers to free skbs */
944 for (i = 0; i < card->qdio.no_out_queues; ++i)
945 if (card->qdio.out_qs[i]) {
946 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
947 qeth_clear_output_buffer(card->qdio.out_qs[i],
948 &card->qdio.out_qs[i]->bufs[j]);
949 }
950 }
951 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
952
953 static void qeth_free_buffer_pool(struct qeth_card *card)
954 {
955 struct qeth_buffer_pool_entry *pool_entry, *tmp;
956 int i = 0;
957 QETH_DBF_TEXT(TRACE, 5, "freepool");
958 list_for_each_entry_safe(pool_entry, tmp,
959 &card->qdio.init_pool.entry_list, init_list){
960 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
961 free_page((unsigned long)pool_entry->elements[i]);
962 list_del(&pool_entry->init_list);
963 kfree(pool_entry);
964 }
965 }
966
967 static void qeth_free_qdio_buffers(struct qeth_card *card)
968 {
969 int i, j;
970
971 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
972 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
973 QETH_QDIO_UNINITIALIZED)
974 return;
975 kfree(card->qdio.in_q);
976 card->qdio.in_q = NULL;
977 /* inbound buffer pool */
978 qeth_free_buffer_pool(card);
979 /* free outbound qdio_qs */
980 if (card->qdio.out_qs) {
981 for (i = 0; i < card->qdio.no_out_queues; ++i) {
982 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
983 qeth_clear_output_buffer(card->qdio.out_qs[i],
984 &card->qdio.out_qs[i]->bufs[j]);
985 kfree(card->qdio.out_qs[i]);
986 }
987 kfree(card->qdio.out_qs);
988 card->qdio.out_qs = NULL;
989 }
990 }
991
992 static void qeth_clean_channel(struct qeth_channel *channel)
993 {
994 int cnt;
995
996 QETH_DBF_TEXT(SETUP, 2, "freech");
997 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
998 kfree(channel->iob[cnt].data);
999 }
1000
1001 static int qeth_is_1920_device(struct qeth_card *card)
1002 {
1003 int single_queue = 0;
1004 struct ccw_device *ccwdev;
1005 struct channelPath_dsc {
1006 u8 flags;
1007 u8 lsn;
1008 u8 desc;
1009 u8 chpid;
1010 u8 swla;
1011 u8 zeroes;
1012 u8 chla;
1013 u8 chpp;
1014 } *chp_dsc;
1015
1016 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
1017
1018 ccwdev = card->data.ccwdev;
1019 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1020 if (chp_dsc != NULL) {
1021 /* CHPP field bit 6 == 1 -> single queue */
1022 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1023 kfree(chp_dsc);
1024 }
1025 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
1026 return single_queue;
1027 }
1028
1029 static void qeth_init_qdio_info(struct qeth_card *card)
1030 {
1031 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1032 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1033 /* inbound */
1034 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1035 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1036 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1037 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1038 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1039 }
1040
1041 static void qeth_set_intial_options(struct qeth_card *card)
1042 {
1043 card->options.route4.type = NO_ROUTER;
1044 card->options.route6.type = NO_ROUTER;
1045 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1046 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1047 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1048 card->options.fake_broadcast = 0;
1049 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1050 card->options.performance_stats = 0;
1051 card->options.rx_sg_cb = QETH_RX_SG_CB;
1052 card->options.isolation = ISOLATION_MODE_NONE;
1053 }
1054
1055 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1056 {
1057 unsigned long flags;
1058 int rc = 0;
1059
1060 spin_lock_irqsave(&card->thread_mask_lock, flags);
1061 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
1062 (u8) card->thread_start_mask,
1063 (u8) card->thread_allowed_mask,
1064 (u8) card->thread_running_mask);
1065 rc = (card->thread_start_mask & thread);
1066 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1067 return rc;
1068 }
1069
1070 static void qeth_start_kernel_thread(struct work_struct *work)
1071 {
1072 struct qeth_card *card = container_of(work, struct qeth_card,
1073 kernel_thread_starter);
1074 QETH_DBF_TEXT(TRACE , 2, "strthrd");
1075
1076 if (card->read.state != CH_STATE_UP &&
1077 card->write.state != CH_STATE_UP)
1078 return;
1079 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1080 kthread_run(card->discipline.recover, (void *) card,
1081 "qeth_recover");
1082 }
1083
1084 static int qeth_setup_card(struct qeth_card *card)
1085 {
1086
1087 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1088 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1089
1090 card->read.state = CH_STATE_DOWN;
1091 card->write.state = CH_STATE_DOWN;
1092 card->data.state = CH_STATE_DOWN;
1093 card->state = CARD_STATE_DOWN;
1094 card->lan_online = 0;
1095 card->use_hard_stop = 0;
1096 card->dev = NULL;
1097 spin_lock_init(&card->vlanlock);
1098 spin_lock_init(&card->mclock);
1099 card->vlangrp = NULL;
1100 spin_lock_init(&card->lock);
1101 spin_lock_init(&card->ip_lock);
1102 spin_lock_init(&card->thread_mask_lock);
1103 mutex_init(&card->conf_mutex);
1104 card->thread_start_mask = 0;
1105 card->thread_allowed_mask = 0;
1106 card->thread_running_mask = 0;
1107 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1108 INIT_LIST_HEAD(&card->ip_list);
1109 INIT_LIST_HEAD(card->ip_tbd_list);
1110 INIT_LIST_HEAD(&card->cmd_waiter_list);
1111 init_waitqueue_head(&card->wait_q);
1112 /* intial options */
1113 qeth_set_intial_options(card);
1114 /* IP address takeover */
1115 INIT_LIST_HEAD(&card->ipato.entries);
1116 card->ipato.enabled = 0;
1117 card->ipato.invert4 = 0;
1118 card->ipato.invert6 = 0;
1119 /* init QDIO stuff */
1120 qeth_init_qdio_info(card);
1121 return 0;
1122 }
1123
1124 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1125 {
1126 struct qeth_card *card = container_of(slr, struct qeth_card,
1127 qeth_service_level);
1128 if (card->info.mcl_level[0])
1129 seq_printf(m, "qeth: %s firmware level %s\n",
1130 CARD_BUS_ID(card), card->info.mcl_level);
1131 }
1132
1133 static struct qeth_card *qeth_alloc_card(void)
1134 {
1135 struct qeth_card *card;
1136
1137 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1138 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1139 if (!card)
1140 goto out;
1141 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1142 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1143 if (!card->ip_tbd_list) {
1144 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1145 goto out_card;
1146 }
1147 if (qeth_setup_channel(&card->read))
1148 goto out_ip;
1149 if (qeth_setup_channel(&card->write))
1150 goto out_channel;
1151 card->options.layer2 = -1;
1152 card->qeth_service_level.seq_print = qeth_core_sl_print;
1153 register_service_level(&card->qeth_service_level);
1154 return card;
1155
1156 out_channel:
1157 qeth_clean_channel(&card->read);
1158 out_ip:
1159 kfree(card->ip_tbd_list);
1160 out_card:
1161 kfree(card);
1162 out:
1163 return NULL;
1164 }
1165
1166 static int qeth_determine_card_type(struct qeth_card *card)
1167 {
1168 int i = 0;
1169
1170 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1171
1172 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1173 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1174 while (known_devices[i][4]) {
1175 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1176 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1177 card->info.type = known_devices[i][4];
1178 card->qdio.no_out_queues = known_devices[i][8];
1179 card->info.is_multicast_different = known_devices[i][9];
1180 if (qeth_is_1920_device(card)) {
1181 dev_info(&card->gdev->dev,
1182 "Priority Queueing not supported\n");
1183 card->qdio.no_out_queues = 1;
1184 card->qdio.default_out_queue = 0;
1185 }
1186 return 0;
1187 }
1188 i++;
1189 }
1190 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1191 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1192 "unknown type\n");
1193 return -ENOENT;
1194 }
1195
1196 static int qeth_clear_channel(struct qeth_channel *channel)
1197 {
1198 unsigned long flags;
1199 struct qeth_card *card;
1200 int rc;
1201
1202 QETH_DBF_TEXT(TRACE, 3, "clearch");
1203 card = CARD_FROM_CDEV(channel->ccwdev);
1204 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1205 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1206 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1207
1208 if (rc)
1209 return rc;
1210 rc = wait_event_interruptible_timeout(card->wait_q,
1211 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1212 if (rc == -ERESTARTSYS)
1213 return rc;
1214 if (channel->state != CH_STATE_STOPPED)
1215 return -ETIME;
1216 channel->state = CH_STATE_DOWN;
1217 return 0;
1218 }
1219
1220 static int qeth_halt_channel(struct qeth_channel *channel)
1221 {
1222 unsigned long flags;
1223 struct qeth_card *card;
1224 int rc;
1225
1226 QETH_DBF_TEXT(TRACE, 3, "haltch");
1227 card = CARD_FROM_CDEV(channel->ccwdev);
1228 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1229 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1230 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1231
1232 if (rc)
1233 return rc;
1234 rc = wait_event_interruptible_timeout(card->wait_q,
1235 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1236 if (rc == -ERESTARTSYS)
1237 return rc;
1238 if (channel->state != CH_STATE_HALTED)
1239 return -ETIME;
1240 return 0;
1241 }
1242
1243 static int qeth_halt_channels(struct qeth_card *card)
1244 {
1245 int rc1 = 0, rc2 = 0, rc3 = 0;
1246
1247 QETH_DBF_TEXT(TRACE, 3, "haltchs");
1248 rc1 = qeth_halt_channel(&card->read);
1249 rc2 = qeth_halt_channel(&card->write);
1250 rc3 = qeth_halt_channel(&card->data);
1251 if (rc1)
1252 return rc1;
1253 if (rc2)
1254 return rc2;
1255 return rc3;
1256 }
1257
1258 static int qeth_clear_channels(struct qeth_card *card)
1259 {
1260 int rc1 = 0, rc2 = 0, rc3 = 0;
1261
1262 QETH_DBF_TEXT(TRACE, 3, "clearchs");
1263 rc1 = qeth_clear_channel(&card->read);
1264 rc2 = qeth_clear_channel(&card->write);
1265 rc3 = qeth_clear_channel(&card->data);
1266 if (rc1)
1267 return rc1;
1268 if (rc2)
1269 return rc2;
1270 return rc3;
1271 }
1272
1273 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1274 {
1275 int rc = 0;
1276
1277 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1278 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
1279
1280 if (halt)
1281 rc = qeth_halt_channels(card);
1282 if (rc)
1283 return rc;
1284 return qeth_clear_channels(card);
1285 }
1286
1287 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1288 {
1289 int rc = 0;
1290
1291 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
1292 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1293 QETH_QDIO_CLEANING)) {
1294 case QETH_QDIO_ESTABLISHED:
1295 if (card->info.type == QETH_CARD_TYPE_IQD)
1296 rc = qdio_cleanup(CARD_DDEV(card),
1297 QDIO_FLAG_CLEANUP_USING_HALT);
1298 else
1299 rc = qdio_cleanup(CARD_DDEV(card),
1300 QDIO_FLAG_CLEANUP_USING_CLEAR);
1301 if (rc)
1302 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
1303 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1304 break;
1305 case QETH_QDIO_CLEANING:
1306 return rc;
1307 default:
1308 break;
1309 }
1310 rc = qeth_clear_halt_card(card, use_halt);
1311 if (rc)
1312 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
1313 card->state = CARD_STATE_DOWN;
1314 return rc;
1315 }
1316 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1317
1318 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1319 int *length)
1320 {
1321 struct ciw *ciw;
1322 char *rcd_buf;
1323 int ret;
1324 struct qeth_channel *channel = &card->data;
1325 unsigned long flags;
1326
1327 /*
1328 * scan for RCD command in extended SenseID data
1329 */
1330 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1331 if (!ciw || ciw->cmd == 0)
1332 return -EOPNOTSUPP;
1333 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1334 if (!rcd_buf)
1335 return -ENOMEM;
1336
1337 channel->ccw.cmd_code = ciw->cmd;
1338 channel->ccw.cda = (__u32) __pa(rcd_buf);
1339 channel->ccw.count = ciw->count;
1340 channel->ccw.flags = CCW_FLAG_SLI;
1341 channel->state = CH_STATE_RCD;
1342 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1343 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1344 QETH_RCD_PARM, LPM_ANYPATH, 0,
1345 QETH_RCD_TIMEOUT);
1346 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1347 if (!ret)
1348 wait_event(card->wait_q,
1349 (channel->state == CH_STATE_RCD_DONE ||
1350 channel->state == CH_STATE_DOWN));
1351 if (channel->state == CH_STATE_DOWN)
1352 ret = -EIO;
1353 else
1354 channel->state = CH_STATE_DOWN;
1355 if (ret) {
1356 kfree(rcd_buf);
1357 *buffer = NULL;
1358 *length = 0;
1359 } else {
1360 *length = ciw->count;
1361 *buffer = rcd_buf;
1362 }
1363 return ret;
1364 }
1365
1366 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1367 {
1368 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1369 card->info.chpid = prcd[30];
1370 card->info.unit_addr2 = prcd[31];
1371 card->info.cula = prcd[63];
1372 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1373 (prcd[0x11] == _ascebc['M']));
1374 }
1375
1376 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1377 {
1378 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1379
1380 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1381 card->info.blkt.time_total = 250;
1382 card->info.blkt.inter_packet = 5;
1383 card->info.blkt.inter_packet_jumbo = 15;
1384 } else {
1385 card->info.blkt.time_total = 0;
1386 card->info.blkt.inter_packet = 0;
1387 card->info.blkt.inter_packet_jumbo = 0;
1388 }
1389 }
1390
1391 static void qeth_init_tokens(struct qeth_card *card)
1392 {
1393 card->token.issuer_rm_w = 0x00010103UL;
1394 card->token.cm_filter_w = 0x00010108UL;
1395 card->token.cm_connection_w = 0x0001010aUL;
1396 card->token.ulp_filter_w = 0x0001010bUL;
1397 card->token.ulp_connection_w = 0x0001010dUL;
1398 }
1399
1400 static void qeth_init_func_level(struct qeth_card *card)
1401 {
1402 if (card->ipato.enabled) {
1403 if (card->info.type == QETH_CARD_TYPE_IQD)
1404 card->info.func_level =
1405 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1406 else
1407 card->info.func_level =
1408 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1409 } else {
1410 if (card->info.type == QETH_CARD_TYPE_IQD)
1411 /*FIXME:why do we have same values for dis and ena for
1412 osae??? */
1413 card->info.func_level =
1414 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1415 else
1416 card->info.func_level =
1417 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1418 }
1419 }
1420
1421 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1422 void (*idx_reply_cb)(struct qeth_channel *,
1423 struct qeth_cmd_buffer *))
1424 {
1425 struct qeth_cmd_buffer *iob;
1426 unsigned long flags;
1427 int rc;
1428 struct qeth_card *card;
1429
1430 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1431 card = CARD_FROM_CDEV(channel->ccwdev);
1432 iob = qeth_get_buffer(channel);
1433 iob->callback = idx_reply_cb;
1434 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1435 channel->ccw.count = QETH_BUFSIZE;
1436 channel->ccw.cda = (__u32) __pa(iob->data);
1437
1438 wait_event(card->wait_q,
1439 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1440 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1441 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1442 rc = ccw_device_start(channel->ccwdev,
1443 &channel->ccw, (addr_t) iob, 0, 0);
1444 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1445
1446 if (rc) {
1447 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1448 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1449 atomic_set(&channel->irq_pending, 0);
1450 wake_up(&card->wait_q);
1451 return rc;
1452 }
1453 rc = wait_event_interruptible_timeout(card->wait_q,
1454 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1455 if (rc == -ERESTARTSYS)
1456 return rc;
1457 if (channel->state != CH_STATE_UP) {
1458 rc = -ETIME;
1459 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1460 qeth_clear_cmd_buffers(channel);
1461 } else
1462 rc = 0;
1463 return rc;
1464 }
1465
1466 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1467 void (*idx_reply_cb)(struct qeth_channel *,
1468 struct qeth_cmd_buffer *))
1469 {
1470 struct qeth_card *card;
1471 struct qeth_cmd_buffer *iob;
1472 unsigned long flags;
1473 __u16 temp;
1474 __u8 tmp;
1475 int rc;
1476 struct ccw_dev_id temp_devid;
1477
1478 card = CARD_FROM_CDEV(channel->ccwdev);
1479
1480 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1481
1482 iob = qeth_get_buffer(channel);
1483 iob->callback = idx_reply_cb;
1484 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1485 channel->ccw.count = IDX_ACTIVATE_SIZE;
1486 channel->ccw.cda = (__u32) __pa(iob->data);
1487 if (channel == &card->write) {
1488 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1489 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1490 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1491 card->seqno.trans_hdr++;
1492 } else {
1493 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1494 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1495 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1496 }
1497 tmp = ((__u8)card->info.portno) | 0x80;
1498 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1499 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1500 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1501 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1502 &card->info.func_level, sizeof(__u16));
1503 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1504 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1505 temp = (card->info.cula << 8) + card->info.unit_addr2;
1506 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1507
1508 wait_event(card->wait_q,
1509 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1510 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1511 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1512 rc = ccw_device_start(channel->ccwdev,
1513 &channel->ccw, (addr_t) iob, 0, 0);
1514 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1515
1516 if (rc) {
1517 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1518 rc);
1519 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1520 atomic_set(&channel->irq_pending, 0);
1521 wake_up(&card->wait_q);
1522 return rc;
1523 }
1524 rc = wait_event_interruptible_timeout(card->wait_q,
1525 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1526 if (rc == -ERESTARTSYS)
1527 return rc;
1528 if (channel->state != CH_STATE_ACTIVATING) {
1529 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1530 " failed to recover an error on the device\n");
1531 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1532 dev_name(&channel->ccwdev->dev));
1533 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1534 qeth_clear_cmd_buffers(channel);
1535 return -ETIME;
1536 }
1537 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1538 }
1539
1540 static int qeth_peer_func_level(int level)
1541 {
1542 if ((level & 0xff) == 8)
1543 return (level & 0xff) + 0x400;
1544 if (((level >> 8) & 3) == 1)
1545 return (level & 0xff) + 0x200;
1546 return level;
1547 }
1548
1549 static void qeth_idx_write_cb(struct qeth_channel *channel,
1550 struct qeth_cmd_buffer *iob)
1551 {
1552 struct qeth_card *card;
1553 __u16 temp;
1554
1555 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1556
1557 if (channel->state == CH_STATE_DOWN) {
1558 channel->state = CH_STATE_ACTIVATING;
1559 goto out;
1560 }
1561 card = CARD_FROM_CDEV(channel->ccwdev);
1562
1563 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1564 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1565 dev_err(&card->write.ccwdev->dev,
1566 "The adapter is used exclusively by another "
1567 "host\n");
1568 else
1569 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1570 " negative reply\n",
1571 dev_name(&card->write.ccwdev->dev));
1572 goto out;
1573 }
1574 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1575 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1576 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1577 "function level mismatch (sent: 0x%x, received: "
1578 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1579 card->info.func_level, temp);
1580 goto out;
1581 }
1582 channel->state = CH_STATE_UP;
1583 out:
1584 qeth_release_buffer(channel, iob);
1585 }
1586
1587 static void qeth_idx_read_cb(struct qeth_channel *channel,
1588 struct qeth_cmd_buffer *iob)
1589 {
1590 struct qeth_card *card;
1591 __u16 temp;
1592
1593 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1594 if (channel->state == CH_STATE_DOWN) {
1595 channel->state = CH_STATE_ACTIVATING;
1596 goto out;
1597 }
1598
1599 card = CARD_FROM_CDEV(channel->ccwdev);
1600 if (qeth_check_idx_response(iob->data))
1601 goto out;
1602
1603 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1604 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1605 dev_err(&card->write.ccwdev->dev,
1606 "The adapter is used exclusively by another "
1607 "host\n");
1608 else
1609 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1610 " negative reply\n",
1611 dev_name(&card->read.ccwdev->dev));
1612 goto out;
1613 }
1614
1615 /**
1616 * temporary fix for microcode bug
1617 * to revert it,replace OR by AND
1618 */
1619 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1620 (card->info.type == QETH_CARD_TYPE_OSAE))
1621 card->info.portname_required = 1;
1622
1623 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1624 if (temp != qeth_peer_func_level(card->info.func_level)) {
1625 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1626 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1627 dev_name(&card->read.ccwdev->dev),
1628 card->info.func_level, temp);
1629 goto out;
1630 }
1631 memcpy(&card->token.issuer_rm_r,
1632 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1633 QETH_MPC_TOKEN_LENGTH);
1634 memcpy(&card->info.mcl_level[0],
1635 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1636 channel->state = CH_STATE_UP;
1637 out:
1638 qeth_release_buffer(channel, iob);
1639 }
1640
1641 void qeth_prepare_control_data(struct qeth_card *card, int len,
1642 struct qeth_cmd_buffer *iob)
1643 {
1644 qeth_setup_ccw(&card->write, iob->data, len);
1645 iob->callback = qeth_release_buffer;
1646
1647 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1648 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1649 card->seqno.trans_hdr++;
1650 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1651 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1652 card->seqno.pdu_hdr++;
1653 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1654 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1655 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1656 }
1657 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1658
1659 int qeth_send_control_data(struct qeth_card *card, int len,
1660 struct qeth_cmd_buffer *iob,
1661 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1662 unsigned long),
1663 void *reply_param)
1664 {
1665 int rc;
1666 unsigned long flags;
1667 struct qeth_reply *reply = NULL;
1668 unsigned long timeout, event_timeout;
1669 struct qeth_ipa_cmd *cmd;
1670
1671 QETH_DBF_TEXT(TRACE, 2, "sendctl");
1672
1673 reply = qeth_alloc_reply(card);
1674 if (!reply) {
1675 return -ENOMEM;
1676 }
1677 reply->callback = reply_cb;
1678 reply->param = reply_param;
1679 if (card->state == CARD_STATE_DOWN)
1680 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1681 else
1682 reply->seqno = card->seqno.ipa++;
1683 init_waitqueue_head(&reply->wait_q);
1684 spin_lock_irqsave(&card->lock, flags);
1685 list_add_tail(&reply->list, &card->cmd_waiter_list);
1686 spin_unlock_irqrestore(&card->lock, flags);
1687 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1688
1689 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1690 qeth_prepare_control_data(card, len, iob);
1691
1692 if (IS_IPA(iob->data))
1693 event_timeout = QETH_IPA_TIMEOUT;
1694 else
1695 event_timeout = QETH_TIMEOUT;
1696 timeout = jiffies + event_timeout;
1697
1698 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
1699 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1700 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1701 (addr_t) iob, 0, 0);
1702 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1703 if (rc) {
1704 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1705 "ccw_device_start rc = %i\n",
1706 dev_name(&card->write.ccwdev->dev), rc);
1707 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
1708 spin_lock_irqsave(&card->lock, flags);
1709 list_del_init(&reply->list);
1710 qeth_put_reply(reply);
1711 spin_unlock_irqrestore(&card->lock, flags);
1712 qeth_release_buffer(iob->channel, iob);
1713 atomic_set(&card->write.irq_pending, 0);
1714 wake_up(&card->wait_q);
1715 return rc;
1716 }
1717
1718 /* we have only one long running ipassist, since we can ensure
1719 process context of this command we can sleep */
1720 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1721 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1722 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1723 if (!wait_event_timeout(reply->wait_q,
1724 atomic_read(&reply->received), event_timeout))
1725 goto time_err;
1726 } else {
1727 while (!atomic_read(&reply->received)) {
1728 if (time_after(jiffies, timeout))
1729 goto time_err;
1730 cpu_relax();
1731 };
1732 }
1733
1734 rc = reply->rc;
1735 qeth_put_reply(reply);
1736 return rc;
1737
1738 time_err:
1739 spin_lock_irqsave(&reply->card->lock, flags);
1740 list_del_init(&reply->list);
1741 spin_unlock_irqrestore(&reply->card->lock, flags);
1742 reply->rc = -ETIME;
1743 atomic_inc(&reply->received);
1744 wake_up(&reply->wait_q);
1745 rc = reply->rc;
1746 qeth_put_reply(reply);
1747 return rc;
1748 }
1749 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1750
1751 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1752 unsigned long data)
1753 {
1754 struct qeth_cmd_buffer *iob;
1755
1756 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1757
1758 iob = (struct qeth_cmd_buffer *) data;
1759 memcpy(&card->token.cm_filter_r,
1760 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1761 QETH_MPC_TOKEN_LENGTH);
1762 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1763 return 0;
1764 }
1765
1766 static int qeth_cm_enable(struct qeth_card *card)
1767 {
1768 int rc;
1769 struct qeth_cmd_buffer *iob;
1770
1771 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1772
1773 iob = qeth_wait_for_buffer(&card->write);
1774 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1775 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1776 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1777 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1778 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1779
1780 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1781 qeth_cm_enable_cb, NULL);
1782 return rc;
1783 }
1784
1785 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1786 unsigned long data)
1787 {
1788
1789 struct qeth_cmd_buffer *iob;
1790
1791 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1792
1793 iob = (struct qeth_cmd_buffer *) data;
1794 memcpy(&card->token.cm_connection_r,
1795 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1796 QETH_MPC_TOKEN_LENGTH);
1797 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1798 return 0;
1799 }
1800
1801 static int qeth_cm_setup(struct qeth_card *card)
1802 {
1803 int rc;
1804 struct qeth_cmd_buffer *iob;
1805
1806 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1807
1808 iob = qeth_wait_for_buffer(&card->write);
1809 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1810 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1811 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1812 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1813 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1814 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1815 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1816 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1817 qeth_cm_setup_cb, NULL);
1818 return rc;
1819
1820 }
1821
1822 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1823 {
1824 switch (card->info.type) {
1825 case QETH_CARD_TYPE_UNKNOWN:
1826 return 1500;
1827 case QETH_CARD_TYPE_IQD:
1828 return card->info.max_mtu;
1829 case QETH_CARD_TYPE_OSAE:
1830 switch (card->info.link_type) {
1831 case QETH_LINK_TYPE_HSTR:
1832 case QETH_LINK_TYPE_LANE_TR:
1833 return 2000;
1834 default:
1835 return 1492;
1836 }
1837 default:
1838 return 1500;
1839 }
1840 }
1841
1842 static inline int qeth_get_max_mtu_for_card(int cardtype)
1843 {
1844 switch (cardtype) {
1845
1846 case QETH_CARD_TYPE_UNKNOWN:
1847 case QETH_CARD_TYPE_OSAE:
1848 case QETH_CARD_TYPE_OSN:
1849 return 61440;
1850 case QETH_CARD_TYPE_IQD:
1851 return 57344;
1852 default:
1853 return 1500;
1854 }
1855 }
1856
1857 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1858 {
1859 switch (cardtype) {
1860 case QETH_CARD_TYPE_IQD:
1861 return 1;
1862 default:
1863 return 0;
1864 }
1865 }
1866
1867 static inline int qeth_get_mtu_outof_framesize(int framesize)
1868 {
1869 switch (framesize) {
1870 case 0x4000:
1871 return 8192;
1872 case 0x6000:
1873 return 16384;
1874 case 0xa000:
1875 return 32768;
1876 case 0xffff:
1877 return 57344;
1878 default:
1879 return 0;
1880 }
1881 }
1882
1883 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1884 {
1885 switch (card->info.type) {
1886 case QETH_CARD_TYPE_OSAE:
1887 return ((mtu >= 576) && (mtu <= 61440));
1888 case QETH_CARD_TYPE_IQD:
1889 return ((mtu >= 576) &&
1890 (mtu <= card->info.max_mtu + 4096 - 32));
1891 case QETH_CARD_TYPE_OSN:
1892 case QETH_CARD_TYPE_UNKNOWN:
1893 default:
1894 return 1;
1895 }
1896 }
1897
1898 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1899 unsigned long data)
1900 {
1901
1902 __u16 mtu, framesize;
1903 __u16 len;
1904 __u8 link_type;
1905 struct qeth_cmd_buffer *iob;
1906
1907 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1908
1909 iob = (struct qeth_cmd_buffer *) data;
1910 memcpy(&card->token.ulp_filter_r,
1911 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1912 QETH_MPC_TOKEN_LENGTH);
1913 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1914 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1915 mtu = qeth_get_mtu_outof_framesize(framesize);
1916 if (!mtu) {
1917 iob->rc = -EINVAL;
1918 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1919 return 0;
1920 }
1921 card->info.max_mtu = mtu;
1922 card->info.initial_mtu = mtu;
1923 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1924 } else {
1925 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1926 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1927 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1928 }
1929
1930 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1931 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1932 memcpy(&link_type,
1933 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1934 card->info.link_type = link_type;
1935 } else
1936 card->info.link_type = 0;
1937 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1938 return 0;
1939 }
1940
1941 static int qeth_ulp_enable(struct qeth_card *card)
1942 {
1943 int rc;
1944 char prot_type;
1945 struct qeth_cmd_buffer *iob;
1946
1947 /*FIXME: trace view callbacks*/
1948 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1949
1950 iob = qeth_wait_for_buffer(&card->write);
1951 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1952
1953 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1954 (__u8) card->info.portno;
1955 if (card->options.layer2)
1956 if (card->info.type == QETH_CARD_TYPE_OSN)
1957 prot_type = QETH_PROT_OSN2;
1958 else
1959 prot_type = QETH_PROT_LAYER2;
1960 else
1961 prot_type = QETH_PROT_TCPIP;
1962
1963 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1964 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1965 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1966 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1967 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1968 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1969 card->info.portname, 9);
1970 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1971 qeth_ulp_enable_cb, NULL);
1972 return rc;
1973
1974 }
1975
1976 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1977 unsigned long data)
1978 {
1979 struct qeth_cmd_buffer *iob;
1980 int rc = 0;
1981
1982 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
1983
1984 iob = (struct qeth_cmd_buffer *) data;
1985 memcpy(&card->token.ulp_connection_r,
1986 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1987 QETH_MPC_TOKEN_LENGTH);
1988 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1989 3)) {
1990 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
1991 dev_err(&card->gdev->dev, "A connection could not be "
1992 "established because of an OLM limit\n");
1993 rc = -EMLINK;
1994 }
1995 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1996 return rc;
1997 }
1998
1999 static int qeth_ulp_setup(struct qeth_card *card)
2000 {
2001 int rc;
2002 __u16 temp;
2003 struct qeth_cmd_buffer *iob;
2004 struct ccw_dev_id dev_id;
2005
2006 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2007
2008 iob = qeth_wait_for_buffer(&card->write);
2009 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2010
2011 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2012 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2013 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2014 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2015 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2016 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2017
2018 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2019 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2020 temp = (card->info.cula << 8) + card->info.unit_addr2;
2021 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2022 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2023 qeth_ulp_setup_cb, NULL);
2024 return rc;
2025 }
2026
2027 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2028 {
2029 int i, j;
2030
2031 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2032
2033 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2034 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2035 return 0;
2036
2037 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
2038 GFP_KERNEL);
2039 if (!card->qdio.in_q)
2040 goto out_nomem;
2041 QETH_DBF_TEXT(SETUP, 2, "inq");
2042 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2043 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2044 /* give inbound qeth_qdio_buffers their qdio_buffers */
2045 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2046 card->qdio.in_q->bufs[i].buffer =
2047 &card->qdio.in_q->qdio_bufs[i];
2048 /* inbound buffer pool */
2049 if (qeth_alloc_buffer_pool(card))
2050 goto out_freeinq;
2051 /* outbound */
2052 card->qdio.out_qs =
2053 kmalloc(card->qdio.no_out_queues *
2054 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2055 if (!card->qdio.out_qs)
2056 goto out_freepool;
2057 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2058 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2059 GFP_KERNEL);
2060 if (!card->qdio.out_qs[i])
2061 goto out_freeoutq;
2062 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2063 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2064 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2065 card->qdio.out_qs[i]->queue_no = i;
2066 /* give outbound qeth_qdio_buffers their qdio_buffers */
2067 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2068 card->qdio.out_qs[i]->bufs[j].buffer =
2069 &card->qdio.out_qs[i]->qdio_bufs[j];
2070 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2071 skb_list);
2072 lockdep_set_class(
2073 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2074 &qdio_out_skb_queue_key);
2075 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2076 }
2077 }
2078 return 0;
2079
2080 out_freeoutq:
2081 while (i > 0)
2082 kfree(card->qdio.out_qs[--i]);
2083 kfree(card->qdio.out_qs);
2084 card->qdio.out_qs = NULL;
2085 out_freepool:
2086 qeth_free_buffer_pool(card);
2087 out_freeinq:
2088 kfree(card->qdio.in_q);
2089 card->qdio.in_q = NULL;
2090 out_nomem:
2091 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2092 return -ENOMEM;
2093 }
2094
2095 static void qeth_create_qib_param_field(struct qeth_card *card,
2096 char *param_field)
2097 {
2098
2099 param_field[0] = _ascebc['P'];
2100 param_field[1] = _ascebc['C'];
2101 param_field[2] = _ascebc['I'];
2102 param_field[3] = _ascebc['T'];
2103 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2104 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2105 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2106 }
2107
2108 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2109 char *param_field)
2110 {
2111 param_field[16] = _ascebc['B'];
2112 param_field[17] = _ascebc['L'];
2113 param_field[18] = _ascebc['K'];
2114 param_field[19] = _ascebc['T'];
2115 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2116 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2117 *((unsigned int *) (&param_field[28])) =
2118 card->info.blkt.inter_packet_jumbo;
2119 }
2120
2121 static int qeth_qdio_activate(struct qeth_card *card)
2122 {
2123 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2124 return qdio_activate(CARD_DDEV(card));
2125 }
2126
2127 static int qeth_dm_act(struct qeth_card *card)
2128 {
2129 int rc;
2130 struct qeth_cmd_buffer *iob;
2131
2132 QETH_DBF_TEXT(SETUP, 2, "dmact");
2133
2134 iob = qeth_wait_for_buffer(&card->write);
2135 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2136
2137 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2138 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2139 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2140 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2141 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2142 return rc;
2143 }
2144
2145 static int qeth_mpc_initialize(struct qeth_card *card)
2146 {
2147 int rc;
2148
2149 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2150
2151 rc = qeth_issue_next_read(card);
2152 if (rc) {
2153 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2154 return rc;
2155 }
2156 rc = qeth_cm_enable(card);
2157 if (rc) {
2158 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2159 goto out_qdio;
2160 }
2161 rc = qeth_cm_setup(card);
2162 if (rc) {
2163 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2164 goto out_qdio;
2165 }
2166 rc = qeth_ulp_enable(card);
2167 if (rc) {
2168 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2169 goto out_qdio;
2170 }
2171 rc = qeth_ulp_setup(card);
2172 if (rc) {
2173 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2174 goto out_qdio;
2175 }
2176 rc = qeth_alloc_qdio_buffers(card);
2177 if (rc) {
2178 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2179 goto out_qdio;
2180 }
2181 rc = qeth_qdio_establish(card);
2182 if (rc) {
2183 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2184 qeth_free_qdio_buffers(card);
2185 goto out_qdio;
2186 }
2187 rc = qeth_qdio_activate(card);
2188 if (rc) {
2189 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2190 goto out_qdio;
2191 }
2192 rc = qeth_dm_act(card);
2193 if (rc) {
2194 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2195 goto out_qdio;
2196 }
2197
2198 return 0;
2199 out_qdio:
2200 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2201 return rc;
2202 }
2203
2204 static void qeth_print_status_with_portname(struct qeth_card *card)
2205 {
2206 char dbf_text[15];
2207 int i;
2208
2209 sprintf(dbf_text, "%s", card->info.portname + 1);
2210 for (i = 0; i < 8; i++)
2211 dbf_text[i] =
2212 (char) _ebcasc[(__u8) dbf_text[i]];
2213 dbf_text[8] = 0;
2214 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2215 "with link type %s (portname: %s)\n",
2216 qeth_get_cardname(card),
2217 (card->info.mcl_level[0]) ? " (level: " : "",
2218 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2219 (card->info.mcl_level[0]) ? ")" : "",
2220 qeth_get_cardname_short(card),
2221 dbf_text);
2222
2223 }
2224
2225 static void qeth_print_status_no_portname(struct qeth_card *card)
2226 {
2227 if (card->info.portname[0])
2228 dev_info(&card->gdev->dev, "Device is a%s "
2229 "card%s%s%s\nwith link type %s "
2230 "(no portname needed by interface).\n",
2231 qeth_get_cardname(card),
2232 (card->info.mcl_level[0]) ? " (level: " : "",
2233 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2234 (card->info.mcl_level[0]) ? ")" : "",
2235 qeth_get_cardname_short(card));
2236 else
2237 dev_info(&card->gdev->dev, "Device is a%s "
2238 "card%s%s%s\nwith link type %s.\n",
2239 qeth_get_cardname(card),
2240 (card->info.mcl_level[0]) ? " (level: " : "",
2241 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2242 (card->info.mcl_level[0]) ? ")" : "",
2243 qeth_get_cardname_short(card));
2244 }
2245
2246 void qeth_print_status_message(struct qeth_card *card)
2247 {
2248 switch (card->info.type) {
2249 case QETH_CARD_TYPE_OSAE:
2250 /* VM will use a non-zero first character
2251 * to indicate a HiperSockets like reporting
2252 * of the level OSA sets the first character to zero
2253 * */
2254 if (!card->info.mcl_level[0]) {
2255 sprintf(card->info.mcl_level, "%02x%02x",
2256 card->info.mcl_level[2],
2257 card->info.mcl_level[3]);
2258
2259 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2260 break;
2261 }
2262 /* fallthrough */
2263 case QETH_CARD_TYPE_IQD:
2264 if ((card->info.guestlan) ||
2265 (card->info.mcl_level[0] & 0x80)) {
2266 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2267 card->info.mcl_level[0]];
2268 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2269 card->info.mcl_level[1]];
2270 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2271 card->info.mcl_level[2]];
2272 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2273 card->info.mcl_level[3]];
2274 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2275 }
2276 break;
2277 default:
2278 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2279 }
2280 if (card->info.portname_required)
2281 qeth_print_status_with_portname(card);
2282 else
2283 qeth_print_status_no_portname(card);
2284 }
2285 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2286
2287 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2288 {
2289 struct qeth_buffer_pool_entry *entry;
2290
2291 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
2292
2293 list_for_each_entry(entry,
2294 &card->qdio.init_pool.entry_list, init_list) {
2295 qeth_put_buffer_pool_entry(card, entry);
2296 }
2297 }
2298
2299 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2300 struct qeth_card *card)
2301 {
2302 struct list_head *plh;
2303 struct qeth_buffer_pool_entry *entry;
2304 int i, free;
2305 struct page *page;
2306
2307 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2308 return NULL;
2309
2310 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2311 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2312 free = 1;
2313 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2314 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2315 free = 0;
2316 break;
2317 }
2318 }
2319 if (free) {
2320 list_del_init(&entry->list);
2321 return entry;
2322 }
2323 }
2324
2325 /* no free buffer in pool so take first one and swap pages */
2326 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2327 struct qeth_buffer_pool_entry, list);
2328 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2329 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2330 page = alloc_page(GFP_ATOMIC);
2331 if (!page) {
2332 return NULL;
2333 } else {
2334 free_page((unsigned long)entry->elements[i]);
2335 entry->elements[i] = page_address(page);
2336 if (card->options.performance_stats)
2337 card->perf_stats.sg_alloc_page_rx++;
2338 }
2339 }
2340 }
2341 list_del_init(&entry->list);
2342 return entry;
2343 }
2344
2345 static int qeth_init_input_buffer(struct qeth_card *card,
2346 struct qeth_qdio_buffer *buf)
2347 {
2348 struct qeth_buffer_pool_entry *pool_entry;
2349 int i;
2350
2351 pool_entry = qeth_find_free_buffer_pool_entry(card);
2352 if (!pool_entry)
2353 return 1;
2354
2355 /*
2356 * since the buffer is accessed only from the input_tasklet
2357 * there shouldn't be a need to synchronize; also, since we use
2358 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2359 * buffers
2360 */
2361
2362 buf->pool_entry = pool_entry;
2363 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2364 buf->buffer->element[i].length = PAGE_SIZE;
2365 buf->buffer->element[i].addr = pool_entry->elements[i];
2366 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2367 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2368 else
2369 buf->buffer->element[i].flags = 0;
2370 }
2371 return 0;
2372 }
2373
2374 int qeth_init_qdio_queues(struct qeth_card *card)
2375 {
2376 int i, j;
2377 int rc;
2378
2379 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2380
2381 /* inbound queue */
2382 memset(card->qdio.in_q->qdio_bufs, 0,
2383 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2384 qeth_initialize_working_pool_list(card);
2385 /*give only as many buffers to hardware as we have buffer pool entries*/
2386 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2387 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2388 card->qdio.in_q->next_buf_to_init =
2389 card->qdio.in_buf_pool.buf_count - 1;
2390 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2391 card->qdio.in_buf_pool.buf_count - 1);
2392 if (rc) {
2393 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2394 return rc;
2395 }
2396 /* outbound queue */
2397 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2398 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2399 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2400 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2401 qeth_clear_output_buffer(card->qdio.out_qs[i],
2402 &card->qdio.out_qs[i]->bufs[j]);
2403 }
2404 card->qdio.out_qs[i]->card = card;
2405 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2406 card->qdio.out_qs[i]->do_pack = 0;
2407 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2408 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2409 atomic_set(&card->qdio.out_qs[i]->state,
2410 QETH_OUT_Q_UNLOCKED);
2411 }
2412 return 0;
2413 }
2414 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2415
2416 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2417 {
2418 switch (link_type) {
2419 case QETH_LINK_TYPE_HSTR:
2420 return 2;
2421 default:
2422 return 1;
2423 }
2424 }
2425
2426 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2427 struct qeth_ipa_cmd *cmd, __u8 command,
2428 enum qeth_prot_versions prot)
2429 {
2430 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2431 cmd->hdr.command = command;
2432 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2433 cmd->hdr.seqno = card->seqno.ipa;
2434 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2435 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2436 if (card->options.layer2)
2437 cmd->hdr.prim_version_no = 2;
2438 else
2439 cmd->hdr.prim_version_no = 1;
2440 cmd->hdr.param_count = 1;
2441 cmd->hdr.prot_version = prot;
2442 cmd->hdr.ipa_supported = 0;
2443 cmd->hdr.ipa_enabled = 0;
2444 }
2445
2446 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2447 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2448 {
2449 struct qeth_cmd_buffer *iob;
2450 struct qeth_ipa_cmd *cmd;
2451
2452 iob = qeth_wait_for_buffer(&card->write);
2453 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2454 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2455
2456 return iob;
2457 }
2458 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2459
2460 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2461 char prot_type)
2462 {
2463 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2464 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2465 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2466 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2467 }
2468 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2469
2470 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2471 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2472 unsigned long),
2473 void *reply_param)
2474 {
2475 int rc;
2476 char prot_type;
2477
2478 QETH_DBF_TEXT(TRACE, 4, "sendipa");
2479
2480 if (card->options.layer2)
2481 if (card->info.type == QETH_CARD_TYPE_OSN)
2482 prot_type = QETH_PROT_OSN2;
2483 else
2484 prot_type = QETH_PROT_LAYER2;
2485 else
2486 prot_type = QETH_PROT_TCPIP;
2487 qeth_prepare_ipa_cmd(card, iob, prot_type);
2488 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2489 iob, reply_cb, reply_param);
2490 return rc;
2491 }
2492 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2493
2494 static int qeth_send_startstoplan(struct qeth_card *card,
2495 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2496 {
2497 int rc;
2498 struct qeth_cmd_buffer *iob;
2499
2500 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2501 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2502
2503 return rc;
2504 }
2505
2506 int qeth_send_startlan(struct qeth_card *card)
2507 {
2508 int rc;
2509
2510 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2511
2512 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2513 return rc;
2514 }
2515 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2516
2517 int qeth_send_stoplan(struct qeth_card *card)
2518 {
2519 int rc = 0;
2520
2521 /*
2522 * TODO: according to the IPA format document page 14,
2523 * TCP/IP (we!) never issue a STOPLAN
2524 * is this right ?!?
2525 */
2526 QETH_DBF_TEXT(SETUP, 2, "stoplan");
2527
2528 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2529 return rc;
2530 }
2531 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2532
2533 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2534 struct qeth_reply *reply, unsigned long data)
2535 {
2536 struct qeth_ipa_cmd *cmd;
2537
2538 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
2539
2540 cmd = (struct qeth_ipa_cmd *) data;
2541 if (cmd->hdr.return_code == 0)
2542 cmd->hdr.return_code =
2543 cmd->data.setadapterparms.hdr.return_code;
2544 return 0;
2545 }
2546 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2547
2548 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2549 struct qeth_reply *reply, unsigned long data)
2550 {
2551 struct qeth_ipa_cmd *cmd;
2552
2553 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
2554
2555 cmd = (struct qeth_ipa_cmd *) data;
2556 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2557 card->info.link_type =
2558 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2559 card->options.adp.supported_funcs =
2560 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2561 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2562 }
2563
2564 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2565 __u32 command, __u32 cmdlen)
2566 {
2567 struct qeth_cmd_buffer *iob;
2568 struct qeth_ipa_cmd *cmd;
2569
2570 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2571 QETH_PROT_IPV4);
2572 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2573 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2574 cmd->data.setadapterparms.hdr.command_code = command;
2575 cmd->data.setadapterparms.hdr.used_total = 1;
2576 cmd->data.setadapterparms.hdr.seq_no = 1;
2577
2578 return iob;
2579 }
2580 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2581
2582 int qeth_query_setadapterparms(struct qeth_card *card)
2583 {
2584 int rc;
2585 struct qeth_cmd_buffer *iob;
2586
2587 QETH_DBF_TEXT(TRACE, 3, "queryadp");
2588 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2589 sizeof(struct qeth_ipacmd_setadpparms));
2590 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2591 return rc;
2592 }
2593 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2594
2595 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
2596 unsigned int qdio_error, const char *dbftext)
2597 {
2598 if (qdio_error) {
2599 QETH_DBF_TEXT(TRACE, 2, dbftext);
2600 QETH_DBF_TEXT(QERR, 2, dbftext);
2601 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
2602 buf->element[15].flags & 0xff);
2603 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
2604 buf->element[14].flags & 0xff);
2605 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
2606 if ((buf->element[15].flags & 0xff) == 0x12) {
2607 card->stats.rx_dropped++;
2608 return 0;
2609 } else
2610 return 1;
2611 }
2612 return 0;
2613 }
2614 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2615
2616 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2617 {
2618 struct qeth_qdio_q *queue = card->qdio.in_q;
2619 int count;
2620 int i;
2621 int rc;
2622 int newcount = 0;
2623
2624 count = (index < queue->next_buf_to_init)?
2625 card->qdio.in_buf_pool.buf_count -
2626 (queue->next_buf_to_init - index) :
2627 card->qdio.in_buf_pool.buf_count -
2628 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2629 /* only requeue at a certain threshold to avoid SIGAs */
2630 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2631 for (i = queue->next_buf_to_init;
2632 i < queue->next_buf_to_init + count; ++i) {
2633 if (qeth_init_input_buffer(card,
2634 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2635 break;
2636 } else {
2637 newcount++;
2638 }
2639 }
2640
2641 if (newcount < count) {
2642 /* we are in memory shortage so we switch back to
2643 traditional skb allocation and drop packages */
2644 atomic_set(&card->force_alloc_skb, 3);
2645 count = newcount;
2646 } else {
2647 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2648 }
2649
2650 /*
2651 * according to old code it should be avoided to requeue all
2652 * 128 buffers in order to benefit from PCI avoidance.
2653 * this function keeps at least one buffer (the buffer at
2654 * 'index') un-requeued -> this buffer is the first buffer that
2655 * will be requeued the next time
2656 */
2657 if (card->options.performance_stats) {
2658 card->perf_stats.inbound_do_qdio_cnt++;
2659 card->perf_stats.inbound_do_qdio_start_time =
2660 qeth_get_micros();
2661 }
2662 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2663 queue->next_buf_to_init, count);
2664 if (card->options.performance_stats)
2665 card->perf_stats.inbound_do_qdio_time +=
2666 qeth_get_micros() -
2667 card->perf_stats.inbound_do_qdio_start_time;
2668 if (rc) {
2669 dev_warn(&card->gdev->dev,
2670 "QDIO reported an error, rc=%i\n", rc);
2671 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2672 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2673 }
2674 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2675 QDIO_MAX_BUFFERS_PER_Q;
2676 }
2677 }
2678 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2679
2680 static int qeth_handle_send_error(struct qeth_card *card,
2681 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
2682 {
2683 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2684
2685 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
2686 if (card->info.type == QETH_CARD_TYPE_IQD) {
2687 if (sbalf15 == 0) {
2688 qdio_err = 0;
2689 } else {
2690 qdio_err = 1;
2691 }
2692 }
2693 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
2694
2695 if (!qdio_err)
2696 return QETH_SEND_ERROR_NONE;
2697
2698 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2699 return QETH_SEND_ERROR_RETRY;
2700
2701 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2702 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2703 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
2704 (u16)qdio_err, (u8)sbalf15);
2705 return QETH_SEND_ERROR_LINK_FAILURE;
2706 }
2707
2708 /*
2709 * Switched to packing state if the number of used buffers on a queue
2710 * reaches a certain limit.
2711 */
2712 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2713 {
2714 if (!queue->do_pack) {
2715 if (atomic_read(&queue->used_buffers)
2716 >= QETH_HIGH_WATERMARK_PACK){
2717 /* switch non-PACKING -> PACKING */
2718 QETH_DBF_TEXT(TRACE, 6, "np->pack");
2719 if (queue->card->options.performance_stats)
2720 queue->card->perf_stats.sc_dp_p++;
2721 queue->do_pack = 1;
2722 }
2723 }
2724 }
2725
2726 /*
2727 * Switches from packing to non-packing mode. If there is a packing
2728 * buffer on the queue this buffer will be prepared to be flushed.
2729 * In that case 1 is returned to inform the caller. If no buffer
2730 * has to be flushed, zero is returned.
2731 */
2732 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2733 {
2734 struct qeth_qdio_out_buffer *buffer;
2735 int flush_count = 0;
2736
2737 if (queue->do_pack) {
2738 if (atomic_read(&queue->used_buffers)
2739 <= QETH_LOW_WATERMARK_PACK) {
2740 /* switch PACKING -> non-PACKING */
2741 QETH_DBF_TEXT(TRACE, 6, "pack->np");
2742 if (queue->card->options.performance_stats)
2743 queue->card->perf_stats.sc_p_dp++;
2744 queue->do_pack = 0;
2745 /* flush packing buffers */
2746 buffer = &queue->bufs[queue->next_buf_to_fill];
2747 if ((atomic_read(&buffer->state) ==
2748 QETH_QDIO_BUF_EMPTY) &&
2749 (buffer->next_element_to_fill > 0)) {
2750 atomic_set(&buffer->state,
2751 QETH_QDIO_BUF_PRIMED);
2752 flush_count++;
2753 queue->next_buf_to_fill =
2754 (queue->next_buf_to_fill + 1) %
2755 QDIO_MAX_BUFFERS_PER_Q;
2756 }
2757 }
2758 }
2759 return flush_count;
2760 }
2761
2762 /*
2763 * Called to flush a packing buffer if no more pci flags are on the queue.
2764 * Checks if there is a packing buffer and prepares it to be flushed.
2765 * In that case returns 1, otherwise zero.
2766 */
2767 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2768 {
2769 struct qeth_qdio_out_buffer *buffer;
2770
2771 buffer = &queue->bufs[queue->next_buf_to_fill];
2772 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2773 (buffer->next_element_to_fill > 0)) {
2774 /* it's a packing buffer */
2775 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2776 queue->next_buf_to_fill =
2777 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2778 return 1;
2779 }
2780 return 0;
2781 }
2782
2783 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2784 int count)
2785 {
2786 struct qeth_qdio_out_buffer *buf;
2787 int rc;
2788 int i;
2789 unsigned int qdio_flags;
2790
2791 for (i = index; i < index + count; ++i) {
2792 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2793 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2794 SBAL_FLAGS_LAST_ENTRY;
2795
2796 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2797 continue;
2798
2799 if (!queue->do_pack) {
2800 if ((atomic_read(&queue->used_buffers) >=
2801 (QETH_HIGH_WATERMARK_PACK -
2802 QETH_WATERMARK_PACK_FUZZ)) &&
2803 !atomic_read(&queue->set_pci_flags_count)) {
2804 /* it's likely that we'll go to packing
2805 * mode soon */
2806 atomic_inc(&queue->set_pci_flags_count);
2807 buf->buffer->element[0].flags |= 0x40;
2808 }
2809 } else {
2810 if (!atomic_read(&queue->set_pci_flags_count)) {
2811 /*
2812 * there's no outstanding PCI any more, so we
2813 * have to request a PCI to be sure the the PCI
2814 * will wake at some time in the future then we
2815 * can flush packed buffers that might still be
2816 * hanging around, which can happen if no
2817 * further send was requested by the stack
2818 */
2819 atomic_inc(&queue->set_pci_flags_count);
2820 buf->buffer->element[0].flags |= 0x40;
2821 }
2822 }
2823 }
2824
2825 queue->sync_iqdio_error = 0;
2826 queue->card->dev->trans_start = jiffies;
2827 if (queue->card->options.performance_stats) {
2828 queue->card->perf_stats.outbound_do_qdio_cnt++;
2829 queue->card->perf_stats.outbound_do_qdio_start_time =
2830 qeth_get_micros();
2831 }
2832 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2833 if (atomic_read(&queue->set_pci_flags_count))
2834 qdio_flags |= QDIO_FLAG_PCI_OUT;
2835 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2836 queue->queue_no, index, count);
2837 if (queue->card->options.performance_stats)
2838 queue->card->perf_stats.outbound_do_qdio_time +=
2839 qeth_get_micros() -
2840 queue->card->perf_stats.outbound_do_qdio_start_time;
2841 if (rc > 0) {
2842 if (!(rc & QDIO_ERROR_SIGA_BUSY))
2843 queue->sync_iqdio_error = rc & 3;
2844 }
2845 if (rc) {
2846 queue->card->stats.tx_errors += count;
2847 /* ignore temporary SIGA errors without busy condition */
2848 if (rc == QDIO_ERROR_SIGA_TARGET)
2849 return;
2850 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2851 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2852 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
2853
2854 /* this must not happen under normal circumstances. if it
2855 * happens something is really wrong -> recover */
2856 qeth_schedule_recovery(queue->card);
2857 return;
2858 }
2859 atomic_add(count, &queue->used_buffers);
2860 if (queue->card->options.performance_stats)
2861 queue->card->perf_stats.bufs_sent += count;
2862 }
2863
2864 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2865 {
2866 int index;
2867 int flush_cnt = 0;
2868 int q_was_packing = 0;
2869
2870 /*
2871 * check if weed have to switch to non-packing mode or if
2872 * we have to get a pci flag out on the queue
2873 */
2874 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2875 !atomic_read(&queue->set_pci_flags_count)) {
2876 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2877 QETH_OUT_Q_UNLOCKED) {
2878 /*
2879 * If we get in here, there was no action in
2880 * do_send_packet. So, we check if there is a
2881 * packing buffer to be flushed here.
2882 */
2883 netif_stop_queue(queue->card->dev);
2884 index = queue->next_buf_to_fill;
2885 q_was_packing = queue->do_pack;
2886 /* queue->do_pack may change */
2887 barrier();
2888 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2889 if (!flush_cnt &&
2890 !atomic_read(&queue->set_pci_flags_count))
2891 flush_cnt +=
2892 qeth_flush_buffers_on_no_pci(queue);
2893 if (queue->card->options.performance_stats &&
2894 q_was_packing)
2895 queue->card->perf_stats.bufs_sent_pack +=
2896 flush_cnt;
2897 if (flush_cnt)
2898 qeth_flush_buffers(queue, index, flush_cnt);
2899 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2900 }
2901 }
2902 }
2903
2904 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2905 unsigned int qdio_error, int __queue, int first_element,
2906 int count, unsigned long card_ptr)
2907 {
2908 struct qeth_card *card = (struct qeth_card *) card_ptr;
2909 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2910 struct qeth_qdio_out_buffer *buffer;
2911 int i;
2912 unsigned qeth_send_err;
2913
2914 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
2915 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2916 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2917 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2918 netif_stop_queue(card->dev);
2919 qeth_schedule_recovery(card);
2920 return;
2921 }
2922 if (card->options.performance_stats) {
2923 card->perf_stats.outbound_handler_cnt++;
2924 card->perf_stats.outbound_handler_start_time =
2925 qeth_get_micros();
2926 }
2927 for (i = first_element; i < (first_element + count); ++i) {
2928 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2929 qeth_send_err = qeth_handle_send_error(card, buffer, qdio_error);
2930 __qeth_clear_output_buffer(queue, buffer,
2931 (qeth_send_err == QETH_SEND_ERROR_RETRY) ? 1 : 0);
2932 }
2933 atomic_sub(count, &queue->used_buffers);
2934 /* check if we need to do something on this outbound queue */
2935 if (card->info.type != QETH_CARD_TYPE_IQD)
2936 qeth_check_outbound_queue(queue);
2937
2938 netif_wake_queue(queue->card->dev);
2939 if (card->options.performance_stats)
2940 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2941 card->perf_stats.outbound_handler_start_time;
2942 }
2943 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2944
2945 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2946 int ipv, int cast_type)
2947 {
2948 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
2949 return card->qdio.default_out_queue;
2950 switch (card->qdio.no_out_queues) {
2951 case 4:
2952 if (cast_type && card->info.is_multicast_different)
2953 return card->info.is_multicast_different &
2954 (card->qdio.no_out_queues - 1);
2955 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2956 const u8 tos = ip_hdr(skb)->tos;
2957
2958 if (card->qdio.do_prio_queueing ==
2959 QETH_PRIO_Q_ING_TOS) {
2960 if (tos & IP_TOS_NOTIMPORTANT)
2961 return 3;
2962 if (tos & IP_TOS_HIGHRELIABILITY)
2963 return 2;
2964 if (tos & IP_TOS_HIGHTHROUGHPUT)
2965 return 1;
2966 if (tos & IP_TOS_LOWDELAY)
2967 return 0;
2968 }
2969 if (card->qdio.do_prio_queueing ==
2970 QETH_PRIO_Q_ING_PREC)
2971 return 3 - (tos >> 6);
2972 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
2973 /* TODO: IPv6!!! */
2974 }
2975 return card->qdio.default_out_queue;
2976 case 1: /* fallthrough for single-out-queue 1920-device */
2977 default:
2978 return card->qdio.default_out_queue;
2979 }
2980 }
2981 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
2982
2983 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
2984 struct sk_buff *skb, int elems)
2985 {
2986 int elements_needed = 0;
2987
2988 if (skb_shinfo(skb)->nr_frags > 0)
2989 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
2990 if (elements_needed == 0)
2991 elements_needed = 1 + (((((unsigned long) skb->data) %
2992 PAGE_SIZE) + skb->len) >> PAGE_SHIFT);
2993 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
2994 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
2995 "(Number=%d / Length=%d). Discarded.\n",
2996 (elements_needed+elems), skb->len);
2997 return 0;
2998 }
2999 return elements_needed;
3000 }
3001 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3002
3003 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3004 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3005 int offset)
3006 {
3007 int length = skb->len;
3008 int length_here;
3009 int element;
3010 char *data;
3011 int first_lap ;
3012
3013 element = *next_element_to_fill;
3014 data = skb->data;
3015 first_lap = (is_tso == 0 ? 1 : 0);
3016
3017 if (offset >= 0) {
3018 data = skb->data + offset;
3019 length -= offset;
3020 first_lap = 0;
3021 }
3022
3023 while (length > 0) {
3024 /* length_here is the remaining amount of data in this page */
3025 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3026 if (length < length_here)
3027 length_here = length;
3028
3029 buffer->element[element].addr = data;
3030 buffer->element[element].length = length_here;
3031 length -= length_here;
3032 if (!length) {
3033 if (first_lap)
3034 buffer->element[element].flags = 0;
3035 else
3036 buffer->element[element].flags =
3037 SBAL_FLAGS_LAST_FRAG;
3038 } else {
3039 if (first_lap)
3040 buffer->element[element].flags =
3041 SBAL_FLAGS_FIRST_FRAG;
3042 else
3043 buffer->element[element].flags =
3044 SBAL_FLAGS_MIDDLE_FRAG;
3045 }
3046 data += length_here;
3047 element++;
3048 first_lap = 0;
3049 }
3050 *next_element_to_fill = element;
3051 }
3052
3053 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3054 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3055 struct qeth_hdr *hdr, int offset, int hd_len)
3056 {
3057 struct qdio_buffer *buffer;
3058 int flush_cnt = 0, hdr_len, large_send = 0;
3059
3060 buffer = buf->buffer;
3061 atomic_inc(&skb->users);
3062 skb_queue_tail(&buf->skb_list, skb);
3063
3064 /*check first on TSO ....*/
3065 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3066 int element = buf->next_element_to_fill;
3067
3068 hdr_len = sizeof(struct qeth_hdr_tso) +
3069 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3070 /*fill first buffer entry only with header information */
3071 buffer->element[element].addr = skb->data;
3072 buffer->element[element].length = hdr_len;
3073 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3074 buf->next_element_to_fill++;
3075 skb->data += hdr_len;
3076 skb->len -= hdr_len;
3077 large_send = 1;
3078 }
3079
3080 if (offset >= 0) {
3081 int element = buf->next_element_to_fill;
3082 buffer->element[element].addr = hdr;
3083 buffer->element[element].length = sizeof(struct qeth_hdr) +
3084 hd_len;
3085 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3086 buf->is_header[element] = 1;
3087 buf->next_element_to_fill++;
3088 }
3089
3090 if (skb_shinfo(skb)->nr_frags == 0)
3091 __qeth_fill_buffer(skb, buffer, large_send,
3092 (int *)&buf->next_element_to_fill, offset);
3093 else
3094 __qeth_fill_buffer_frag(skb, buffer, large_send,
3095 (int *)&buf->next_element_to_fill);
3096
3097 if (!queue->do_pack) {
3098 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
3099 /* set state to PRIMED -> will be flushed */
3100 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3101 flush_cnt = 1;
3102 } else {
3103 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
3104 if (queue->card->options.performance_stats)
3105 queue->card->perf_stats.skbs_sent_pack++;
3106 if (buf->next_element_to_fill >=
3107 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3108 /*
3109 * packed buffer if full -> set state PRIMED
3110 * -> will be flushed
3111 */
3112 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3113 flush_cnt = 1;
3114 }
3115 }
3116 return flush_cnt;
3117 }
3118
3119 int qeth_do_send_packet_fast(struct qeth_card *card,
3120 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3121 struct qeth_hdr *hdr, int elements_needed,
3122 int offset, int hd_len)
3123 {
3124 struct qeth_qdio_out_buffer *buffer;
3125 struct sk_buff *skb1;
3126 struct qeth_skb_data *retry_ctrl;
3127 int index;
3128 int rc;
3129
3130 /* spin until we get the queue ... */
3131 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3132 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3133 /* ... now we've got the queue */
3134 index = queue->next_buf_to_fill;
3135 buffer = &queue->bufs[queue->next_buf_to_fill];
3136 /*
3137 * check if buffer is empty to make sure that we do not 'overtake'
3138 * ourselves and try to fill a buffer that is already primed
3139 */
3140 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3141 goto out;
3142 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3143 QDIO_MAX_BUFFERS_PER_Q;
3144 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3145 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3146 qeth_flush_buffers(queue, index, 1);
3147 if (queue->sync_iqdio_error == 2) {
3148 skb1 = skb_dequeue(&buffer->skb_list);
3149 while (skb1) {
3150 atomic_dec(&skb1->users);
3151 skb1 = skb_dequeue(&buffer->skb_list);
3152 }
3153 retry_ctrl = (struct qeth_skb_data *) &skb->cb[16];
3154 if (retry_ctrl->magic != QETH_SKB_MAGIC) {
3155 retry_ctrl->magic = QETH_SKB_MAGIC;
3156 retry_ctrl->count = 0;
3157 }
3158 if (retry_ctrl->count < QETH_SIGA_CC2_RETRIES) {
3159 retry_ctrl->count++;
3160 rc = dev_queue_xmit(skb);
3161 } else {
3162 dev_kfree_skb_any(skb);
3163 QETH_DBF_TEXT(QERR, 2, "qrdrop");
3164 }
3165 }
3166 return 0;
3167 out:
3168 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3169 return -EBUSY;
3170 }
3171 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3172
3173 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3174 struct sk_buff *skb, struct qeth_hdr *hdr,
3175 int elements_needed)
3176 {
3177 struct qeth_qdio_out_buffer *buffer;
3178 int start_index;
3179 int flush_count = 0;
3180 int do_pack = 0;
3181 int tmp;
3182 int rc = 0;
3183
3184 /* spin until we get the queue ... */
3185 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3186 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3187 start_index = queue->next_buf_to_fill;
3188 buffer = &queue->bufs[queue->next_buf_to_fill];
3189 /*
3190 * check if buffer is empty to make sure that we do not 'overtake'
3191 * ourselves and try to fill a buffer that is already primed
3192 */
3193 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3194 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3195 return -EBUSY;
3196 }
3197 /* check if we need to switch packing state of this queue */
3198 qeth_switch_to_packing_if_needed(queue);
3199 if (queue->do_pack) {
3200 do_pack = 1;
3201 /* does packet fit in current buffer? */
3202 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3203 buffer->next_element_to_fill) < elements_needed) {
3204 /* ... no -> set state PRIMED */
3205 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3206 flush_count++;
3207 queue->next_buf_to_fill =
3208 (queue->next_buf_to_fill + 1) %
3209 QDIO_MAX_BUFFERS_PER_Q;
3210 buffer = &queue->bufs[queue->next_buf_to_fill];
3211 /* we did a step forward, so check buffer state
3212 * again */
3213 if (atomic_read(&buffer->state) !=
3214 QETH_QDIO_BUF_EMPTY) {
3215 qeth_flush_buffers(queue, start_index,
3216 flush_count);
3217 atomic_set(&queue->state,
3218 QETH_OUT_Q_UNLOCKED);
3219 return -EBUSY;
3220 }
3221 }
3222 }
3223 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3224 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3225 QDIO_MAX_BUFFERS_PER_Q;
3226 flush_count += tmp;
3227 if (flush_count)
3228 qeth_flush_buffers(queue, start_index, flush_count);
3229 else if (!atomic_read(&queue->set_pci_flags_count))
3230 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3231 /*
3232 * queue->state will go from LOCKED -> UNLOCKED or from
3233 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3234 * (switch packing state or flush buffer to get another pci flag out).
3235 * In that case we will enter this loop
3236 */
3237 while (atomic_dec_return(&queue->state)) {
3238 flush_count = 0;
3239 start_index = queue->next_buf_to_fill;
3240 /* check if we can go back to non-packing state */
3241 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3242 /*
3243 * check if we need to flush a packing buffer to get a pci
3244 * flag out on the queue
3245 */
3246 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3247 flush_count += qeth_flush_buffers_on_no_pci(queue);
3248 if (flush_count)
3249 qeth_flush_buffers(queue, start_index, flush_count);
3250 }
3251 /* at this point the queue is UNLOCKED again */
3252 if (queue->card->options.performance_stats && do_pack)
3253 queue->card->perf_stats.bufs_sent_pack += flush_count;
3254
3255 return rc;
3256 }
3257 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3258
3259 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3260 struct qeth_reply *reply, unsigned long data)
3261 {
3262 struct qeth_ipa_cmd *cmd;
3263 struct qeth_ipacmd_setadpparms *setparms;
3264
3265 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
3266
3267 cmd = (struct qeth_ipa_cmd *) data;
3268 setparms = &(cmd->data.setadapterparms);
3269
3270 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3271 if (cmd->hdr.return_code) {
3272 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
3273 setparms->data.mode = SET_PROMISC_MODE_OFF;
3274 }
3275 card->info.promisc_mode = setparms->data.mode;
3276 return 0;
3277 }
3278
3279 void qeth_setadp_promisc_mode(struct qeth_card *card)
3280 {
3281 enum qeth_ipa_promisc_modes mode;
3282 struct net_device *dev = card->dev;
3283 struct qeth_cmd_buffer *iob;
3284 struct qeth_ipa_cmd *cmd;
3285
3286 QETH_DBF_TEXT(TRACE, 4, "setprom");
3287
3288 if (((dev->flags & IFF_PROMISC) &&
3289 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3290 (!(dev->flags & IFF_PROMISC) &&
3291 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3292 return;
3293 mode = SET_PROMISC_MODE_OFF;
3294 if (dev->flags & IFF_PROMISC)
3295 mode = SET_PROMISC_MODE_ON;
3296 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
3297
3298 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3299 sizeof(struct qeth_ipacmd_setadpparms));
3300 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3301 cmd->data.setadapterparms.data.mode = mode;
3302 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3303 }
3304 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3305
3306 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3307 {
3308 struct qeth_card *card;
3309 char dbf_text[15];
3310
3311 card = dev->ml_priv;
3312
3313 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
3314 sprintf(dbf_text, "%8x", new_mtu);
3315 QETH_DBF_TEXT(TRACE, 4, dbf_text);
3316
3317 if (new_mtu < 64)
3318 return -EINVAL;
3319 if (new_mtu > 65535)
3320 return -EINVAL;
3321 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3322 (!qeth_mtu_is_valid(card, new_mtu)))
3323 return -EINVAL;
3324 dev->mtu = new_mtu;
3325 return 0;
3326 }
3327 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3328
3329 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3330 {
3331 struct qeth_card *card;
3332
3333 card = dev->ml_priv;
3334
3335 QETH_DBF_TEXT(TRACE, 5, "getstat");
3336
3337 return &card->stats;
3338 }
3339 EXPORT_SYMBOL_GPL(qeth_get_stats);
3340
3341 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3342 struct qeth_reply *reply, unsigned long data)
3343 {
3344 struct qeth_ipa_cmd *cmd;
3345
3346 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
3347
3348 cmd = (struct qeth_ipa_cmd *) data;
3349 if (!card->options.layer2 ||
3350 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3351 memcpy(card->dev->dev_addr,
3352 &cmd->data.setadapterparms.data.change_addr.addr,
3353 OSA_ADDR_LEN);
3354 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3355 }
3356 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3357 return 0;
3358 }
3359
3360 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3361 {
3362 int rc;
3363 struct qeth_cmd_buffer *iob;
3364 struct qeth_ipa_cmd *cmd;
3365
3366 QETH_DBF_TEXT(TRACE, 4, "chgmac");
3367
3368 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3369 sizeof(struct qeth_ipacmd_setadpparms));
3370 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3371 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3372 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3373 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3374 card->dev->dev_addr, OSA_ADDR_LEN);
3375 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3376 NULL);
3377 return rc;
3378 }
3379 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3380
3381 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
3382 struct qeth_reply *reply, unsigned long data)
3383 {
3384 struct qeth_ipa_cmd *cmd;
3385 struct qeth_set_access_ctrl *access_ctrl_req;
3386 int rc;
3387
3388 QETH_DBF_TEXT(TRACE, 4, "setaccb");
3389
3390 cmd = (struct qeth_ipa_cmd *) data;
3391 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3392 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
3393 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3394 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
3395 cmd->data.setadapterparms.hdr.return_code);
3396 switch (cmd->data.setadapterparms.hdr.return_code) {
3397 case SET_ACCESS_CTRL_RC_SUCCESS:
3398 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
3399 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
3400 {
3401 card->options.isolation = access_ctrl_req->subcmd_code;
3402 if (card->options.isolation == ISOLATION_MODE_NONE) {
3403 dev_info(&card->gdev->dev,
3404 "QDIO data connection isolation is deactivated\n");
3405 } else {
3406 dev_info(&card->gdev->dev,
3407 "QDIO data connection isolation is activated\n");
3408 }
3409 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
3410 card->gdev->dev.kobj.name,
3411 access_ctrl_req->subcmd_code,
3412 cmd->data.setadapterparms.hdr.return_code);
3413 rc = 0;
3414 break;
3415 }
3416 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
3417 {
3418 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
3419 card->gdev->dev.kobj.name,
3420 access_ctrl_req->subcmd_code,
3421 cmd->data.setadapterparms.hdr.return_code);
3422 dev_err(&card->gdev->dev, "Adapter does not "
3423 "support QDIO data connection isolation\n");
3424
3425 /* ensure isolation mode is "none" */
3426 card->options.isolation = ISOLATION_MODE_NONE;
3427 rc = -EOPNOTSUPP;
3428 break;
3429 }
3430 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
3431 {
3432 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3433 card->gdev->dev.kobj.name,
3434 access_ctrl_req->subcmd_code,
3435 cmd->data.setadapterparms.hdr.return_code);
3436 dev_err(&card->gdev->dev,
3437 "Adapter is dedicated. "
3438 "QDIO data connection isolation not supported\n");
3439
3440 /* ensure isolation mode is "none" */
3441 card->options.isolation = ISOLATION_MODE_NONE;
3442 rc = -EOPNOTSUPP;
3443 break;
3444 }
3445 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
3446 {
3447 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3448 card->gdev->dev.kobj.name,
3449 access_ctrl_req->subcmd_code,
3450 cmd->data.setadapterparms.hdr.return_code);
3451 dev_err(&card->gdev->dev,
3452 "TSO does not permit QDIO data connection isolation\n");
3453
3454 /* ensure isolation mode is "none" */
3455 card->options.isolation = ISOLATION_MODE_NONE;
3456 rc = -EPERM;
3457 break;
3458 }
3459 default:
3460 {
3461 /* this should never happen */
3462 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
3463 "==UNKNOWN\n",
3464 card->gdev->dev.kobj.name,
3465 access_ctrl_req->subcmd_code,
3466 cmd->data.setadapterparms.hdr.return_code);
3467
3468 /* ensure isolation mode is "none" */
3469 card->options.isolation = ISOLATION_MODE_NONE;
3470 rc = 0;
3471 break;
3472 }
3473 }
3474 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3475 return rc;
3476 }
3477
3478 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
3479 enum qeth_ipa_isolation_modes isolation)
3480 {
3481 int rc;
3482 struct qeth_cmd_buffer *iob;
3483 struct qeth_ipa_cmd *cmd;
3484 struct qeth_set_access_ctrl *access_ctrl_req;
3485
3486 QETH_DBF_TEXT(TRACE, 4, "setacctl");
3487
3488 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
3489 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3490
3491 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
3492 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
3493 sizeof(struct qeth_set_access_ctrl));
3494 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3495 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3496 access_ctrl_req->subcmd_code = isolation;
3497
3498 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
3499 NULL);
3500 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
3501 return rc;
3502 }
3503
3504 int qeth_set_access_ctrl_online(struct qeth_card *card)
3505 {
3506 int rc = 0;
3507
3508 QETH_DBF_TEXT(TRACE, 4, "setactlo");
3509
3510 if (card->info.type == QETH_CARD_TYPE_OSAE &&
3511 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
3512 rc = qeth_setadpparms_set_access_ctrl(card,
3513 card->options.isolation);
3514 if (rc) {
3515 QETH_DBF_MESSAGE(3,
3516 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed",
3517 card->gdev->dev.kobj.name,
3518 rc);
3519 }
3520 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
3521 card->options.isolation = ISOLATION_MODE_NONE;
3522
3523 dev_err(&card->gdev->dev, "Adapter does not "
3524 "support QDIO data connection isolation\n");
3525 rc = -EOPNOTSUPP;
3526 }
3527 return rc;
3528 }
3529 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
3530
3531 void qeth_tx_timeout(struct net_device *dev)
3532 {
3533 struct qeth_card *card;
3534
3535 QETH_DBF_TEXT(TRACE, 4, "txtimeo");
3536 card = dev->ml_priv;
3537 card->stats.tx_errors++;
3538 qeth_schedule_recovery(card);
3539 }
3540 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3541
3542 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3543 {
3544 struct qeth_card *card = dev->ml_priv;
3545 int rc = 0;
3546
3547 switch (regnum) {
3548 case MII_BMCR: /* Basic mode control register */
3549 rc = BMCR_FULLDPLX;
3550 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3551 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3552 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3553 rc |= BMCR_SPEED100;
3554 break;
3555 case MII_BMSR: /* Basic mode status register */
3556 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3557 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3558 BMSR_100BASE4;
3559 break;
3560 case MII_PHYSID1: /* PHYS ID 1 */
3561 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3562 dev->dev_addr[2];
3563 rc = (rc >> 5) & 0xFFFF;
3564 break;
3565 case MII_PHYSID2: /* PHYS ID 2 */
3566 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3567 break;
3568 case MII_ADVERTISE: /* Advertisement control reg */
3569 rc = ADVERTISE_ALL;
3570 break;
3571 case MII_LPA: /* Link partner ability reg */
3572 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3573 LPA_100BASE4 | LPA_LPACK;
3574 break;
3575 case MII_EXPANSION: /* Expansion register */
3576 break;
3577 case MII_DCOUNTER: /* disconnect counter */
3578 break;
3579 case MII_FCSCOUNTER: /* false carrier counter */
3580 break;
3581 case MII_NWAYTEST: /* N-way auto-neg test register */
3582 break;
3583 case MII_RERRCOUNTER: /* rx error counter */
3584 rc = card->stats.rx_errors;
3585 break;
3586 case MII_SREVISION: /* silicon revision */
3587 break;
3588 case MII_RESV1: /* reserved 1 */
3589 break;
3590 case MII_LBRERROR: /* loopback, rx, bypass error */
3591 break;
3592 case MII_PHYADDR: /* physical address */
3593 break;
3594 case MII_RESV2: /* reserved 2 */
3595 break;
3596 case MII_TPISTATUS: /* TPI status for 10mbps */
3597 break;
3598 case MII_NCONFIG: /* network interface config */
3599 break;
3600 default:
3601 break;
3602 }
3603 return rc;
3604 }
3605 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3606
3607 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3608 struct qeth_cmd_buffer *iob, int len,
3609 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3610 unsigned long),
3611 void *reply_param)
3612 {
3613 u16 s1, s2;
3614
3615 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
3616
3617 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3618 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3619 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3620 /* adjust PDU length fields in IPA_PDU_HEADER */
3621 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3622 s2 = (u32) len;
3623 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3624 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3625 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3626 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3627 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3628 reply_cb, reply_param);
3629 }
3630
3631 static int qeth_snmp_command_cb(struct qeth_card *card,
3632 struct qeth_reply *reply, unsigned long sdata)
3633 {
3634 struct qeth_ipa_cmd *cmd;
3635 struct qeth_arp_query_info *qinfo;
3636 struct qeth_snmp_cmd *snmp;
3637 unsigned char *data;
3638 __u16 data_len;
3639
3640 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
3641
3642 cmd = (struct qeth_ipa_cmd *) sdata;
3643 data = (unsigned char *)((char *)cmd - reply->offset);
3644 qinfo = (struct qeth_arp_query_info *) reply->param;
3645 snmp = &cmd->data.setadapterparms.data.snmp;
3646
3647 if (cmd->hdr.return_code) {
3648 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
3649 return 0;
3650 }
3651 if (cmd->data.setadapterparms.hdr.return_code) {
3652 cmd->hdr.return_code =
3653 cmd->data.setadapterparms.hdr.return_code;
3654 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
3655 return 0;
3656 }
3657 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3658 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3659 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3660 else
3661 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3662
3663 /* check if there is enough room in userspace */
3664 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3665 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
3666 cmd->hdr.return_code = -ENOMEM;
3667 return 0;
3668 }
3669 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
3670 cmd->data.setadapterparms.hdr.used_total);
3671 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
3672 cmd->data.setadapterparms.hdr.seq_no);
3673 /*copy entries to user buffer*/
3674 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3675 memcpy(qinfo->udata + qinfo->udata_offset,
3676 (char *)snmp,
3677 data_len + offsetof(struct qeth_snmp_cmd, data));
3678 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3679 } else {
3680 memcpy(qinfo->udata + qinfo->udata_offset,
3681 (char *)&snmp->request, data_len);
3682 }
3683 qinfo->udata_offset += data_len;
3684 /* check if all replies received ... */
3685 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
3686 cmd->data.setadapterparms.hdr.used_total);
3687 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
3688 cmd->data.setadapterparms.hdr.seq_no);
3689 if (cmd->data.setadapterparms.hdr.seq_no <
3690 cmd->data.setadapterparms.hdr.used_total)
3691 return 1;
3692 return 0;
3693 }
3694
3695 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3696 {
3697 struct qeth_cmd_buffer *iob;
3698 struct qeth_ipa_cmd *cmd;
3699 struct qeth_snmp_ureq *ureq;
3700 int req_len;
3701 struct qeth_arp_query_info qinfo = {0, };
3702 int rc = 0;
3703
3704 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
3705
3706 if (card->info.guestlan)
3707 return -EOPNOTSUPP;
3708
3709 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3710 (!card->options.layer2)) {
3711 return -EOPNOTSUPP;
3712 }
3713 /* skip 4 bytes (data_len struct member) to get req_len */
3714 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3715 return -EFAULT;
3716 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3717 if (!ureq) {
3718 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
3719 return -ENOMEM;
3720 }
3721 if (copy_from_user(ureq, udata,
3722 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3723 kfree(ureq);
3724 return -EFAULT;
3725 }
3726 qinfo.udata_len = ureq->hdr.data_len;
3727 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3728 if (!qinfo.udata) {
3729 kfree(ureq);
3730 return -ENOMEM;
3731 }
3732 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3733
3734 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3735 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3736 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3737 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3738 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3739 qeth_snmp_command_cb, (void *)&qinfo);
3740 if (rc)
3741 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
3742 QETH_CARD_IFNAME(card), rc);
3743 else {
3744 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3745 rc = -EFAULT;
3746 }
3747
3748 kfree(ureq);
3749 kfree(qinfo.udata);
3750 return rc;
3751 }
3752 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3753
3754 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3755 {
3756 switch (card->info.type) {
3757 case QETH_CARD_TYPE_IQD:
3758 return 2;
3759 default:
3760 return 0;
3761 }
3762 }
3763
3764 static int qeth_qdio_establish(struct qeth_card *card)
3765 {
3766 struct qdio_initialize init_data;
3767 char *qib_param_field;
3768 struct qdio_buffer **in_sbal_ptrs;
3769 struct qdio_buffer **out_sbal_ptrs;
3770 int i, j, k;
3771 int rc = 0;
3772
3773 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3774
3775 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3776 GFP_KERNEL);
3777 if (!qib_param_field)
3778 return -ENOMEM;
3779
3780 qeth_create_qib_param_field(card, qib_param_field);
3781 qeth_create_qib_param_field_blkt(card, qib_param_field);
3782
3783 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3784 GFP_KERNEL);
3785 if (!in_sbal_ptrs) {
3786 kfree(qib_param_field);
3787 return -ENOMEM;
3788 }
3789 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3790 in_sbal_ptrs[i] = (struct qdio_buffer *)
3791 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3792
3793 out_sbal_ptrs =
3794 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3795 sizeof(void *), GFP_KERNEL);
3796 if (!out_sbal_ptrs) {
3797 kfree(in_sbal_ptrs);
3798 kfree(qib_param_field);
3799 return -ENOMEM;
3800 }
3801 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3802 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3803 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3804 card->qdio.out_qs[i]->bufs[j].buffer);
3805 }
3806
3807 memset(&init_data, 0, sizeof(struct qdio_initialize));
3808 init_data.cdev = CARD_DDEV(card);
3809 init_data.q_format = qeth_get_qdio_q_format(card);
3810 init_data.qib_param_field_format = 0;
3811 init_data.qib_param_field = qib_param_field;
3812 init_data.no_input_qs = 1;
3813 init_data.no_output_qs = card->qdio.no_out_queues;
3814 init_data.input_handler = card->discipline.input_handler;
3815 init_data.output_handler = card->discipline.output_handler;
3816 init_data.int_parm = (unsigned long) card;
3817 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3818 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3819
3820 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3821 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3822 rc = qdio_initialize(&init_data);
3823 if (rc)
3824 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3825 }
3826 kfree(out_sbal_ptrs);
3827 kfree(in_sbal_ptrs);
3828 kfree(qib_param_field);
3829 return rc;
3830 }
3831
3832 static void qeth_core_free_card(struct qeth_card *card)
3833 {
3834
3835 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3836 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
3837 qeth_clean_channel(&card->read);
3838 qeth_clean_channel(&card->write);
3839 if (card->dev)
3840 free_netdev(card->dev);
3841 kfree(card->ip_tbd_list);
3842 qeth_free_qdio_buffers(card);
3843 unregister_service_level(&card->qeth_service_level);
3844 kfree(card);
3845 }
3846
3847 static struct ccw_device_id qeth_ids[] = {
3848 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3849 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3850 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3851 {},
3852 };
3853 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3854
3855 static struct ccw_driver qeth_ccw_driver = {
3856 .name = "qeth",
3857 .ids = qeth_ids,
3858 .probe = ccwgroup_probe_ccwdev,
3859 .remove = ccwgroup_remove_ccwdev,
3860 };
3861
3862 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3863 unsigned long driver_id)
3864 {
3865 return ccwgroup_create_from_string(root_dev, driver_id,
3866 &qeth_ccw_driver, 3, buf);
3867 }
3868
3869 int qeth_core_hardsetup_card(struct qeth_card *card)
3870 {
3871 int retries = 0;
3872 int rc;
3873
3874 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
3875 atomic_set(&card->force_alloc_skb, 0);
3876 retry:
3877 if (retries)
3878 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3879 dev_name(&card->gdev->dev));
3880 ccw_device_set_offline(CARD_DDEV(card));
3881 ccw_device_set_offline(CARD_WDEV(card));
3882 ccw_device_set_offline(CARD_RDEV(card));
3883 rc = ccw_device_set_online(CARD_RDEV(card));
3884 if (rc)
3885 goto retriable;
3886 rc = ccw_device_set_online(CARD_WDEV(card));
3887 if (rc)
3888 goto retriable;
3889 rc = ccw_device_set_online(CARD_DDEV(card));
3890 if (rc)
3891 goto retriable;
3892 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3893 retriable:
3894 if (rc == -ERESTARTSYS) {
3895 QETH_DBF_TEXT(SETUP, 2, "break1");
3896 return rc;
3897 } else if (rc) {
3898 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
3899 if (++retries > 3)
3900 goto out;
3901 else
3902 goto retry;
3903 }
3904 qeth_init_tokens(card);
3905 qeth_init_func_level(card);
3906 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3907 if (rc == -ERESTARTSYS) {
3908 QETH_DBF_TEXT(SETUP, 2, "break2");
3909 return rc;
3910 } else if (rc) {
3911 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3912 if (--retries < 0)
3913 goto out;
3914 else
3915 goto retry;
3916 }
3917 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3918 if (rc == -ERESTARTSYS) {
3919 QETH_DBF_TEXT(SETUP, 2, "break3");
3920 return rc;
3921 } else if (rc) {
3922 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
3923 if (--retries < 0)
3924 goto out;
3925 else
3926 goto retry;
3927 }
3928 rc = qeth_mpc_initialize(card);
3929 if (rc) {
3930 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3931 goto out;
3932 }
3933 return 0;
3934 out:
3935 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3936 "an error on the device\n");
3937 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3938 dev_name(&card->gdev->dev), rc);
3939 return rc;
3940 }
3941 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3942
3943 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3944 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3945 {
3946 struct page *page = virt_to_page(element->addr);
3947 if (*pskb == NULL) {
3948 /* the upper protocol layers assume that there is data in the
3949 * skb itself. Copy a small amount (64 bytes) to make them
3950 * happy. */
3951 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3952 if (!(*pskb))
3953 return -ENOMEM;
3954 skb_reserve(*pskb, ETH_HLEN);
3955 if (data_len <= 64) {
3956 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3957 data_len);
3958 } else {
3959 get_page(page);
3960 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3961 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3962 data_len - 64);
3963 (*pskb)->data_len += data_len - 64;
3964 (*pskb)->len += data_len - 64;
3965 (*pskb)->truesize += data_len - 64;
3966 (*pfrag)++;
3967 }
3968 } else {
3969 get_page(page);
3970 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3971 (*pskb)->data_len += data_len;
3972 (*pskb)->len += data_len;
3973 (*pskb)->truesize += data_len;
3974 (*pfrag)++;
3975 }
3976 return 0;
3977 }
3978
3979 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3980 struct qdio_buffer *buffer,
3981 struct qdio_buffer_element **__element, int *__offset,
3982 struct qeth_hdr **hdr)
3983 {
3984 struct qdio_buffer_element *element = *__element;
3985 int offset = *__offset;
3986 struct sk_buff *skb = NULL;
3987 int skb_len = 0;
3988 void *data_ptr;
3989 int data_len;
3990 int headroom = 0;
3991 int use_rx_sg = 0;
3992 int frag = 0;
3993
3994 /* qeth_hdr must not cross element boundaries */
3995 if (element->length < offset + sizeof(struct qeth_hdr)) {
3996 if (qeth_is_last_sbale(element))
3997 return NULL;
3998 element++;
3999 offset = 0;
4000 if (element->length < sizeof(struct qeth_hdr))
4001 return NULL;
4002 }
4003 *hdr = element->addr + offset;
4004
4005 offset += sizeof(struct qeth_hdr);
4006 switch ((*hdr)->hdr.l2.id) {
4007 case QETH_HEADER_TYPE_LAYER2:
4008 skb_len = (*hdr)->hdr.l2.pkt_length;
4009 break;
4010 case QETH_HEADER_TYPE_LAYER3:
4011 skb_len = (*hdr)->hdr.l3.length;
4012 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4013 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4014 headroom = TR_HLEN;
4015 else
4016 headroom = ETH_HLEN;
4017 break;
4018 case QETH_HEADER_TYPE_OSN:
4019 skb_len = (*hdr)->hdr.osn.pdu_length;
4020 headroom = sizeof(struct qeth_hdr);
4021 break;
4022 default:
4023 break;
4024 }
4025
4026 if (!skb_len)
4027 return NULL;
4028
4029 if ((skb_len >= card->options.rx_sg_cb) &&
4030 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4031 (!atomic_read(&card->force_alloc_skb))) {
4032 use_rx_sg = 1;
4033 } else {
4034 skb = dev_alloc_skb(skb_len + headroom);
4035 if (!skb)
4036 goto no_mem;
4037 if (headroom)
4038 skb_reserve(skb, headroom);
4039 }
4040
4041 data_ptr = element->addr + offset;
4042 while (skb_len) {
4043 data_len = min(skb_len, (int)(element->length - offset));
4044 if (data_len) {
4045 if (use_rx_sg) {
4046 if (qeth_create_skb_frag(element, &skb, offset,
4047 &frag, data_len))
4048 goto no_mem;
4049 } else {
4050 memcpy(skb_put(skb, data_len), data_ptr,
4051 data_len);
4052 }
4053 }
4054 skb_len -= data_len;
4055 if (skb_len) {
4056 if (qeth_is_last_sbale(element)) {
4057 QETH_DBF_TEXT(TRACE, 4, "unexeob");
4058 QETH_DBF_TEXT_(TRACE, 4, "%s",
4059 CARD_BUS_ID(card));
4060 QETH_DBF_TEXT(QERR, 2, "unexeob");
4061 QETH_DBF_TEXT_(QERR, 2, "%s",
4062 CARD_BUS_ID(card));
4063 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
4064 dev_kfree_skb_any(skb);
4065 card->stats.rx_errors++;
4066 return NULL;
4067 }
4068 element++;
4069 offset = 0;
4070 data_ptr = element->addr;
4071 } else {
4072 offset += data_len;
4073 }
4074 }
4075 *__element = element;
4076 *__offset = offset;
4077 if (use_rx_sg && card->options.performance_stats) {
4078 card->perf_stats.sg_skbs_rx++;
4079 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4080 }
4081 return skb;
4082 no_mem:
4083 if (net_ratelimit()) {
4084 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
4085 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4086 }
4087 card->stats.rx_dropped++;
4088 return NULL;
4089 }
4090 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4091
4092 static void qeth_unregister_dbf_views(void)
4093 {
4094 int x;
4095 for (x = 0; x < QETH_DBF_INFOS; x++) {
4096 debug_unregister(qeth_dbf[x].id);
4097 qeth_dbf[x].id = NULL;
4098 }
4099 }
4100
4101 void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
4102 {
4103 char dbf_txt_buf[32];
4104 va_list args;
4105
4106 if (level > (qeth_dbf[dbf_nix].id)->level)
4107 return;
4108 va_start(args, fmt);
4109 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4110 va_end(args);
4111 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
4112 }
4113 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4114
4115 static int qeth_register_dbf_views(void)
4116 {
4117 int ret;
4118 int x;
4119
4120 for (x = 0; x < QETH_DBF_INFOS; x++) {
4121 /* register the areas */
4122 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4123 qeth_dbf[x].pages,
4124 qeth_dbf[x].areas,
4125 qeth_dbf[x].len);
4126 if (qeth_dbf[x].id == NULL) {
4127 qeth_unregister_dbf_views();
4128 return -ENOMEM;
4129 }
4130
4131 /* register a view */
4132 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4133 if (ret) {
4134 qeth_unregister_dbf_views();
4135 return ret;
4136 }
4137
4138 /* set a passing level */
4139 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4140 }
4141
4142 return 0;
4143 }
4144
4145 int qeth_core_load_discipline(struct qeth_card *card,
4146 enum qeth_discipline_id discipline)
4147 {
4148 int rc = 0;
4149 switch (discipline) {
4150 case QETH_DISCIPLINE_LAYER3:
4151 card->discipline.ccwgdriver = try_then_request_module(
4152 symbol_get(qeth_l3_ccwgroup_driver),
4153 "qeth_l3");
4154 break;
4155 case QETH_DISCIPLINE_LAYER2:
4156 card->discipline.ccwgdriver = try_then_request_module(
4157 symbol_get(qeth_l2_ccwgroup_driver),
4158 "qeth_l2");
4159 break;
4160 }
4161 if (!card->discipline.ccwgdriver) {
4162 dev_err(&card->gdev->dev, "There is no kernel module to "
4163 "support discipline %d\n", discipline);
4164 rc = -EINVAL;
4165 }
4166 return rc;
4167 }
4168
4169 void qeth_core_free_discipline(struct qeth_card *card)
4170 {
4171 if (card->options.layer2)
4172 symbol_put(qeth_l2_ccwgroup_driver);
4173 else
4174 symbol_put(qeth_l3_ccwgroup_driver);
4175 card->discipline.ccwgdriver = NULL;
4176 }
4177
4178 static void qeth_determine_capabilities(struct qeth_card *card)
4179 {
4180 int rc;
4181 int length;
4182 char *prcd;
4183
4184 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4185 rc = ccw_device_set_online(CARD_DDEV(card));
4186 if (rc) {
4187 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4188 goto out;
4189 }
4190
4191
4192 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4193 if (rc) {
4194 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4195 dev_name(&card->gdev->dev), rc);
4196 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4197 goto out_offline;
4198 }
4199 qeth_configure_unitaddr(card, prcd);
4200 qeth_configure_blkt_default(card, prcd);
4201 kfree(prcd);
4202
4203 rc = qdio_get_ssqd_desc(CARD_DDEV(card), &card->ssqd);
4204 if (rc)
4205 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4206
4207 out_offline:
4208 ccw_device_set_offline(CARD_DDEV(card));
4209 out:
4210 return;
4211 }
4212
4213 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4214 {
4215 struct qeth_card *card;
4216 struct device *dev;
4217 int rc;
4218 unsigned long flags;
4219
4220 QETH_DBF_TEXT(SETUP, 2, "probedev");
4221
4222 dev = &gdev->dev;
4223 if (!get_device(dev))
4224 return -ENODEV;
4225
4226 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4227
4228 card = qeth_alloc_card();
4229 if (!card) {
4230 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4231 rc = -ENOMEM;
4232 goto err_dev;
4233 }
4234 card->read.ccwdev = gdev->cdev[0];
4235 card->write.ccwdev = gdev->cdev[1];
4236 card->data.ccwdev = gdev->cdev[2];
4237 dev_set_drvdata(&gdev->dev, card);
4238 card->gdev = gdev;
4239 gdev->cdev[0]->handler = qeth_irq;
4240 gdev->cdev[1]->handler = qeth_irq;
4241 gdev->cdev[2]->handler = qeth_irq;
4242
4243 rc = qeth_determine_card_type(card);
4244 if (rc) {
4245 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4246 goto err_card;
4247 }
4248 rc = qeth_setup_card(card);
4249 if (rc) {
4250 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4251 goto err_card;
4252 }
4253
4254 if (card->info.type == QETH_CARD_TYPE_OSN) {
4255 rc = qeth_core_create_osn_attributes(dev);
4256 if (rc)
4257 goto err_card;
4258 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4259 if (rc) {
4260 qeth_core_remove_osn_attributes(dev);
4261 goto err_card;
4262 }
4263 rc = card->discipline.ccwgdriver->probe(card->gdev);
4264 if (rc) {
4265 qeth_core_free_discipline(card);
4266 qeth_core_remove_osn_attributes(dev);
4267 goto err_card;
4268 }
4269 } else {
4270 rc = qeth_core_create_device_attributes(dev);
4271 if (rc)
4272 goto err_card;
4273 }
4274
4275 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4276 list_add_tail(&card->list, &qeth_core_card_list.list);
4277 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4278
4279 qeth_determine_capabilities(card);
4280 return 0;
4281
4282 err_card:
4283 qeth_core_free_card(card);
4284 err_dev:
4285 put_device(dev);
4286 return rc;
4287 }
4288
4289 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4290 {
4291 unsigned long flags;
4292 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4293
4294 QETH_DBF_TEXT(SETUP, 2, "removedv");
4295 if (card->discipline.ccwgdriver) {
4296 card->discipline.ccwgdriver->remove(gdev);
4297 qeth_core_free_discipline(card);
4298 }
4299
4300 if (card->info.type == QETH_CARD_TYPE_OSN) {
4301 qeth_core_remove_osn_attributes(&gdev->dev);
4302 } else {
4303 qeth_core_remove_device_attributes(&gdev->dev);
4304 }
4305 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4306 list_del(&card->list);
4307 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4308 qeth_core_free_card(card);
4309 dev_set_drvdata(&gdev->dev, NULL);
4310 put_device(&gdev->dev);
4311 return;
4312 }
4313
4314 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4315 {
4316 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4317 int rc = 0;
4318 int def_discipline;
4319
4320 if (!card->discipline.ccwgdriver) {
4321 if (card->info.type == QETH_CARD_TYPE_IQD)
4322 def_discipline = QETH_DISCIPLINE_LAYER3;
4323 else
4324 def_discipline = QETH_DISCIPLINE_LAYER2;
4325 rc = qeth_core_load_discipline(card, def_discipline);
4326 if (rc)
4327 goto err;
4328 rc = card->discipline.ccwgdriver->probe(card->gdev);
4329 if (rc)
4330 goto err;
4331 }
4332 rc = card->discipline.ccwgdriver->set_online(gdev);
4333 err:
4334 return rc;
4335 }
4336
4337 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4338 {
4339 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4340 return card->discipline.ccwgdriver->set_offline(gdev);
4341 }
4342
4343 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4344 {
4345 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4346 if (card->discipline.ccwgdriver &&
4347 card->discipline.ccwgdriver->shutdown)
4348 card->discipline.ccwgdriver->shutdown(gdev);
4349 }
4350
4351 static int qeth_core_prepare(struct ccwgroup_device *gdev)
4352 {
4353 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4354 if (card->discipline.ccwgdriver &&
4355 card->discipline.ccwgdriver->prepare)
4356 return card->discipline.ccwgdriver->prepare(gdev);
4357 return 0;
4358 }
4359
4360 static void qeth_core_complete(struct ccwgroup_device *gdev)
4361 {
4362 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4363 if (card->discipline.ccwgdriver &&
4364 card->discipline.ccwgdriver->complete)
4365 card->discipline.ccwgdriver->complete(gdev);
4366 }
4367
4368 static int qeth_core_freeze(struct ccwgroup_device *gdev)
4369 {
4370 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4371 if (card->discipline.ccwgdriver &&
4372 card->discipline.ccwgdriver->freeze)
4373 return card->discipline.ccwgdriver->freeze(gdev);
4374 return 0;
4375 }
4376
4377 static int qeth_core_thaw(struct ccwgroup_device *gdev)
4378 {
4379 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4380 if (card->discipline.ccwgdriver &&
4381 card->discipline.ccwgdriver->thaw)
4382 return card->discipline.ccwgdriver->thaw(gdev);
4383 return 0;
4384 }
4385
4386 static int qeth_core_restore(struct ccwgroup_device *gdev)
4387 {
4388 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4389 if (card->discipline.ccwgdriver &&
4390 card->discipline.ccwgdriver->restore)
4391 return card->discipline.ccwgdriver->restore(gdev);
4392 return 0;
4393 }
4394
4395 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4396 .owner = THIS_MODULE,
4397 .name = "qeth",
4398 .driver_id = 0xD8C5E3C8,
4399 .probe = qeth_core_probe_device,
4400 .remove = qeth_core_remove_device,
4401 .set_online = qeth_core_set_online,
4402 .set_offline = qeth_core_set_offline,
4403 .shutdown = qeth_core_shutdown,
4404 .prepare = qeth_core_prepare,
4405 .complete = qeth_core_complete,
4406 .freeze = qeth_core_freeze,
4407 .thaw = qeth_core_thaw,
4408 .restore = qeth_core_restore,
4409 };
4410
4411 static ssize_t
4412 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4413 size_t count)
4414 {
4415 int err;
4416 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4417 qeth_core_ccwgroup_driver.driver_id);
4418 if (err)
4419 return err;
4420 else
4421 return count;
4422 }
4423
4424 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4425
4426 static struct {
4427 const char str[ETH_GSTRING_LEN];
4428 } qeth_ethtool_stats_keys[] = {
4429 /* 0 */{"rx skbs"},
4430 {"rx buffers"},
4431 {"tx skbs"},
4432 {"tx buffers"},
4433 {"tx skbs no packing"},
4434 {"tx buffers no packing"},
4435 {"tx skbs packing"},
4436 {"tx buffers packing"},
4437 {"tx sg skbs"},
4438 {"tx sg frags"},
4439 /* 10 */{"rx sg skbs"},
4440 {"rx sg frags"},
4441 {"rx sg page allocs"},
4442 {"tx large kbytes"},
4443 {"tx large count"},
4444 {"tx pk state ch n->p"},
4445 {"tx pk state ch p->n"},
4446 {"tx pk watermark low"},
4447 {"tx pk watermark high"},
4448 {"queue 0 buffer usage"},
4449 /* 20 */{"queue 1 buffer usage"},
4450 {"queue 2 buffer usage"},
4451 {"queue 3 buffer usage"},
4452 {"rx handler time"},
4453 {"rx handler count"},
4454 {"rx do_QDIO time"},
4455 {"rx do_QDIO count"},
4456 {"tx handler time"},
4457 {"tx handler count"},
4458 {"tx time"},
4459 /* 30 */{"tx count"},
4460 {"tx do_QDIO time"},
4461 {"tx do_QDIO count"},
4462 {"tx csum"},
4463 {"tx lin"},
4464 };
4465
4466 int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4467 {
4468 switch (stringset) {
4469 case ETH_SS_STATS:
4470 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4471 default:
4472 return -EINVAL;
4473 }
4474 }
4475 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4476
4477 void qeth_core_get_ethtool_stats(struct net_device *dev,
4478 struct ethtool_stats *stats, u64 *data)
4479 {
4480 struct qeth_card *card = dev->ml_priv;
4481 data[0] = card->stats.rx_packets -
4482 card->perf_stats.initial_rx_packets;
4483 data[1] = card->perf_stats.bufs_rec;
4484 data[2] = card->stats.tx_packets -
4485 card->perf_stats.initial_tx_packets;
4486 data[3] = card->perf_stats.bufs_sent;
4487 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4488 - card->perf_stats.skbs_sent_pack;
4489 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4490 data[6] = card->perf_stats.skbs_sent_pack;
4491 data[7] = card->perf_stats.bufs_sent_pack;
4492 data[8] = card->perf_stats.sg_skbs_sent;
4493 data[9] = card->perf_stats.sg_frags_sent;
4494 data[10] = card->perf_stats.sg_skbs_rx;
4495 data[11] = card->perf_stats.sg_frags_rx;
4496 data[12] = card->perf_stats.sg_alloc_page_rx;
4497 data[13] = (card->perf_stats.large_send_bytes >> 10);
4498 data[14] = card->perf_stats.large_send_cnt;
4499 data[15] = card->perf_stats.sc_dp_p;
4500 data[16] = card->perf_stats.sc_p_dp;
4501 data[17] = QETH_LOW_WATERMARK_PACK;
4502 data[18] = QETH_HIGH_WATERMARK_PACK;
4503 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4504 data[20] = (card->qdio.no_out_queues > 1) ?
4505 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4506 data[21] = (card->qdio.no_out_queues > 2) ?
4507 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4508 data[22] = (card->qdio.no_out_queues > 3) ?
4509 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4510 data[23] = card->perf_stats.inbound_time;
4511 data[24] = card->perf_stats.inbound_cnt;
4512 data[25] = card->perf_stats.inbound_do_qdio_time;
4513 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4514 data[27] = card->perf_stats.outbound_handler_time;
4515 data[28] = card->perf_stats.outbound_handler_cnt;
4516 data[29] = card->perf_stats.outbound_time;
4517 data[30] = card->perf_stats.outbound_cnt;
4518 data[31] = card->perf_stats.outbound_do_qdio_time;
4519 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4520 data[33] = card->perf_stats.tx_csum;
4521 data[34] = card->perf_stats.tx_lin;
4522 }
4523 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4524
4525 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4526 {
4527 switch (stringset) {
4528 case ETH_SS_STATS:
4529 memcpy(data, &qeth_ethtool_stats_keys,
4530 sizeof(qeth_ethtool_stats_keys));
4531 break;
4532 default:
4533 WARN_ON(1);
4534 break;
4535 }
4536 }
4537 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4538
4539 void qeth_core_get_drvinfo(struct net_device *dev,
4540 struct ethtool_drvinfo *info)
4541 {
4542 struct qeth_card *card = dev->ml_priv;
4543 if (card->options.layer2)
4544 strcpy(info->driver, "qeth_l2");
4545 else
4546 strcpy(info->driver, "qeth_l3");
4547
4548 strcpy(info->version, "1.0");
4549 strcpy(info->fw_version, card->info.mcl_level);
4550 sprintf(info->bus_info, "%s/%s/%s",
4551 CARD_RDEV_ID(card),
4552 CARD_WDEV_ID(card),
4553 CARD_DDEV_ID(card));
4554 }
4555 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4556
4557 int qeth_core_ethtool_get_settings(struct net_device *netdev,
4558 struct ethtool_cmd *ecmd)
4559 {
4560 struct qeth_card *card = netdev->ml_priv;
4561 enum qeth_link_types link_type;
4562
4563 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4564 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4565 else
4566 link_type = card->info.link_type;
4567
4568 ecmd->transceiver = XCVR_INTERNAL;
4569 ecmd->supported = SUPPORTED_Autoneg;
4570 ecmd->advertising = ADVERTISED_Autoneg;
4571 ecmd->duplex = DUPLEX_FULL;
4572 ecmd->autoneg = AUTONEG_ENABLE;
4573
4574 switch (link_type) {
4575 case QETH_LINK_TYPE_FAST_ETH:
4576 case QETH_LINK_TYPE_LANE_ETH100:
4577 ecmd->supported |= SUPPORTED_10baseT_Half |
4578 SUPPORTED_10baseT_Full |
4579 SUPPORTED_100baseT_Half |
4580 SUPPORTED_100baseT_Full |
4581 SUPPORTED_TP;
4582 ecmd->advertising |= ADVERTISED_10baseT_Half |
4583 ADVERTISED_10baseT_Full |
4584 ADVERTISED_100baseT_Half |
4585 ADVERTISED_100baseT_Full |
4586 ADVERTISED_TP;
4587 ecmd->speed = SPEED_100;
4588 ecmd->port = PORT_TP;
4589 break;
4590
4591 case QETH_LINK_TYPE_GBIT_ETH:
4592 case QETH_LINK_TYPE_LANE_ETH1000:
4593 ecmd->supported |= SUPPORTED_10baseT_Half |
4594 SUPPORTED_10baseT_Full |
4595 SUPPORTED_100baseT_Half |
4596 SUPPORTED_100baseT_Full |
4597 SUPPORTED_1000baseT_Half |
4598 SUPPORTED_1000baseT_Full |
4599 SUPPORTED_FIBRE;
4600 ecmd->advertising |= ADVERTISED_10baseT_Half |
4601 ADVERTISED_10baseT_Full |
4602 ADVERTISED_100baseT_Half |
4603 ADVERTISED_100baseT_Full |
4604 ADVERTISED_1000baseT_Half |
4605 ADVERTISED_1000baseT_Full |
4606 ADVERTISED_FIBRE;
4607 ecmd->speed = SPEED_1000;
4608 ecmd->port = PORT_FIBRE;
4609 break;
4610
4611 case QETH_LINK_TYPE_10GBIT_ETH:
4612 ecmd->supported |= SUPPORTED_10baseT_Half |
4613 SUPPORTED_10baseT_Full |
4614 SUPPORTED_100baseT_Half |
4615 SUPPORTED_100baseT_Full |
4616 SUPPORTED_1000baseT_Half |
4617 SUPPORTED_1000baseT_Full |
4618 SUPPORTED_10000baseT_Full |
4619 SUPPORTED_FIBRE;
4620 ecmd->advertising |= ADVERTISED_10baseT_Half |
4621 ADVERTISED_10baseT_Full |
4622 ADVERTISED_100baseT_Half |
4623 ADVERTISED_100baseT_Full |
4624 ADVERTISED_1000baseT_Half |
4625 ADVERTISED_1000baseT_Full |
4626 ADVERTISED_10000baseT_Full |
4627 ADVERTISED_FIBRE;
4628 ecmd->speed = SPEED_10000;
4629 ecmd->port = PORT_FIBRE;
4630 break;
4631
4632 default:
4633 ecmd->supported |= SUPPORTED_10baseT_Half |
4634 SUPPORTED_10baseT_Full |
4635 SUPPORTED_TP;
4636 ecmd->advertising |= ADVERTISED_10baseT_Half |
4637 ADVERTISED_10baseT_Full |
4638 ADVERTISED_TP;
4639 ecmd->speed = SPEED_10;
4640 ecmd->port = PORT_TP;
4641 }
4642
4643 return 0;
4644 }
4645 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4646
4647 static int __init qeth_core_init(void)
4648 {
4649 int rc;
4650
4651 pr_info("loading core functions\n");
4652 INIT_LIST_HEAD(&qeth_core_card_list.list);
4653 rwlock_init(&qeth_core_card_list.rwlock);
4654
4655 rc = qeth_register_dbf_views();
4656 if (rc)
4657 goto out_err;
4658 rc = ccw_driver_register(&qeth_ccw_driver);
4659 if (rc)
4660 goto ccw_err;
4661 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4662 if (rc)
4663 goto ccwgroup_err;
4664 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4665 &driver_attr_group);
4666 if (rc)
4667 goto driver_err;
4668 qeth_core_root_dev = root_device_register("qeth");
4669 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4670 if (rc)
4671 goto register_err;
4672
4673 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4674 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4675 if (!qeth_core_header_cache) {
4676 rc = -ENOMEM;
4677 goto slab_err;
4678 }
4679
4680 return 0;
4681 slab_err:
4682 root_device_unregister(qeth_core_root_dev);
4683 register_err:
4684 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4685 &driver_attr_group);
4686 driver_err:
4687 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4688 ccwgroup_err:
4689 ccw_driver_unregister(&qeth_ccw_driver);
4690 ccw_err:
4691 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4692 qeth_unregister_dbf_views();
4693 out_err:
4694 pr_err("Initializing the qeth device driver failed\n");
4695 return rc;
4696 }
4697
4698 static void __exit qeth_core_exit(void)
4699 {
4700 root_device_unregister(qeth_core_root_dev);
4701 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4702 &driver_attr_group);
4703 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4704 ccw_driver_unregister(&qeth_ccw_driver);
4705 kmem_cache_destroy(qeth_core_header_cache);
4706 qeth_unregister_dbf_views();
4707 pr_info("core functions removed\n");
4708 }
4709
4710 module_init(qeth_core_init);
4711 module_exit(qeth_core_exit);
4712 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4713 MODULE_DESCRIPTION("qeth core functions");
4714 MODULE_LICENSE("GPL");
Linux 2.6 libata-dev (mirror)