arch/mips/pci/pci-lasat.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 2000, 2001, 04 Keith M Wesolowski
   7  */
   8 #include <linux/kernel.h>
   9 #include <linux/init.h>
  10 #include <linux/pci.h>
  11 #include <linux/types.h>
  12 #include <asm/bootinfo.h>
  13 #include <asm/lasat/lasatint.h>
  14
  15 extern struct pci_ops nile4_pci_ops;
  16 extern struct pci_ops gt64xxx_pci0_ops;
  17 static struct resource lasat_pci_mem_resource = {
  18         .name   = "LASAT PCI MEM",
  19         .start  = 0x18000000,
  20         .end    = 0x19ffffff,
  21         .flags  = IORESOURCE_MEM,
  22 };
  23
  24 static struct resource lasat_pci_io_resource = {
  25         .name   = "LASAT PCI IO",
  26         .start  = 0x1a000000,
  27         .end    = 0x1bffffff,
  28         .flags  = IORESOURCE_IO,
  29 };
  30
  31 static struct pci_controller lasat_pci_controller = {
  32         .mem_resource   = &lasat_pci_mem_resource,
  33         .io_resource    = &lasat_pci_io_resource,
  34 };
  35
  36 static int __init lasat_pci_setup(void)
  37 {
  38         printk(KERN_DEBUG "PCI: starting\n");
  39
  40         switch (mips_machtype) {
  41         case MACH_LASAT_100:
  42                 lasat_pci_controller.pci_ops = &gt64xxx_pci0_ops;
  43                 break;
  44         case MACH_LASAT_200:
  45                 lasat_pci_controller.pci_ops = &nile4_pci_ops;
  46                 break;
  47         default:
  48                 panic("pcibios_init: mips_machtype incorrect");
  49         }
  50
  51         register_pci_controller(&lasat_pci_controller);
  52
  53         return 0;
  54 }
  55
  56 arch_initcall(lasat_pci_setup);
  57
  58 #define LASATINT_ETH1   (LASATINT_BASE + 0)
  59 #define LASATINT_ETH0   (LASATINT_BASE + 1)
  60 #define LASATINT_HDC    (LASATINT_BASE + 2)
  61 #define LASATINT_COMP   (LASATINT_BASE + 3)
  62 #define LASATINT_HDLC   (LASATINT_BASE + 4)
  63 #define LASATINT_PCIA   (LASATINT_BASE + 5)
  64 #define LASATINT_PCIB   (LASATINT_BASE + 6)
  65 #define LASATINT_PCIC   (LASATINT_BASE + 7)
  66 #define LASATINT_PCID   (LASATINT_BASE + 8)
  67
  68 int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  69 {
  70         switch (slot) {
  71         case 1:
  72         case 2:
  73         case 3:
  74                 return LASATINT_PCIA + (((slot-1) + (pin-1)) % 4);
  75         case 4:
  76                 return LASATINT_ETH1;   /* Ethernet 1 (LAN 2) */
  77         case 5:
  78                 return LASATINT_ETH0;   /* Ethernet 0 (LAN 1) */
  79         case 6:
  80                 return LASATINT_HDC;    /* IDE controller */
  81         default:
  82                 return 0xff;            /* Illegal */
  83         }
  84
  85         return -1;
  86 }
  87
  88 /* Do platform specific device initialization at pci_enable_device() time */
  89 int pcibios_plat_dev_init(struct pci_dev *dev)
  90 {
  91         return 0;
  92 }