b43: HT-PHY: implement lacking 0x908 PHY reg op
[linux-2.6/libata-dev.git] / drivers / net / wireless / b43 / phy_ht.c
blobf09bb6e6307f65399ffccbd54551282a3a4f5950
1 /*
3 Broadcom B43 wireless driver
4 IEEE 802.11n HT-PHY support
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; see the file COPYING. If not, write to
18 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
19 Boston, MA 02110-1301, USA.
23 #include <linux/slab.h>
25 #include "b43.h"
26 #include "phy_ht.h"
27 #include "tables_phy_ht.h"
28 #include "radio_2059.h"
29 #include "main.h"
31 static void b43_radio_2059_channel_setup(struct b43_wldev *dev,
32 const struct b43_phy_ht_channeltab_e_radio2059 *e)
34 u8 i;
35 u16 routing;
37 b43_radio_write(dev, 0x16, e->radio_syn16);
38 b43_radio_write(dev, 0x17, e->radio_syn17);
39 b43_radio_write(dev, 0x22, e->radio_syn22);
40 b43_radio_write(dev, 0x25, e->radio_syn25);
41 b43_radio_write(dev, 0x27, e->radio_syn27);
42 b43_radio_write(dev, 0x28, e->radio_syn28);
43 b43_radio_write(dev, 0x29, e->radio_syn29);
44 b43_radio_write(dev, 0x2c, e->radio_syn2c);
45 b43_radio_write(dev, 0x2d, e->radio_syn2d);
46 b43_radio_write(dev, 0x37, e->radio_syn37);
47 b43_radio_write(dev, 0x41, e->radio_syn41);
48 b43_radio_write(dev, 0x43, e->radio_syn43);
49 b43_radio_write(dev, 0x47, e->radio_syn47);
50 b43_radio_write(dev, 0x4a, e->radio_syn4a);
51 b43_radio_write(dev, 0x58, e->radio_syn58);
52 b43_radio_write(dev, 0x5a, e->radio_syn5a);
53 b43_radio_write(dev, 0x6a, e->radio_syn6a);
54 b43_radio_write(dev, 0x6d, e->radio_syn6d);
55 b43_radio_write(dev, 0x6e, e->radio_syn6e);
56 b43_radio_write(dev, 0x92, e->radio_syn92);
57 b43_radio_write(dev, 0x98, e->radio_syn98);
59 for (i = 0; i < 2; i++) {
60 routing = i ? 0x800 : 0x400;
61 b43_radio_write(dev, routing | 0x4a, e->radio_rxtx4a);
62 b43_radio_write(dev, routing | 0x58, e->radio_rxtx58);
63 b43_radio_write(dev, routing | 0x5a, e->radio_rxtx5a);
64 b43_radio_write(dev, routing | 0x6a, e->radio_rxtx6a);
65 b43_radio_write(dev, routing | 0x6d, e->radio_rxtx6d);
66 b43_radio_write(dev, routing | 0x6e, e->radio_rxtx6e);
67 b43_radio_write(dev, routing | 0x92, e->radio_rxtx92);
68 b43_radio_write(dev, routing | 0x98, e->radio_rxtx98);
71 udelay(50);
73 /* Calibration */
74 b43_radio_mask(dev, 0x2b, ~0x1);
75 b43_radio_mask(dev, 0x2e, ~0x4);
76 b43_radio_set(dev, 0x2e, 0x4);
77 b43_radio_set(dev, 0x2b, 0x1);
79 udelay(300);
82 static void b43_phy_ht_channel_setup(struct b43_wldev *dev,
83 const struct b43_phy_ht_channeltab_e_phy *e,
84 struct ieee80211_channel *new_channel)
86 bool old_band_5ghz;
87 u8 i;
89 old_band_5ghz = b43_phy_read(dev, B43_PHY_HT_BANDCTL) & 0; /* FIXME */
90 if (new_channel->band == IEEE80211_BAND_5GHZ && !old_band_5ghz) {
91 /* TODO */
92 } else if (new_channel->band == IEEE80211_BAND_2GHZ && old_band_5ghz) {
93 /* TODO */
96 b43_phy_write(dev, B43_PHY_HT_BW1, e->bw1);
97 b43_phy_write(dev, B43_PHY_HT_BW2, e->bw2);
98 b43_phy_write(dev, B43_PHY_HT_BW3, e->bw3);
99 b43_phy_write(dev, B43_PHY_HT_BW4, e->bw4);
100 b43_phy_write(dev, B43_PHY_HT_BW5, e->bw5);
101 b43_phy_write(dev, B43_PHY_HT_BW6, e->bw6);
103 /* TODO: some ops on PHY regs 0x0B0 and 0xC0A */
105 /* TODO: separated function? */
106 for (i = 0; i < 3; i++) {
107 u16 mask;
108 u32 tmp = b43_httab_read(dev, B43_HTTAB32(26, 0xE8));
110 if (0) /* FIXME */
111 mask = 0x2 << (i * 4);
112 else
113 mask = 0;
114 b43_phy_mask(dev, B43_PHY_EXTG(0x108), mask);
116 b43_httab_write(dev, B43_HTTAB16(7, 0x110 + i), tmp >> 16);
117 b43_httab_write(dev, B43_HTTAB8(13, 0x63 + (i * 4)),
118 tmp & 0xFF);
119 b43_httab_write(dev, B43_HTTAB8(13, 0x73 + (i * 4)),
120 tmp & 0xFF);
123 b43_phy_write(dev, 0x017e, 0x3830);
126 static int b43_phy_ht_set_channel(struct b43_wldev *dev,
127 struct ieee80211_channel *channel,
128 enum nl80211_channel_type channel_type)
130 struct b43_phy *phy = &dev->phy;
132 const struct b43_phy_ht_channeltab_e_radio2059 *chent_r2059 = NULL;
134 if (phy->radio_ver == 0x2059) {
135 chent_r2059 = b43_phy_ht_get_channeltab_e_r2059(dev,
136 channel->center_freq);
137 if (!chent_r2059)
138 return -ESRCH;
139 } else {
140 return -ESRCH;
143 /* TODO: In case of N-PHY some bandwidth switching goes here */
145 if (phy->radio_ver == 0x2059) {
146 b43_radio_2059_channel_setup(dev, chent_r2059);
147 b43_phy_ht_channel_setup(dev, &(chent_r2059->phy_regs),
148 channel);
149 } else {
150 return -ESRCH;
153 return 0;
156 /**************************************************
157 * Basic PHY ops.
158 **************************************************/
160 static int b43_phy_ht_op_allocate(struct b43_wldev *dev)
162 struct b43_phy_ht *phy_ht;
164 phy_ht = kzalloc(sizeof(*phy_ht), GFP_KERNEL);
165 if (!phy_ht)
166 return -ENOMEM;
167 dev->phy.ht = phy_ht;
169 return 0;
172 static void b43_phy_ht_op_prepare_structs(struct b43_wldev *dev)
174 struct b43_phy *phy = &dev->phy;
175 struct b43_phy_ht *phy_ht = phy->ht;
177 memset(phy_ht, 0, sizeof(*phy_ht));
180 static void b43_phy_ht_op_free(struct b43_wldev *dev)
182 struct b43_phy *phy = &dev->phy;
183 struct b43_phy_ht *phy_ht = phy->ht;
185 kfree(phy_ht);
186 phy->ht = NULL;
189 /* http://bcm-v4.sipsolutions.net/802.11/Radio/Switch%20Radio */
190 static void b43_phy_ht_op_software_rfkill(struct b43_wldev *dev,
191 bool blocked)
193 if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED)
194 b43err(dev->wl, "MAC not suspended\n");
196 if (blocked) {
197 b43_phy_mask(dev, B43_PHY_HT_RF_CTL1, ~0);
198 } else {
199 b43_phy_mask(dev, B43_PHY_HT_RF_CTL1, ~0);
200 b43_phy_maskset(dev, B43_PHY_HT_RF_CTL1, ~0, 0x1);
201 b43_phy_mask(dev, B43_PHY_HT_RF_CTL1, ~0);
202 b43_phy_maskset(dev, B43_PHY_HT_RF_CTL1, ~0, 0x2);
206 static void b43_phy_ht_op_switch_analog(struct b43_wldev *dev, bool on)
208 if (on) {
209 b43_phy_write(dev, B43_PHY_HT_AFE_CTL2, 0x00cd);
210 b43_phy_write(dev, B43_PHY_HT_AFE_CTL1, 0x0000);
211 b43_phy_write(dev, B43_PHY_HT_AFE_CTL4, 0x00cd);
212 b43_phy_write(dev, B43_PHY_HT_AFE_CTL3, 0x0000);
213 b43_phy_write(dev, B43_PHY_HT_AFE_CTL6, 0x00cd);
214 b43_phy_write(dev, B43_PHY_HT_AFE_CTL5, 0x0000);
215 } else {
216 b43_phy_write(dev, B43_PHY_HT_AFE_CTL1, 0x07ff);
217 b43_phy_write(dev, B43_PHY_HT_AFE_CTL2, 0x00fd);
218 b43_phy_write(dev, B43_PHY_HT_AFE_CTL3, 0x07ff);
219 b43_phy_write(dev, B43_PHY_HT_AFE_CTL4, 0x00fd);
220 b43_phy_write(dev, B43_PHY_HT_AFE_CTL5, 0x07ff);
221 b43_phy_write(dev, B43_PHY_HT_AFE_CTL6, 0x00fd);
225 static int b43_phy_ht_op_switch_channel(struct b43_wldev *dev,
226 unsigned int new_channel)
228 struct ieee80211_channel *channel = dev->wl->hw->conf.channel;
229 enum nl80211_channel_type channel_type = dev->wl->hw->conf.channel_type;
231 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
232 if ((new_channel < 1) || (new_channel > 14))
233 return -EINVAL;
234 } else {
235 return -EINVAL;
238 return b43_phy_ht_set_channel(dev, channel, channel_type);
241 static unsigned int b43_phy_ht_op_get_default_chan(struct b43_wldev *dev)
243 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
244 return 1;
245 return 36;
248 /**************************************************
249 * R/W ops.
250 **************************************************/
252 static u16 b43_phy_ht_op_read(struct b43_wldev *dev, u16 reg)
254 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
255 return b43_read16(dev, B43_MMIO_PHY_DATA);
258 static void b43_phy_ht_op_write(struct b43_wldev *dev, u16 reg, u16 value)
260 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
261 b43_write16(dev, B43_MMIO_PHY_DATA, value);
264 static void b43_phy_ht_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
265 u16 set)
267 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
268 b43_write16(dev, B43_MMIO_PHY_DATA,
269 (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) | set);
272 static u16 b43_phy_ht_op_radio_read(struct b43_wldev *dev, u16 reg)
274 /* HT-PHY needs 0x200 for read access */
275 reg |= 0x200;
277 b43_write16(dev, B43_MMIO_RADIO24_CONTROL, reg);
278 return b43_read16(dev, B43_MMIO_RADIO24_DATA);
281 static void b43_phy_ht_op_radio_write(struct b43_wldev *dev, u16 reg,
282 u16 value)
284 b43_write16(dev, B43_MMIO_RADIO24_CONTROL, reg);
285 b43_write16(dev, B43_MMIO_RADIO24_DATA, value);
288 /**************************************************
289 * PHY ops struct.
290 **************************************************/
292 const struct b43_phy_operations b43_phyops_ht = {
293 .allocate = b43_phy_ht_op_allocate,
294 .free = b43_phy_ht_op_free,
295 .prepare_structs = b43_phy_ht_op_prepare_structs,
297 .init = b43_phy_ht_op_init,
299 .phy_read = b43_phy_ht_op_read,
300 .phy_write = b43_phy_ht_op_write,
301 .phy_maskset = b43_phy_ht_op_maskset,
302 .radio_read = b43_phy_ht_op_radio_read,
303 .radio_write = b43_phy_ht_op_radio_write,
304 .software_rfkill = b43_phy_ht_op_software_rfkill,
305 .switch_analog = b43_phy_ht_op_switch_analog,
306 .switch_channel = b43_phy_ht_op_switch_channel,
307 .get_default_chan = b43_phy_ht_op_get_default_chan,
309 .recalc_txpower = b43_phy_ht_op_recalc_txpower,
310 .adjust_txpower = b43_phy_ht_op_adjust_txpower,