1 /* linux/drivers/i2c/busses/i2c-s3c2410.c
3 * Copyright (C) 2004,2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2410 I2C Controller
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/kernel.h>
24 #include <linux/module.h>
26 #include <linux/i2c.h>
27 #include <linux/i2c-id.h>
28 #include <linux/init.h>
29 #include <linux/time.h>
30 #include <linux/interrupt.h>
31 #include <linux/delay.h>
32 #include <linux/errno.h>
33 #include <linux/err.h>
34 #include <linux/platform_device.h>
35 #include <linux/clk.h>
37 #include <asm/arch/hardware.h>
41 #include <asm/arch/regs-gpio.h>
42 #include <asm/plat-s3c/regs-iic.h>
43 #include <asm/plat-s3c/iic.h>
45 /* i2c controller state */
47 enum s3c24xx_i2c_state
{
57 wait_queue_head_t wait
;
64 unsigned int tx_setup
;
66 enum s3c24xx_i2c_state state
;
72 struct resource
*ioarea
;
73 struct i2c_adapter adap
;
76 /* default platform data to use if not supplied in the platform_device
79 static struct s3c2410_platform_i2c s3c24xx_i2c_default_platform
= {
84 .sda_delay
= S3C2410_IICLC_SDA_DELAY5
| S3C2410_IICLC_FILTER_ON
,
87 /* s3c24xx_i2c_is2440()
89 * return true is this is an s3c2440
92 static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c
*i2c
)
94 struct platform_device
*pdev
= to_platform_device(i2c
->dev
);
96 return !strcmp(pdev
->name
, "s3c2440-i2c");
100 /* s3c24xx_i2c_get_platformdata
102 * get the platform data associated with the given device, or return
103 * the default if there is none
106 static inline struct s3c2410_platform_i2c
*s3c24xx_i2c_get_platformdata(struct device
*dev
)
108 if (dev
->platform_data
!= NULL
)
109 return (struct s3c2410_platform_i2c
*)dev
->platform_data
;
111 return &s3c24xx_i2c_default_platform
;
114 /* s3c24xx_i2c_master_complete
116 * complete the message and wake up the caller, using the given return code,
117 * or zero to mean ok.
120 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c
*i2c
, int ret
)
122 dev_dbg(i2c
->dev
, "master_complete %d\n", ret
);
134 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c
*i2c
)
138 tmp
= readl(i2c
->regs
+ S3C2410_IICCON
);
139 writel(tmp
& ~S3C2410_IICCON_ACKEN
, i2c
->regs
+ S3C2410_IICCON
);
143 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c
*i2c
)
147 tmp
= readl(i2c
->regs
+ S3C2410_IICCON
);
148 writel(tmp
| S3C2410_IICCON_ACKEN
, i2c
->regs
+ S3C2410_IICCON
);
152 /* irq enable/disable functions */
154 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c
*i2c
)
158 tmp
= readl(i2c
->regs
+ S3C2410_IICCON
);
159 writel(tmp
& ~S3C2410_IICCON_IRQEN
, i2c
->regs
+ S3C2410_IICCON
);
162 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c
*i2c
)
166 tmp
= readl(i2c
->regs
+ S3C2410_IICCON
);
167 writel(tmp
| S3C2410_IICCON_IRQEN
, i2c
->regs
+ S3C2410_IICCON
);
171 /* s3c24xx_i2c_message_start
173 * put the start of a message onto the bus
176 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c
*i2c
,
179 unsigned int addr
= (msg
->addr
& 0x7f) << 1;
181 unsigned long iiccon
;
184 stat
|= S3C2410_IICSTAT_TXRXEN
;
186 if (msg
->flags
& I2C_M_RD
) {
187 stat
|= S3C2410_IICSTAT_MASTER_RX
;
190 stat
|= S3C2410_IICSTAT_MASTER_TX
;
192 if (msg
->flags
& I2C_M_REV_DIR_ADDR
)
195 // todo - check for wether ack wanted or not
196 s3c24xx_i2c_enable_ack(i2c
);
198 iiccon
= readl(i2c
->regs
+ S3C2410_IICCON
);
199 writel(stat
, i2c
->regs
+ S3C2410_IICSTAT
);
201 dev_dbg(i2c
->dev
, "START: %08lx to IICSTAT, %02x to DS\n", stat
, addr
);
202 writeb(addr
, i2c
->regs
+ S3C2410_IICDS
);
204 /* delay here to ensure the data byte has gotten onto the bus
205 * before the transaction is started */
207 ndelay(i2c
->tx_setup
);
209 dev_dbg(i2c
->dev
, "iiccon, %08lx\n", iiccon
);
210 writel(iiccon
, i2c
->regs
+ S3C2410_IICCON
);
212 stat
|= S3C2410_IICSTAT_START
;
213 writel(stat
, i2c
->regs
+ S3C2410_IICSTAT
);
216 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c
*i2c
, int ret
)
218 unsigned long iicstat
= readl(i2c
->regs
+ S3C2410_IICSTAT
);
220 dev_dbg(i2c
->dev
, "STOP\n");
222 /* stop the transfer */
223 iicstat
&= ~ S3C2410_IICSTAT_START
;
224 writel(iicstat
, i2c
->regs
+ S3C2410_IICSTAT
);
226 i2c
->state
= STATE_STOP
;
228 s3c24xx_i2c_master_complete(i2c
, ret
);
229 s3c24xx_i2c_disable_irq(i2c
);
232 /* helper functions to determine the current state in the set of
233 * messages we are sending */
237 * returns TRUE if the current message is the last in the set
240 static inline int is_lastmsg(struct s3c24xx_i2c
*i2c
)
242 return i2c
->msg_idx
>= (i2c
->msg_num
- 1);
247 * returns TRUE if we this is the last byte in the current message
250 static inline int is_msglast(struct s3c24xx_i2c
*i2c
)
252 return i2c
->msg_ptr
== i2c
->msg
->len
-1;
257 * returns TRUE if we reached the end of the current message
260 static inline int is_msgend(struct s3c24xx_i2c
*i2c
)
262 return i2c
->msg_ptr
>= i2c
->msg
->len
;
265 /* i2s_s3c_irq_nextbyte
267 * process an interrupt and work out what to do
270 static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c
*i2c
, unsigned long iicstat
)
276 switch (i2c
->state
) {
279 dev_err(i2c
->dev
, "%s: called in STATE_IDLE\n", __func__
);
284 dev_err(i2c
->dev
, "%s: called in STATE_STOP\n", __func__
);
285 s3c24xx_i2c_disable_irq(i2c
);
289 /* last thing we did was send a start condition on the
290 * bus, or started a new i2c message
293 if (iicstat
& S3C2410_IICSTAT_LASTBIT
&&
294 !(i2c
->msg
->flags
& I2C_M_IGNORE_NAK
)) {
295 /* ack was not received... */
297 dev_dbg(i2c
->dev
, "ack was not received\n");
298 s3c24xx_i2c_stop(i2c
, -ENXIO
);
302 if (i2c
->msg
->flags
& I2C_M_RD
)
303 i2c
->state
= STATE_READ
;
305 i2c
->state
= STATE_WRITE
;
307 /* terminate the transfer if there is nothing to do
308 * as this is used by the i2c probe to find devices. */
310 if (is_lastmsg(i2c
) && i2c
->msg
->len
== 0) {
311 s3c24xx_i2c_stop(i2c
, 0);
315 if (i2c
->state
== STATE_READ
)
318 /* fall through to the write state, as we will need to
319 * send a byte as well */
322 /* we are writing data to the device... check for the
323 * end of the message, and if so, work out what to do
326 if (!(i2c
->msg
->flags
& I2C_M_IGNORE_NAK
)) {
327 if (iicstat
& S3C2410_IICSTAT_LASTBIT
) {
328 dev_dbg(i2c
->dev
, "WRITE: No Ack\n");
330 s3c24xx_i2c_stop(i2c
, -ECONNREFUSED
);
337 if (!is_msgend(i2c
)) {
338 byte
= i2c
->msg
->buf
[i2c
->msg_ptr
++];
339 writeb(byte
, i2c
->regs
+ S3C2410_IICDS
);
341 /* delay after writing the byte to allow the
342 * data setup time on the bus, as writing the
343 * data to the register causes the first bit
344 * to appear on SDA, and SCL will change as
345 * soon as the interrupt is acknowledged */
347 ndelay(i2c
->tx_setup
);
349 } else if (!is_lastmsg(i2c
)) {
350 /* we need to go to the next i2c message */
352 dev_dbg(i2c
->dev
, "WRITE: Next Message\n");
358 /* check to see if we need to do another message */
359 if (i2c
->msg
->flags
& I2C_M_NOSTART
) {
361 if (i2c
->msg
->flags
& I2C_M_RD
) {
362 /* cannot do this, the controller
363 * forces us to send a new START
364 * when we change direction */
366 s3c24xx_i2c_stop(i2c
, -EINVAL
);
372 /* send the new start */
373 s3c24xx_i2c_message_start(i2c
, i2c
->msg
);
374 i2c
->state
= STATE_START
;
380 s3c24xx_i2c_stop(i2c
, 0);
385 /* we have a byte of data in the data register, do
386 * something with it, and then work out wether we are
387 * going to do any more read/write
390 byte
= readb(i2c
->regs
+ S3C2410_IICDS
);
391 i2c
->msg
->buf
[i2c
->msg_ptr
++] = byte
;
394 if (is_msglast(i2c
)) {
395 /* last byte of buffer */
398 s3c24xx_i2c_disable_ack(i2c
);
400 } else if (is_msgend(i2c
)) {
401 /* ok, we've read the entire buffer, see if there
402 * is anything else we need to do */
404 if (is_lastmsg(i2c
)) {
405 /* last message, send stop and complete */
406 dev_dbg(i2c
->dev
, "READ: Send Stop\n");
408 s3c24xx_i2c_stop(i2c
, 0);
410 /* go to the next transfer */
411 dev_dbg(i2c
->dev
, "READ: Next Transfer\n");
422 /* acknowlegde the IRQ and get back on with the work */
425 tmp
= readl(i2c
->regs
+ S3C2410_IICCON
);
426 tmp
&= ~S3C2410_IICCON_IRQPEND
;
427 writel(tmp
, i2c
->regs
+ S3C2410_IICCON
);
434 * top level IRQ servicing routine
437 static irqreturn_t
s3c24xx_i2c_irq(int irqno
, void *dev_id
)
439 struct s3c24xx_i2c
*i2c
= dev_id
;
440 unsigned long status
;
443 status
= readl(i2c
->regs
+ S3C2410_IICSTAT
);
445 if (status
& S3C2410_IICSTAT_ARBITR
) {
446 // deal with arbitration loss
447 dev_err(i2c
->dev
, "deal with arbitration loss\n");
450 if (i2c
->state
== STATE_IDLE
) {
451 dev_dbg(i2c
->dev
, "IRQ: error i2c->state == IDLE\n");
453 tmp
= readl(i2c
->regs
+ S3C2410_IICCON
);
454 tmp
&= ~S3C2410_IICCON_IRQPEND
;
455 writel(tmp
, i2c
->regs
+ S3C2410_IICCON
);
459 /* pretty much this leaves us with the fact that we've
460 * transmitted or received whatever byte we last sent */
462 i2s_s3c_irq_nextbyte(i2c
, status
);
469 /* s3c24xx_i2c_set_master
471 * get the i2c bus for a master transaction
474 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c
*i2c
)
476 unsigned long iicstat
;
479 while (timeout
-- > 0) {
480 iicstat
= readl(i2c
->regs
+ S3C2410_IICSTAT
);
482 if (!(iicstat
& S3C2410_IICSTAT_BUSBUSY
))
488 dev_dbg(i2c
->dev
, "timeout: GPEDAT is %08x\n",
489 __raw_readl(S3C2410_GPEDAT
));
494 /* s3c24xx_i2c_doxfer
496 * this starts an i2c transfer
499 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c
*i2c
, struct i2c_msg
*msgs
, int num
)
501 unsigned long timeout
;
504 ret
= s3c24xx_i2c_set_master(i2c
);
506 dev_err(i2c
->dev
, "cannot get bus (error %d)\n", ret
);
511 spin_lock_irq(&i2c
->lock
);
517 i2c
->state
= STATE_START
;
519 s3c24xx_i2c_enable_irq(i2c
);
520 s3c24xx_i2c_message_start(i2c
, msgs
);
521 spin_unlock_irq(&i2c
->lock
);
523 timeout
= wait_event_timeout(i2c
->wait
, i2c
->msg_num
== 0, HZ
* 5);
527 /* having these next two as dev_err() makes life very
528 * noisy when doing an i2cdetect */
531 dev_dbg(i2c
->dev
, "timeout\n");
533 dev_dbg(i2c
->dev
, "incomplete xfer (%d)\n", ret
);
535 /* ensure the stop has been through the bus */
545 * first port of call from the i2c bus code when an message needs
546 * transferring across the i2c bus.
549 static int s3c24xx_i2c_xfer(struct i2c_adapter
*adap
,
550 struct i2c_msg
*msgs
, int num
)
552 struct s3c24xx_i2c
*i2c
= (struct s3c24xx_i2c
*)adap
->algo_data
;
556 for (retry
= 0; retry
< adap
->retries
; retry
++) {
558 ret
= s3c24xx_i2c_doxfer(i2c
, msgs
, num
);
563 dev_dbg(i2c
->dev
, "Retrying transmission (%d)\n", retry
);
571 /* declare our i2c functionality */
572 static u32
s3c24xx_i2c_func(struct i2c_adapter
*adap
)
574 return I2C_FUNC_I2C
| I2C_FUNC_SMBUS_EMUL
| I2C_FUNC_PROTOCOL_MANGLING
;
577 /* i2c bus registration info */
579 static const struct i2c_algorithm s3c24xx_i2c_algorithm
= {
580 .master_xfer
= s3c24xx_i2c_xfer
,
581 .functionality
= s3c24xx_i2c_func
,
584 static struct s3c24xx_i2c s3c24xx_i2c
= {
585 .lock
= __SPIN_LOCK_UNLOCKED(s3c24xx_i2c
.lock
),
586 .wait
= __WAIT_QUEUE_HEAD_INITIALIZER(s3c24xx_i2c
.wait
),
589 .name
= "s3c2410-i2c",
590 .owner
= THIS_MODULE
,
591 .algo
= &s3c24xx_i2c_algorithm
,
593 .class = I2C_CLASS_HWMON
| I2C_CLASS_SPD
,
597 /* s3c24xx_i2c_calcdivisor
599 * return the divisor settings for a given frequency
602 static int s3c24xx_i2c_calcdivisor(unsigned long clkin
, unsigned int wanted
,
603 unsigned int *div1
, unsigned int *divs
)
605 unsigned int calc_divs
= clkin
/ wanted
;
606 unsigned int calc_div1
;
608 if (calc_divs
> (16*16))
613 calc_divs
+= calc_div1
-1;
614 calc_divs
/= calc_div1
;
624 return clkin
/ (calc_divs
* calc_div1
);
629 * test wether a frequency is within the acceptable range of error
632 static inline int freq_acceptable(unsigned int freq
, unsigned int wanted
)
634 int diff
= freq
- wanted
;
636 return (diff
>= -2 && diff
<= 2);
639 /* s3c24xx_i2c_getdivisor
641 * work out a divisor for the user requested frequency setting,
642 * either by the requested frequency, or scanning the acceptable
643 * range of frequencies until something is found
646 static int s3c24xx_i2c_getdivisor(struct s3c24xx_i2c
*i2c
,
647 struct s3c2410_platform_i2c
*pdata
,
648 unsigned long *iicon
,
651 unsigned long clkin
= clk_get_rate(i2c
->clk
);
653 unsigned int divs
, div1
;
657 clkin
/= 1000; /* clkin now in KHz */
659 dev_dbg(i2c
->dev
, "pdata %p, freq %lu %lu..%lu\n",
660 pdata
, pdata
->bus_freq
, pdata
->min_freq
, pdata
->max_freq
);
662 if (pdata
->bus_freq
!= 0) {
663 freq
= s3c24xx_i2c_calcdivisor(clkin
, pdata
->bus_freq
/1000,
665 if (freq_acceptable(freq
, pdata
->bus_freq
/1000))
669 /* ok, we may have to search for something suitable... */
671 start
= (pdata
->max_freq
== 0) ? pdata
->bus_freq
: pdata
->max_freq
;
672 end
= pdata
->min_freq
;
679 for (; start
> end
; start
--) {
680 freq
= s3c24xx_i2c_calcdivisor(clkin
, start
, &div1
, &divs
);
681 if (freq_acceptable(freq
, start
))
685 /* cannot find frequency spec */
692 *iicon
|= (div1
== 512) ? S3C2410_IICCON_TXDIV_512
: 0;
698 * initialise the controller, set the IO lines and frequency
701 static int s3c24xx_i2c_init(struct s3c24xx_i2c
*i2c
)
703 unsigned long iicon
= S3C2410_IICCON_IRQEN
| S3C2410_IICCON_ACKEN
;
704 struct s3c2410_platform_i2c
*pdata
;
707 /* get the plafrom data */
709 pdata
= s3c24xx_i2c_get_platformdata(i2c
->adap
.dev
.parent
);
711 /* inititalise the gpio */
713 s3c2410_gpio_cfgpin(S3C2410_GPE15
, S3C2410_GPE15_IICSDA
);
714 s3c2410_gpio_cfgpin(S3C2410_GPE14
, S3C2410_GPE14_IICSCL
);
716 /* write slave address */
718 writeb(pdata
->slave_addr
, i2c
->regs
+ S3C2410_IICADD
);
720 dev_info(i2c
->dev
, "slave address 0x%02x\n", pdata
->slave_addr
);
722 /* we need to work out the divisors for the clock... */
724 if (s3c24xx_i2c_getdivisor(i2c
, pdata
, &iicon
, &freq
) != 0) {
725 dev_err(i2c
->dev
, "cannot meet bus frequency required\n");
729 /* todo - check that the i2c lines aren't being dragged anywhere */
731 dev_info(i2c
->dev
, "bus frequency set to %d KHz\n", freq
);
732 dev_dbg(i2c
->dev
, "S3C2410_IICCON=0x%02lx\n", iicon
);
734 writel(iicon
, i2c
->regs
+ S3C2410_IICCON
);
736 /* check for s3c2440 i2c controller */
738 if (s3c24xx_i2c_is2440(i2c
)) {
739 dev_dbg(i2c
->dev
, "S3C2440_IICLC=%08x\n", pdata
->sda_delay
);
741 writel(pdata
->sda_delay
, i2c
->regs
+ S3C2440_IICLC
);
749 * called by the bus driver when a suitable device is found
752 static int s3c24xx_i2c_probe(struct platform_device
*pdev
)
754 struct s3c24xx_i2c
*i2c
= &s3c24xx_i2c
;
755 struct resource
*res
;
758 /* find the clock and enable it */
760 i2c
->dev
= &pdev
->dev
;
761 i2c
->clk
= clk_get(&pdev
->dev
, "i2c");
762 if (IS_ERR(i2c
->clk
)) {
763 dev_err(&pdev
->dev
, "cannot get clock\n");
768 dev_dbg(&pdev
->dev
, "clock source %p\n", i2c
->clk
);
770 clk_enable(i2c
->clk
);
772 /* map the registers */
774 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
776 dev_err(&pdev
->dev
, "cannot find IO resource\n");
781 i2c
->ioarea
= request_mem_region(res
->start
, (res
->end
-res
->start
)+1,
784 if (i2c
->ioarea
== NULL
) {
785 dev_err(&pdev
->dev
, "cannot request IO\n");
790 i2c
->regs
= ioremap(res
->start
, (res
->end
-res
->start
)+1);
792 if (i2c
->regs
== NULL
) {
793 dev_err(&pdev
->dev
, "cannot map IO\n");
798 dev_dbg(&pdev
->dev
, "registers %p (%p, %p)\n", i2c
->regs
, i2c
->ioarea
, res
);
800 /* setup info block for the i2c core */
802 i2c
->adap
.algo_data
= i2c
;
803 i2c
->adap
.dev
.parent
= &pdev
->dev
;
805 /* initialise the i2c controller */
807 ret
= s3c24xx_i2c_init(i2c
);
811 /* find the IRQ for this unit (note, this relies on the init call to
812 * ensure no current IRQs pending
815 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
817 dev_err(&pdev
->dev
, "cannot find IRQ\n");
822 ret
= request_irq(res
->start
, s3c24xx_i2c_irq
, IRQF_DISABLED
,
826 dev_err(&pdev
->dev
, "cannot claim IRQ\n");
832 dev_dbg(&pdev
->dev
, "irq resource %p (%lu)\n", res
,
833 (unsigned long)res
->start
);
835 ret
= i2c_add_adapter(&i2c
->adap
);
837 dev_err(&pdev
->dev
, "failed to add bus to i2c core\n");
841 platform_set_drvdata(pdev
, i2c
);
843 dev_info(&pdev
->dev
, "%s: S3C I2C adapter\n", i2c
->adap
.dev
.bus_id
);
847 free_irq(i2c
->irq
->start
, i2c
);
853 release_resource(i2c
->ioarea
);
857 clk_disable(i2c
->clk
);
864 /* s3c24xx_i2c_remove
866 * called when device is removed from the bus
869 static int s3c24xx_i2c_remove(struct platform_device
*pdev
)
871 struct s3c24xx_i2c
*i2c
= platform_get_drvdata(pdev
);
873 i2c_del_adapter(&i2c
->adap
);
874 free_irq(i2c
->irq
->start
, i2c
);
876 clk_disable(i2c
->clk
);
881 release_resource(i2c
->ioarea
);
888 static int s3c24xx_i2c_resume(struct platform_device
*dev
)
890 struct s3c24xx_i2c
*i2c
= platform_get_drvdata(dev
);
893 s3c24xx_i2c_init(i2c
);
899 #define s3c24xx_i2c_resume NULL
902 /* device driver for platform bus bits */
904 static struct platform_driver s3c2410_i2c_driver
= {
905 .probe
= s3c24xx_i2c_probe
,
906 .remove
= s3c24xx_i2c_remove
,
907 .resume
= s3c24xx_i2c_resume
,
909 .owner
= THIS_MODULE
,
910 .name
= "s3c2410-i2c",
914 static struct platform_driver s3c2440_i2c_driver
= {
915 .probe
= s3c24xx_i2c_probe
,
916 .remove
= s3c24xx_i2c_remove
,
917 .resume
= s3c24xx_i2c_resume
,
919 .owner
= THIS_MODULE
,
920 .name
= "s3c2440-i2c",
924 static int __init
i2c_adap_s3c_init(void)
928 ret
= platform_driver_register(&s3c2410_i2c_driver
);
930 ret
= platform_driver_register(&s3c2440_i2c_driver
);
932 platform_driver_unregister(&s3c2410_i2c_driver
);
938 static void __exit
i2c_adap_s3c_exit(void)
940 platform_driver_unregister(&s3c2410_i2c_driver
);
941 platform_driver_unregister(&s3c2440_i2c_driver
);
944 module_init(i2c_adap_s3c_init
);
945 module_exit(i2c_adap_s3c_exit
);
947 MODULE_DESCRIPTION("S3C24XX I2C Bus driver");
948 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
949 MODULE_LICENSE("GPL");
950 MODULE_ALIAS("platform:s3c2410-i2c");
951 MODULE_ALIAS("platform:s3c2440-i2c");