arch/x86/kernel/devicetree.c

   1 /*
   2  * Architecture specific OF callbacks.
   3  */
   4 #include <linux/bootmem.h>
   5 #include <linux/io.h>
   6 #include <linux/interrupt.h>
   7 #include <linux/list.h>
   8 #include <linux/of.h>
   9 #include <linux/of_fdt.h>
  10 #include <linux/of_address.h>
  11 #include <linux/of_platform.h>
  12 #include <linux/of_irq.h>
  13 #include <linux/slab.h>
  14 #include <linux/pci.h>
  15 #include <linux/of_pci.h>
  16
  17 #include <asm/hpet.h>
  18 #include <asm/irq_controller.h>
  19 #include <asm/apic.h>
  20 #include <asm/pci_x86.h>
  21
  22 __initdata u64 initial_dtb;
  23 char __initdata cmd_line[COMMAND_LINE_SIZE];
  24 static LIST_HEAD(irq_domains);
  25 static DEFINE_RAW_SPINLOCK(big_irq_lock);
  26
  27 int __initdata of_ioapic;
  28
  29 void add_interrupt_host(struct irq_domain *ih)
  30 {
  31         unsigned long flags;
  32
  33         raw_spin_lock_irqsave(&big_irq_lock, flags);
  34         list_add(&ih->l, &irq_domains);
  35         raw_spin_unlock_irqrestore(&big_irq_lock, flags);
  36 }
  37
  38 static struct irq_domain *get_ih_from_node(struct device_node *controller)
  39 {
  40         struct irq_domain *ih, *found = NULL;
  41         unsigned long flags;
  42
  43         raw_spin_lock_irqsave(&big_irq_lock, flags);
  44         list_for_each_entry(ih, &irq_domains, l) {
  45                 if (ih->controller ==  controller) {
  46                         found = ih;
  47                         break;
  48                 }
  49         }
  50         raw_spin_unlock_irqrestore(&big_irq_lock, flags);
  51         return found;
  52 }
  53
  54 unsigned int irq_create_of_mapping(struct device_node *controller,
  55                                    const u32 *intspec, unsigned int intsize)
  56 {
  57         struct irq_domain *ih;
  58         u32 virq, type;
  59         int ret;
  60
  61         ih = get_ih_from_node(controller);
  62         if (!ih)
  63                 return 0;
  64         ret = ih->xlate(ih, intspec, intsize, &virq, &type);
  65         if (ret)
  66                 return ret;
  67         if (type == IRQ_TYPE_NONE)
  68                 return virq;
  69         /* set the mask if it is different from current */
  70         if (type == (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK))
  71                 set_irq_type(virq, type);
  72         return virq;
  73 }
  74 EXPORT_SYMBOL_GPL(irq_create_of_mapping);
  75
  76 unsigned long pci_address_to_pio(phys_addr_t address)
  77 {
  78         /*
  79          * The ioport address can be directly used by inX / outX
  80          */
  81         BUG_ON(address >= (1 << 16));
  82         return (unsigned long)address;
  83 }
  84 EXPORT_SYMBOL_GPL(pci_address_to_pio);
  85
  86 void __init early_init_dt_scan_chosen_arch(unsigned long node)
  87 {
  88         BUG();
  89 }
  90
  91 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
  92 {
  93         BUG();
  94 }
  95
  96 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
  97 {
  98         return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
  99 }
 100
 101 void __init add_dtb(u64 data)
 102 {
 103         initial_dtb = data + offsetof(struct setup_data, data);
 104 }
 105
 106 /*
 107  * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
 108  */
 109 static struct of_device_id __initdata ce4100_ids[] = {
 110         { .compatible = "intel,ce4100-cp", },
 111         { .compatible = "isa", },
 112         { .compatible = "pci", },
 113         {},
 114 };
 115
 116 static int __init add_bus_probe(void)
 117 {
 118         if (!initial_boot_params)
 119                 return 0;
 120
 121         return of_platform_bus_probe(NULL, ce4100_ids, NULL);
 122 }
 123 module_init(add_bus_probe);
 124
 125 #ifdef CONFIG_PCI
 126 static int x86_of_pci_irq_enable(struct pci_dev *dev)
 127 {
 128         struct of_irq oirq;
 129         u32 virq;
 130         int ret;
 131         u8 pin;
 132
 133         ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
 134         if (ret)
 135                 return ret;
 136         if (!pin)
 137                 return 0;
 138
 139         ret = of_irq_map_pci(dev, &oirq);
 140         if (ret)
 141                 return ret;
 142
 143         virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
 144                         oirq.size);
 145         if (virq == 0)
 146                 return -EINVAL;
 147         dev->irq = virq;
 148         return 0;
 149 }
 150
 151 static void x86_of_pci_irq_disable(struct pci_dev *dev)
 152 {
 153 }
 154
 155 void __cpuinit x86_of_pci_init(void)
 156 {
 157         struct device_node *np;
 158
 159         pcibios_enable_irq = x86_of_pci_irq_enable;
 160         pcibios_disable_irq = x86_of_pci_irq_disable;
 161
 162         for_each_node_by_type(np, "pci") {
 163                 const void *prop;
 164                 struct pci_bus *bus;
 165                 unsigned int bus_min;
 166                 struct device_node *child;
 167
 168                 prop = of_get_property(np, "bus-range", NULL);
 169                 if (!prop)
 170                         continue;
 171                 bus_min = be32_to_cpup(prop);
 172
 173                 bus = pci_find_bus(0, bus_min);
 174                 if (!bus) {
 175                         printk(KERN_ERR "Can't find a node for bus %s.\n",
 176                                         np->full_name);
 177                         continue;
 178                 }
 179
 180                 if (bus->self)
 181                         bus->self->dev.of_node = np;
 182                 else
 183                         bus->dev.of_node = np;
 184
 185                 for_each_child_of_node(np, child) {
 186                         struct pci_dev *dev;
 187                         u32 devfn;
 188
 189                         prop = of_get_property(child, "reg", NULL);
 190                         if (!prop)
 191                                 continue;
 192
 193                         devfn = (be32_to_cpup(prop) >> 8) & 0xff;
 194                         dev = pci_get_slot(bus, devfn);
 195                         if (!dev)
 196                                 continue;
 197                         dev->dev.of_node = child;
 198                         pci_dev_put(dev);
 199                 }
 200         }
 201 }
 202 #endif
 203
 204 static void __init dtb_setup_hpet(void)
 205 {
 206         struct device_node *dn;
 207         struct resource r;
 208         int ret;
 209
 210         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
 211         if (!dn)
 212                 return;
 213         ret = of_address_to_resource(dn, 0, &r);
 214         if (ret) {
 215                 WARN_ON(1);
 216                 return;
 217         }
 218         hpet_address = r.start;
 219 }
 220
 221 static void __init dtb_lapic_setup(void)
 222 {
 223 #ifdef CONFIG_X86_LOCAL_APIC
 224         if (apic_force_enable())
 225                 return;
 226
 227         smp_found_config = 1;
 228         pic_mode = 1;
 229         /* Required for ioapic registration */
 230         set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
 231         if (boot_cpu_physical_apicid == -1U)
 232                 boot_cpu_physical_apicid = read_apic_id();
 233
 234         generic_processor_info(boot_cpu_physical_apicid,
 235                         GET_APIC_VERSION(apic_read(APIC_LVR)));
 236 #endif
 237 }
 238
 239 #ifdef CONFIG_X86_IO_APIC
 240 static unsigned int ioapic_id;
 241
 242 static void __init dtb_add_ioapic(struct device_node *dn)
 243 {
 244         struct resource r;
 245         int ret;
 246
 247         ret = of_address_to_resource(dn, 0, &r);
 248         if (ret) {
 249                 printk(KERN_ERR "Can't obtain address from node %s.\n",
 250                                 dn->full_name);
 251                 return;
 252         }
 253         mp_register_ioapic(++ioapic_id, r.start, gsi_top);
 254 }
 255
 256 static void __init dtb_ioapic_setup(void)
 257 {
 258         struct device_node *dn;
 259
 260         if (!smp_found_config)
 261                 return;
 262
 263         for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
 264                 dtb_add_ioapic(dn);
 265
 266         if (nr_ioapics) {
 267                 of_ioapic = 1;
 268                 return;
 269         }
 270         printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
 271         smp_found_config = 0;
 272 }
 273 #else
 274 static void __init dtb_ioapic_setup(void) {}
 275 #endif
 276
 277 static void __init dtb_apic_setup(void)
 278 {
 279         dtb_lapic_setup();
 280         dtb_ioapic_setup();
 281 }
 282
 283 void __init x86_dtb_find_config(void)
 284 {
 285         if (initial_dtb)
 286                 smp_found_config = 1;
 287         else
 288                 printk(KERN_ERR "Missing device tree!.\n");
 289 }
 290
 291 void __init x86_dtb_get_config(unsigned int unused)
 292 {
 293         u32 size, map_len;
 294         void *new_dtb;
 295
 296         if (!initial_dtb)
 297                 return;
 298
 299         map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
 300                         (u64)sizeof(struct boot_param_header));
 301
 302         initial_boot_params = early_memremap(initial_dtb, map_len);
 303         size = be32_to_cpu(initial_boot_params->totalsize);
 304         if (map_len < size) {
 305                 early_iounmap(initial_boot_params, map_len);
 306                 initial_boot_params = early_memremap(initial_dtb, size);
 307                 map_len = size;
 308         }
 309
 310         new_dtb = alloc_bootmem(size);
 311         memcpy(new_dtb, initial_boot_params, size);
 312         early_iounmap(initial_boot_params, map_len);
 313
 314         initial_boot_params = new_dtb;
 315
 316         /* root level address cells */
 317         of_scan_flat_dt(early_init_dt_scan_root, NULL);
 318
 319         unflatten_device_tree();
 320         dtb_setup_hpet();
 321         dtb_apic_setup();
 322 }
 323
 324 #ifdef CONFIG_X86_IO_APIC
 325
 326 struct of_ioapic_type {
 327         u32 out_type;
 328         u32 trigger;
 329         u32 polarity;
 330 };
 331
 332 static struct of_ioapic_type of_ioapic_type[] =
 333 {
 334         {
 335                 .out_type       = IRQ_TYPE_EDGE_RISING,
 336                 .trigger        = IOAPIC_EDGE,
 337                 .polarity       = 1,
 338         },
 339         {
 340                 .out_type       = IRQ_TYPE_LEVEL_LOW,
 341                 .trigger        = IOAPIC_LEVEL,
 342                 .polarity       = 0,
 343         },
 344         {
 345                 .out_type       = IRQ_TYPE_LEVEL_HIGH,
 346                 .trigger        = IOAPIC_LEVEL,
 347                 .polarity       = 1,
 348         },
 349         {
 350                 .out_type       = IRQ_TYPE_EDGE_FALLING,
 351                 .trigger        = IOAPIC_EDGE,
 352                 .polarity       = 0,
 353         },
 354 };
 355
 356 static int ioapic_xlate(struct irq_domain *id, const u32 *intspec, u32 intsize,
 357                         u32 *out_hwirq, u32 *out_type)
 358 {
 359         struct io_apic_irq_attr attr;
 360         struct of_ioapic_type *it;
 361         u32 line, idx, type;
 362
 363         if (intsize < 2)
 364                 return -EINVAL;
 365
 366         line = *intspec;
 367         idx = (u32) id->priv;
 368         *out_hwirq = line + mp_gsi_routing[idx].gsi_base;
 369
 370         intspec++;
 371         type = *intspec;
 372
 373         if (type >= ARRAY_SIZE(of_ioapic_type))
 374                 return -EINVAL;
 375
 376         it = of_ioapic_type + type;
 377         *out_type = it->out_type;
 378
 379         set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity);
 380
 381         return io_apic_setup_irq_pin(*out_hwirq, cpu_to_node(0), &attr);
 382 }
 383
 384 static void __init ioapic_add_ofnode(struct device_node *np)
 385 {
 386         struct resource r;
 387         int i, ret;
 388
 389         ret = of_address_to_resource(np, 0, &r);
 390         if (ret) {
 391                 printk(KERN_ERR "Failed to obtain address for %s\n",
 392                                 np->full_name);
 393                 return;
 394         }
 395
 396         for (i = 0; i < nr_ioapics; i++) {
 397                 if (r.start == mp_ioapics[i].apicaddr) {
 398                         struct irq_domain *id;
 399
 400                         id = kzalloc(sizeof(*id), GFP_KERNEL);
 401                         BUG_ON(!id);
 402                         id->controller = np;
 403                         id->xlate = ioapic_xlate;
 404                         id->priv = (void *)i;
 405                         add_interrupt_host(id);
 406                         return;
 407                 }
 408         }
 409         printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name);
 410 }
 411
 412 void __init x86_add_irq_domains(void)
 413 {
 414         struct device_node *dp;
 415
 416         if (!initial_boot_params)
 417                 return;
 418
 419         for_each_node_with_property(dp, "interrupt-controller") {
 420                 if (of_device_is_compatible(dp, "intel,ce4100-ioapic"))
 421                         ioapic_add_ofnode(dp);
 422         }
 423 }
 424 #else
 425 void __init x86_add_irq_domains(void) { }
 426 #endif