[SPARC64]: Add missing HPAGE_MASK masks on address parameters.
[linux-2.6/libata-dev.git] / arch / arm / plat-omap / devices.c
blobdbc3f44e07a603f8b891c2901e1223a846dc34f1
1 /*
2 * linux/arch/arm/plat-omap/devices.c
4 * Common platform device setup/initialization for OMAP1 and OMAP2
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
17 #include <asm/hardware.h>
18 #include <asm/io.h>
19 #include <asm/mach-types.h>
20 #include <asm/mach/map.h>
22 #include <asm/arch/tc.h>
23 #include <asm/arch/board.h>
24 #include <asm/arch/mux.h>
25 #include <asm/arch/gpio.h>
26 #include <asm/arch/menelaus.h>
28 #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
30 #define OMAP1_I2C_BASE 0xfffb3800
31 #define OMAP2_I2C_BASE1 0x48070000
32 #define OMAP_I2C_SIZE 0x3f
33 #define OMAP1_I2C_INT INT_I2C
34 #define OMAP2_I2C_INT1 56
36 static struct resource i2c_resources1[] = {
38 .start = 0,
39 .end = 0,
40 .flags = IORESOURCE_MEM,
43 .start = 0,
44 .flags = IORESOURCE_IRQ,
48 /* DMA not used; works around erratum writing to non-empty i2c fifo */
50 static struct platform_device omap_i2c_device1 = {
51 .name = "i2c_omap",
52 .id = 1,
53 .num_resources = ARRAY_SIZE(i2c_resources1),
54 .resource = i2c_resources1,
57 /* See also arch/arm/mach-omap2/devices.c for second I2C on 24xx */
58 static void omap_init_i2c(void)
60 if (cpu_is_omap24xx()) {
61 i2c_resources1[0].start = OMAP2_I2C_BASE1;
62 i2c_resources1[0].end = OMAP2_I2C_BASE1 + OMAP_I2C_SIZE;
63 i2c_resources1[1].start = OMAP2_I2C_INT1;
64 } else {
65 i2c_resources1[0].start = OMAP1_I2C_BASE;
66 i2c_resources1[0].end = OMAP1_I2C_BASE + OMAP_I2C_SIZE;
67 i2c_resources1[1].start = OMAP1_I2C_INT;
70 /* FIXME define and use a boot tag, in case of boards that
71 * either don't wire up I2C, or chips that mux it differently...
72 * it can include clocking and address info, maybe more.
74 if (cpu_is_omap24xx()) {
75 omap_cfg_reg(M19_24XX_I2C1_SCL);
76 omap_cfg_reg(L15_24XX_I2C1_SDA);
77 } else {
78 omap_cfg_reg(I2C_SCL);
79 omap_cfg_reg(I2C_SDA);
82 (void) platform_device_register(&omap_i2c_device1);
85 #else
86 static inline void omap_init_i2c(void) {}
87 #endif
89 /*-------------------------------------------------------------------------*/
90 #if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
92 static void omap_init_kp(void)
94 if (machine_is_omap_h2() || machine_is_omap_h3()) {
95 omap_cfg_reg(F18_1610_KBC0);
96 omap_cfg_reg(D20_1610_KBC1);
97 omap_cfg_reg(D19_1610_KBC2);
98 omap_cfg_reg(E18_1610_KBC3);
99 omap_cfg_reg(C21_1610_KBC4);
101 omap_cfg_reg(G18_1610_KBR0);
102 omap_cfg_reg(F19_1610_KBR1);
103 omap_cfg_reg(H14_1610_KBR2);
104 omap_cfg_reg(E20_1610_KBR3);
105 omap_cfg_reg(E19_1610_KBR4);
106 omap_cfg_reg(N19_1610_KBR5);
107 } else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
108 omap_cfg_reg(E2_730_KBR0);
109 omap_cfg_reg(J7_730_KBR1);
110 omap_cfg_reg(E1_730_KBR2);
111 omap_cfg_reg(F3_730_KBR3);
112 omap_cfg_reg(D2_730_KBR4);
114 omap_cfg_reg(C2_730_KBC0);
115 omap_cfg_reg(D3_730_KBC1);
116 omap_cfg_reg(E4_730_KBC2);
117 omap_cfg_reg(F4_730_KBC3);
118 omap_cfg_reg(E3_730_KBC4);
119 } else if (machine_is_omap_h4()) {
120 omap_cfg_reg(T19_24XX_KBR0);
121 omap_cfg_reg(R19_24XX_KBR1);
122 omap_cfg_reg(V18_24XX_KBR2);
123 omap_cfg_reg(M21_24XX_KBR3);
124 omap_cfg_reg(E5__24XX_KBR4);
125 if (omap_has_menelaus()) {
126 omap_cfg_reg(B3__24XX_KBR5);
127 omap_cfg_reg(AA4_24XX_KBC2);
128 omap_cfg_reg(B13_24XX_KBC6);
129 } else {
130 omap_cfg_reg(M18_24XX_KBR5);
131 omap_cfg_reg(H19_24XX_KBC2);
132 omap_cfg_reg(N19_24XX_KBC6);
134 omap_cfg_reg(R20_24XX_KBC0);
135 omap_cfg_reg(M14_24XX_KBC1);
136 omap_cfg_reg(V17_24XX_KBC3);
137 omap_cfg_reg(P21_24XX_KBC4);
138 omap_cfg_reg(L14_24XX_KBC5);
141 #else
142 static inline void omap_init_kp(void) {}
143 #endif
145 /*-------------------------------------------------------------------------*/
147 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
149 #ifdef CONFIG_ARCH_OMAP24XX
150 #define OMAP_MMC1_BASE 0x4809c000
151 #define OMAP_MMC1_INT INT_24XX_MMC_IRQ
152 #else
153 #define OMAP_MMC1_BASE 0xfffb7800
154 #define OMAP_MMC1_INT INT_MMC
155 #endif
156 #define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */
158 static struct omap_mmc_conf mmc1_conf;
160 static u64 mmc1_dmamask = 0xffffffff;
162 static struct resource mmc1_resources[] = {
164 .start = OMAP_MMC1_BASE,
165 .end = OMAP_MMC1_BASE + 0x7f,
166 .flags = IORESOURCE_MEM,
169 .start = OMAP_MMC1_INT,
170 .flags = IORESOURCE_IRQ,
174 static struct platform_device mmc_omap_device1 = {
175 .name = "mmci-omap",
176 .id = 1,
177 .dev = {
178 .dma_mask = &mmc1_dmamask,
179 .platform_data = &mmc1_conf,
181 .num_resources = ARRAY_SIZE(mmc1_resources),
182 .resource = mmc1_resources,
185 #ifdef CONFIG_ARCH_OMAP16XX
187 static struct omap_mmc_conf mmc2_conf;
189 static u64 mmc2_dmamask = 0xffffffff;
191 static struct resource mmc2_resources[] = {
193 .start = OMAP_MMC2_BASE,
194 .end = OMAP_MMC2_BASE + 0x7f,
195 .flags = IORESOURCE_MEM,
198 .start = INT_1610_MMC2,
199 .flags = IORESOURCE_IRQ,
203 static struct platform_device mmc_omap_device2 = {
204 .name = "mmci-omap",
205 .id = 2,
206 .dev = {
207 .dma_mask = &mmc2_dmamask,
208 .platform_data = &mmc2_conf,
210 .num_resources = ARRAY_SIZE(mmc2_resources),
211 .resource = mmc2_resources,
213 #endif
215 static void __init omap_init_mmc(void)
217 const struct omap_mmc_config *mmc_conf;
218 const struct omap_mmc_conf *mmc;
220 /* NOTE: assumes MMC was never (wrongly) enabled */
221 mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
222 if (!mmc_conf)
223 return;
225 /* block 1 is always available and has just one pinout option */
226 mmc = &mmc_conf->mmc[0];
227 if (mmc->enabled) {
228 if (cpu_is_omap24xx()) {
229 omap_cfg_reg(H18_24XX_MMC_CMD);
230 omap_cfg_reg(H15_24XX_MMC_CLKI);
231 omap_cfg_reg(G19_24XX_MMC_CLKO);
232 omap_cfg_reg(F20_24XX_MMC_DAT0);
233 omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
234 omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
235 } else {
236 omap_cfg_reg(MMC_CMD);
237 omap_cfg_reg(MMC_CLK);
238 omap_cfg_reg(MMC_DAT0);
239 if (cpu_is_omap1710()) {
240 omap_cfg_reg(M15_1710_MMC_CLKI);
241 omap_cfg_reg(P19_1710_MMC_CMDDIR);
242 omap_cfg_reg(P20_1710_MMC_DATDIR0);
245 if (mmc->wire4) {
246 if (cpu_is_omap24xx()) {
247 omap_cfg_reg(H14_24XX_MMC_DAT1);
248 omap_cfg_reg(E19_24XX_MMC_DAT2);
249 omap_cfg_reg(D19_24XX_MMC_DAT3);
250 omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
251 omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
252 omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
253 } else {
254 omap_cfg_reg(MMC_DAT1);
255 /* NOTE: DAT2 can be on W10 (here) or M15 */
256 if (!mmc->nomux)
257 omap_cfg_reg(MMC_DAT2);
258 omap_cfg_reg(MMC_DAT3);
261 mmc1_conf = *mmc;
262 (void) platform_device_register(&mmc_omap_device1);
265 #ifdef CONFIG_ARCH_OMAP16XX
266 /* block 2 is on newer chips, and has many pinout options */
267 mmc = &mmc_conf->mmc[1];
268 if (mmc->enabled) {
269 if (!mmc->nomux) {
270 omap_cfg_reg(Y8_1610_MMC2_CMD);
271 omap_cfg_reg(Y10_1610_MMC2_CLK);
272 omap_cfg_reg(R18_1610_MMC2_CLKIN);
273 omap_cfg_reg(W8_1610_MMC2_DAT0);
274 if (mmc->wire4) {
275 omap_cfg_reg(V8_1610_MMC2_DAT1);
276 omap_cfg_reg(W15_1610_MMC2_DAT2);
277 omap_cfg_reg(R10_1610_MMC2_DAT3);
280 /* These are needed for the level shifter */
281 omap_cfg_reg(V9_1610_MMC2_CMDDIR);
282 omap_cfg_reg(V5_1610_MMC2_DATDIR0);
283 omap_cfg_reg(W19_1610_MMC2_DATDIR1);
286 /* Feedback clock must be set on OMAP-1710 MMC2 */
287 if (cpu_is_omap1710())
288 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
289 MOD_CONF_CTRL_1);
290 mmc2_conf = *mmc;
291 (void) platform_device_register(&mmc_omap_device2);
293 #endif
294 return;
296 #else
297 static inline void omap_init_mmc(void) {}
298 #endif
300 /*-------------------------------------------------------------------------*/
302 /* Numbering for the SPI-capable controllers when used for SPI:
303 * spi = 1
304 * uwire = 2
305 * mmc1..2 = 3..4
306 * mcbsp1..3 = 5..7
309 #if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
311 #define OMAP_UWIRE_BASE 0xfffb3000
313 static struct resource uwire_resources[] = {
315 .start = OMAP_UWIRE_BASE,
316 .end = OMAP_UWIRE_BASE + 0x20,
317 .flags = IORESOURCE_MEM,
321 static struct platform_device omap_uwire_device = {
322 .name = "omap_uwire",
323 .id = -1,
324 .num_resources = ARRAY_SIZE(uwire_resources),
325 .resource = uwire_resources,
328 static void omap_init_uwire(void)
330 /* FIXME define and use a boot tag; not all boards will be hooking
331 * up devices to the microwire controller, and multi-board configs
332 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
335 /* board-specific code must configure chipselects (only a few
336 * are normally used) and SCLK/SDI/SDO (each has two choices).
338 (void) platform_device_register(&omap_uwire_device);
340 #else
341 static inline void omap_init_uwire(void) {}
342 #endif
344 /*-------------------------------------------------------------------------*/
346 #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
348 #ifdef CONFIG_ARCH_OMAP24XX
349 #define OMAP_WDT_BASE 0x48022000
350 #else
351 #define OMAP_WDT_BASE 0xfffeb000
352 #endif
354 static struct resource wdt_resources[] = {
356 .start = OMAP_WDT_BASE,
357 .end = OMAP_WDT_BASE + 0x4f,
358 .flags = IORESOURCE_MEM,
362 static struct platform_device omap_wdt_device = {
363 .name = "omap_wdt",
364 .id = -1,
365 .num_resources = ARRAY_SIZE(wdt_resources),
366 .resource = wdt_resources,
369 static void omap_init_wdt(void)
371 (void) platform_device_register(&omap_wdt_device);
373 #else
374 static inline void omap_init_wdt(void) {}
375 #endif
377 /*-------------------------------------------------------------------------*/
379 #if defined(CONFIG_OMAP_RNG) || defined(CONFIG_OMAP_RNG_MODULE)
381 #ifdef CONFIG_ARCH_OMAP24XX
382 #define OMAP_RNG_BASE 0x480A0000
383 #else
384 #define OMAP_RNG_BASE 0xfffe5000
385 #endif
387 static struct resource rng_resources[] = {
389 .start = OMAP_RNG_BASE,
390 .end = OMAP_RNG_BASE + 0x4f,
391 .flags = IORESOURCE_MEM,
395 static struct platform_device omap_rng_device = {
396 .name = "omap_rng",
397 .id = -1,
398 .num_resources = ARRAY_SIZE(rng_resources),
399 .resource = rng_resources,
402 static void omap_init_rng(void)
404 (void) platform_device_register(&omap_rng_device);
406 #else
407 static inline void omap_init_rng(void) {}
408 #endif
411 * This gets called after board-specific INIT_MACHINE, and initializes most
412 * on-chip peripherals accessible on this board (except for few like USB):
414 * (a) Does any "standard config" pin muxing needed. Board-specific
415 * code will have muxed GPIO pins and done "nonstandard" setup;
416 * that code could live in the boot loader.
417 * (b) Populating board-specific platform_data with the data drivers
418 * rely on to handle wiring variations.
419 * (c) Creating platform devices as meaningful on this board and
420 * with this kernel configuration.
422 * Claiming GPIOs, and setting their direction and initial values, is the
423 * responsibility of the device drivers. So is responding to probe().
425 * Board-specific knowlege like creating devices or pin setup is to be
426 * kept out of drivers as much as possible. In particular, pin setup
427 * may be handled by the boot loader, and drivers should expect it will
428 * normally have been done by the time they're probed.
430 static int __init omap_init_devices(void)
432 /* please keep these calls, and their implementations above,
433 * in alphabetical order so they're easier to sort through.
435 omap_init_i2c();
436 omap_init_kp();
437 omap_init_mmc();
438 omap_init_uwire();
439 omap_init_wdt();
440 omap_init_rng();
442 return 0;
444 arch_initcall(omap_init_devices);